Re: [Mesa-dev] [PATCH 3/3] radeonsi: don't emit partial flushes for internal CS flushes only

Patchwork didnt recognize the message header resend Hi Marek, your patches dont apply cleanly (src/gallium/drivers/radeonsi/si_gfx_cs.c in particular) Rebase? Other than that: Dirt Rally (avg,min,max) before 54/35/73 after 54/41/73 My system is GPU bound. RX560 OC with 4GB (aka reflashed

Re: [Mesa-dev] [1/3] radeonsi: implement mechanism for IBs without partial flushes at the end (v6)

Hi Marek, I just tried different combinations: this and with meta ctx->flags |= SI_CONTEXT_INV_ICACHE | SI_CONTEXT_INV_SMEM_L1 | SI_CONTEXT_INV_VMEM_L1 | SI_CONTEXT_INV_GLOBAL_L2 |

[Mesa-dev] [PATCH] radv: Enable RB+ where possible.

According to Marek, not enabling it on Stoney has a significant negative performance impact. (And I guess this might impact performance on Raven as well) The register settings are pretty much copied from radeonsi. I did not put this in the pipeline as that would make the pipeline more dependent

Re: [Mesa-dev] [PATCH v4 4/6] spirv: Lower BaseVertex to FIRST_VERTEX instead of BASE_VERTEX

On Fri, Apr 6, 2018 at 2:53 PM, Ian Romanick wrote: > From: Neil Roberts > > The base vertex in Vulkan is different from GL in that for non-indexed > primitives the value is taken from the firstVertex parameter instead > of being set to zero. This

Re: [Mesa-dev] [PATCH v4 5/6] nir: Offset vertex_id by first_vertex instead of base_vertex

The first 5 are Reviewed-by: Jason Ekstrand I meant to just skim and ACK the Vulkan bits but then I did a full review. Oh, well. :-) On Fri, Apr 6, 2018 at 2:53 PM, Ian Romanick wrote: > From: Neil Roberts > > base_vertex will

Re: [Mesa-dev] [PATCH 3/3] radeonsi: don't emit partial flushes, for internal CS flushes only

Hi Marek, your patches dont apply cleanly (src/gallium/drivers/radeonsi/si_gfx_cs.c in particular) Rebase? Other than that: Dirt Rally (avg,min,max) before 54/35/73 after 54/41/73 My system is GPU bound. RX560 OC with 4GB (aka reflashed RX460 ;) For the series: Tested-by: Benedikt Schemmer

Re: [Mesa-dev] [PATCH v4 6/6] i965: gl_BaseVertex must be zero for non-indexed draw calls

On Fri, Apr 6, 2018 at 2:53 PM, Ian Romanick wrote: > From: Antia Puentes > > We keep 'firstvertex' as it is and move gl_BaseVertex to the drawID > vertex element. The previous Vertex Elements order was: > > * VE 1: > * VE 2: > > and now it is: >

Re: [Mesa-dev] [PATCH v4 4/6] spirv: Lower BaseVertex to FIRST_VERTEX instead of BASE_VERTEX

On Sat, Apr 7, 2018 at 10:49 AM, Ian Romanick wrote: > On 04/06/2018 11:00 PM, Jason Ekstrand wrote: > > On Fri, Apr 6, 2018 at 2:53 PM, Ian Romanick > > wrote: > > > > From: Neil Roberts

[Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

From CL 1.2 Section 5.2.1: CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY and flags specify CL_MEM_HOST_READ_ONLY , or if buffer was created with CL_MEM_HOST_READ_ONLY and flags specify CL_MEM_HOST_WRITE_ONLY , or if buffer was created with

[Mesa-dev] [PATCH] gallium: move ddebug, noop, rbug, trace to auxiliary to improve build times

From: Marek Olšák which also simplifies the build scripts. --- configure.ac | 4 --- src/gallium/Makefile.am| 6 src/gallium/SConscript | 2 --

Re: [Mesa-dev] [PATCH] st/mesa: tex offsets can't be in a const or 2d-indexed

ping? On Tue, Apr 3, 2018 at 12:06 AM, Ilia Mirkin wrote: > All consts are now implicitly 2d (they set .Dimension), so trigger > asserts. Also, the texture offset can't handle any sort of 2d indexing. > While this could be tacked on, this seems unnecessary, just move it off

[Mesa-dev] [PATCH] radeonsi: don't set RB+ registers on GFX9 chips without RB+

From: Marek Olšák CLEAR_STATE initializes them properly. --- src/gallium/drivers/radeonsi/si_state.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index

[Mesa-dev] [PATCH 15/16] nir: convert lower_samplers_as_deref to deref instructions

Signed-off-by: Rob Clark --- src/compiler/nir/nir_lower_samplers_as_deref.c | 167 - 1 file changed, 108 insertions(+), 59 deletions(-) diff --git a/src/compiler/nir/nir_lower_samplers_as_deref.c b/src/compiler/nir/nir_lower_samplers_as_deref.c

Re: [Mesa-dev] [PATCH v4 4/6] spirv: Lower BaseVertex to FIRST_VERTEX instead of BASE_VERTEX

On 04/06/2018 11:00 PM, Jason Ekstrand wrote: > On Fri, Apr 6, 2018 at 2:53 PM, Ian Romanick > wrote: > > From: Neil Roberts > > > The base vertex in Vulkan is different from GL in that

[Mesa-dev] [PATCH] nir+vtn: vec8+vec16 support

This introduces new vec8 and vec16 instructions (which are the only instructions taking more than 4 sources), in order to construct 8 and 16 component vectors. In order to avoid fixing up the non-autogenerated nir_build_alu() sites and making them pass 16 src args for the benefit of the two

Re: [Mesa-dev] [PATCH 06/16] nir/print: show deref instruction type

On Sat, Apr 7, 2018 at 10:04 AM, Rob Clark wrote: > On Sat, Apr 7, 2018 at 12:56 PM, Jason Ekstrand > wrote: > > I thought that was fairly obvious from "", "(type *)thing", > > "thing->thing", and "thing[thing]" > > You can tell from the format of what

Re: [Mesa-dev] [PATCH] st/mesa: tex offsets can't be in a const or 2d-indexed

Reviewed-by: Marek Olšák Marek On Tue, Apr 3, 2018 at 12:06 AM, Ilia Mirkin wrote: > All consts are now implicitly 2d (they set .Dimension), so trigger > asserts. Also, the texture offset can't handle any sort of 2d indexing. > While this could be

Re: [Mesa-dev] [PATCH 07/16] nir/print: add type names for deref instr

Yeah, something like this would be good. I don't like how the syntax clashes with casts though. I'll think on it. :-) On Sat, Apr 7, 2018 at 9:13 AM, Rob Clark wrote: > It was only shown in deref_cast instructions. But it makes things > easier to follow to show the

Re: [Mesa-dev] [PATCH 02/16] nir: add comment about nir_src_copy()

Rb On April 7, 2018 09:14:03 Rob Clark wrote: So it is more clear about when to use nir_instr_rewrite_src() Signed-off-by: Rob Clark --- An assert would be nice too, but wasn't sure how to differentiate between the parent_instr and parent_if case.

Re: [Mesa-dev] [PATCH 16/16] freedreno/ir3: convert to deref instructions

On April 7, 2018 09:14:20 Rob Clark wrote: Signed-off-by: Rob Clark --- .../drivers/freedreno/ir3/ir3_compiler_nir.c | 46 +++--- src/gallium/drivers/freedreno/ir3/ir3_nir.c| 4 +-

Re: [Mesa-dev] [PATCH 04/16] mesa/st/nir: fix instruction removal

Yeah, that's bad. 3-4 are Reviewed-by: Jason Ekstrand On Sat, Apr 7, 2018 at 9:13 AM, Rob Clark wrote: > At one point this kinda worked (or at least didn't cause problems). But > with deref-instructions it results in dangling deref instructions not

Re: [Mesa-dev] [PATCH 06/16] nir/print: show deref instruction type

I thought that was fairly obvious from "", "(type *)thing", "thing->thing", and "thing[thing]" I guess it's probably ok but it didn't seem necessary to me. One thing I did sort-of want to do was to make it print the full deref back to the variable if possible. I'll give a go at that and send

Re: [Mesa-dev] [PATCH 06/16] nir/print: show deref instruction type

On Sat, Apr 7, 2018 at 12:56 PM, Jason Ekstrand wrote: > I thought that was fairly obvious from "", "(type *)thing", > "thing->thing", and "thing[thing]" You can tell from the format of what comes after the "deref".. but I'm a fan of making it *really* obvious (ie. helps

[Mesa-dev] [PATCH 05/16] nir: promote intrinsic_get_var() to helper

Useful in a few other places.. let's not copy-pasta Signed-off-by: Rob Clark --- src/compiler/nir/nir.h | 6 ++ src/compiler/nir/nir_propagate_invariant.c | 14 -- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git

[Mesa-dev] [PATCH 03/16] mesa/st/nir: fix naked lowering pass call

Not using the macro means no nir_validate in debug builds, resulting in problems showing up only after later passes. Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 04/16] mesa/st/nir: fix instruction removal

At one point this kinda worked (or at least didn't cause problems). But with deref-instructions it results in dangling deref instructions not being properly removed. Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_nir_lower_builtin.c | 2 +- 1 file changed, 1

[Mesa-dev] [PATCH 06/16] nir/print: show deref instruction type

Makes it more obvious what sort of deref instruction something is. Signed-off-by: Rob Clark --- src/compiler/nir/nir_print.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index

[Mesa-dev] [PATCH 12/16] Revert "HACK! nir: Disable building a couple passes"

This reverts commit 28847bbe8d6f65f1bba7197f80c58054183b1c8c. --- src/compiler/Makefile.sources | 3 +++ src/compiler/nir/meson.build | 6 +++--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources index

[Mesa-dev] [PATCH 13/16] nir: convert lower_io_arrays_to_elements to deref instructions

Signed-off-by: Rob Clark --- src/compiler/nir/nir_lower_io_arrays_to_elements.c | 149 ++--- 1 file changed, 73 insertions(+), 76 deletions(-) diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c

[Mesa-dev] [PATCH 09/16] RFC: nir: cleanup dead deref instructions

--- src/compiler/nir/nir.h | 4 +++- src/compiler/nir/nir_deref.c| 22 -- src/compiler/nir/nir_validate.c | 5 + 3 files changed, 28 insertions(+), 3 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 4ec42b4406b..fe5a79d5f5a

[Mesa-dev] [PATCH 11/16] mesa/st/nir: convert lower_builtins to deref instructions

Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_nir_lower_builtin.c | 51 +++ 1 file changed, 29 insertions(+), 22 deletions(-) diff --git a/src/mesa/state_tracker/st_nir_lower_builtin.c b/src/mesa/state_tracker/st_nir_lower_builtin.c index

[Mesa-dev] [PATCH 16/16] freedreno/ir3: convert to deref instructions

Signed-off-by: Rob Clark --- .../drivers/freedreno/ir3/ir3_compiler_nir.c | 46 +++--- src/gallium/drivers/freedreno/ir3/ir3_nir.c| 4 +- .../freedreno/ir3/ir3_nir_lower_tg4_to_tex.c | 4 +- 3 files changed, 26 insertions(+), 28

[Mesa-dev] [PATCH 07/16] nir/print: add type names for deref instr

It was only shown in deref_cast instructions. But it makes things easier to follow to show the intermediate types in deref_array/ deref_struct instructions too. Signed-off-by: Rob Clark --- src/compiler/nir/nir_print.c | 5 +++-- 1 file changed, 3 insertions(+), 2

[Mesa-dev] [PATCH 10/16] ttn: convert to deref instructions

Signed-off-by: Rob Clark --- src/gallium/auxiliary/nir/tgsi_to_nir.c | 52 + 1 file changed, 13 insertions(+), 39 deletions(-) diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index

[Mesa-dev] [PATCH 01/16] fixup! nir: Remove old-school deref chain support

--- src/amd/vulkan/radv_shader.c| 2 -- src/compiler/nir/nir.h | 3 --- src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 3 --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 -- 4 files changed, 10 deletions(-) diff --git

[Mesa-dev] [PATCH 00/16] nir+gallium: Move to using instructions for derefs

This applies on top of Jason's v3 patchset of the same name[1], and converts the remaining nir passes only used by gallium drivers, plus the tgsi_to_nir frontend, and in the end converts the ir3 backend. The first patch is just some small fixups to one of Jason's patches (which he might already

[Mesa-dev] [PATCH 02/16] nir: add comment about nir_src_copy()

So it is more clear about when to use nir_instr_rewrite_src() Signed-off-by: Rob Clark --- An assert would be nice too, but wasn't sure how to differentiate between the parent_instr and parent_if case. src/compiler/nir/nir.c | 3 +++ 1 file changed, 3 insertions(+) diff

[Mesa-dev] [PATCH 08/16] RFC: nir: typedef'ify nir_deref_path

For better or worse, the rest of nir follows the typedef struct pattern. So I guess better to be consistent. Signed-off-by: Rob Clark --- src/compiler/nir/nir_deref.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_deref.h

[Mesa-dev] [PATCH 14/16] nir: convert lower_io_to_scalar to deref instructions

Signed-off-by: Rob Clark --- src/compiler/nir/nir_lower_io_to_scalar.c | 88 +++ 1 file changed, 43 insertions(+), 45 deletions(-) diff --git a/src/compiler/nir/nir_lower_io_to_scalar.c b/src/compiler/nir/nir_lower_io_to_scalar.c index

Re: [Mesa-dev] [PATCH 08/16] RFC: nir: typedef'ify nir_deref_path

I've already done this in my branch On Sat, Apr 7, 2018 at 9:13 AM, Rob Clark wrote: > For better or worse, the rest of nir follows the typedef struct pattern. > So I guess better to be consistent. > > Signed-off-by: Rob Clark > --- >

Re: [Mesa-dev] [PATCH 16/16] freedreno/ir3: convert to deref instructions

On Sat, Apr 7, 2018 at 12:42 PM, Jason Ekstrand wrote: > On April 7, 2018 09:14:20 Rob Clark wrote: > > Signed-off-by: Rob Clark > --- > .../drivers/freedreno/ir3/ir3_compiler_nir.c | 46 > +++--- >

[Mesa-dev] [PATCH v5 3/4] st/mesa: add support for nvidia conservative rasterization extensions

Signed-off-by: Rhys Perry Reviewed-by: Brian Paul Reviewed-by: Marek Olšák --- src/mesa/state_tracker/st_atom_rasterizer.c | 15 + src/mesa/state_tracker/st_context.c | 2 ++

[Mesa-dev] [PATCH v5 1/4] mesa: add support for nvidia conservative rasterization extensions

Although the specs are written against compatibility GL 4.3 and allows core profile and GLES2+, it is exposed for GL 1.0+ and GLES1 and GLES2+. Signed-off-by: Rhys Perry --- src/mapi/glapi/gen/gl_API.xml | 47 src/mapi/glapi/gen/gl_genexec.py

[Mesa-dev] [PATCH v5 0/4] Implement Various Conservative Rasterization Extensions

This patch-set adds support for GL_NV_conservative_raster and GL_NV_conservative_raster_dilate on GM2xx and newer. It also adds support for GL_NV_conservative_raster_pre_snap_triangles on GP1xx. In doing so, it implements various functions in mesa core, extends the Gallium API, connects the new

[Mesa-dev] [PATCH v5 2/4] gallium: add initial support for conservative rasterization

Signed-off-by: Rhys Perry Reviewed-by: Brian Paul Reviewed-by: Marek Olšák --- src/gallium/docs/source/cso/rasterizer.rst | 23 +++ src/gallium/docs/source/screen.rst | 18

[Mesa-dev] [PATCH v5 4/4] nvc0: add conservative rasterization support

Subpixel precision bias, dilation and the post-snap mode are supported on GM200 and newer. The pre-snap mode is supported for triangle primitives on GP100. Signed-off-by: Rhys Perry Reviewed-by: Ilia Mirkin ---

Re: [Mesa-dev] [PATCH 4/4] radv: implement VK_AMD_shader_core_properties

On Fri, Apr 6, 2018 at 2:28 PM, Samuel Pitoiset wrote: > Simple extension that only returns information for AMD hw. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_device.c | 71 > +++

Re: [Mesa-dev] [PATCH v4 4/4] nvc0: add conservative rasterization support

Reviewed-by: Ilia Mirkin On Wed, Mar 28, 2018 at 3:22 PM, Rhys Perry wrote: > Subpixel precision bias, dilation and the post-snap mode are supported on > GM200 and newer. The pre-snap mode is supported for triangle primitives on > GP100. > --- >

Re: [Mesa-dev] [PATCH 0/8] radv: some cleanups & preliminary work for DCC MSAA

Thanks. The series is Reviewed-by: Bas Nieuwenhuizen On Fri, Apr 6, 2018 at 7:34 PM, Samuel Pitoiset wrote: > Hi, > > This small series is a preliminary work before doing some > improvements in the DCC/CMASK/FMASK codepaths. What I plan to

Re: [Mesa-dev] [PATCH v3 024/104] nir: Support deref instructions in lower_system_values

On Fri, Apr 6, 2018 at 10:37 PM, Jason Ekstrand wrote: > On Fri, Apr 6, 2018 at 2:47 PM, Caio Marcelo de Oliveira Filho < > caio.olive...@intel.com> wrote: > >> On Tue, Apr 03, 2018 at 11:32:51AM -0700, Jason Ekstrand wrote: >> > --- >> >

Re: [Mesa-dev] [PATCH] trace: allow image resource to be null

ping On Tue, Feb 27, 2018 at 12:19 AM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin > --- > src/gallium/drivers/trace/tr_dump_state.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git