Re: [Mesa-dev] [PATCH] mesa/math: Allocate memory for GLmatrix elements and its inverse contiguously

Hi, and thanks for the patch =) Have you done any performance testing on this to verify it gives us a speedup of any kind? I'm asking because it seems like this might be something that a decent compiler should be able to do. Performance related patches, at least in core mesa, usually have some

Re: [Mesa-dev] [PATCH] swr: Remove unnecessary memset call

Reviewed-By: George Kyriazis > On Apr 12, 2018, at 8:49 PM, Vlad Golovkin > wrote: Zeroing memory after calloc is not necessary. This also allows to avoid possible

Re: [Mesa-dev] [PATCH v2] anv: fix number of planes for depth & stencil

Thanks a lot Juan, it looks all good to me :) On 16/04/18 04:09, Juan A. Suarez Romero wrote: On Thu, 2018-04-12 at 14:54 -0700, Lionel Landwerlin wrote: We're not counting correctly with depth & stencil images. Additionally we need to move an assert that is meant just for color attachments.

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 --- Comment #1 from Philip Rebohle --- Created attachment 138867 --> https://bugs.freedesktop.org/attachment.cgi?id=138867=edit Proposed patch The attached patch fixes the issue in FF XIV. I'm not sure if that

Re: [Mesa-dev] [PATCH 3/3] meson: Version libMesaOpenCL like autotools does

Yes, please. Fixes clover platform and device detection when installed in /usr/local/ using ocl-icd for me when building with meson. I think that was the last thing blocking me from switching over from autotools on the rest of my machines. Not familiar enough with the versioning/linking in

Re: [Mesa-dev] [PATCH 1/2] intel/compiler: grf127 can not be dest when src and dest overlap in send

On 15/04/18 08:55, Matt Turner wrote: > On Wed, Apr 11, 2018 at 7:30 PM, Jose Maria Casanova Crespo > wrote: >> Implement at brw_eu_validate the restriction from Intel Broadwell PRM, vol >> 07, >> section "Instruction Set Reference", subsection "EUISA Instructions", Send

Re: [Mesa-dev] [PATCH 1/3] radeonsi: implement mechanism for IBs without partial flushes at the end (v6)

On Mon, Apr 16, 2018, 4:52 AM Christian König < ckoenig.leichtzumer...@gmail.com> wrote: > Am 15.04.2018 um 20:46 schrieb Nicolai Hähnle: > > On 07.04.2018 04:31, Marek Olšák wrote: > >> From: Marek Olšák > >> > >> (This patch doesn't enable the behavior. It will be enabled

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

You never check EXT_texture_norm16 anywhere... is that right? Should probably respect that in the _mesa_is_es3_* helpers. Also what about shader support? I see no mention in the spec that these should be usable as images, except with NV_image_formats is enabled. You're just exposing them no matter

Re: [Mesa-dev] [PATCH] nir: fix ir_binop_gequal glsl_to_nir conversion

On Mon, Apr 16, 2018 at 6:45 AM, Erico Nunes wrote: > On Sun, Apr 15, 2018 at 2:30 AM, Jason Ekstrand > wrote: > > On April 14, 2018 12:43:35 Connor Abbott wrote: > > I think that it's probably impractical to use this path, and

[Mesa-dev] [PATCH 2/2] i965: enable EXT_texture_norm16 for i965

Signed-off-by: Tapani Pälli --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 73a6c73f53..88a66e9e26 100644 ---

[Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

Patch enables use of short and unsigned short data for texture uploads, rendering and reading of framebuffers within the restrictions specified in GL_EXT_texture_norm16 spec. Patch also enables those 16bit format layout qualifiers listed in GL_NV_image_formats that depend on EXT_texture_norm16.

Re: [Mesa-dev] [PATCH 1/2] vulkan: Update the XML and headers to 1.1.73

Acked-by: Samuel Pitoiset On 04/16/2018 04:38 PM, Jason Ekstrand wrote: --- include/vulkan/vulkan_core.h | 2 +- src/vulkan/registry/vk.xml | 10 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/vulkan/vulkan_core.h

Re: [Mesa-dev] [PATCH 2/2] anv, radv: Drop XML workarounds for VK_ANDROID_native_buffer

Reviewed-by: Samuel Pitoiset On 04/16/2018 04:38 PM, Jason Ekstrand wrote: --- src/amd/vulkan/radv_extensions.py | 7 +-- src/intel/vulkan/anv_extensions_gen.py | 7 +-- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 gloriouseggr...@gmail.com changed: What|Removed |Added CC||gloriouseggr...@gmail.com

Re: [Mesa-dev] [PATCH v2] anv: fix number of planes for depth & stencil

On Thu, 2018-04-12 at 14:54 -0700, Lionel Landwerlin wrote: > We're not counting correctly with depth & stencil images. > > Additionally we need to move an assert that is meant just for color > attachments. > > v2: Move an assert() (Reported by Craig) > Change aspect mask checks (Francesco)

Re: [Mesa-dev] [Mesa-stable] [PATCH] mesa: call DrawBuffer(s) driver hook in update_framebuffer for windows-system FB

On 16/04/18 18:19, Juan A. Suarez Romero wrote: On Fri, 2018-04-13 at 08:17 -0600, Brian Paul wrote: Hi Brain, are you happy if we push this in the meantime? It seems to impact a number of apps running on Wine? I don't have time to look at it myself right now. So if it looks good to you and

Re: [Mesa-dev] [Mesa-stable] [PATCH] mesa: call DrawBuffer(s) driver hook in update_framebuffer for windows-system FB

On Mon, 2018-04-16 at 22:17 +1000, Timothy Arceri wrote: > > Thanks for the feedback. J.A. > On 16/04/18 18:19, Juan A. Suarez Romero wrote: > > > On Fri, 2018-04-13 at 08:17 -0600, Brian Paul wrote: > > > > Hi Brain, are you happy if we push this in the meantime? It seems to > > >

[Mesa-dev] [PATCH v7 09/35] nvir/nir: run some passes to make the conversion easier

v2: add constant_folding v6: print non final NIR only for verbose debugging Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 39 ++ 1 file changed, 39 insertions(+) diff --git

[Mesa-dev] [PATCH v7 25/35] nvir/nir: implement nir_instr_type_tex

a lot of those fields are not valid for a lot of tex ops. Not quite sure if it's worth the effort to check for those or just keep it like that. It seems to kind of work. v2: reworked offset handling add tex support with indirect R/S arguments handle GLSL_SAMPLER_DIM_EXTERNAL drop

[Mesa-dev] [PATCH v7 22/35] nvir/nir: implement intrinsic_discard(_if)

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 34/35] nvir/nir: implement load_per_vertex_output

v4: use smarter getIndirect helper use new getSlotAddress helper v5: use loadFrom helper Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 23 ++ 1 file changed, 23 insertions(+) diff --git

[Mesa-dev] [PATCH v7 23/35] nvir/nir: implement loading system values

v2: support more sys values fixed a bug where for multi component reads all values ended up in x v3: add load_patch_vertices_in v4: add subgroup stuff v5: add helper invocation v6: fix loading 64 bit system values Signed-off-by: Karol Herbst ---

[Mesa-dev] [PATCH v7 21/35] nvir/nir: implement load_(interpolated_)input/output

v3: and load_output v4: use smarter getIndirect helper use new getSlotAddress helper v5: don't use const_offset directly fix for indirects v6: add support for interpolateAt v7: fix compiler warnings add load_barycentric_sample handle load_output for fragment shaders Signed-off-by:

[Mesa-dev] [PATCH v7 31/35] nvir/nir: implement ssbo intrinsics

v4: use loadFrom helper v5: support indirect buffer access Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 90 ++ 1 file changed, 90 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 19/35] nvir/nir: implement nir_intrinsic_load_uniform

v2: use new getIndirect helper fixes symbols for 64 bit types v4: use smarter getIndirect helper simplify address calculation use loadFrom helper Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 10 ++ 1 file

Re: [Mesa-dev] [PATCH] dri3: Prevent multiple freeing of buffers.

Hello (ping) Thomas and Daniel, any more suggestions? As i can see Eero has done a test-run and v2 also looks good. As alternative solution we also may try to call '*dri3_fence_await(draw->conn, draw, buffer)'* with '*draw*'-parameter as '*NULL'.* What do you think? On Tue, Apr 10, 2018 at 11:10

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 Bug ID: 106074 Summary: radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset Product: Mesa Version: git Hardware: Other

[Mesa-dev] [PATCH v7 27/35] nvir/nir: implement vote and ballot

v2: add vote_eq support use the new subop intrinsic helper add ballot v3: add read_(first_)invocation Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 42 ++ 1 file changed, 42 insertions(+) diff --git

[Mesa-dev] [PATCH v7 20/35] nvir/nir: implement nir_intrinsic_store_(per_vertex_)output

v3: add workaround for RA issues indirects have to be multiplied by 0x10 fix indirect access v4: use smarter getIndirect helper use storeTo helper v5: don't use const_offset directly Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 26/35] nvir/nir: add getOperation for intrinsics

v7: don't assert in default case Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 22 ++ 1 file changed, 22 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 18/35] nvir/nir: implement nir_alu_instr handling

v2: user bitfield_insert instead of bfi rework switch helper macros remove some lowering code (LoweringHelper is now used for this) v3: add pack_half_2x16_split add unpack_half_2x16_split_x/y v5: replace first argument with nullptr in loadImm calls prefer getSSA over getScratch

[Mesa-dev] [PATCH v7 35/35] nvir/nir: implement intrinsic shader_clock

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index

[Mesa-dev] [PATCH v7 32/35] nvir/nir: implement images

v3: fix compiler warnings v4: use loadFrom helper v5: fix signed min/max v6: set tex mask add support for indirect image access set cache mode v7: make compatible with 884d27bcf688d36c3bbe01bceca525595add3b33 rework the whole deref thing to prepare for bindless Signed-off-by: Karol

[Mesa-dev] [PATCH v7 17/35] nvir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp| 17 + 1 file changed, 17 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 28/35] nvir/nir: implement variable indexing

we store those arrays in local memory and reserve some space for each of the arrays. The arrays are stored in a packed format, because we know quite easily the context of each index. We don't do that in TGSI so far. This causes various issues to come up in the MemoryOpt pass, because ld/st with

[Mesa-dev] [PATCH v7 29/35] nvir/nir: implement geometry shader nir_intrinsics

v4: use smarter getIndirect helper use new getSlotAddress helper use loadFrom helper Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 27 ++ 1 file changed, 27 insertions(+) diff --git

[Mesa-dev] [PATCH v7 24/35] nvir/nir: implement nir_ssa_undef_instr

v2: use mkOp Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 30/35] nvir/nir: implement nir_intrinsic_load_ubo

v4: use loadFrom helper Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 33/35] nvir/nir: add memory barriers

v5: add more barrier intrinsics Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH 1/2] vulkan: Update the XML and headers to 1.1.73

--- include/vulkan/vulkan_core.h | 2 +- src/vulkan/registry/vk.xml | 10 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/vulkan/vulkan_core.h b/include/vulkan/vulkan_core.h index ed0d596..2cafcdd 100644 --- a/include/vulkan/vulkan_core.h +++

[Mesa-dev] [PATCH v7 04/35] nvir: move common converter code in base class

v2: remove TGSI related bits Signed-off-by: Karol Herbst Reviewed-by: Pierre Moreau --- src/gallium/drivers/nouveau/Makefile.sources | 2 + .../nouveau/codegen/nv50_ir_from_common.cpp| 107 +

[Mesa-dev] [PATCH v7 06/35] nouveau: add support for nir

not all those nir options are actually required, it just made the work a little easier. v2: fix asserts parse compute shaders don't lower bitfield_insert v3: fix memory leak v4: don't lower fmod32 v5: set lower_all_io_to_temps to false fix memory leak because we take over ownership of

[Mesa-dev] [PATCH v7 03/35] nvir: print the shader type when dumping headers

this makes debugging the shader header a little easier Signed-off-by: Karol Herbst Acked-by: Pierre Moreau --- src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [PATCH v7 00/35] Nouveau NIR support

Changes to v6: * fixed automake build * fixed shader cache collision with TGSI shaders * fixed handling of inot * fixed location of images * fixed load_output of fragment shaders (FBFETCH) * added load_barycentric_sample handling * some preparation for bindless_texture support There will be some

[Mesa-dev] [PATCH v7 02/35] nv50/ir/ra: Fix copying compound for moves

From: Connor Abbott In order to reduce moves when coalescing multiple registers into a larger register, RA will try to coalesce MERGE instructions with their definitions. For example, for something like this in GLSL: uint a = ...; uint b = ...; uint64 x = packUint2x32(a,

[Mesa-dev] [PATCH v7 12/35] nvir/nir: run assignSlots

v2: add support for geometry shaders set idx add some missing mappings fix for 64bit inputs/outputs fix up some FP color output index messup parse centroid flag v3: fix arrays in outputs as well fix input/ouput size calculation for tessellation shaders v4: add

[Mesa-dev] [PATCH v7 15/35] nvir/nir: implement CFG handling

v6: fix loops with blocks at the end nothing points to skip blocks with no instructions and no predecessors Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 270 - 1 file changed, 268 insertions(+), 2 deletions(-)

[Mesa-dev] [PATCH v7 16/35] nvir/nir: implement nir_load_const_instr

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 14/35] nvir/nir: parse NIR shader info

v2: parse a few more fields v3: add special handling for GL_ISOLINES Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 60 ++ 1 file changed, 60 insertions(+) diff --git

[Mesa-dev] [PATCH v7 05/35] nvir: add lowering helper

this is mostly usefull for lazy IR converters not wanting to deal with 64 bit lowering and other illegal stuff v5: also handle SAT v6: rename type variables fixed lowering of NEG add lowering of NOT Signed-off-by: Karol Herbst ---

[Mesa-dev] [PATCH v7 11/35] nvir/nir: add nir type helper functions

v4: treat imul as unsigned v5: remove pointless !! v7: inot is unsigned as well Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 116 + 1 file changed, 116 insertions(+) diff --git

[Mesa-dev] [PATCH v7 10/35] nvir/nir: track defs and provide easy access functions

v2: add helper function for indirects v4: add new getIndirect overload for easier use v5: use getSSA for ssa values we can just create the values for unassigned registers in getSrc v6: always create at least 32 bit values Signed-off-by: Karol Herbst ---

[Mesa-dev] [PATCH v7 08/35] nouveau: fix nir and TGSI shader cache collision

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/nouveau_screen.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c b/src/gallium/drivers/nouveau/nouveau_screen.c index 2598c78a45b..655d2d090f6

[Mesa-dev] [PATCH v7 13/35] nvir/nir: add loadFrom and storeTo helpler

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 72 ++ 1 file changed, 72 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 soredake changed: What|Removed |Added CC||fds...@krutt.org -- You

[Mesa-dev] [PATCH v7 01/35] st/glsl_to_nir: run lower_output_reads on !PIPE_CAP_TGSI_CAN_READ_OUTPUTS

this is required for Drivers which don't allow reading from outputs. Reviewed-by: Timothy Arceri Signed-off-by: Karol Herbst --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git

[Mesa-dev] [PATCH v7 07/35] nouveau: add env var to make nir default

v2: allow for non debug builds as well v3: move reading out env var more global disable tg4 with multiple offsets with nir disable caps for 64 bit types v6: nv50 support disable MS images disable bindless textures Signed-off-by: Karol Herbst ---

[Mesa-dev] [PATCH 2/2] anv, radv: Drop XML workarounds for VK_ANDROID_native_buffer

--- src/amd/vulkan/radv_extensions.py | 7 +-- src/intel/vulkan/anv_extensions_gen.py | 7 +-- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py index db37d61..099cae7 100644 ---

[Mesa-dev] [Bug 106090] Compiling compute shader crashes RADV

https://bugs.freedesktop.org/show_bug.cgi?id=106090 Bug ID: 106090 Summary: Compiling compute shader crashes RADV Product: Mesa Version: 18.0 Hardware: Other OS: All Status: NEW Severity: normal

Re: [Mesa-dev] [PATCH v2] virgl: disable virgl when no 3D for virtio gpu.

On Thu, Apr 5, 2018 at 12:38 PM, Lepton Wu wrote: > If users are running mesa under old version of qemu or have turned off > GL at runtime, virtio gpu driver actually doesn't work. Adds a detection > here so mesa can fall back to software rendering. > > v2: > - move

Re: [Mesa-dev] [PATCH] nir: fix ir_binop_gequal glsl_to_nir conversion

Pushed. Thanks and welcome to Mesa! On April 14, 2018 12:26:18 Jason Ekstrand wrote: Reviewed-by: Jason Ekstrand What driver is hitting this path? The !supports_ints path isn't used to my knowledge so if some driver has started using it, they're

Re: [Mesa-dev] [PATCH 3/3] radeonsi: don't emit partial flushes for internal CS flushes only

On Sun, Apr 15, 2018 at 2:47 PM, Nicolai Hähnle wrote: > How much testing have you done with the radeon drm? It may be safer to > just skip that part of the changes. > Piglit on CIK. Marek ___ mesa-dev mailing list

[Mesa-dev] [PATCH v2 3/3] nvc0: use a macro to write query result availability to a buffer

Both the availability and result paths shared a bit of code so they were marged. Signed-off-by: Rhys Perry --- src/gallium/drivers/nouveau/nvc0/mme/com9097.mme | 45 src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h | 34 ++

[Mesa-dev] [PATCH v2 0/3] nvc0: Various improvements to nvc0_hw_get_query_result_resource

This patch set applies improvements related to the query buffer object functionality of the nvc0 driver. Changes in v2: - Increase space requirement in patch 3 to ensure there is room for fence emission. Rhys Perry (3): nvc0: set current bufctx to nvc0->bufctx at the end of nvc0_draw_vbo()

[Mesa-dev] [PATCH] nv50: Extract needed value bits without shifting them before calling bitcount

This can save one instruction since bitcount doesn't care about specific bits' positions. --- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c

Re: [Mesa-dev] [PATCH 3/3] meson: Version libMesaOpenCL like autotools does

Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:22) > This is for parity with autotools. It names the library > libMesaOpenCL.so.1.0.0 and points mesa.icd to the .1 symlink. > > opencl_version now matches configure.ac's OPENCL_VERSION. > > Signed-off-by: Jan Alexander Steffens (heftig)

[Mesa-dev] [PATCH] glsl_to_tgsi: try harder to lower unsupported ir_binop_vector_extract

From: Marek Olšák Cc: 18.0 --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 + 1 file changed, 5 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index

Re: [Mesa-dev] [PATCH 1/2] bin/install_megadrivers: fix DESTDIR and -D*-path

Quoting Dylan Baker (2018-04-13 08:46:46) > Quoting Dylan Baker (2018-04-09 14:02:51) > > This fixes -Ddri-drivers-path, -Dvdpau-libs-path, etc. with DESTDIR when > > those paths are absolute. Currently due to the way python's os.path.join > > handles absolute paths these will ignore DESTDIR,

Re: [Mesa-dev] [PATCH 1/3] meson: Define NDEBUG for non-debug-builds

Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:20) > This is for parity with autotools. We were suddenly getting assertion > failures after switching to meson, see [1]. > > [1]: https://bugs.archlinux.org/task/58218 > > Signed-off-by: Jan Alexander Steffens (heftig)

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

Aaron Watry writes: > From CL 1.2 Section 5.2.1: > CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY and > flags specify CL_MEM_HOST_READ_ONLY , or if buffer was created with > CL_MEM_HOST_READ_ONLY and flags specify CL_MEM_HOST_WRITE_ONLY , or if

Re: [Mesa-dev] [PATCH 3/3] radeonsi: don't emit partial flushes for internal CS flushes only

On 16.04.2018 20:44, Marek Olšák wrote: On Sun, Apr 15, 2018 at 2:47 PM, Nicolai Hähnle > wrote: How much testing have you done with the radeon drm? It may be safer to just skip that part of the changes. Piglit on CIK. Probably good

Re: [Mesa-dev] [PATCH 2/3] meson: Add library versions to swr drivers

Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:21) > This is for parity with autotools. > > Signed-off-by: Jan Alexander Steffens (heftig) > --- > src/gallium/drivers/swr/meson.build | 4 > 1 file changed, 4 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH 2/2] anv, radv: Drop XML workarounds for VK_ANDROID_native_buffer

Quoting Jason Ekstrand (2018-04-16 07:38:53) > --- > src/amd/vulkan/radv_extensions.py | 7 +-- > src/intel/vulkan/anv_extensions_gen.py | 7 +-- > 2 files changed, 2 insertions(+), 12 deletions(-) > > diff --git a/src/amd/vulkan/radv_extensions.py >

Re: [Mesa-dev] [PATCH 1/2] dri: Add __DRI_IMAGE_FORMAT_SABGR8

On Monday, March 19, 2018 4:41:44 AM PDT Tapani Pälli wrote: > Add format definition and required plumbing to create images. > Note that there is no match to drm_fourcc definition, just like > with existing _DRI_IMAGE_FOURCC_SARGB. > > Signed-off-by: Tapani Pälli >

[Mesa-dev] [PATCH] mesa/math: Allocate memory for GLmatrix elements and its inverse contiguously

When GLmatrix elements and its inverse are stored contiguously in memory it is possible to allocate, free and copy these fields with 1 function call instead of 2. --- src/mesa/math/m_matrix.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git

Re: [Mesa-dev] [Mesa-stable] [PATCH] mesa: call DrawBuffer(s) driver hook in update_framebuffer for windows-system FB

On Fri, 2018-04-13 at 08:17 -0600, Brian Paul wrote: > > Hi Brain, are you happy if we push this in the meantime? It seems to > > impact a number of apps running on Wine? > > I don't have time to look at it myself right now. So if it looks good > to you and you can check it in, go for it. I

Re: [Mesa-dev] [Mesa-stable] [PATCH] radv: fix radv_layout_dcc_compressed() when image doesn't have DCC

On 04/15/2018 08:52 PM, Juan A. Suarez Romero wrote: On Fri, 2018-04-13 at 13:55 -0700, Mark Janes wrote: Hi Samuel, When this patch is applied directly to the 18.0 branch, I get a mesa compile error: radv_image.c:1175:9: error: implicit declaration of function ‘radv_image_has_dcc’; did you

[Mesa-dev] [PATCH 1/3] meson: Define NDEBUG for non-debug-builds

This is for parity with autotools. We were suddenly getting assertion failures after switching to meson, see [1]. [1]: https://bugs.archlinux.org/task/58218 Signed-off-by: Jan Alexander Steffens (heftig) --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff

Re: [Mesa-dev] [PATCH] ac/nir: Make the GFX9 buffer size fix apply to image loads/atomics too.

Reviewed-by: Nicolai Hähnle On 16.04.2018 00:09, Bas Nieuwenhuizen wrote: No clue how I missed those ... Fixes: 4503ff760c "ac/nir: Add workaround for GFX9 buffer views." CC: Bugzilla:

[Mesa-dev] [PATCH 2/3] meson: Add library versions to swr drivers

This is for parity with autotools. Signed-off-by: Jan Alexander Steffens (heftig) --- src/gallium/drivers/swr/meson.build | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/swr/meson.build b/src/gallium/drivers/swr/meson.build index

[Mesa-dev] [PATCH 3/3] meson: Version libMesaOpenCL like autotools does

This is for parity with autotools. It names the library libMesaOpenCL.so.1.0.0 and points mesa.icd to the .1 symlink. opencl_version now matches configure.ac's OPENCL_VERSION. Signed-off-by: Jan Alexander Steffens (heftig) --- src/gallium/targets/opencl/meson.build | 4

[Mesa-dev] [PATCH 0/3] meson: Patches for autotools parity

Hi, these patches were added to mesa 18.0.0 by Arch Linux in order to make the meson build product more like the autotools one. They are in addition to two patches already in master: - 6ac87c17 (meson: fix megadriver symlinking) - 19dbed64 (meson: Set .so version for xa like autotools does)

Re: [Mesa-dev] [Mesa-stable] [PATCH] ac/nir: Make the GFX9 buffer size fix apply to image loads/atomics too.

On Mon, Apr 16, 2018 at 1:17 PM, Juan A. Suarez Romero wrote: > On Mon, 2018-04-16 at 00:09 +0200, Bas Nieuwenhuizen wrote: >> No clue how I missed those ... >> >> Fixes: 4503ff760c "ac/nir: Add workaround for GFX9 buffer views." >> CC: >>

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

Aaron Watry writes: > On Mon, Apr 16, 2018, 5:24 PM Francisco Jerez wrote: > >> Aaron Watry writes: >> >> > From CL 1.2 Section 5.2.1: >> > CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY >> and >> > flags

[Mesa-dev] [PATCH 1/9] radeonsi: add struct si_compiler containing LLVMTargetMachineRef

From: Marek Olšák It will contain more variables. --- src/gallium/drivers/radeonsi/si_compute.c | 8 +-- src/gallium/drivers/radeonsi/si_pipe.c| 52 --- src/gallium/drivers/radeonsi/si_pipe.h| 6 +- src/gallium/drivers/radeonsi/si_shader.c

[Mesa-dev] [PATCH 5/9] radeonsi: move passmgr into si_compiler

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c| 30 src/gallium/drivers/radeonsi/si_pipe.h| 7 src/gallium/drivers/radeonsi/si_shader.h | 1 + .../drivers/radeonsi/si_shader_tgsi_setup.c | 34 +--

[Mesa-dev] [PATCH 6/9] radeonsi: move data_layout into si_compiler

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 9 + src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 7 +-- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git

[Mesa-dev] [PATCH 4/9] radeonsi: move target_library_info into si_compiler

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 10 ++ src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 7 ++- 3 files changed, 13 insertions(+), 5 deletions(-) diff

[Mesa-dev] [PATCH 0/9] RadeonSI LLVM crash workaround for Ubuntu 18.04

Hi, This cleanup is motivated by a Mesa/LLVM crash on Ubuntu 18.04. It happens inside gallivm_dispose_target_library_info and only LLVM 5.0 and 6.0 seem to be affected. The workaround is to move target_library_info into the context (1 instance) and the screen (1 instance per compiler thread) to

[Mesa-dev] [PATCH 3/9] radeonsi: use si_compiler::triple in si_llvm_optimize_module

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index

Re: [Mesa-dev] [PATCH 1/9] radeonsi: add struct si_compiler containing LLVMTargetMachineRef

Series: Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

On Mon, Apr 16, 2018 at 7:36 PM, Tapani Pälli wrote: > Hi; > > On 16.04.2018 18:19, Ilia Mirkin wrote: >> >> You never check EXT_texture_norm16 anywhere... is that right? Should >> probably respect that in the _mesa_is_es3_* helpers. Also what about > > > Oops that is very

[Mesa-dev] [PATCH 3/9] radeonsi: don't use an indirect table for state atoms

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c| 12 +-- src/gallium/drivers/radeonsi/si_clear.c | 14 +-- src/gallium/drivers/radeonsi/si_compute.c | 8 +- src/gallium/drivers/radeonsi/si_cp_dma.c | 2 +-

[Mesa-dev] [PATCH 4/9] radeonsi: remove si_atom::id

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.h | 21 ++-- src/gallium/drivers/radeonsi/si_state.c | 14 - src/gallium/drivers/radeonsi/si_state.h | 6 +++--- src/gallium/drivers/radeonsi/si_state_draw.c | 2 +- 4

[Mesa-dev] [PATCH 9/9] radeonsi: rename r600_texture::resource to buffer

From: Marek Olšák r600_resource could be renamed to si_buffer. --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 2 +- src/gallium/drivers/radeonsi/cik_sdma.c | 22 +-- src/gallium/drivers/radeonsi/si_blit.c| 50 +++---

[Mesa-dev] [PATCH 8/9] Revert "radeonsi: fix potential use-after-free of debug callbacks"

From: Marek Olšák This reverts commit b650fc09c3a35ca624aad5fe4b5c34867708f116. There is a 100%-reproducible deadlock if I increase the number of compiler queues. Also: Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105379 Cc: 18.0

[Mesa-dev] [PATCH 2/9] radeonsi: add triple into si_compiler

From: Marek Olšák --- src/amd/common/ac_llvm_util.c | 6 +- src/amd/common/ac_llvm_util.h | 4 +++- src/amd/vulkan/radv_shader.c| 2 +- src/gallium/drivers/radeonsi/si_pipe.c | 3 ++-

[Mesa-dev] [PATCH 7/9] radeonsi: avoid a crash in gallivm_dispose_target_library_info

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 09b9f588a6f..490a090da87 100644 ---

[Mesa-dev] [PATCH 9/9] radeonsi: increase the number of compiler threads depending on the CPU

From: Marek Olšák The compiler queue was limited to 3 threads, so shader-db running on a 16-thread CPU would have a bottleneck on the 3-thread queue. --- src/gallium/drivers/radeonsi/si_pipe.c | 39 +- src/gallium/drivers/radeonsi/si_pipe.h | 6 ++--

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

Hi; On 16.04.2018 18:19, Ilia Mirkin wrote: You never check EXT_texture_norm16 anywhere... is that right? Should probably respect that in the _mesa_is_es3_* helpers. Also what about Oops that is very correct, will add the checks. shader support? I see no mention in the spec that these

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