[Mesa-dev] [PATCH 2/2] i965/msaa: Implement GL_SAMPLE_ALPHA_TO_{COVERAGE, ONE}.

2012-06-22 Thread Paul Berry
This patch enables the multisampling parameters
GL_SAMPLE_ALPHA_TO_COVERAGE and GL_SAMPLE_ALPHA_TO_ONE, which allow
the fragment shader's alpha output to be converted into a sample
coverage mask and ignored for blending.  i965 supports these
parameters through the BLEND_STATE structure.

The GL spec allows, but does not require, the implementation to dither
the conversion from alpha to a sample coverage mask, so that alpha
values that aren't a multiple of 1/num_samples result in the correct
proportion of samples being lit.  A bit exists in the BLEND_STATE
structure to enable this functionality, but according to the hardware
docs it must be disabled on Sandy Bridge (see the Sandy Bridge PRM,
Vol2, Part1, p379: AlphaToCoverage Dither Enable).  So it is enabled
for Gen7 only.

Fixes piglit tests
"EXT_framebuffer_multisample/sample-alpha-to-{coverage,one} {2,4}".
---
 src/mesa/drivers/dri/i965/gen6_cc.c |   10 +-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c 
b/src/mesa/drivers/dri/i965/gen6_cc.c
index b4c5329..e0523ef 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -161,6 +161,13 @@ gen6_upload_blend_state(struct brw_context *brw)
   blend[b].blend1.write_disable_g = !ctx->Color.ColorMask[b][1];
   blend[b].blend1.write_disable_b = !ctx->Color.ColorMask[b][2];
   blend[b].blend1.write_disable_a = !ctx->Color.ColorMask[b][3];
+
+  /* _NEW_MULTISAMPLE */
+  blend[b].blend1.alpha_to_coverage =
+ ctx->Multisample._Enabled && ctx->Multisample.SampleAlphaToCoverage;
+  blend[b].blend1.alpha_to_one =
+ ctx->Multisample._Enabled && ctx->Multisample.SampleAlphaToOne;
+  blend[b].blend1.alpha_to_coverage_dither = (brw->intel.gen >= 7);
}
 
brw->state.dirty.cache |= CACHE_NEW_BLEND_STATE;
@@ -169,7 +176,8 @@ gen6_upload_blend_state(struct brw_context *brw)
 const struct brw_tracked_state gen6_blend_state = {
.dirty = {
   .mesa = (_NEW_COLOR |
-  _NEW_BUFFERS),
+   _NEW_BUFFERS |
+   _NEW_MULTISAMPLE),
   .brw = BRW_NEW_BATCH,
   .cache = 0,
},
-- 
1.7.7.6

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[Mesa-dev] [PATCH 1/2] i965/msaa: Implement glSampleCoverage.

2012-06-22 Thread Paul Berry
This patch enables glSampleCoverage() functionality, which allows the
client program to specify that only a portion of the samples be lit up
when performing multisampled rendering.  i965 supports
glSampleCoverage() through the 3DSTATE_SAMPLE_MASK command packet,
which allows the driver to specify a bitfield indicating which samples
to light up.

Fixes piglit tests "EXT_framebuffer_multisample/sample-coverage {2,4}
{inverted,non-inverted}".
---
 src/mesa/drivers/dri/i965/brw_context.h|3 +-
 src/mesa/drivers/dri/i965/gen6_blorp.cpp   |2 +-
 src/mesa/drivers/dri/i965/gen6_multisample_state.c |   26 ---
 src/mesa/drivers/dri/i965/gen7_blorp.cpp   |2 +-
 4 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index e59252d..951e335 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1160,7 +1160,8 @@ gen6_emit_3dstate_multisample(struct brw_context *brw,
   unsigned num_samples);
 void
 gen6_emit_3dstate_sample_mask(struct brw_context *brw,
-  unsigned num_samples);
+  unsigned num_samples, float coverage,
+  bool coverage_invert);
 
 /* gen7_urb.c */
 void
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp 
b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index 3e11152..b2cafdb 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -1042,7 +1042,7 @@ gen6_blorp_exec(struct intel_context *intel,
uint32_t prog_offset = params->get_wm_prog(brw, &prog_data);
gen6_blorp_emit_batch_head(brw, params);
gen6_emit_3dstate_multisample(brw, params->num_samples);
-   gen6_emit_3dstate_sample_mask(brw, params->num_samples);
+   gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false);
gen6_blorp_emit_state_base_address(brw, params);
gen6_blorp_emit_vertices(brw, params);
gen6_blorp_emit_urb_config(brw, params);
diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c 
b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
index 3cf94f6..f0648c3 100644
--- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
@@ -56,7 +56,8 @@ gen6_emit_3dstate_multisample(struct brw_context *brw,
  */
 void
 gen6_emit_3dstate_sample_mask(struct brw_context *brw,
-  unsigned num_samples)
+  unsigned num_samples, float coverage,
+  bool coverage_invert)
 {
struct intel_context *intel = &brw->intel;
 
@@ -65,7 +66,15 @@ gen6_emit_3dstate_sample_mask(struct brw_context *brw,
 
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
-   OUT_BATCH(num_samples > 0 ? 15 : 1);
+   if (num_samples > 0) {
+  int coverage_int = (int) (num_samples * coverage + 0.5);
+  uint32_t coverage_bits = (1 << coverage_int) - 1;
+  if (coverage_invert)
+ coverage_bits ^= (1 << num_samples) - 1;
+  OUT_BATCH(coverage_bits);
+   } else {
+  OUT_BATCH(1);
+   }
ADVANCE_BATCH();
 }
 
@@ -75,6 +84,14 @@ static void upload_multisample_state(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
unsigned num_samples = 0;
+   float coverage = 1.0;
+   float coverage_invert = false;
+
+   /* _NEW_MULTISAMPLE */
+   if (ctx->Multisample._Enabled && ctx->Multisample.SampleCoverage) {
+  coverage = ctx->Multisample.SampleCoverageValue;
+  coverage_invert = ctx->Multisample.SampleCoverageInvert;
+   }
 
/* _NEW_BUFFERS */
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
@@ -84,13 +101,14 @@ static void upload_multisample_state(struct brw_context 
*brw)
intel_emit_post_sync_nonzero_flush(intel);
 
gen6_emit_3dstate_multisample(brw, num_samples);
-   gen6_emit_3dstate_sample_mask(brw, num_samples);
+   gen6_emit_3dstate_sample_mask(brw, num_samples, coverage, coverage_invert);
 }
 
 
 const struct brw_tracked_state gen6_multisample_state = {
.dirty = {
-  .mesa = _NEW_BUFFERS,
+  .mesa = _NEW_BUFFERS |
+  _NEW_MULTISAMPLE,
   .brw = BRW_NEW_CONTEXT,
   .cache = 0
},
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp 
b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index bf79891..ec63120 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -733,7 +733,7 @@ gen7_blorp_exec(struct intel_context *intel,
gen6_blorp_emit_batch_head(brw, params);
gen7_allocate_push_constants(brw);
gen6_emit_3dstate_multisample(brw, params->num_samples);
-   gen6_emit_3dstate_sample_mask(brw, params->num_samples);
+   gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false);
gen6_blorp_emit_state_base_address(brw, params);
gen6_blor

[Mesa-dev] [Bug 51335] Compile Error: GL/gl.h: No such file or directory

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51335

Brian Paul  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #5 from Brian Paul  2012-06-22 16:26:35 PDT 
---
Committed as 78ac9af58021b7cc649c35fda112f61c98b31766.  Thanks.

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Re: [Mesa-dev] [PATCH] softpipe: Take all lods into account when texture sampling.

2012-06-22 Thread Roland Scheidegger

On 06/21/2012 08:30 AM, Olivier Galibert wrote:

On Wed, Jun 20, 2012 at 01:44:14PM +0100, Roland Scheidegger wrote:

A lot of code I just glossed over it, but seems to look ok other than
the (performance) implications this might have.


Actually whether there's a performance implication is not obvious.  In
practice the code just kicks the 4-pixel loop one or two function
calls higher.  This unshares some tests, some function calls, and the
mip-size computation shifts.  For normal texturing and on x86 the
tests are correctly predicted after the first one, and so are the
function calls, giving all of them a near zero cost.  So I'm not sure
the costs is that measurable.
Well I'm not sure neither, that's why I'd have liked to see some number, 
even if it's just from multiarb :-) It's not just about prediction 
though, e.g. your indirect address lookups might be simpler when 
unrolled due to using immediates instead of index register etc.

I can live without that number, though...



With the actual vectorization the llvmpipe situation may be different
(not so sure with the aos texturing though).
Yes the additional lookups for the mip level base addresses are going to 
hurt (slightly), and the min/mag
filter selection is going to be a big mess (both aren't really dependent 
on aos/soa texturing). This is really going to need a different path.


Roland
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[Mesa-dev] GLSL linker issue when counting varying vars

2012-06-22 Thread Brian Paul
The GLSL linker code in assign_varying_locations() counts up the 
number of varying variables and checks the count against the 
ctx->Const.MaxVarying limit.


I know we've had problems with this in the past but I think there's 
another issue.


In the case of fragment shaders we're also counting variables like 
gl_FrontFacing and gl_FragCoord against the limit.  IMO, we shouldn't 
count those vars there since they're not really interpolated values 
like colors or texcoords or generic varyings.


Comments?

-Brian
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[Mesa-dev] [PATCH] llvmpipe: fix the LP_NO_RAST debug option

2012-06-22 Thread Brian Paul
It was only no-oping the clear() function, not actual triangle
rasterization.  Move the no_rast field from lp_context down into
lp_rasterizer so it's accessible where it's needed.
---
 src/gallium/drivers/llvmpipe/lp_clear.c |3 --
 src/gallium/drivers/llvmpipe/lp_context.c   |6 
 src/gallium/drivers/llvmpipe/lp_rast.c  |   36 +++---
 src/gallium/drivers/llvmpipe/lp_rast_priv.h |1 +
 4 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/src/gallium/drivers/llvmpipe/lp_clear.c 
b/src/gallium/drivers/llvmpipe/lp_clear.c
index 0b37347..cc90dc4 100644
--- a/src/gallium/drivers/llvmpipe/lp_clear.c
+++ b/src/gallium/drivers/llvmpipe/lp_clear.c
@@ -53,9 +53,6 @@ llvmpipe_clear(struct pipe_context *pipe,
 {
struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe);
 
-   if (llvmpipe->no_rast)
-  return;
-
if (!llvmpipe_check_render_cond(llvmpipe))
   return;
 
diff --git a/src/gallium/drivers/llvmpipe/lp_context.c 
b/src/gallium/drivers/llvmpipe/lp_context.c
index 8c0206b..7f92a5f 100644
--- a/src/gallium/drivers/llvmpipe/lp_context.c
+++ b/src/gallium/drivers/llvmpipe/lp_context.c
@@ -47,9 +47,6 @@
 #include "lp_setup.h"
 
 
-DEBUG_GET_ONCE_BOOL_OPTION(lp_no_rast, "LP_NO_RAST", FALSE)
-
-
 /** shared by all contexts */
 unsigned llvmpipe_variant_count;
 
@@ -207,9 +204,6 @@ llvmpipe_create_context( struct pipe_screen *screen, void 
*priv )
 
/* FIXME: devise alternative to draw_texture_samplers */
 
-   if (debug_get_option_lp_no_rast())
-  llvmpipe->no_rast = TRUE;
-
llvmpipe->setup = lp_setup_create( &llvmpipe->pipe,
   llvmpipe->draw );
if (!llvmpipe->setup)
diff --git a/src/gallium/drivers/llvmpipe/lp_rast.c 
b/src/gallium/drivers/llvmpipe/lp_rast.c
index efa5024..7e94055 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast.c
@@ -701,28 +701,32 @@ rasterize_scene(struct lp_rasterizer_task *task,
 struct lp_scene *scene)
 {
task->scene = scene;
-   /* loop over scene bins, rasterize each */
+
+   if (!task->rast->no_rast) {
+  /* loop over scene bins, rasterize each */
 #if 0
-   {
-  unsigned i, j;
-  for (i = 0; i < scene->tiles_x; i++) {
- for (j = 0; j < scene->tiles_y; j++) {
-struct cmd_bin *bin = lp_scene_get_bin(scene, i, j);
-rasterize_bin(task, bin, i, j);
+  {
+ unsigned i, j;
+ for (i = 0; i < scene->tiles_x; i++) {
+for (j = 0; j < scene->tiles_y; j++) {
+   struct cmd_bin *bin = lp_scene_get_bin(scene, i, j);
+   rasterize_bin(task, bin, i, j);
+}
  }
   }
-   }
 #else
-   {
-  struct cmd_bin *bin;
+  {
+ struct cmd_bin *bin;
 
-  assert(scene);
-  while ((bin = lp_scene_bin_iter_next(scene))) {
- if (!is_empty_bin( bin ))
-rasterize_bin(task, bin);
+ assert(scene);
+ while ((bin = lp_scene_bin_iter_next(scene))) {
+if (!is_empty_bin( bin ))
+   rasterize_bin(task, bin);
+ }
   }
-   }
 #endif
+   }
+
 
if (scene->fence) {
   lp_fence_signal(scene->fence);
@@ -896,6 +900,8 @@ lp_rast_create( unsigned num_threads )
 
rast->num_threads = num_threads;
 
+   rast->no_rast = debug_get_bool_option("LP_NO_RAST", FALSE);
+
create_rast_threads(rast);
 
/* for synchronizing rasterization threads */
diff --git a/src/gallium/drivers/llvmpipe/lp_rast_priv.h 
b/src/gallium/drivers/llvmpipe/lp_rast_priv.h
index d0bda35..b5d0074 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast_priv.h
+++ b/src/gallium/drivers/llvmpipe/lp_rast_priv.h
@@ -111,6 +111,7 @@ struct lp_rasterizer_task
 struct lp_rasterizer
 {
boolean exit_flag;
+   boolean no_rast;  /**< For debugging/profiling */
 
/** The incoming queue of scenes ready to rasterize */
struct lp_scene_queue *full_scenes;
-- 
1.7.3.4

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Re: [Mesa-dev] [PATCH] mesa: #define fprintf to be __mingw_fprintf() on Mingw32

2012-06-22 Thread Kenneth Graunke
On 06/22/2012 12:18 PM, Brian Paul wrote:
> So that formats such as "%llx" are understood.
> ---
>  src/mesa/main/imports.h |   10 ++
>  1 files changed, 10 insertions(+), 0 deletions(-)
> 
> diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h
> index c0b6cec..9fb6ae8 100644
> --- a/src/mesa/main/imports.h
> +++ b/src/mesa/main/imports.h
> @@ -646,6 +646,16 @@ _mesa_vsnprintf(char *str, size_t size, const char *fmt, 
> va_list arg);
>  #endif
>  
>  
> +/**
> + * On Mingw32 we need to use __mingw_fprintf() to parse formats such
> + * as "0x%llx", and possibly others
> + */
> +#ifdef __MINGW32__
> +#define fprintf __mingw_fprintf
> +#endif
> +
> +
> +
>  #ifdef __cplusplus
>  }
>  #endif

Reviewed-by: Kenneth Graunke 


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[Mesa-dev] [PATCH] mesa: #define fprintf to be __mingw_fprintf() on Mingw32

2012-06-22 Thread Brian Paul
So that formats such as "%llx" are understood.
---
 src/mesa/main/imports.h |   10 ++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h
index c0b6cec..9fb6ae8 100644
--- a/src/mesa/main/imports.h
+++ b/src/mesa/main/imports.h
@@ -646,6 +646,16 @@ _mesa_vsnprintf(char *str, size_t size, const char *fmt, 
va_list arg);
 #endif
 
 
+/**
+ * On Mingw32 we need to use __mingw_fprintf() to parse formats such
+ * as "0x%llx", and possibly others
+ */
+#ifdef __MINGW32__
+#define fprintf __mingw_fprintf
+#endif
+
+
+
 #ifdef __cplusplus
 }
 #endif
-- 
1.7.3.4

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Re: [Mesa-dev] [PATCH] mesa: fix Mingw32 printf() warning about %llx format

2012-06-22 Thread Brian Paul

On 06/22/2012 11:13 AM, Kenneth Graunke wrote:

On 06/22/2012 10:07 AM, Jose Fonseca wrote:

Looks good.

Alternatively we could

   #ifdef __MINGW32__
   #define fprintf __mingw_fprintf()
   #endif

in an header like imports.hpp so it can be used everywhere in mesa.

Jose


I generally prefer that approach.  Keeps all the platform-specific
quirks in one place and makes it so you can just use the normal names.


OK, I was just being conservative about changing fprintf() everywhere.

-Brian
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[Mesa-dev] [PATCH 6/6] i965/msaa: Fix centroid interpolation of unlit pixels.

2012-06-22 Thread Paul Berry
i965 hardware doesn't do centroid interpolation correctly on unlit
pixels, causing incorrect values for derivatives near triangle edges.
To work around this problem, after doing centroid interpolation, we
replace the centroid-interpolated values for unlit pixels with
non-centroid-interpolated values (which are interpolated at pixel
centers).  This produces correct rendering at the expense of a slight
increase in shader execution time.

I've conditioned the workaround with a runtime flag
(brw->needs_unlit_centroid_workaround) in the hopes that we won't need
it in future chip generations.

Fixes piglit tests "EXT_framebuffer_multisample/interpolation {2,4}
{centroid-deriv,centroid-deriv-disabled}".  All MSAA interpolation
tests pass now.
---
 src/mesa/drivers/dri/i965/brw_context.c |4 
 src/mesa/drivers/dri/i965/brw_context.h |9 +
 src/mesa/drivers/dri/i965/brw_fs.cpp|   12 
 src/mesa/drivers/dri/i965/brw_wm.c  |   18 ++
 4 files changed, 39 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index f7073cd..72a7f7e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -296,6 +296,10 @@ brwCreateContext(int api,
   brw->has_negative_rhw_bug = true;
}
 
+   if (intel->gen <= 7) {
+  brw->needs_unlit_centroid_workaround = true;
+   }
+
brw->prim_restart.in_progress = false;
brw->prim_restart.enable_cut_index = false;
 
diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 6e0e1ad..e59252d 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -724,6 +724,15 @@ struct brw_context
bool has_pln;
bool precompile;
 
+   /**
+* Some versions of Gen hardware don't do centroid interpolation correctly
+* on unlit pixels, causing incorrect values for derivatives near triangle
+* edges.  Enabling this flag causes the fragment shader to use
+* non-centroid interpolation for unlit pixels, at the expense of two extra
+* fragment shader instructions.
+*/
+   bool needs_unlit_centroid_workaround;
+
struct {
   struct brw_state_flags dirty;
} state;
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 6cef08a..a9ef96c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -506,6 +506,18 @@ fs_visitor::emit_general_interpolation(ir_variable *ir)
  struct brw_reg interp = interp_reg(location, k);
   emit_linterp(attr, fs_reg(interp), interpolation_mode,
ir->centroid);
+  if (brw->needs_unlit_centroid_workaround && ir->centroid) {
+ /* Get the pixel/sample mask into f0 so that we know
+  * which pixels are lit.  Then, for each channel that is
+  * unlit, replace the centroid data with non-centroid
+  * data.
+  */
+ emit(FS_OPCODE_GET_MASK, attr);
+ fs_inst *inst = emit_linterp(attr, fs_reg(interp),
+  interpolation_mode, false);
+ inst->predicated = true;
+ inst->predicate_inverse = true;
+  }
  if (intel->gen < 6) {
 emit(BRW_OPCODE_MUL, attr, attr, this->pixel_w);
  }
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c 
b/src/mesa/drivers/dri/i965/brw_wm.c
index 4a7225c..ae6c6bf 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -130,7 +130,8 @@ brw_wm_non_glsl_emit(struct brw_context *brw, struct 
brw_wm_compile *c)
  * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
  */
 static unsigned
-brw_compute_barycentric_interp_modes(bool shade_model_flat,
+brw_compute_barycentric_interp_modes(struct brw_context *brw,
+ bool shade_model_flat,
  const struct gl_fragment_program *fprog)
 {
unsigned barycentric_interp_modes = 0;
@@ -154,11 +155,18 @@ brw_compute_barycentric_interp_modes(bool 
shade_model_flat,
   if (attr == FRAG_ATTRIB_WPOS || attr == FRAG_ATTRIB_FACE)
  continue;
 
+  /* Determine the set (or sets) of barycentric coordinates needed to
+   * interpolate this variable.  Note that when
+   * brw->needs_unlit_centroid_workaround is set, centroid interpolation
+   * uses PIXEL interpolation for unlit pixels and CENTROID interpolation
+   * for lit pixels, so we need both sets of barycentric coordinates.
+   */
   if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) {
  if (is_centroid) {
 barycentric_interp_modes |=
1 << BRW_

[Mesa-dev] [PATCH 5/6] i965/fs: Add FS_OPCODE_GET_MASK to fragment shader backend.

2012-06-22 Thread Paul Berry
In order to compute centroid varyings correctly, the fragment shader
needs to be able to load the current pixel/sample mask into a flag
register.  This patch adds an opcode to the fragment shader back-end
to do this; the opcode gets translated into the instruction

mov(1)  f0<1>UW  g1.14<0,1,0>UW  { align1 WE_all }

Since this instruction clobbers f0, instruction scheduling has to
treat it the same as instructions that have a conditional modifier.
---
 src/mesa/drivers/dri/i965/brw_defines.h|1 +
 src/mesa/drivers/dri/i965/brw_fs.h |1 +
 src/mesa/drivers/dri/i965/brw_fs_emit.cpp  |   26 
 .../dri/i965/brw_fs_schedule_instructions.cpp  |   10 ++-
 4 files changed, 36 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 73a8c90..a76c45c 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -675,6 +675,7 @@ enum opcode {
FS_OPCODE_SPILL,
FS_OPCODE_UNSPILL,
FS_OPCODE_PULL_CONSTANT_LOAD,
+   FS_OPCODE_GET_MASK,
 
VS_OPCODE_URB_WRITE,
VS_OPCODE_SCRATCH_READ,
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 18d0a9c..01136a9 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -539,6 +539,7 @@ public:
void generate_spill(fs_inst *inst, struct brw_reg src);
void generate_unspill(fs_inst *inst, struct brw_reg dst);
void generate_pull_constant_load(fs_inst *inst, struct brw_reg dst);
+   void generate_get_mask();
 
void emit_dummy_fs();
fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 0881ad7..5e85f8e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -591,6 +591,27 @@ fs_visitor::generate_pull_constant_load(fs_inst *inst, 
struct brw_reg dst)
}
 }
 
+
+/**
+ * Cause the current pixel/sample mask (from R1.7 bits 15:0) to be transferred
+ * into the flags register (f0.0).
+ *
+ * Used only on Gen6 and above.
+ */
+void
+fs_visitor::generate_get_mask()
+{
+   struct brw_reg f0 = brw_flag_reg();
+   struct brw_reg g1 = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
+
+   assert (intel->gen >= 6);
+   brw_push_insn_state(p);
+   brw_set_mask_control(p, BRW_MASK_DISABLE);
+   brw_MOV(p, f0, g1);
+   brw_pop_insn_state(p);
+}
+
+
 static uint32_t brw_file_from_reg(fs_reg *reg)
 {
switch (reg->file) {
@@ -928,6 +949,11 @@ fs_visitor::generate_code()
   case FS_OPCODE_FB_WRITE:
 generate_fb_write(inst);
 break;
+
+  case FS_OPCODE_GET_MASK:
+ generate_get_mask();
+ break;
+
   default:
 if (inst->opcode < (int)ARRAY_SIZE(brw_opcodes)) {
_mesa_problem(ctx, "Unsupported opcode `%s' in FS",
diff --git a/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
index 910f329..ea1dcd3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp
@@ -334,7 +334,10 @@ instruction_scheduler::calculate_deps()
 }
   }
 
-  if (inst->conditional_mod) {
+  /* Treat FS_OPCODE_GET_MASK as though it had a conditional_mod, because
+   * it sets the flag register.
+   */
+  if (inst->conditional_mod || inst->opcode == FS_OPCODE_GET_MASK) {
 add_dep(last_conditional_mod, n, 0);
 last_conditional_mod = n;
   }
@@ -413,7 +416,10 @@ instruction_scheduler::calculate_deps()
 }
   }
 
-  if (inst->conditional_mod)
+  /* Treat FS_OPCODE_GET_MASK as though it had a conditional_mod, because
+   * it sets the flag register.
+   */
+  if (inst->conditional_mod || inst->opcode == FS_OPCODE_GET_MASK)
 last_conditional_mod = n;
}
 }
-- 
1.7.7.6

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[Mesa-dev] [PATCH 4/6] i965/msaa: Add backend support for centroid interpolation.

2012-06-22 Thread Paul Berry
This patch causes the fragment shader to be configured correctly (and
the correct code to be generated) for centroid interpolation.  This
required two changes: brw_compute_barycentric_interp_modes() needs to
determine when centroid barycentric coordinates need to be included in
the pixel shader thread payload, and
fs_visitor::emit_general_interpolation() needs to interpolate using
the correct set of barycentric coordinates.

Fixes piglit tests "EXT_framebuffer_multisample/interpolation {2,4}
centroid-edges" on i965.
---
 src/mesa/drivers/dri/i965/brw_fs.cpp |   21 +++--
 src/mesa/drivers/dri/i965/brw_fs.h   |3 ++-
 src/mesa/drivers/dri/i965/brw_wm.c   |   19 +++
 3 files changed, 32 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c3f851e..6cef08a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -421,13 +421,21 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir)
 
 fs_inst *
 fs_visitor::emit_linterp(const fs_reg &attr, const fs_reg &interp,
- glsl_interp_qualifier interpolation_mode)
+ glsl_interp_qualifier interpolation_mode,
+ bool is_centroid)
 {
brw_wm_barycentric_interp_mode barycoord_mode;
-   if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
-  barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
-   else
-  barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+   if (is_centroid) {
+  if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
+ barycoord_mode = BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC;
+  else
+ barycoord_mode = BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC;
+   } else {
+  if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
+ barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+  else
+ barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+   }
return emit(FS_OPCODE_LINTERP, attr,
this->delta_x[barycoord_mode],
this->delta_y[barycoord_mode], interp);
@@ -496,7 +504,8 @@ fs_visitor::emit_general_interpolation(ir_variable *ir)
  emit(BRW_OPCODE_MOV, attr, fs_reg(1.0f));
   } else {
  struct brw_reg interp = interp_reg(location, k);
-  emit_linterp(attr, fs_reg(interp), interpolation_mode);
+  emit_linterp(attr, fs_reg(interp), interpolation_mode,
+   ir->centroid);
  if (intel->gen < 6) {
 emit(BRW_OPCODE_MUL, attr, attr, this->pixel_w);
  }
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 3e62d12..18d0a9c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -543,7 +543,8 @@ public:
void emit_dummy_fs();
fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
- glsl_interp_qualifier interpolation_mode);
+ glsl_interp_qualifier interpolation_mode,
+ bool is_centroid);
fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
fs_reg *emit_general_interpolation(ir_variable *ir);
void emit_interpolation_setup_gen4();
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c 
b/src/mesa/drivers/dri/i965/brw_wm.c
index 300e3bb..4a7225c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -143,6 +143,7 @@ brw_compute_barycentric_interp_modes(bool shade_model_flat,
for (attr = 0; attr < FRAG_ATTRIB_MAX; ++attr) {
   enum glsl_interp_qualifier interp_qualifier =
  fprog->InterpQualifier[attr];
+  bool is_centroid = fprog->IsCentroid & BITFIELD64_BIT(attr);
   bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1;
 
   /* Ignore unused inputs. */
@@ -154,13 +155,23 @@ brw_compute_barycentric_interp_modes(bool 
shade_model_flat,
  continue;
 
   if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) {
- barycentric_interp_modes |=
-1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+ if (is_centroid) {
+barycentric_interp_modes |=
+   1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC;
+ } else {
+barycentric_interp_modes |=
+   1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+ }
   } else if (interp_qualifier == INTERP_QUALIFIER_SMOOTH ||
  (!(shade_model_flat && is_gl_Color) &&
   interp_qualifier == INTERP_QUALIFIER_NONE)) {
- barycentric_interp_modes |=
-1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+ if (is_centroid) {
+barycentric_interp_modes |=
+   1 << BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC;
+ } else 

[Mesa-dev] [PATCH 3/6] i965/fs: Refactor interpolation code to prepare for adding centroid support.

2012-06-22 Thread Paul Berry
---
 src/mesa/drivers/dri/i965/brw_fs.cpp |   23 +++
 src/mesa/drivers/dri/i965/brw_fs.h   |2 ++
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 43efd68..c3f851e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -419,6 +419,20 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir)
return reg;
 }
 
+fs_inst *
+fs_visitor::emit_linterp(const fs_reg &attr, const fs_reg &interp,
+ glsl_interp_qualifier interpolation_mode)
+{
+   brw_wm_barycentric_interp_mode barycoord_mode;
+   if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
+  barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+   else
+  barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+   return emit(FS_OPCODE_LINTERP, attr,
+   this->delta_x[barycoord_mode],
+   this->delta_y[barycoord_mode], interp);
+}
+
 fs_reg *
 fs_visitor::emit_general_interpolation(ir_variable *ir)
 {
@@ -482,14 +496,7 @@ fs_visitor::emit_general_interpolation(ir_variable *ir)
  emit(BRW_OPCODE_MOV, attr, fs_reg(1.0f));
   } else {
  struct brw_reg interp = interp_reg(location, k);
-  brw_wm_barycentric_interp_mode barycoord_mode;
-  if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
- barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
-  else
- barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
-  emit(FS_OPCODE_LINTERP, attr,
-   this->delta_x[barycoord_mode],
-   this->delta_y[barycoord_mode], fs_reg(interp));
+  emit_linterp(attr, fs_reg(interp), interpolation_mode);
  if (intel->gen < 6) {
 emit(BRW_OPCODE_MUL, attr, attr, this->pixel_w);
  }
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 2c2cb6c..3e62d12 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -542,6 +542,8 @@ public:
 
void emit_dummy_fs();
fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
+   fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
+ glsl_interp_qualifier interpolation_mode);
fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
fs_reg *emit_general_interpolation(ir_variable *ir);
void emit_interpolation_setup_gen4();
-- 
1.7.7.6

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[Mesa-dev] [PATCH 2/6] i965/msaa: Adapt clip setup for centroid noperspective interpolation.

2012-06-22 Thread Paul Berry
To save time, we only instruct the clip stage of the pipeline to
compute noperspective barycentric coordinates if those coordinates are
needed by the fragment shader.  Previously, we would determine whether
the coordinates were needed by seeing whether the fragment shader used
the BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC interpolation mode.

However, with MSAA, it's possible that the fragment shader might use
BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC instead.  In the future,
when we support ARB_sample_shading, it might use
BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC.

This patch modifies the upload_clip_state() functions to check for all
three possible noperspective interpolation modes.
---
 src/mesa/drivers/dri/i965/brw_defines.h |4 
 src/mesa/drivers/dri/i965/gen6_clip_state.c |2 +-
 src/mesa/drivers/dri/i965/gen7_clip_state.c |2 +-
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index ff6cc6e..73a8c90 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1257,6 +1257,10 @@ enum brw_wm_barycentric_interp_mode {
BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC= 5,
BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT  = 6
 };
+#define BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS \
+   ((1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC) | \
+(1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC) | \
+(1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC))
 
 #define _3DSTATE_WM0x7814 /* GEN6+ */
 /* DW1: kernel pointer */
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c 
b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index 5d88978..c34d87e 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -42,7 +42,7 @@ upload_clip_state(struct brw_context *brw)
 
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->barycentric_interp_modes &
-   (1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC)) {
+   BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS) {
   nonperspective_barycentric_enable_flag =
  GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE;
}
diff --git a/src/mesa/drivers/dri/i965/gen7_clip_state.c 
b/src/mesa/drivers/dri/i965/gen7_clip_state.c
index 8ff31a8..3bc6de0 100644
--- a/src/mesa/drivers/dri/i965/gen7_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_clip_state.c
@@ -43,7 +43,7 @@ upload_clip_state(struct brw_context *brw)
 
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->barycentric_interp_modes &
-   (1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC)) {
+   BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS) {
   nonperspective_barycentric_enable_flag =
  GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE;
}
-- 
1.7.7.6

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[Mesa-dev] [PATCH 1/6] glsl: Add IsCentroid bitfield to gl_fragment_program.

2012-06-22 Thread Paul Berry
This bitfield tells the back-ends which of a fragment shader's inputs
require centroid interpolation.  It is only set for GLSL fragment
shaders, since assembly fragment shaders don't support centroid
interpolation.
---
 src/glsl/ir_set_program_inouts.cpp |6 +-
 src/mesa/main/mtypes.h |6 ++
 2 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/src/glsl/ir_set_program_inouts.cpp 
b/src/glsl/ir_set_program_inouts.cpp
index 8f3edb9..a7415c7 100644
--- a/src/glsl/ir_set_program_inouts.cpp
+++ b/src/glsl/ir_set_program_inouts.cpp
@@ -26,7 +26,8 @@
  *
  * Sets the InputsRead and OutputsWritten of Mesa programs.
  *
- * Additionally, for fragment shaders, sets the InterpQualifier array.
+ * Additionally, for fragment shaders, sets the InterpQualifier array and
+ * IsCentroid bitfield.
  *
  * Mesa programs (gl_program, not gl_shader_program) have a set of
  * flags indicating which varyings are read and written.  Computing
@@ -88,6 +89,8 @@ mark(struct gl_program *prog, ir_variable *var, int offset, 
int len,
 gl_fragment_program *fprog = (gl_fragment_program *) prog;
 fprog->InterpQualifier[var->location + var->index + offset + i] =
(glsl_interp_qualifier) var->interpolation;
+if (var->centroid)
+   fprog->IsCentroid |= bitfield;
  }
   } else if (var->mode == ir_var_system_value) {
  prog->SystemValuesRead |= bitfield;
@@ -178,6 +181,7 @@ do_set_program_inouts(exec_list *instructions, struct 
gl_program *prog,
if (is_fragment_shader) {
   memset(((gl_fragment_program *) prog)->InterpQualifier, 0,
  sizeof(((gl_fragment_program *) prog)->InterpQualifier));
+  ((gl_fragment_program *) prog)->IsCentroid = 0;
}
visit_list_elements(&v, instructions);
 }
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index def0db1..f18b81e 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2021,6 +2021,12 @@ struct gl_fragment_program
 * GLSL, the value is INTERP_QUALIFIER_NONE.
 */
enum glsl_interp_qualifier InterpQualifier[FRAG_ATTRIB_MAX];
+
+   /**
+* Bitfield indicating, for each fragment shader input, 1 if that input
+* uses centroid interpolation, 0 otherwise.  Unused inputs are 0.
+*/
+   GLbitfield64 IsCentroid;
 };
 
 
-- 
1.7.7.6

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[Mesa-dev] [PATCH 0/6] i965/msaa: Implement centroid interpolation.

2012-06-22 Thread Paul Berry
This patch series implements centroid interpolation on i965.  Patch
1 is the only one of interest to non-intel folks--it modifies the
GLSL front-end to record (in struct gl_fragment_program) which
fragment shader inputs need to be centroid interpolated.

The remaining patches implement the i965 back-end.  Patch 2 ensures
that centroid interpolation won't cause problems with our
configuration of the clipper.  Patches 3-4 are the actual
implementation.  Patches 5-6 work around a hardware limitation which
causes centroid values to be computed incorrectly for unlit pixels
(making derivatives wildly inaccurate)--we work around this problem by
replacing unlit pixels' centroid values with non-centroid values
(which gives derivatives the amount of accuracy one would expect when
centroid interpolation is in use).

I believe we are now entering the home stretch for the i965 MSAA
implementation.  If I'm not mistaken, all that's left to do before
we're compliant with the spec is:

- A few bug fixes with integer formats on Ivy Bridge
- Implement sample coverage features (glSampleCoverage() etc)
- Verify that there are no interactions with legacy smoothing features
- Address some corner cases with very large render targets

[PATCH 1/6] glsl: Add IsCentroid bitfield to gl_fragment_program.
[PATCH 2/6] i965/msaa: Adapt clip setup for centroid noperspective 
interpolation.
[PATCH 3/6] i965/fs: Refactor interpolation code to prepare for adding centroid 
support.
[PATCH 4/6] i965/msaa: Add backend support for centroid interpolation.
[PATCH 5/6] i965/fs: Add FS_OPCODE_GET_MASK to fragment shader backend.
[PATCH 6/6] i965/msaa: Fix centroid interpolation of unlit pixels.
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Re: [Mesa-dev] [PATCH 0/2] [RFC] r600g: improve handling of the shader exports

2012-06-22 Thread Jerome Glisse
On Fri, Jun 22, 2012 at 10:02 AM, Vadim Girlin  wrote:
>  r600g: avoid unnecessary shader exports
>  r600g: enable DUAL_EXPORT mode when possible
>
> First patch fixes the lockups with DUAL_EXPORT mode for me, also AFAICS it
> fixes some depth/stencil tests, though I'm not sure why, haven't looked
> into it (possibly unexpected color exports were written over the depth
> exports).
>
> Second patch enables DUAL_EXPORT mode when possible, giving about 40%
> improvement with the results of the "fill" demo (on juniper). Also it sets
> DB_SOURCE_FORMAT to the EXPORT_DB_TWO when in DUAL_EXPORT mode, though I'm 
> not sure yet if it has any effect on performance.
>
> I haven't tried to implement the same for pre-evergreen cards - I can't test 
> it
> anyway without r600 hw, but I guess it shouldn't be hard. AFAIK there will be
> additional requirements for DUAL_EXPORT mode for r6xx (it's documented in the
> R6xx_3D_Registers.pdf).
>
> There are no regressions with piglit on evergreen (juniper).

r6xx/r7xx version WIP not working (well not improving perf)
http://people.freedesktop.org/~glisse/0003-r600g-enable-DUAL_EXPORT-mode-when-possible-on-r6xx-.patch

Cheers,
Jerome

>
>  src/gallium/drivers/r600/evergreen_state.c   |   56 
> --
>  src/gallium/drivers/r600/evergreend.h        |    7 
>  src/gallium/drivers/r600/r600_pipe.h         |    5 +++
>  src/gallium/drivers/r600/r600_shader.c       |   25 ++--
>  src/gallium/drivers/r600/r600_shader.h       |    7 +++-
>  src/gallium/drivers/r600/r600_state_common.c |    7 +++-
>  6 files changed, 88 insertions(+), 19 deletions(-)
>
> --
> 1.7.10.4
>
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[Mesa-dev] [Bug 51328] _mesa_unpack_uint_z_row and _mesa_unpack_depth_span are slow

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51328

Javantea  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #2 from Javantea  2012-06-22 11:21:00 PDT ---
Paul Berry fixed the bug in commit 75f409d75cacf90df2d6f1d718251a5d5cd92f7f.

Many thanks. I'm glad you solved this correctly.

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Re: [Mesa-dev] build error after recent master changes.

2012-06-22 Thread Laurent Carlier
Le vendredi 22 juin 2012 18:17:24 Andy Furniss a écrit :
> Brian Paul wrote:
> > Can you see if the patch/info on bug
> > https://bugs.freedesktop.org/show_bug.cgi?idQ335 helps?
>
> Yes editing src/mesa/x86/Makefile.am to add -I$(top_srcdir)/include \
>
> fixed it, thanks.
>
> Git apply complained when I tried to use the actual patch (save as on
> the link)
>
> bash-3.2$ git apply --check --verbose
> ~/0001-automake-add-missing-inclusion-of-GL-headers.patch
> fatal: corrupt patch at line 20
>
> looks like a rogue space before a +
>

just fixed the space problem, bad cut & paste!

++


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[Mesa-dev] [Bug 51335] Compile Error: GL/gl.h: No such file or directory

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51335

Laurent carlier  changed:

   What|Removed |Added

  Attachment #63353|0   |1
is obsolete||

--- Comment #4 from Laurent carlier  2012-06-22 10:37:25 
PDT ---
Created attachment 63354
  --> https://bugs.freedesktop.org/attachment.cgi?id=63354
fix space problem

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Re: [Mesa-dev] build error after recent master changes.

2012-06-22 Thread Andy Furniss

Brian Paul wrote:


Can you see if the patch/info on bug
https://bugs.freedesktop.org/show_bug.cgi?id=51335 helps?


Yes editing src/mesa/x86/Makefile.am to add -I$(top_srcdir)/include \

fixed it, thanks.

Git apply complained when I tried to use the actual patch (save as on 
the link)


bash-3.2$ git apply --check --verbose 
~/0001-automake-add-missing-inclusion-of-GL-headers.patch

fatal: corrupt patch at line 20

looks like a rogue space before a +


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Re: [Mesa-dev] [PATCH] mesa: fix Mingw32 printf() warning about %llx format

2012-06-22 Thread Kenneth Graunke
On 06/22/2012 10:07 AM, Jose Fonseca wrote:
> Looks good.
> 
> Alternatively we could
> 
>   #ifdef __MINGW32__
>   #define fprintf __mingw_fprintf()
>   #endif
> 
> in an header like imports.hpp so it can be used everywhere in mesa.
> 
> Jose

I generally prefer that approach.  Keeps all the platform-specific
quirks in one place and makes it so you can just use the normal names.


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Re: [Mesa-dev] [PATCH] mesa: fix Mingw32 printf() warning about %llx format

2012-06-22 Thread Jose Fonseca
Looks good.

Alternatively we could

  #ifdef __MINGW32__
  #define fprintf __mingw_fprintf()
  #endif

in an header like imports.hpp so it can be used everywhere in mesa.

Jose

- Original Message -
> ---
>  src/mesa/program/prog_print.c |   13 +++--
>  1 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/program/prog_print.c
> b/src/mesa/program/prog_print.c
> index 46f1df0..be67b93 100644
> --- a/src/mesa/program/prog_print.c
> +++ b/src/mesa/program/prog_print.c
> @@ -970,9 +970,16 @@ _mesa_fprint_program_parameters(FILE *f,
>  {
> GLuint i;
>  
> -   fprintf(f, "InputsRead: 0x%llx (0b%s)\n",
> +   /* Need to use __mingw_fprintf() to parse the 0x%llx format with
> Mingw32 */
> +#ifdef __MINGW32__
> +#define FPRINTF __mingw_fprintf
> +#else
> +#define FPRINTF fprintf
> +#endif
> +
> +   FPRINTF(f, "InputsRead: 0x%llx (0b%s)\n",
> (unsigned long long) prog->InputsRead,
> binary(prog->InputsRead));
> -   fprintf(f, "OutputsWritten: 0x%llx (0b%s)\n",
> +   FPRINTF(f, "OutputsWritten: 0x%llx (0b%s)\n",
>   (unsigned long long)prog->OutputsWritten,
>binary(prog->OutputsWritten));
> fprintf(f, "NumInstructions=%d\n", prog->NumInstructions);
> @@ -1000,6 +1007,8 @@ _mesa_fprint_program_parameters(FILE *f,
> }
>  #endif
> _mesa_print_parameter_list(prog->Parameters);
> +
> +#undef FPRINTF
>  }
>  
>  
> --
> 1.7.3.4
> 
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[Mesa-dev] [Bug 51335] Compile Error: GL/gl.h: No such file or directory

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51335

Laurent carlier  changed:

   What|Removed |Added

  Attachment #63350|0   |1
is obsolete||

--- Comment #3 from Laurent carlier  2012-06-22 09:41:56 
PDT ---
Created attachment 63353
  --> https://bugs.freedesktop.org/attachment.cgi?id=63353
proper patch

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Re: [Mesa-dev] [PATCH 2/2] r600g: enable DUAL_EXPORT mode when possible

2012-06-22 Thread Jerome Glisse
On Fri, Jun 22, 2012 at 10:02 AM, Vadim Girlin  wrote:
> It seems DUAL_EXPORT on evergreen may be enabled when all CBs use 16-bit 
> export
> mode (EXPORT_4C_16BPC), also there should be at least one CB, and the PS
> shouldn't export depth/stencil.
>
> Signed-off-by: Vadim Girlin 
Reviewed-by: Jerome Glisse 
> ---
>  src/gallium/drivers/r600/evergreen_state.c   |   46 
> ++
>  src/gallium/drivers/r600/evergreend.h        |    7 
>  src/gallium/drivers/r600/r600_pipe.h         |    5 +++
>  src/gallium/drivers/r600/r600_state_common.c |    3 ++
>  4 files changed, 55 insertions(+), 6 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/evergreen_state.c 
> b/src/gallium/drivers/r600/evergreen_state.c
> index 3fe95e1..bddb67e 100644
> --- a/src/gallium/drivers/r600/evergreen_state.c
> +++ b/src/gallium/drivers/r600/evergreen_state.c
> @@ -1458,7 +1458,6 @@ static void evergreen_cb(struct r600_context *rctx, 
> struct r600_pipe_state *rsta
>             (desc->channel[i].size < 17 &&
>              desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT))) {
>                color_info |= S_028C70_SOURCE_FORMAT(V_028C70_EXPORT_4C_16BPC);
> -               rctx->export_16bpc = true;
>        } else {
>                rctx->export_16bpc = false;
>        }
> @@ -1661,6 +1660,7 @@ static void evergreen_set_framebuffer_state(struct 
> pipe_context *ctx,
>        struct r600_context *rctx = (struct r600_context *)ctx;
>        struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
>        uint32_t tl, br;
> +       int i;
>
>        if (rstate == NULL)
>                return;
> @@ -1674,10 +1674,16 @@ static void evergreen_set_framebuffer_state(struct 
> pipe_context *ctx,
>
>        /* build states */
>        rctx->have_depth_fb = 0;
> +       rctx->export_16bpc = true;
>        rctx->nr_cbufs = state->nr_cbufs;
> -       for (int i = 0; i < state->nr_cbufs; i++) {
> +       for (i = 0; i < state->nr_cbufs; i++) {
>                evergreen_cb(rctx, rstate, state, i);
>        }
> +
> +       for (; i < 8 ; i++) {
> +               r600_pipe_state_add_reg(rstate, R_028C70_CB_COLOR0_INFO + i * 
> 0x3C, 0);
> +       }
> +
>        if (state->zsbuf) {
>                evergreen_db(rctx, rstate, state);
>        }
> @@ -2585,6 +2591,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
> struct r600_pipe_shader
>        int ninterp = 0;
>        boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = 
> FALSE;
>        unsigned spi_baryc_cntl, sid, tmp, idx = 0;
> +       unsigned z_export = 0, stencil_export = 0;
>
>        rstate->nregs = 0;
>
> @@ -2633,13 +2640,16 @@ void evergreen_pipe_shader_ps(struct pipe_context 
> *ctx, struct r600_pipe_shader
>
>        for (i = 0; i < rshader->noutput; i++) {
>                if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
> -                       db_shader_control |= S_02880C_Z_EXPORT_ENABLE(1);
> +                       z_export = 1;
>                if (rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
> -                       db_shader_control |= 
> S_02880C_STENCIL_EXPORT_ENABLE(1);
> +                       stencil_export = 1;
>        }
>        if (rshader->uses_kill)
>                db_shader_control |= S_02880C_KILL_ENABLE(1);
>
> +       db_shader_control |= S_02880C_Z_EXPORT_ENABLE(z_export);
> +       db_shader_control |= S_02880C_STENCIL_EXPORT_ENABLE(stencil_export);
> +
>        exports_ps = 0;
>        for (i = 0; i < rshader->noutput; i++) {
>                if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
> @@ -2711,8 +2721,9 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
> struct r600_pipe_shader
>        r600_pipe_state_add_reg(rstate,
>                                R_02884C_SQ_PGM_EXPORTS_PS,
>                                exports_ps);
> -       r600_pipe_state_add_reg(rstate, R_02880C_DB_SHADER_CONTROL,
> -                               db_shader_control);
> +
> +       shader->db_shader_control = db_shader_control;
> +       shader->ps_depth_export = z_export | stencil_export;
>
>        shader->sprite_coord_enable = rctx->sprite_coord_enable;
>        if (rctx->rasterizer)
> @@ -2798,3 +2809,26 @@ void *evergreen_create_db_flush_dsa(struct 
> r600_context *rctx)
>        /* Don't set the 'is_flush' flag in r600_pipe_dsa, evergreen doesn't 
> need it. */
>        return rstate;
>  }
> +
> +void evergreen_update_dual_export_state(struct r600_context * rctx)
> +{
> +       unsigned dual_export = rctx->export_16bpc && rctx->nr_cbufs &&
> +                       !rctx->ps_shader->ps_depth_export;
> +
> +       unsigned db_source_format = dual_export ? V_02880C_EXPORT_DB_TWO :
> +                       V_02880C_EXPORT_DB_FULL;
> +
> +       unsigned db_shader_control = rctx->ps_shader->db_shader_control |
> +                       S_02880C_DUAL_EXPORT_ENABLE(dual_export) |
> +                       S_02880C_DB_SOURCE_FORMAT(db_source_format);
> +
> +       if (d

[Mesa-dev] [PATCH] mesa: fix Mingw32 printf() warning about %llx format

2012-06-22 Thread Brian Paul
---
 src/mesa/program/prog_print.c |   13 +++--
 1 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/mesa/program/prog_print.c b/src/mesa/program/prog_print.c
index 46f1df0..be67b93 100644
--- a/src/mesa/program/prog_print.c
+++ b/src/mesa/program/prog_print.c
@@ -970,9 +970,16 @@ _mesa_fprint_program_parameters(FILE *f,
 {
GLuint i;
 
-   fprintf(f, "InputsRead: 0x%llx (0b%s)\n",
+   /* Need to use __mingw_fprintf() to parse the 0x%llx format with Mingw32 */
+#ifdef __MINGW32__
+#define FPRINTF __mingw_fprintf
+#else
+#define FPRINTF fprintf
+#endif
+
+   FPRINTF(f, "InputsRead: 0x%llx (0b%s)\n",
(unsigned long long) prog->InputsRead, binary(prog->InputsRead));
-   fprintf(f, "OutputsWritten: 0x%llx (0b%s)\n",
+   FPRINTF(f, "OutputsWritten: 0x%llx (0b%s)\n",
  (unsigned long long)prog->OutputsWritten, 
 binary(prog->OutputsWritten));
fprintf(f, "NumInstructions=%d\n", prog->NumInstructions);
@@ -1000,6 +1007,8 @@ _mesa_fprint_program_parameters(FILE *f,
}
 #endif 
_mesa_print_parameter_list(prog->Parameters);
+
+#undef FPRINTF
 }
 
 
-- 
1.7.3.4

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Re: [Mesa-dev] [PATCH 1/2] r600g: avoid unnecessary shader exports

2012-06-22 Thread Jerome Glisse
On Fri, Jun 22, 2012 at 10:02 AM, Vadim Girlin  wrote:
> In some cases TGSI shader has more color outputs than the number of CBs,
> so it seems we need to limit the number of color exports. This requires
> different shader variants depending on the nr_cbufs, but on the other hand
> we are doing less exports, which are very costly.
>
> Signed-off-by: Vadim Girlin 
Reviewed-by: Jerome Glisse 

> ---
>  src/gallium/drivers/r600/evergreen_state.c   |   10 +++---
>  src/gallium/drivers/r600/r600_shader.c       |   25 ++---
>  src/gallium/drivers/r600/r600_shader.h       |    7 ++-
>  src/gallium/drivers/r600/r600_state_common.c |    4 ++--
>  4 files changed, 33 insertions(+), 13 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/evergreen_state.c 
> b/src/gallium/drivers/r600/evergreen_state.c
> index b618ca8..3fe95e1 100644
> --- a/src/gallium/drivers/r600/evergreen_state.c
> +++ b/src/gallium/drivers/r600/evergreen_state.c
> @@ -2641,18 +2641,14 @@ void evergreen_pipe_shader_ps(struct pipe_context 
> *ctx, struct r600_pipe_shader
>                db_shader_control |= S_02880C_KILL_ENABLE(1);
>
>        exports_ps = 0;
> -       num_cout = 0;
>        for (i = 0; i < rshader->noutput; i++) {
>                if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
>                    rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
>                        exports_ps |= 1;
> -               else if (rshader->output[i].name == TGSI_SEMANTIC_COLOR) {
> -                       if (rshader->fs_write_all)
> -                               num_cout = rshader->nr_cbufs;
> -                       else
> -                               num_cout++;
> -               }
>        }
> +
> +       num_cout = rshader->nr_ps_color_exports;
> +
>        exports_ps |= S_02884C_EXPORT_COLORS(num_cout);
>        if (!exports_ps) {
>                /* always at least export 1 component per pixel */
> diff --git a/src/gallium/drivers/r600/r600_shader.c 
> b/src/gallium/drivers/r600/r600_shader.c
> index 63b9a03..782113b 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -801,6 +801,12 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
>                                ctx->cv_output = i;
>                                break;
>                        }
> +               } else if (ctx->type == TGSI_PROCESSOR_FRAGMENT) {
> +                       switch (d->Semantic.Name) {
> +                       case TGSI_SEMANTIC_COLOR:
> +                               ctx->shader->nr_ps_max_color_exports++;
> +                               break;
> +                       }
>                }
>                break;
>        case TGSI_FILE_CONSTANT:
> @@ -1153,8 +1159,10 @@ static int r600_shader_from_tgsi(struct r600_context * 
> rctx, struct r600_pipe_sh
>        ctx.colors_used = 0;
>        ctx.clip_vertex_write = 0;
>
> +       shader->nr_ps_color_exports = 0;
> +       shader->nr_ps_max_color_exports = 0;
> +
>        shader->two_side = (ctx.type == TGSI_PROCESSOR_FRAGMENT) && 
> rctx->two_side;
> -       shader->nr_cbufs = rctx->nr_cbufs;
>
>        /* register allocations */
>        /* Values [0,127] correspond to GPR[0..127].
> @@ -1289,6 +1297,9 @@ static int r600_shader_from_tgsi(struct r600_context * 
> rctx, struct r600_pipe_sh
>                }
>        }
>
> +       if (shader->fs_write_all && rctx->chip_class >= EVERGREEN)
> +               shader->nr_ps_max_color_exports = 8;
> +
>        if (ctx.fragcoord_input >= 0) {
>                if (ctx.bc->chip_class == CAYMAN) {
>                        for (j = 0 ; j < 4; j++) {
> @@ -1528,10 +1539,17 @@ static int r600_shader_from_tgsi(struct r600_context 
> * rctx, struct r600_pipe_sh
>                        break;
>                case TGSI_PROCESSOR_FRAGMENT:
>                        if (shader->output[i].name == TGSI_SEMANTIC_COLOR) {
> +                               /* never export more colors than the number 
> of CBs */
> +                               if (next_pixel_base >= rctx->nr_cbufs) {
> +                                       /* skip export */
> +                                       j--;
> +                                       continue;
> +                               }
>                                output[j].array_base = next_pixel_base++;
>                                output[j].type = 
> V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
> +                               shader->nr_ps_color_exports++;
>                                if (shader->fs_write_all && (rctx->chip_class 
> >= EVERGREEN)) {
> -                                       for (k = 1; k < shader->nr_cbufs; 
> k++) {
> +                                       for (k = 1; k < rctx->nr_cbufs; k++) {
>                                                j++;
>                                                memset(&output[j], 0, 
> sizeof(struct r600_bytecode_output));
>                               

Re: [Mesa-dev] build error after recent master changes.

2012-06-22 Thread Brian Paul

On 06/22/2012 09:43 AM, Andy Furniss wrote:

I have an atypical and old x86 LFS setup but could build OK a couple
of days ago.

make distclean
git clean -dfx
git pull

LDFLAGS="-L/home/andy/Src/Xorg-git/modular/lib" ./autogen.sh
--prefix=/home/andy/Src/Xorg-git/modular --enable-debug --disable-egl
--enable-texture-float --enable-gallium-g3dvl
--enable-r600-llvm-compiler --with-gallium-drivers=r600,swrast
--with-dri-drivers=swrast && make -j5 && make install


make[4]: Entering directory `/home/andy/Src/Mesa-git/mesa/src/mesa/x86'
gcc -DPACKAGE_NAME=\"Mesa\" -DPACKAGE_TARNAME=\"mesa\"
-DPACKAGE_VERSION=\"8.1.0\" -DPACKAGE_STRING=\"Mesa\ 8.1.0\"
-DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi\?product=Mesa\";
-DPACKAGE_URL=\"\" -DPACKAGE=\"mesa\" -DVERSION=\"8.1.0\"
-DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1
-DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1
-DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1
-DHAVE_UNISTD_H=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\"
-DYYTEXT_POINTER=1 -DHAVE_LIBEXPAT=1 -I. -I../../../src/mesa
-I../../../src/mapi -DFEATURE_GL=1 -D_GNU_SOURCE -DPTHREADS -DDEBUG
-DTEXTURE_FLOAT_ENABLED -DUSE_X86_ASM -DUSE_MMX_ASM -DUSE_3DNOW_ASM
-DUSE_SSE_ASM -DHAVE_POSIX_MEMALIGN -DUSE_XCB -DGLX_INDIRECT_RENDERING
-DGLX_DIRECT_RENDERING -DUSE_EXTERNAL_DXTN_LIB=1 -DIN_DRI_DRIVER
-DHAVE_ALIAS -DHAVE_LLVM=0x0301 -g -O2 -Wall -std=c99
-Werror=implicit-function-declaration -Werror=missing-prototypes
-fno-strict-aliasing -fno-builtin-memcmp -g -g -O2 -MT gen_matypes.o
-MD -MP -MF .deps/gen_matypes.Tpo -c -o gen_matypes.o gen_matypes.c
In file included from gen_matypes.c:41:
../../../src/mesa/main/mtypes.h:55: error: expected '=', ',', ';',
'asm' or '__attribute__' before 'GLbitfield64'
../../../src/mesa/main/mtypes.h:1605: error: expected
specifier-qualifier-list before 'GLbitfield64'
../../../src/mesa/main/mtypes.h:1939: error: expected
specifier-qualifier-list before 'GLbitfield64'
../../../src/mesa/main/mtypes.h:2819: error: expected
specifier-qualifier-list before 'GLuint64'
In file included from ../../../src/mesa/main/mtypes.h:3148,
from gen_matypes.c:41:
../../../src/mesa/main/dd.h:766: error: expected declaration
specifiers or '...' before 'GLuint64'
../../../src/mesa/main/dd.h:768: error: expected declaration
specifiers or '...' before 'GLuint64'
In file included from gen_matypes.c:41:
../../../src/mesa/main/mtypes.h:3261: error: expected
specifier-qualifier-list before 'GLDEBUGPROCARB'
../../../src/mesa/main/mtypes.h:3491: error: expected
specifier-qualifier-list before 'GLbitfield64'
In file included from ../../../src/mesa/tnl/t_context.h:53,
from gen_matypes.c:42:
../../../src/mesa/main/imports.h:300: error: expected '=', ',', ';',
'asm' or '__attribute__' before 'IROUND64'
In file included from gen_matypes.c:42:
../../../src/mesa/tnl/t_context.h:525: error: expected
specifier-qualifier-list before 'GLbitfield64'
gen_matypes.c: In function 'main':
gen_matypes.c:139: error: 'GLbitfield64' undeclared (first use in this
function)
gen_matypes.c:139: error: (Each undeclared identifier is reported only
once
gen_matypes.c:139: error: for each function it appears in.)
gen_matypes.c:139: error: expected ')' before numeric constant
gen_matypes.c:140: error: expected ')' before numeric constant
gen_matypes.c:141: error: expected ')' before numeric constant
gen_matypes.c:142: error: expected ')' before numeric constant
gen_matypes.c:143: error: expected ')' before numeric constant
gen_matypes.c:144: error: expected ')' before numeric constant
gen_matypes.c:145: error: expected ')' before numeric constant
gen_matypes.c:146: error: expected ')' before numeric constant
gen_matypes.c:147: error: expected ')' before numeric constant
make[4]: *** [gen_matypes.o] Error 1
make[4]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src/mesa/x86'
make[3]: *** [all-recursive] Error 1
make[3]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src/mesa'
make[2]: *** [all] Error 2
make[2]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src/mesa'
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src'
make: *** [all-recursive] Error 1
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Can you see if the patch/info on bug 
https://bugs.freedesktop.org/show_bug.cgi?id=51335 helps?


-Brian

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[Mesa-dev] build error after recent master changes.

2012-06-22 Thread Andy Furniss
I have an atypical and old x86 LFS setup but could build OK a couple of 
days ago.


make distclean
git clean -dfx
git pull

LDFLAGS="-L/home/andy/Src/Xorg-git/modular/lib" ./autogen.sh 
--prefix=/home/andy/Src/Xorg-git/modular --enable-debug --disable-egl 
--enable-texture-float --enable-gallium-g3dvl 
--enable-r600-llvm-compiler --with-gallium-drivers=r600,swrast 
--with-dri-drivers=swrast && make -j5 && make install



make[4]: Entering directory `/home/andy/Src/Mesa-git/mesa/src/mesa/x86'
gcc -DPACKAGE_NAME=\"Mesa\" -DPACKAGE_TARNAME=\"mesa\" 
-DPACKAGE_VERSION=\"8.1.0\" -DPACKAGE_STRING=\"Mesa\ 8.1.0\" 
-DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi\?product=Mesa\"; 
-DPACKAGE_URL=\"\" -DPACKAGE=\"mesa\" -DVERSION=\"8.1.0\" 
-DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 
-DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 
-DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_DLFCN_H=1 
-DLT_OBJDIR=\".libs/\" -DYYTEXT_POINTER=1 -DHAVE_LIBEXPAT=1 -I. 
-I../../../src/mesa -I../../../src/mapi -DFEATURE_GL=1 -D_GNU_SOURCE 
-DPTHREADS -DDEBUG -DTEXTURE_FLOAT_ENABLED -DUSE_X86_ASM -DUSE_MMX_ASM 
-DUSE_3DNOW_ASM -DUSE_SSE_ASM -DHAVE_POSIX_MEMALIGN -DUSE_XCB 
-DGLX_INDIRECT_RENDERING -DGLX_DIRECT_RENDERING 
-DUSE_EXTERNAL_DXTN_LIB=1 -DIN_DRI_DRIVER -DHAVE_ALIAS 
-DHAVE_LLVM=0x0301   -g -O2 -Wall -std=c99 
-Werror=implicit-function-declaration -Werror=missing-prototypes 
-fno-strict-aliasing -fno-builtin-memcmp -g -g -O2 -MT gen_matypes.o -MD 
-MP -MF .deps/gen_matypes.Tpo -c -o gen_matypes.o gen_matypes.c

In file included from gen_matypes.c:41:
../../../src/mesa/main/mtypes.h:55: error: expected '=', ',', ';', 'asm' 
or '__attribute__' before 'GLbitfield64'
../../../src/mesa/main/mtypes.h:1605: error: expected 
specifier-qualifier-list before 'GLbitfield64'
../../../src/mesa/main/mtypes.h:1939: error: expected 
specifier-qualifier-list before 'GLbitfield64'
../../../src/mesa/main/mtypes.h:2819: error: expected 
specifier-qualifier-list before 'GLuint64'

In file included from ../../../src/mesa/main/mtypes.h:3148,
 from gen_matypes.c:41:
../../../src/mesa/main/dd.h:766: error: expected declaration specifiers 
or '...' before 'GLuint64'
../../../src/mesa/main/dd.h:768: error: expected declaration specifiers 
or '...' before 'GLuint64'

In file included from gen_matypes.c:41:
../../../src/mesa/main/mtypes.h:3261: error: expected 
specifier-qualifier-list before 'GLDEBUGPROCARB'
../../../src/mesa/main/mtypes.h:3491: error: expected 
specifier-qualifier-list before 'GLbitfield64'

In file included from ../../../src/mesa/tnl/t_context.h:53,
 from gen_matypes.c:42:
../../../src/mesa/main/imports.h:300: error: expected '=', ',', ';', 
'asm' or '__attribute__' before 'IROUND64'

In file included from gen_matypes.c:42:
../../../src/mesa/tnl/t_context.h:525: error: expected 
specifier-qualifier-list before 'GLbitfield64'

gen_matypes.c: In function 'main':
gen_matypes.c:139: error: 'GLbitfield64' undeclared (first use in this 
function)

gen_matypes.c:139: error: (Each undeclared identifier is reported only once
gen_matypes.c:139: error: for each function it appears in.)
gen_matypes.c:139: error: expected ')' before numeric constant
gen_matypes.c:140: error: expected ')' before numeric constant
gen_matypes.c:141: error: expected ')' before numeric constant
gen_matypes.c:142: error: expected ')' before numeric constant
gen_matypes.c:143: error: expected ')' before numeric constant
gen_matypes.c:144: error: expected ')' before numeric constant
gen_matypes.c:145: error: expected ')' before numeric constant
gen_matypes.c:146: error: expected ')' before numeric constant
gen_matypes.c:147: error: expected ')' before numeric constant
make[4]: *** [gen_matypes.o] Error 1
make[4]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src/mesa/x86'
make[3]: *** [all-recursive] Error 1
make[3]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src/mesa'
make[2]: *** [all] Error 2
make[2]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src/mesa'
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory `/home/andy/Src/Mesa-git/mesa/src'
make: *** [all-recursive] Error 1
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[Mesa-dev] [Bug 51335] Compile Error: GL/gl.h: No such file or directory

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51335

--- Comment #2 from Laurent carlier  2012-06-22 08:19:35 
PDT ---
Created attachment 63350
  --> https://bugs.freedesktop.org/attachment.cgi?id=63350
Possible fix

Possible fix, see
http://lists.freedesktop.org/archives/mesa-dev/2012-June/023158.html

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[Mesa-dev] [Bug 51335] Compile Error: GL/gl.h: No such file or directory

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51335

--- Comment #1 from U. Artie Eoff  2012-06-22 
08:11:05 PDT ---
Created attachment 63349
  --> https://bugs.freedesktop.org/attachment.cgi?id=63349
bisect/compile log

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[Mesa-dev] [Bug 51335] New: Compile Error: GL/gl.h: No such file or directory

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51335

 Bug #: 51335
   Summary: Compile Error: GL/gl.h: No such file or directory
Classification: Unclassified
   Product: Mesa
   Version: git
  Platform: All
OS/Version: Linux (All)
Status: NEW
  Severity: critical
  Priority: medium
 Component: Mesa core
AssignedTo: mesa-dev@lists.freedesktop.org
ReportedBy: ullysses.a.e...@intel.com
CC: e...@anholt.net


Bisect bad commit result:

http://cgit.freedesktop.org/mesa/mesa/commit/?id=95836b46e77abfe5411922eb7cf71a18c028f42a

Issue Summary:

Mesa master (d988ea5e810868244eb1a1e7ede32295c9ed9ad4) does not compile... the
following error occurs:

In file included from ../x86/gen_matypes.c:40:0:
../../../src/mesa/main/glheader.h:53:19: fatal error: GL/gl.h: No such file or
directory
compilation terminated.

Steps:

1. clone mesa master
2. ensure mesa-GL-devel package is not installed on your system.
3. ./autogen.sh --enable-gles2 --disable-gallium-egl
--with-egl-platforms=x11,wayland,drm --enable-gbm --enable-shared-glapi
4. make -j4

Result:

make -j4 fails with the aforementioned error.

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[Mesa-dev] [Bug 51328] _mesa_unpack_uint_z_row and _mesa_unpack_depth_span are slow

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51328

Paul Berry  changed:

   What|Removed |Added

 CC||stereotype...@gmail.com

--- Comment #1 from Paul Berry  2012-06-22 07:52:51 
PDT ---
This sounds like a problem I fixed on Friday June 15 (see commit
75f409d75cacf90df2d6f1d718251a5d5cd92f7f).  Which revision of Mesa are you
using?

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[Mesa-dev] [PATCH 2/2] r600g: enable DUAL_EXPORT mode when possible

2012-06-22 Thread Vadim Girlin
It seems DUAL_EXPORT on evergreen may be enabled when all CBs use 16-bit export
mode (EXPORT_4C_16BPC), also there should be at least one CB, and the PS
shouldn't export depth/stencil. 

Signed-off-by: Vadim Girlin 
---
 src/gallium/drivers/r600/evergreen_state.c   |   46 ++
 src/gallium/drivers/r600/evergreend.h|7 
 src/gallium/drivers/r600/r600_pipe.h |5 +++
 src/gallium/drivers/r600/r600_state_common.c |3 ++
 4 files changed, 55 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 3fe95e1..bddb67e 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1458,7 +1458,6 @@ static void evergreen_cb(struct r600_context *rctx, 
struct r600_pipe_state *rsta
 (desc->channel[i].size < 17 &&
  desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT))) {
color_info |= S_028C70_SOURCE_FORMAT(V_028C70_EXPORT_4C_16BPC);
-   rctx->export_16bpc = true;
} else {
rctx->export_16bpc = false;
}
@@ -1661,6 +1660,7 @@ static void evergreen_set_framebuffer_state(struct 
pipe_context *ctx,
struct r600_context *rctx = (struct r600_context *)ctx;
struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
uint32_t tl, br;
+   int i;
 
if (rstate == NULL)
return;
@@ -1674,10 +1674,16 @@ static void evergreen_set_framebuffer_state(struct 
pipe_context *ctx,
 
/* build states */
rctx->have_depth_fb = 0;
+   rctx->export_16bpc = true;
rctx->nr_cbufs = state->nr_cbufs;
-   for (int i = 0; i < state->nr_cbufs; i++) {
+   for (i = 0; i < state->nr_cbufs; i++) {
evergreen_cb(rctx, rstate, state, i);
}
+
+   for (; i < 8 ; i++) {
+   r600_pipe_state_add_reg(rstate, R_028C70_CB_COLOR0_INFO + i * 
0x3C, 0);
+   }
+
if (state->zsbuf) {
evergreen_db(rctx, rstate, state);
}
@@ -2585,6 +2591,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader
int ninterp = 0;
boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = 
FALSE;
unsigned spi_baryc_cntl, sid, tmp, idx = 0;
+   unsigned z_export = 0, stencil_export = 0;
 
rstate->nregs = 0;
 
@@ -2633,13 +2640,16 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader
 
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
-   db_shader_control |= S_02880C_Z_EXPORT_ENABLE(1);
+   z_export = 1;
if (rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
-   db_shader_control |= S_02880C_STENCIL_EXPORT_ENABLE(1);
+   stencil_export = 1;
}
if (rshader->uses_kill)
db_shader_control |= S_02880C_KILL_ENABLE(1);
 
+   db_shader_control |= S_02880C_Z_EXPORT_ENABLE(z_export);
+   db_shader_control |= S_02880C_STENCIL_EXPORT_ENABLE(stencil_export);
+
exports_ps = 0;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
@@ -2711,8 +2721,9 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader
r600_pipe_state_add_reg(rstate,
R_02884C_SQ_PGM_EXPORTS_PS,
exports_ps);
-   r600_pipe_state_add_reg(rstate, R_02880C_DB_SHADER_CONTROL,
-   db_shader_control);
+
+   shader->db_shader_control = db_shader_control;
+   shader->ps_depth_export = z_export | stencil_export;
 
shader->sprite_coord_enable = rctx->sprite_coord_enable;
if (rctx->rasterizer)
@@ -2798,3 +2809,26 @@ void *evergreen_create_db_flush_dsa(struct r600_context 
*rctx)
/* Don't set the 'is_flush' flag in r600_pipe_dsa, evergreen doesn't 
need it. */
return rstate;
 }
+
+void evergreen_update_dual_export_state(struct r600_context * rctx)
+{
+   unsigned dual_export = rctx->export_16bpc && rctx->nr_cbufs &&
+   !rctx->ps_shader->ps_depth_export;
+
+   unsigned db_source_format = dual_export ? V_02880C_EXPORT_DB_TWO :
+   V_02880C_EXPORT_DB_FULL;
+
+   unsigned db_shader_control = rctx->ps_shader->db_shader_control |
+   S_02880C_DUAL_EXPORT_ENABLE(dual_export) |
+   S_02880C_DB_SOURCE_FORMAT(db_source_format);
+
+   if (db_shader_control != rctx->db_shader_control) {
+   struct r600_pipe_state rstate;
+
+   rctx->db_shader_control = db_shader_control;
+
+   rstate.nregs = 0;
+   r600_pipe_state_add_reg(&rstate, R_02880C_DB_SHADER_CONTROL, 
d

[Mesa-dev] [PATCH 1/2] r600g: avoid unnecessary shader exports

2012-06-22 Thread Vadim Girlin
In some cases TGSI shader has more color outputs than the number of CBs,
so it seems we need to limit the number of color exports. This requires
different shader variants depending on the nr_cbufs, but on the other hand
we are doing less exports, which are very costly.

Signed-off-by: Vadim Girlin 
---
 src/gallium/drivers/r600/evergreen_state.c   |   10 +++---
 src/gallium/drivers/r600/r600_shader.c   |   25 ++---
 src/gallium/drivers/r600/r600_shader.h   |7 ++-
 src/gallium/drivers/r600/r600_state_common.c |4 ++--
 4 files changed, 33 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index b618ca8..3fe95e1 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2641,18 +2641,14 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader
db_shader_control |= S_02880C_KILL_ENABLE(1);
 
exports_ps = 0;
-   num_cout = 0;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
exports_ps |= 1;
-   else if (rshader->output[i].name == TGSI_SEMANTIC_COLOR) {
-   if (rshader->fs_write_all)
-   num_cout = rshader->nr_cbufs;
-   else
-   num_cout++;
-   }
}
+
+   num_cout = rshader->nr_ps_color_exports;
+
exports_ps |= S_02884C_EXPORT_COLORS(num_cout);
if (!exports_ps) {
/* always at least export 1 component per pixel */
diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 63b9a03..782113b 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -801,6 +801,12 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
ctx->cv_output = i;
break;
}
+   } else if (ctx->type == TGSI_PROCESSOR_FRAGMENT) {
+   switch (d->Semantic.Name) {
+   case TGSI_SEMANTIC_COLOR:
+   ctx->shader->nr_ps_max_color_exports++;
+   break;
+   }
}
break;
case TGSI_FILE_CONSTANT:
@@ -1153,8 +1159,10 @@ static int r600_shader_from_tgsi(struct r600_context * 
rctx, struct r600_pipe_sh
ctx.colors_used = 0;
ctx.clip_vertex_write = 0;
 
+   shader->nr_ps_color_exports = 0;
+   shader->nr_ps_max_color_exports = 0;
+
shader->two_side = (ctx.type == TGSI_PROCESSOR_FRAGMENT) && 
rctx->two_side;
-   shader->nr_cbufs = rctx->nr_cbufs;
 
/* register allocations */
/* Values [0,127] correspond to GPR[0..127].
@@ -1289,6 +1297,9 @@ static int r600_shader_from_tgsi(struct r600_context * 
rctx, struct r600_pipe_sh
}
}
 
+   if (shader->fs_write_all && rctx->chip_class >= EVERGREEN)
+   shader->nr_ps_max_color_exports = 8;
+
if (ctx.fragcoord_input >= 0) {
if (ctx.bc->chip_class == CAYMAN) {
for (j = 0 ; j < 4; j++) {
@@ -1528,10 +1539,17 @@ static int r600_shader_from_tgsi(struct r600_context * 
rctx, struct r600_pipe_sh
break;
case TGSI_PROCESSOR_FRAGMENT:
if (shader->output[i].name == TGSI_SEMANTIC_COLOR) {
+   /* never export more colors than the number of 
CBs */
+   if (next_pixel_base >= rctx->nr_cbufs) {
+   /* skip export */
+   j--;
+   continue;
+   }
output[j].array_base = next_pixel_base++;
output[j].type = 
V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+   shader->nr_ps_color_exports++;
if (shader->fs_write_all && (rctx->chip_class 
>= EVERGREEN)) {
-   for (k = 1; k < shader->nr_cbufs; k++) {
+   for (k = 1; k < rctx->nr_cbufs; k++) {
j++;
memset(&output[j], 0, 
sizeof(struct r600_bytecode_output));
output[j].gpr = 
shader->output[i].gpr;
@@ -1545,6 +1563,7 @@ static int r600_shader_from_tgsi(struct r600_context * 
rctx, struct r600_pipe_sh
output[j].array_base = 
next_pixel_base++;
  

[Mesa-dev] [PATCH 0/2] [RFC] r600g: improve handling of the shader exports

2012-06-22 Thread Vadim Girlin
  r600g: avoid unnecessary shader exports
  r600g: enable DUAL_EXPORT mode when possible

First patch fixes the lockups with DUAL_EXPORT mode for me, also AFAICS it
fixes some depth/stencil tests, though I'm not sure why, haven't looked
into it (possibly unexpected color exports were written over the depth 
exports).

Second patch enables DUAL_EXPORT mode when possible, giving about 40% 
improvement with the results of the "fill" demo (on juniper). Also it sets
DB_SOURCE_FORMAT to the EXPORT_DB_TWO when in DUAL_EXPORT mode, though I'm not 
sure yet if it has any effect on performance.

I haven't tried to implement the same for pre-evergreen cards - I can't test it
anyway without r600 hw, but I guess it shouldn't be hard. AFAIK there will be
additional requirements for DUAL_EXPORT mode for r6xx (it's documented in the 
R6xx_3D_Registers.pdf).

There are no regressions with piglit on evergreen (juniper).

 src/gallium/drivers/r600/evergreen_state.c   |   56 --
 src/gallium/drivers/r600/evergreend.h|7 
 src/gallium/drivers/r600/r600_pipe.h |5 +++
 src/gallium/drivers/r600/r600_shader.c   |   25 ++--
 src/gallium/drivers/r600/r600_shader.h   |7 +++-
 src/gallium/drivers/r600/r600_state_common.c |7 +++-
 6 files changed, 88 insertions(+), 19 deletions(-)

-- 
1.7.10.4

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[Mesa-dev] [PATCH] automake: add missing inclusion of GL headers

2012-06-22 Thread Laurent Carlier
Building fail when GL headers are not installed in the system,
so add inclusion of these headers.
---
 src/mesa/x86-64/Makefile.am |1 +
 src/mesa/x86/Makefile.am|1 +
 2 files changed, 2 insertions(+)

diff --git a/src/mesa/x86-64/Makefile.am b/src/mesa/x86-64/Makefile.am
index 79cbb53..271ece9 100644
--- a/src/mesa/x86-64/Makefile.am
+++ b/src/mesa/x86-64/Makefile.am
@@ -24,6 +24,7 @@ if HAVE_X86_64_ASM
 AM_CPPFLAGS = \
-I$(top_srcdir)/src/mesa \
-I$(top_srcdir)/src/mapi \
+   -I$(top_srcdir)/include \
$(API_DEFINES) \
$(DEFINES)
 
diff --git a/src/mesa/x86/Makefile.am b/src/mesa/x86/Makefile.am
index f241de5..2b43f9d 100644
--- a/src/mesa/x86/Makefile.am
+++ b/src/mesa/x86/Makefile.am
@@ -24,6 +24,7 @@ if HAVE_X86_ASM
 AM_CPPFLAGS = \
-I$(top_srcdir)/src/mesa \
-I$(top_srcdir)/src/mapi \
+   -I$(top_srcdir)/include \
$(API_DEFINES) \
$(DEFINES)
 
-- 
1.7.10.4

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[Mesa-dev] [Bug 51328] New: _mesa_unpack_uint_z_row and _mesa_unpack_depth_span are slow

2012-06-22 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51328

 Bug #: 51328
   Summary: _mesa_unpack_uint_z_row and _mesa_unpack_depth_span
are slow
Classification: Unclassified
   Product: Mesa
   Version: git
  Platform: All
OS/Version: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Mesa core
AssignedTo: mesa-dev@lists.freedesktop.org
ReportedBy: jv...@altsci.com


Created attachment 63337
  --> https://bugs.freedesktop.org/attachment.cgi?id=63337
Patch for low performance in Psychonauts

Psychonauts, part of the Humble Indie Bundle 5, uses 100% cpu and runs at
approximately 1 frame per second on Sandy Bridge and Ivy Bridge. sysprof and
gdb showed that two functions caused the slowdown.

The stack trace for what is calling these functions are:
#0 0xf5ae1bf9 in unpack_uint_z_X8_Z24 () from /opt/xorg/lib32/dri/libdricore.so
#1 0xf5ae1eeb in _mesa_unpack_uint_z_row () from
/opt/xorg/lib32/dri/libdricore.so
#2 0xf5b2a1a1 in fast_read_depth_pixels () from
/opt/xorg/lib32/dri/libdricore.so
#3 0xf5b2a274 in read_depth_pixels () from /opt/xorg/lib32/dri/libdricore.so
#4 0xf5b2b70a in _mesa_readpixels () from /opt/xorg/lib32/dri/libdricore.so
#5 0xf5d5ff70 in intelReadPixels () from /opt/xorg/lib32/dri//i965_dri.so
#6 0xf5b2bbc9 in _mesa_ReadnPixelsARB () from /opt/xorg/lib32/dri/libdricore.so
#7 0xf5b2bc22 in _mesa_ReadPixels () from /opt/xorg/lib32/dri/libdricore.so
#8 0xf5c6d307 in _mesa_meta_BlitFramebuffer () from
/opt/xorg/lib32/dri/libdricore.so
#9 0xf5d579a4 in intel_blit_framebuffer () from
/opt/xorg/lib32/dri//i965_dri.so
#10 0xf5ac78fb in _mesa_BlitFramebufferEXT () from
/opt/xorg/lib32/dri/libdricore.so
#11 0x08187c6e in EOpenGLRenderer::glBlitFramebufferEXT(int, int, int, int,
int, int, int, int, unsigned int, unsigned int) const ()
#12 0x0818aa66 in ERenderer::RestoreRenderTarget() ()
#13 0x082f543a in GameApp::CreateDownsampledZBuffer() ()
#14 0x082f395d in GameApp::RenderSceneGeometry() ()
#15 0x082d898e in GameApp::RenderFrame() ()
#16 0x08522ad8 in main ()

and

#0 0xf5adf65d in _mesa_unpack_depth_span () from
/opt/xorg/lib32/dri/libdricore.so
#1 0xf5b1aa05 in _mesa_texstore_x8_z24 () from
/opt/xorg/lib32/dri/libdricore.so
#2 0xf5b2198d in _mesa_texstore () from /opt/xorg/lib32/dri/libdricore.so
#3 0xf5b21cd6 in store_texsubimage () from /opt/xorg/lib32/dri/libdricore.so
#4 0xf5b21e59 in _mesa_store_teximage () from /opt/xorg/lib32/dri/libdricore.so
#5 0xf5d20b85 in intelTexImage () from /opt/xorg/lib32/dri//i965_dri.so
#6 0xf5b0dd2d in teximage () from /opt/xorg/lib32/dri/libdricore.so
#7 0xf5b0def5 in _mesa_TexImage2D () from /opt/xorg/lib32/dri/libdricore.so
#8 0xf5c2bc56 in setup_drawpix_texture () from
/opt/xorg/lib32/dri/libdricore.so
#9 0xf5c2c9b2 in _mesa_meta_BlitFramebuffer () from
/opt/xorg/lib32/dri/libdricore.so
#10 0xf5d167fe in intel_blit_framebuffer () from
/opt/xorg/lib32/dri//i965_dri.so
#11 0xf5a877bf in _mesa_BlitFramebufferEXT () from
/opt/xorg/lib32/dri/libdricore.so
#12 0x08187c6e in EOpenGLRenderer::glBlitFramebufferEXT(int, int, int, int,
int, int, int, int, unsigned int, unsigned int) const ()
#13 0x0818aa66 in ERenderer::RestoreRenderTarget() ()
#14 0x0818a364 in ERenderer::SetRenderTarget(unsigned int, unsigned int,
CUBEMAPFACE) ()
#15 0x082f4554 in GameApp::BlitTextureFiltered(unsigned int, unsigned int,
BLENDMODE, FILTERTYPE, EVec2 const*, EVec2 const*, EVec4 const*, ERect*) ()
#16 0x082ef784 in GameApp::renderGlareToTexture() ()
#17 0x082f3b66 in GameApp::RenderSceneGeometry() ()
#18 0x082d898e in GameApp::RenderFrame() ()
#19 0x08522ad8 in main ()

These stack traces are from Psychonauts 0.2, but since there are symbols it
should be possible to use these. It's also very easy to reproduce with Intel
drivers (possibly Radeon open source or Nouveau as well).

I patched the source code of src/mesa/main/readpix.c and
src/mesa/main/texstore.c to remove these calls. However, I am not confident
that this is the correct solution. There are many possible side-effects that
could occur if you were to use my patch, so I leave the solution to you. The
patch fixes the performance problem and I am able to play Psychonauts with
reasonable fps at 1680x1050 at the highest quality.

I would be happy to work on an open source repro if that is necessary, but I
suspect that just looking at the code will be sufficient. If you need any other
data, let me know. I have been using git master successfully for months. I can
also test this with closed source nvidia or open source r600 drivers.

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Re: [Mesa-dev] [PATCH] i965/msaa: Only do multisample rasterization if GL_MULTISAMPLE enabled.

2012-06-22 Thread Michel Dänzer
On Don, 2012-06-21 at 17:31 -0400, Zack Rusin wrote: 
> On Thursday, June 21, 2012 11:19:39 AM Michel Dänzer wrote:
> > BTW, recent versions of emacs no longer seem to provide the dirvars
> > package, but I think they support another similar mechanism instead.
> > Would be great if somebody who knows more about this could
> > convert .emacs-dirvars to the current mechanism.
> 
> just updated it.

Thanks, Zack! I wonder if it might be useful to keep the .emacs-dirvars
file around as well, but you made me a happy camper. :)


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast |  Debian, X and DRI developer
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