[Mesa-dev] [PATCH] mesa: Return 0 for XFB_VARYING_MAX_LENGTH if no varyings
We add one for the null terminator, but if we don't have any varyings,
it doesn't make sense to have a null terminator.
Fixes part of es3conform's transform_feedback_init_defaults test.
---
src/mesa/main/shaderapi.c |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 7271150..19051d6 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -538,11 +538,14 @@ get_programiv(struct gl_context *ctx, GLuint program,
GLenum pname, GLint *param
break;
*params = shProg-TransformFeedback.NumVarying;
return;
- case GL_TRANSFORM_FEEDBACK_VARYING_MAX_LENGTH:
+ case GL_TRANSFORM_FEEDBACK_VARYING_MAX_LENGTH: {
+ GLint max_length;
if (!has_xfb)
break;
- *params = longest_feedback_varying_name(shProg) + 1;
+ max_length = longest_feedback_varying_name(shProg);
+ *params = max_length == 0 ? 0 : max_length + 1;
return;
+ }
case GL_TRANSFORM_FEEDBACK_BUFFER_MODE:
if (!has_xfb)
break;
--
1.7.8.6
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Re: [Mesa-dev] [PATCH 3/6] radeonsi: Flesh out support for depth/stencil exports from the pixel shader.
On 22.11.2012 18:57, Michel Dänzer wrote:
+ if (si_shader_ctx-type ==
TGSI_PROCESSOR_VERTEX) {
+ case TGSI_SEMANTIC_PSIZE:
+ target = V_008DFC_SQ_EXP_POS;
+ } else {
+ case TGSI_SEMANTIC_STENCIL:
+ if (d-Semantic.Name ==
TGSI_SEMANTIC_STENCIL)
+ stencil_index = index;
+ else
+ depth_index = index;
+ continue;
+ }
Is it just me or does this code look rather strange?
Its probably just some comment or disabled part of code, otherwise I
have my doubts that this would compile otherwise.
Christian.
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Re: [Mesa-dev] [PATCH 3/6] radeonsi: Flesh out support for depth/stencil exports from the pixel shader.
On Fre, 2012-11-23 at 09:43 +0100, Christian König wrote:
On 22.11.2012 18:57, Michel Dänzer wrote:
+ if (si_shader_ctx-type ==
TGSI_PROCESSOR_VERTEX) {
+ case TGSI_SEMANTIC_PSIZE:
+ target = V_008DFC_SQ_EXP_POS;
+ } else {
+ case TGSI_SEMANTIC_STENCIL:
+ if (d-Semantic.Name ==
TGSI_SEMANTIC_STENCIL)
+ stencil_index = index;
+ else
+ depth_index = index;
+ continue;
+ }
Is it just me or does this code look rather strange?
Its probably just some comment or disabled part of code, otherwise I
have my doubts that this would compile otherwise.
Of course it compiles... How could I have run piglit if it didn't? :)
The idea is to treat TGSI_SEMANTIC_POSITION the same as
TGSI_SEMANTIC_PSIZE for vertex shaders and similarly as
TGSI_SEMANTIC_STENCIL for fragment shaders.
That said, I'll concede it looks a bit weird. Feel free to follow up
with a cleanup.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Debian, X and DRI developer
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Re: [Mesa-dev] [PATCH 3/6] radeonsi: Flesh out support for depth/stencil exports from the pixel shader.
On 23.11.2012 10:25, Michel Dänzer wrote:
On Fre, 2012-11-23 at 09:43 +0100, Christian König wrote:
On 22.11.2012 18:57, Michel Dänzer wrote:
+ if (si_shader_ctx-type ==
TGSI_PROCESSOR_VERTEX) {
+ case TGSI_SEMANTIC_PSIZE:
+ target = V_008DFC_SQ_EXP_POS;
+ } else {
+ case TGSI_SEMANTIC_STENCIL:
+ if (d-Semantic.Name ==
TGSI_SEMANTIC_STENCIL)
+ stencil_index = index;
+ else
+ depth_index = index;
+ continue;
+ }
Is it just me or does this code look rather strange?
Its probably just some comment or disabled part of code, otherwise I
have my doubts that this would compile otherwise.
Of course it compiles... How could I have run piglit if it didn't? :)
The idea is to treat TGSI_SEMANTIC_POSITION the same as
TGSI_SEMANTIC_PSIZE for vertex shaders and similarly as
TGSI_SEMANTIC_STENCIL for fragment shaders.
Congratulations! You have just toasted my brain.
Well I knew that case labels are just labels, but haven't seen someone
using them like this for quite a while.
That said, I'll concede it looks a bit weird. Feel free to follow up
with a cleanup.
No thanks, I was just wondering what the heck that code is supposed to
do. Isn't there a compiler option forbidding this?
Christian.
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Re: [Mesa-dev] Proposal: allow hidden security bugs on Mesa's Bugzilla
On 12-11-21 12:48 PM, Chad Versace wrote: On 11/20/2012 09:29 AM, Benoit Jacob wrote: Any questions? Do you support or oppose me asking FD.o admins to allow hidden bugs on Mesa's bugzilla? Benoit I support this. It seems a sensible proposal for addressing security bugs. Thanks. I have just sent the request to FD.o admins. Benoit ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 0/4] DRI2: Fixing the triple-flush for Gallium v2
This series consolidates the 3 gallium context flushes done by libGL in SwapBuffers and CopySubBuffer, because we only need one context flush there. This is a cleanup. Please review. Marek ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/4] glx: move the glFlush call one layer down
---
src/glx/dri2_glx.c | 18 +-
src/glx/dri_glx.c | 12 ++--
src/glx/drisw_glx.c |7 ++-
src/glx/glxclient.h |4 ++--
src/glx/glxcmds.c | 11 ---
5 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
index 12b3026..30f6913 100644
--- a/src/glx/dri2_glx.c
+++ b/src/glx/dri2_glx.c
@@ -534,7 +534,7 @@ dri2Throttle(struct dri2_screen *psc,
static void
__dri2CopySubBuffer(__GLXDRIdrawable *pdraw, int x, int y,
int width, int height,
- enum __DRI2throttleReason reason)
+ enum __DRI2throttleReason reason, Bool flush)
{
struct dri2_drawable *priv = (struct dri2_drawable *) pdraw;
struct dri2_screen *psc = (struct dri2_screen *) pdraw-psc;
@@ -550,6 +550,10 @@ __dri2CopySubBuffer(__GLXDRIdrawable *pdraw, int x, int y,
xrect.width = width;
xrect.height = height;
+ if (flush) {
+ glFlush();
+ }
+
if (psc-f)
(*psc-f-flush) (priv-driDrawable);
@@ -571,10 +575,10 @@ __dri2CopySubBuffer(__GLXDRIdrawable *pdraw, int x, int y,
static void
dri2CopySubBuffer(__GLXDRIdrawable *pdraw, int x, int y,
- int width, int height)
+ int width, int height, Bool flush)
{
__dri2CopySubBuffer(pdraw, x, y, width, height,
- __DRI2_THROTTLE_COPYSUBBUFFER);
+ __DRI2_THROTTLE_COPYSUBBUFFER, flush);
}
@@ -731,7 +735,7 @@ static void show_fps(struct dri2_drawable *draw)
static int64_t
dri2SwapBuffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
- int64_t remainder)
+ int64_t remainder, Bool flush)
{
struct dri2_drawable *priv = (struct dri2_drawable *) pdraw;
struct glx_display *dpyPriv = __glXInitialize(priv-base.psc-dpy);
@@ -747,7 +751,7 @@ dri2SwapBuffers(__GLXDRIdrawable *pdraw, int64_t
target_msc, int64_t divisor,
/* Old servers can't handle swapbuffers */
if (!pdp-swapAvailable) {
__dri2CopySubBuffer(pdraw, 0, 0, priv-width, priv-height,
- __DRI2_THROTTLE_SWAPBUFFER);
+ __DRI2_THROTTLE_SWAPBUFFER, flush);
} else {
xcb_connection_t *c = XGetXCBConnection(pdraw-psc-dpy);
xcb_dri2_swap_buffers_cookie_t swap_buffers_cookie;
@@ -756,6 +760,10 @@ dri2SwapBuffers(__GLXDRIdrawable *pdraw, int64_t
target_msc, int64_t divisor,
uint32_t divisor_hi, divisor_lo;
uint32_t remainder_hi, remainder_lo;
+ if (flush) {
+ glFlush();
+ }
+
if (psc-f) {
struct glx_context *gc = __glXGetCurrentContext();
diff --git a/src/glx/dri_glx.c b/src/glx/dri_glx.c
index de777fb..f6aca96 100644
--- a/src/glx/dri_glx.c
+++ b/src/glx/dri_glx.c
@@ -684,22 +684,30 @@ driCreateDrawable(struct glx_screen *base,
static int64_t
driSwapBuffers(__GLXDRIdrawable * pdraw, int64_t unused1, int64_t unused2,
- int64_t unused3)
+ int64_t unused3, Bool flush)
{
struct dri_screen *psc = (struct dri_screen *) pdraw-psc;
struct dri_drawable *pdp = (struct dri_drawable *) pdraw;
+ if (flush) {
+ glFlush();
+ }
+
(*psc-core-swapBuffers) (pdp-driDrawable);
return 0;
}
static void
driCopySubBuffer(__GLXDRIdrawable * pdraw,
- int x, int y, int width, int height)
+ int x, int y, int width, int height, Bool flush)
{
struct dri_drawable *pdp = (struct dri_drawable *) pdraw;
struct dri_screen *psc = (struct dri_screen *) pdp-base.psc;
+ if (flush) {
+ glFlush();
+ }
+
(*psc-driCopySubBuffer-copySubBuffer) (pdp-driDrawable,
x, y, width, height);
}
diff --git a/src/glx/drisw_glx.c b/src/glx/drisw_glx.c
index 014296b..832e964 100644
--- a/src/glx/drisw_glx.c
+++ b/src/glx/drisw_glx.c
@@ -551,7 +551,8 @@ driswCreateDrawable(struct glx_screen *base, XID xDrawable,
static int64_t
driswSwapBuffers(__GLXDRIdrawable * pdraw,
- int64_t target_msc, int64_t divisor, int64_t remainder)
+ int64_t target_msc, int64_t divisor, int64_t remainder,
+ Bool flush)
{
struct drisw_drawable *pdp = (struct drisw_drawable *) pdraw;
struct drisw_screen *psc = (struct drisw_screen *) pdp-base.psc;
@@ -560,6 +561,10 @@ driswSwapBuffers(__GLXDRIdrawable * pdraw,
(void) divisor;
(void) remainder;
+ if (flush) {
+ glFlush();
+ }
+
(*psc-core-swapBuffers) (pdp-driDrawable);
return 0;
diff --git a/src/glx/glxclient.h b/src/glx/glxclient.h
index e4adedd..3e9b730 100644
--- a/src/glx/glxclient.h
+++ b/src/glx/glxclient.h
@@ -113,9 +113,9 @@ struct __GLXDRIscreenRec {
struct glx_config *config);
int64_t (*swapBuffers)(__GLXDRIdrawable *pdraw, int64_t target_msc,
- int64_t divisor, int64_t remainder);
+
[Mesa-dev] [PATCH 2/4] glx/dri2: add and use new driver hook flush_with_flags
---
include/GL/internal/dri_interface.h | 29 -
src/glx/dri2_glx.c| 144 -
src/mesa/drivers/dri/intel/intel_screen.c |2 +-
src/mesa/drivers/dri/nouveau/nouveau_screen.c |2 +-
src/mesa/drivers/dri/radeon/radeon_screen.c |2 +-
5 files changed, 125 insertions(+), 54 deletions(-)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index 1e0f1d0..718b53b 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -267,7 +267,13 @@ struct __DRItexBufferExtensionRec {
* Used by drivers that implement DRI2
*/
#define __DRI2_FLUSH DRI2_Flush
-#define __DRI2_FLUSH_VERSION 3
+#define __DRI2_FLUSH_VERSION 4
+
+#define __DRI2_FLUSH_DRAWABLE (1 0) /* the drawable should be flushed. */
+#define __DRI2_FLUSH_CONTEXT (1 1) /* glFlush should be called */
+
+enum __DRI2throttleReason;
+
struct __DRI2flushExtensionRec {
__DRIextension base;
void (*flush)(__DRIdrawable *drawable);
@@ -281,6 +287,27 @@ struct __DRI2flushExtensionRec {
* \since 3
*/
void (*invalidate)(__DRIdrawable *drawable);
+
+/**
+ * This function reduces the number of flushes in the driver by combining
+ * several operations into one call.
+ *
+ * It can:
+ * - throttle
+ * - flush a drawable
+ * - flush a context
+ *
+ * \param context the context
+ * \param drawable the drawable to flush
+ * \param flags a combination of _DRI2_FLUSH_xxx flags
+ * \param throttle_reason the reason for throttling, 0 = no throttling
+ *
+ * \since 4
+ */
+void (*flush_with_flags)(__DRIcontext *ctx,
+ __DRIdrawable *drawable,
+ unsigned flags,
+ enum __DRI2throttleReason throttle_reason);
};
diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
index 30f6913..5438def 100644
--- a/src/glx/dri2_glx.c
+++ b/src/glx/dri2_glx.c
@@ -509,6 +509,15 @@ dri2WaitForSBC(__GLXDRIdrawable *pdraw, int64_t
target_sbc, int64_t *ust,
return 1;
}
+static __DRIcontext *
+dri2GetCurrentContext()
+{
+ struct glx_context *gc = __glXGetCurrentContext();
+ struct dri2_context *dri2Ctx = (struct dri2_context *)gc;
+
+ return dri2Ctx ? dri2Ctx-driContext : NULL;
+}
+
/**
* dri2Throttle - Request driver throttling
*
@@ -522,10 +531,7 @@ dri2Throttle(struct dri2_screen *psc,
enum __DRI2throttleReason reason)
{
if (psc-throttle) {
- struct glx_context *gc = __glXGetCurrentContext();
- struct dri2_context *dri2Ctx = (struct dri2_context *)gc;
- __DRIcontext *ctx =
-(dri2Ctx) ? dri2Ctx-driContext : NULL;
+ __DRIcontext *ctx = dri2GetCurrentContext();
psc-throttle-throttle(ctx, draw-driDrawable, reason);
}
@@ -550,14 +556,25 @@ __dri2CopySubBuffer(__GLXDRIdrawable *pdraw, int x, int y,
xrect.width = width;
xrect.height = height;
- if (flush) {
- glFlush();
+ if (psc-f psc-f-base.version = 4) {
+ unsigned flags = flush ? __DRI2_FLUSH_CONTEXT : 0;
+ __DRIcontext *ctx = dri2GetCurrentContext();
+
+ if (ctx) {
+ (*psc-f-flush_with_flags)(ctx, priv-driDrawable, flags, reason);
+ }
}
+ else {
+ if (flush) {
+ glFlush();
+ }
- if (psc-f)
- (*psc-f-flush) (priv-driDrawable);
+ if (psc-f) {
+ (*psc-f-flush) (priv-driDrawable);
+ }
- dri2Throttle(psc, priv, reason);
+ dri2Throttle(psc, priv, reason);
+ }
region = XFixesCreateRegion(psc-base.dpy, xrect, 1);
DRI2CopyRegion(psc-base.dpy, pdraw-xDrawable, region,
@@ -734,6 +751,50 @@ static void show_fps(struct dri2_drawable *draw)
}
static int64_t
+dri2XcbSwapBuffers(Display *dpy,
+ __GLXDRIdrawable *pdraw,
+ int64_t target_msc,
+ int64_t divisor,
+ int64_t remainder)
+{
+ xcb_dri2_swap_buffers_cookie_t swap_buffers_cookie;
+ xcb_dri2_swap_buffers_reply_t *swap_buffers_reply;
+ uint32_t target_msc_hi, target_msc_lo;
+ uint32_t divisor_hi, divisor_lo;
+ uint32_t remainder_hi, remainder_lo;
+ int64_t ret = 0;
+ xcb_connection_t *c = XGetXCBConnection(dpy);
+
+ split_counter(target_msc, target_msc_hi, target_msc_lo);
+ split_counter(divisor, divisor_hi, divisor_lo);
+ split_counter(remainder, remainder_hi, remainder_lo);
+
+ swap_buffers_cookie =
+ xcb_dri2_swap_buffers_unchecked(c, pdraw-xDrawable,
+ target_msc_hi, target_msc_lo,
+ divisor_hi, divisor_lo,
+ remainder_hi, remainder_lo);
+
+ /* Immediately wait on the swapbuffers reply. If we didn't, we'd have
+* to do so some time before reusing a (non-pageflipped) backbuffer.
+* Otherwise, the new rendering could get ahead of the X
[Mesa-dev] [PATCH 3/4] st/mesa: make st_flush do what glFlush does
---
src/mesa/state_tracker/st_cb_flush.c |1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_cb_flush.c
b/src/mesa/state_tracker/st_cb_flush.c
index b4372ae..7c9f91f 100644
--- a/src/mesa/state_tracker/st_cb_flush.c
+++ b/src/mesa/state_tracker/st_cb_flush.c
@@ -79,6 +79,7 @@ display_front_buffer(struct st_context *st)
void st_flush( struct st_context *st,
struct pipe_fence_handle **fence )
{
+ FLUSH_VERTICES(st-ctx, 0);
FLUSH_CURRENT(st-ctx, 0);
st_flush_bitmap_cache(st);
--
1.7.10.4
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[Mesa-dev] [PATCH 4/4] st/dri: implement new driver hook flush_with_flags
---
.../state_trackers/dri/common/dri_drawable.c | 105 +---
.../state_trackers/dri/common/dri_drawable.h |6 ++
src/gallium/state_trackers/dri/common/dri_screen.h |1 +
src/gallium/state_trackers/dri/drm/dri2.c | 28 ++
4 files changed, 84 insertions(+), 56 deletions(-)
diff --git a/src/gallium/state_trackers/dri/common/dri_drawable.c
b/src/gallium/state_trackers/dri/common/dri_drawable.c
index 5a261dd..deef003 100644
--- a/src/gallium/state_trackers/dri/common/dri_drawable.c
+++ b/src/gallium/state_trackers/dri/common/dri_drawable.c
@@ -350,46 +350,83 @@ swap_fences_unref(struct dri_drawable *draw)
}
}
+/**
+ * DRI2 flush extension, the flush_with_flags function.
+ */
+void
+dri_flush(__DRIcontext *cPriv,
+ __DRIdrawable *dPriv,
+ unsigned flags,
+ enum __DRI2throttleReason reason)
+{
+ struct dri_context *ctx = dri_context(cPriv);
+ struct dri_drawable *drawable = dri_drawable(dPriv);
+ unsigned flush_flags;
+
+ if (!ctx) {
+ assert(0);
+ return;
+ }
+
+ if (!drawable) {
+ flags = ~__DRI2_FLUSH_DRAWABLE;
+ }
+
+ /* Flush the drawable. */
+ if (flags __DRI2_FLUSH_DRAWABLE) {
+ struct pipe_resource *ptex = drawable-textures[ST_ATTACHMENT_BACK_LEFT];
+
+ if (ptex ctx-pp drawable-textures[ST_ATTACHMENT_DEPTH_STENCIL])
+ pp_run(ctx-pp, ptex, ptex,
drawable-textures[ST_ATTACHMENT_DEPTH_STENCIL]);
+ }
+
+ flush_flags = 0;
+ if (flags __DRI2_FLUSH_CONTEXT)
+ flush_flags |= ST_FLUSH_FRONT;
+
+ /* Flush the context and throttle if needed. */
+ if (dri_screen(ctx-sPriv)-throttling_enabled
+ (reason == __DRI2_THROTTLE_SWAPBUFFER ||
+reason == __DRI2_THROTTLE_FLUSHFRONT)) {
+ /* Throttle.
+ *
+ * This pulls a fence off the throttling queue and waits for it if the
+ * number of fences on the throttling queue has reached the desired
+ * number.
+ *
+ * Then flushes to insert a fence at the current rendering position, and
+ * pushes that fence on the queue. This requires that the
st_context_iface
+ * flush method returns a fence even if there are no commands to flush.
+ */
+ struct dri_drawable *draw = dri_drawable(dPriv);
+ struct pipe_screen *screen = draw-screen-base.screen;
+ struct pipe_fence_handle *fence;
+
+ fence = swap_fences_pop_front(draw);
+ if (fence) {
+ (void) screen-fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE);
+ screen-fence_reference(screen, fence, NULL);
+ }
+
+ ctx-st-flush(ctx-st, flush_flags, fence);
+ if (fence) {
+ swap_fences_push_back(draw, fence);
+ screen-fence_reference(screen, fence, NULL);
+ }
+ }
+ else if (flags (__DRI2_FLUSH_DRAWABLE | __DRI2_FLUSH_CONTEXT)) {
+ ctx-st-flush(ctx-st, flush_flags, NULL);
+ }
+}
/**
* dri_throttle - A DRI2ThrottleExtension throttling function.
- *
- * pulls a fence off the throttling queue and waits for it if the
- * number of fences on the throttling queue has reached the desired
- * number.
- *
- * Then flushes to insert a fence at the current rendering position, and
- * pushes that fence on the queue. This requires that the st_context_iface
- * flush method returns a fence even if there are no commands to flush.
*/
static void
-dri_throttle(__DRIcontext *driCtx, __DRIdrawable *dPriv,
-enum __DRI2throttleReason reason)
+dri_throttle(__DRIcontext *cPriv, __DRIdrawable *dPriv,
+ enum __DRI2throttleReason reason)
{
-struct dri_drawable *draw = dri_drawable(dPriv);
-struct st_context_iface *ctxi;
-struct pipe_screen *screen = draw-screen-base.screen;
-struct pipe_fence_handle *fence;
-
-if (reason != __DRI2_THROTTLE_SWAPBUFFER
- reason != __DRI2_THROTTLE_FLUSHFRONT)
- return;
-
-fence = swap_fences_pop_front(draw);
-if (fence) {
- (void) screen-fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE);
- screen-fence_reference(screen, fence, NULL);
-}
-
-if (driCtx == NULL)
- return;
-
-ctxi = dri_context(driCtx)-st;
-ctxi-flush(ctxi, 0, fence);
-if (fence) {
- swap_fences_push_back(draw, fence);
- screen-fence_reference(screen, fence, NULL);
-}
+ dri_flush(cPriv, dPriv, 0, reason);
}
diff --git a/src/gallium/state_trackers/dri/common/dri_drawable.h
b/src/gallium/state_trackers/dri/common/dri_drawable.h
index 3e3876e..6336c81 100644
--- a/src/gallium/state_trackers/dri/common/dri_drawable.h
+++ b/src/gallium/state_trackers/dri/common/dri_drawable.h
@@ -106,6 +106,12 @@ dri_drawable_get_format(struct dri_drawable *drawable,
enum pipe_format *format,
unsigned *bind);
+void
+dri_flush(__DRIcontext *cPriv,
+ __DRIdrawable *dPriv,
+ unsigned flags,
+ enum __DRI2throttleReason reason);
+
extern const __DRItexBufferExtension
[Mesa-dev] Please test the automake-gallium4 branch
Hi mesa-list, I'm happy to announce that I've finished Matt's automake-gallium branch [0]. Some of the independent patches are already in the master branch. I've fixed the missing symbols in vdpau and xvmc and installed lots of compatibility links to provide the same behaviour as the old build system. (lib/*.so and lib/gallium/*.so) Please help Matt and me to test the automake-gallium4 branch [1] ! Here you have a list of things you could test: Drivers: - i915g - llvmpipe - nv30 - nv50 - nvc0 - r300g - r600g - radeonsi - softpipe - svga State tracker: - Clover (OpenCL) - Mesa (OpenGL) - VDPAU - Vega (OpenVG) - XA - Xorg - XvMC The other build systems: - Android - Scons Some other things: - egl, gles1,2, gbm, with and without LLVM, r600-llvm-compiler If there are no objections I'll merge this branch next week. Thanks to Matt and Tom for the hard work. Andreas. [0] http://lists.freedesktop.org/archives/mesa-dev/2012-September/027861.html [1] http://cgit.freedesktop.org/~ab/mesa/log/?h=automake-gallium4 git diff --stat origin/master..automake-gallium4 | tail -n1 223 files changed, 2599 insertions(+), 4946 deletions(-) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] radeon/llvm: do not use magic number for resourceId
---
lib/Target/AMDGPU/AMDGPUIntrinsics.td | 16 -
.../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 7 ++--
lib/Target/AMDGPU/R600ISelLowering.cpp | 14 +---
lib/Target/AMDGPU/R600Instructions.td | 40 +++---
4 files changed, 42 insertions(+), 35 deletions(-)
diff --git a/lib/Target/AMDGPU/AMDGPUIntrinsics.td
b/lib/Target/AMDGPU/AMDGPUIntrinsics.td
index 1f2428a..2ba2d4b 100644
--- a/lib/Target/AMDGPU/AMDGPUIntrinsics.td
+++ b/lib/Target/AMDGPU/AMDGPUIntrinsics.td
@@ -36,15 +36,15 @@ let TargetPrefix = AMDGPU, isTarget = 1 in {
def int_AMDGPU_sle : Intrinsic[llvm_float_ty], [llvm_float_ty,
llvm_float_ty], [IntrNoMem];
def int_AMDGPU_sne : Intrinsic[llvm_float_ty], [llvm_float_ty,
llvm_float_ty], [IntrNoMem];
def int_AMDGPU_mullit : Intrinsic[llvm_v4f32_ty], [llvm_float_ty,
llvm_float_ty, llvm_float_ty], [IntrNoMem];
- def int_AMDGPU_tex : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty], [IntrNoMem];
- def int_AMDGPU_txb : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty], [IntrNoMem];
- def int_AMDGPU_txf : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
- def int_AMDGPU_txq : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty], [IntrNoMem];
- def int_AMDGPU_txd : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty,
llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
- def int_AMDGPU_txl : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_tex : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_txb : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_txf : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_txq : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_txd : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty,
llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem];
+ def int_AMDGPU_txl : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
def int_AMDGPU_trunc : Intrinsic[llvm_float_ty], [llvm_float_ty],
[IntrNoMem];
- def int_AMDGPU_ddx : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty], [IntrNoMem];
- def int_AMDGPU_ddy : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_ddx : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
+ def int_AMDGPU_ddy : Intrinsic[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem];
def int_AMDGPU_imax : Intrinsic[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
[IntrNoMem];
def int_AMDGPU_imin : Intrinsic[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
[IntrNoMem];
def int_AMDGPU_umax : Intrinsic[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
[IntrNoMem];
diff --git a/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
b/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
index 5178157..b9e9b1a 100644
--- a/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
+++ b/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
@@ -339,8 +339,9 @@ void R600MCCodeEmitter::EmitTexInstr(const MCInst MI,
unsigned opcode = MI.getOpcode();
bool hasOffsets = (opcode == AMDGPU::TEX_LD);
unsigned op_offset = hasOffsets ? 3 : 0;
- int64_t sampler = MI.getOperand(op_offset+2).getImm();
- int64_t textureType = MI.getOperand(op_offset+3).getImm();
+ int64_t resource = MI.getOperand(op_offset+2).getImm();
+ int64_t sampler = MI.getOperand(op_offset+3).getImm();
+ int64_t textureType = MI.getOperand(op_offset+4).getImm();
unsigned srcSelect[4] = {0, 1, 2, 3};
// Emit instruction type
@@ -350,7 +351,7 @@ void R600MCCodeEmitter::EmitTexInstr(const MCInst MI,
EmitByte(getBinaryCodeForInstr(MI, Fixups), OS);
// XXX: Emit resource id r600_shader.c uses sampler + 1. Why?
- EmitByte(sampler + 1 + 1, OS);
+ EmitByte(resource, OS);
// Emit source register
EmitByte(getHWReg(MI.getOperand(1).getReg()), OS);
diff --git a/lib/Target/AMDGPU/R600ISelLowering.cpp
b/lib/Target/AMDGPU/R600ISelLowering.cpp
index 3adc5d6..a9881e0 100644
--- a/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -234,16 +234,19 @@ MachineBasicBlock *
R600TargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB-findDebugLoc(I),
TII-get(AMDGPU::TEX_SET_GRADIENTS_H), t0)
.addOperand(MI-getOperand(3))
.addOperand(MI-getOperand(4))
- .addOperand(MI-getOperand(5));
+ .addOperand(MI-getOperand(5))
+
[Mesa-dev] [PATCH] glsl: add new variable declaration in function body in lower_output_read
--- src/glsl/lower_output_reads.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/glsl/lower_output_reads.cpp b/src/glsl/lower_output_reads.cpp index 90d71b0..a6192a5 100644 --- a/src/glsl/lower_output_reads.cpp +++ b/src/glsl/lower_output_reads.cpp @@ -97,6 +97,7 @@ output_read_remover::visit(ir_dereference_variable *ir) temp = new(var_ctx) ir_variable(ir-var-type, ir-var-name, ir_var_temporary); hash_table_insert(replacements, temp, ir-var); + ir-var-insert_after(temp); } /* Update the dereference to use the temporary */ -- 1.7.11.7 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
