Hi,
I have tested your changes:
[Mesa-dev] [PATCH] glsl: Initialize parcel_out_uniform_storage member
variables.
Project: mesa (Mesa build tests)
Configurations: android linux
Tested the patch(es) on top of the
Fixes uninitialized scalar field defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/glsl/link_uniforms.cpp | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index d457e4d..b5bfe13
Thanks for fixing this Roland.
This is definitely an improvement. I'd recommend a few tweaks (it could even be
as a follow on change):
- Calling llvmpipe_flush_resource() in a loop is overkill (it will call
llvmpipe_flush() to be called many times needlessly). Please refactor
Am 18.02.2013 20:11, schrieb Roland Scheidegger:
Am 18.02.2013 19:14, schrieb Michel Dänzer:
From: Michel Dänzer michel.daen...@amd.com
11 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
Any ideas why this seems
https://bugs.freedesktop.org/show_bug.cgi?id=38086
--- Comment #5 from Laurent carlier lordhea...@gmail.com ---
Can reproduce this bug also with mesa-9.2-devel (git) but also 9.0.x with
counter strike: Source (steam-linux)
gdb backtrace:
Breakpoint 2, destroy_program_variants (st=0x8171910,
On Mon, Feb 18, 2013 at 7:58 PM, Rob Clark robdcl...@gmail.com wrote:
On Mon, Feb 18, 2013 at 12:47 PM, Matt Turner matts...@gmail.com wrote:
On Sun, Feb 17, 2013 at 11:33 AM, Rob Clark robdcl...@gmail.com wrote:
diff --git a/src/gallium/drivers/freedreno/Makefile.am
On Tue, Feb 19, 2013 at 10:33 AM, Christian König
deathsim...@vodafone.de wrote:
Am 18.02.2013 20:11, schrieb Roland Scheidegger:
Am 18.02.2013 19:14, schrieb Michel Dänzer:
From: Michel Dänzer michel.daen...@amd.com
11 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Vadim Girlin wrote:
Testing with rv790 with drm-fixes kernel not much works -
etqw runs but in a level 50% of screen is junk.
nexuiz menus total junk, didn't test further.
xonotic menus OK but gpu lock on starting timedemo.
vdpau mpeg2 decode - renders 90% junk.
heaven 3.0 (on a different
On Tue, Feb 19, 2013 at 11:02 AM, Michel Dänzer mic...@daenzer.net wrote:
On Die, 2013-02-19 at 10:33 +0100, Christian König wrote:
Am 18.02.2013 20:11, schrieb Roland Scheidegger:
Am 18.02.2013 19:14, schrieb Michel Dänzer:
From: Michel Dänzer michel.daen...@amd.com
11 more little
On 02/19/2013 04:54 PM, Andy Furniss wrote:
Vadim Girlin wrote:
Testing with rv790 with drm-fixes kernel not much works -
etqw runs but in a level 50% of screen is junk.
nexuiz menus total junk, didn't test further.
xonotic menus OK but gpu lock on starting timedemo.
vdpau mpeg2 decode -
From: Christian König christian.koe...@amd.com
Fixing asm operation names.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIISelLowering.cpp |3 ---
lib/Target/R600/SIInstrInfo.td | 37 ++--
2 files changed, 18
From: Christian König christian.koe...@amd.com
Fixing asm operation names.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIInstrInfo.td | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git
From: Christian König christian.koe...@amd.com
Fixing asm operation names.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/AMDGPUInstructions.td |5 +
lib/Target/R600/SIInstrInfo.td| 19 +-
lib/Target/R600/SIInstructions.td | 444
From: Christian König christian.koe...@amd.com
Those two files got mixed up.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIInstrFormats.td | 500 +++--
lib/Target/R600/SIInstrInfo.td| 495 +++-
From: Christian König christian.koe...@amd.com
Fix code formating and sort/group the classes.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIInstrInfo.td | 100 +++-
1 file changed, 58 insertions(+), 42 deletions(-)
diff --git
From: Christian König christian.koe...@amd.com
Instead of using custom inserters, it's simpler and
should make DAG folding easier.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIISelLowering.cpp | 36
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/AMDGPUInstructions.td | 15 +++
lib/Target/R600/SIInstructions.td | 18 ++
2 files changed, 33 insertions(+)
diff --git
From: Christian König christian.koe...@amd.com
It actually fixes quite a bunch of piglit tests.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIISelLowering.cpp | 22 --
lib/Target/R600/SIISelLowering.h |2 --
https://bugs.freedesktop.org/show_bug.cgi?id=61093
José Fonseca jfons...@vmware.com changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |srol...@vmware.com
On Die, 2013-02-19 at 14:04 +0100, Marek Olšák wrote:
On Tue, Feb 19, 2013 at 11:02 AM, Michel Dänzer mic...@daenzer.net wrote:
Really, what I don't understand is why r600g doesn't seem affected by
this... at least on my RS880 it's passing the piglit tests this change
fixes with
https://bugs.freedesktop.org/show_bug.cgi?id=38086
--- Comment #6 from Brian Paul bri...@vmware.com ---
Can you make a trace of this issue with apitrace?
https://github.com/apitrace/apitrace
--
You are receiving this mail because:
You are the assignee for the bug.
https://bugs.freedesktop.org/show_bug.cgi?id=60938
Brian Paul bri...@vmware.com changed:
What|Removed |Added
Status|NEW |RESOLVED
https://bugs.freedesktop.org/show_bug.cgi?id=61026
Brian Paul bri...@vmware.com changed:
What|Removed |Added
Status|NEW |RESOLVED
https://bugs.freedesktop.org/show_bug.cgi?id=59876
Brian Paul bri...@vmware.com changed:
What|Removed |Added
Status|NEW |RESOLVED
https://bugs.freedesktop.org/show_bug.cgi?id=61012
Brian Paul bri...@vmware.com changed:
What|Removed |Added
Status|NEW |RESOLVED
On Die, 2013-02-19 at 14:54 +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Fixing asm operation names.
[...]
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index be791e2..69357ce 100644
--- a/lib/Target/R600/SIInstrInfo.td
+++
On 02/18/2013 05:27 PM, srol...@vmware.com wrote:
From: Roland Scheideggersrol...@vmware.com
Some parts calculated key size by using shader information, others by using
the pipe_vertex_element information. Since it is perfectly valid to have more
vertex_elements set than the vertex shader is
On Tue, Feb 19, 2013 at 3:28 PM, Michel Dänzer mic...@daenzer.net wrote:
On Die, 2013-02-19 at 14:04 +0100, Marek Olšák wrote:
On Tue, Feb 19, 2013 at 11:02 AM, Michel Dänzer mic...@daenzer.net wrote:
Really, what I don't understand is why r600g doesn't seem affected by
this... at least on
https://bugs.freedesktop.org/show_bug.cgi?id=61091
--- Comment #1 from Marek Olšák mar...@gmail.com ---
glBlitFramebuffer with rectangle textures is also broken with both softpipe and
llvmpipe and it has been so for quite a while. I have a piglit test for that.
--
You are receiving this mail
On 02/15/2013 09:00 AM, Kevin H. Hobbs wrote:
I have two machines {bubbles, murron} doing nightly dashboard builds of
VTK using nightly Mesa.
Each machine does a build of VTK using swrast and one with OSMesa.
Many tests pass on both machines when using OSMesa and fail on both
machines using
On Die, 2013-02-19 at 15:48 +0100, Marek Olšák wrote:
On Tue, Feb 19, 2013 at 3:28 PM, Michel Dänzer mic...@daenzer.net wrote:
On Die, 2013-02-19 at 14:04 +0100, Marek Olšák wrote:
On Tue, Feb 19, 2013 at 11:02 AM, Michel Dänzer mic...@daenzer.net wrote:
Really, what I don't understand
There may be more vertex elements that used in the shader. But why should the
key contain those elements? Won't this cause needless recompilations (e.g., in
situations where the state tracker leaves unneeded elements from previous
draw?)?
That is, it seems to be that the key should have the
On Mon, Feb 18, 2013 at 05:27:29PM +0100, Vincent Lejeune wrote:
Maintaining CONST_COPY Instructions until Pre Emit may prevent some ifcvt case
and taking them in account for scheduling is difficult for no real benefit.
---
lib/Target/R600/AMDGPU.h| 1 -
Hi Vincent,
From now on, please cc llvm-comm...@cs.uiuc.edu when you submit a patch.
I'm cc'ing that list now.
This looks OK to me at first glance, but I would like to test it with
compute shaders before you merge it.
On Mon, Feb 18, 2013 at 05:27:30PM +0100, Vincent Lejeune wrote:
From:
On Mon, Feb 18, 2013 at 05:27:25PM +0100, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/R600Instructions.td | 8
test/CodeGen/R600/fdiv.v4f32.ll | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git
On Mon, Feb 18, 2013 at 05:27:26PM +0100, Vincent Lejeune wrote:
mayLoad complexify scheduling and does not bring any usefull info
as the location is not writeable at all.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/R600Instructions.td | 2 +-
1 file changed, 1
On Mon, Feb 18, 2013 at 05:27:27PM +0100, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 29 +
1 file changed, 29 insertions(+)
diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp
On Mon, Feb 18, 2013 at 05:27:28PM +0100, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/R600Instructions.td | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/Target/R600/R600Instructions.td
b/lib/Target/R600/R600Instructions.td
index
Hi Christian,
From now on can you cc llvm-comm...@cs.uiuc.edu when you submit a patch.
Thanks,
Tom
On Tue, Feb 19, 2013 at 02:54:23PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Those two files got mixed up.
Signed-off-by: Christian König
On Tue, Feb 19, 2013 at 12:55 AM, Vinson Lee v...@freedesktop.org wrote:
MinGW does not have clock_gettime.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
I'm seeking feedback on an EGL extension that I'm drafting. The ideas have
already been discussed at Khronos meetings to a good reception, but I want
feedback from Mesa developers too.
Summary
- ---
The extension, tentatively named
Vadim Girlin wrote:
Could you please test glxgears and other simple mesa demos? It's easier
to spot the problems with small apps that don't use a lot of complex
shaders. If some of them don't work correctly, please send me the dumps
with R600_DUMP_SHADERS=2 R600_SB_DUMP=3.
All of the mesa
Am 19.02.2013 10:13, schrieb Jose Fonseca:
Thanks for fixing this Roland.
This is definitely an improvement. I'd recommend a few tweaks (it could even
be as a follow on change):
- Calling llvmpipe_flush_resource() in a loop is overkill (it will call
llvmpipe_flush() to be called many
https://bugs.freedesktop.org/show_bug.cgi?id=38086
--- Comment #7 from Laurent carlier lordhea...@gmail.com ---
(In reply to comment #6)
Can you make a trace of this issue with apitrace?
https://github.com/apitrace/apitrace
You can find it here:
From: Marek Olšák mar...@gmail.com
[ Cherry-picked from r600g commit b278aba42310e8fa30f2408b9dcd58dbb4901724 ]
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/r600_texture.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git
These together get us 11 more little piglits with Marek's
glTex(Sub)Image improvements in st/mesa.
[PATCH 1/3] radeonsi: use u_box_origin_2d helper function
[PATCH 2/3] radeonsi: add assertions to prevent creation of invalid
[PATCH 3/3] radeonsi: implement 3D transfers
From: Marek Olšák mar...@gmail.com
[ Cherry-picked from r600g commit ef11ed61a0414d0405c3faf7f48fa3f1d083f82e ]
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/r600_blit.c | 15 ---
src/gallium/drivers/radeonsi/r600_texture.c | 2 ++
From: Marek Olšák mar...@gmail.com
That means we can map and read multiple slices with one transfer_map call.
[ Cherry-picked from r600g commit 1aebb6911e9aa1bd8900868b58d1750ca83a20c7 ]
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/r600_texture.c | 49
On 02/19/2013 09:51 AM, Brian Paul wrote:
Looks like lines, in particular, are missing. I don't see any recent
changes to swrast/osmesa that would seem to cause this.
There probably were none. I'm trying to track down long standing issues.
1. You do a git-bisect of mesa to find the
Am 19.02.2013 15:57, schrieb Jose Fonseca:
There may be more vertex elements that used in the shader. But why should the
key contain those elements? Won't this cause needless recompilations (e.g.,
in situations where the state tracker leaves unneeded elements from previous
draw?)?
I don't
- Original Message -
Am 19.02.2013 15:57, schrieb Jose Fonseca:
There may be more vertex elements that used in the shader. But why should
the key contain those elements? Won't this cause needless recompilations
(e.g., in situations where the state tracker leaves unneeded elements
On Tue, Feb 19, 2013 at 12:15 PM, Michel Dänzer mic...@daenzer.net wrote:
These together get us 11 more little piglits with Marek's
glTex(Sub)Image improvements in st/mesa.
[PATCH 1/3] radeonsi: use u_box_origin_2d helper function
[PATCH 2/3] radeonsi: add assertions to prevent creation of
Am 19.02.2013 18:54, schrieb Jose Fonseca:
- Original Message -
Am 19.02.2013 15:57, schrieb Jose Fonseca:
There may be more vertex elements that used in the shader. But why should
the key contain those elements? Won't this cause needless recompilations
(e.g., in situations where
From: Roland Scheidegger srol...@vmware.com
Some parts calculated key size by using shader information, others by using
the pipe_vertex_element information. Since it is perfectly valid to have more
vertex_elements set than the vertex shader is using those may not be the same,
so we weren't
We sometimes convert GL_QUAD_STRIP prims into GL_TRIANGLE_STRIP, but
that changes the results of the u_trim_pipe_prim() call. We need to
pass the original primitive type to the trim function.
Note that OpenGL's GL_x prim type values match Gallium's PIPE_PRIM_x values.
Fixes a failure in the new
On 02/19/2013 08:39 PM, Andy Furniss wrote:
Vadim Girlin wrote:
Could you please test glxgears and other simple mesa demos? It's easier
to spot the problems with small apps that don't use a lot of complex
shaders. If some of them don't work correctly, please send me the dumps
with
From: Roland Scheidegger srol...@vmware.com
We don't need to flush resources for each layer, and since we don't actually
care about layer at all in the flush function just drop the parameter.
Also we can use util_copy_box instead of repeated util_copy_rect.
---
From: Roland Scheidegger srol...@vmware.com
For constant and temporary register fetches, the bitcasts weren't done
correctly for the indirect case, leading to crashes due to type mismatches.
Simply do the bitcasts after fetching (much simpler than fixing up the load
pointer for the various
- Original Message -
From: Roland Scheidegger srol...@vmware.com
We don't need to flush resources for each layer, and since we don't actually
care about layer at all in the flush function just drop the parameter.
Also we can use util_copy_box instead of repeated util_copy_rect.
Rob Clark robdcl...@gmail.com writes:
From: Rob Clark robcl...@freedesktop.org
The libdrm_freedreno helper layer for use by xf86-video-freedreno,
fdre (freedreno r/e library and tests for driving gpu), and eventual
gallium driver for the Adreno GPU. This uses the msm gpu driver
from QCOM's
https://bugs.freedesktop.org/show_bug.cgi?id=59331
Ian Romanick i...@freedesktop.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
https://bugs.freedesktop.org/show_bug.cgi?id=59331
Ian Romanick i...@freedesktop.org changed:
What|Removed |Added
CC||xunx.f...@intel.com
From: Ian Romanick ian.d.roman...@intel.com
NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59740
Cc: Eric Anholt e...@anholt.net
---
src/mesa/main/eval.c | 11 ---
On 02/16/2013 07:29 AM, Paul Berry wrote:
Pre-Gen6, the SF thread requires exact matching between VS output
slots (aka VUE slots) and FS input slots, even when the corresponding
VS output slot is unused due to being overwritten by point coordinate
replacement (glTexEnvi(GL_POINT_SPRITE,
This fixes a bug introduced in commit 258453716f001eab1288d99765213 and
triggered whenever rb is NULL.
Fixes bug #59445:
[SNB/IVB/HSW Bisected]Oglc draw-buffers2(advanced.blending.none)
segfault
https://bugs.freedesktop.org/show_bug.cgi?id=59445
---
I don't know under what
From: Kenneth Graunke kenn...@whitecape.org
Previously, we had separate constructors for one, two, and four operand
expressions. This patch consolidates them into a single constructor
which uses NULL default parameters.
The unary and binary operator constructors had assertions to verify that
From: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
---
src/glsl/ir_reader.cpp | 45 +++--
1 files changed, 19 insertions(+), 26 deletions(-)
diff --git a/src/glsl/ir_reader.cpp b/src/glsl/ir_reader.cpp
index
From: Kenneth Graunke kenn...@whitecape.org
Many GPUs have an instruction to do linear interpolation which is more
efficient than simply performing the algebra necessary (two multiplies,
an add, and a subtract).
Pattern matching or peepholing this is more desirable, but can be
tricky. By using
---
src/glsl/opt_algebraic.cpp | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index 75948db..952941e 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -186,12 +186,12 @@
From: Kenneth Graunke kenn...@whitecape.org
v2 [mattst88]:
- Add BRW_OPCODE_LRP to list of CSE-able expressions.
- Fix op_var[] array size.
- Rename arguments to emit_lrp to (x, y, a) to clear confusion.
- Add LRP function to brw_fs.cpp/.h.
- Corrected comment about LRP instruction
---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 5f5f6a9..50e63da 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++
---
src/mesa/program/ir_to_mesa.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 30305d2..5432323 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1479,7
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ae4cf7d..a2bc9f5 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=61149
--- Comment #1 from Antony Riakiotakis kal...@gmail.com ---
Attaching full backtrace. Some information that might prove useful, we are
using glDrawElements as a draw call.
#0 0x7fffe2900a3f in run_vp (ctx=optimized out, stage=optimized
On 02/19/2013 04:27 PM, Carl Worth wrote:
This fixes a bug introduced in commit 258453716f001eab1288d99765213 and
triggered whenever rb is NULL.
Fixes bug #59445:
[SNB/IVB/HSW Bisected]Oglc draw-buffers2(advanced.blending.none)
segfault
We were allocating an adjacency_list entry for every possible
interference that could get created, but that usually doesn't happen.
We can save a lot of memory by resizing the array on demand.
---
src/mesa/program/register_allocate.c | 14 +-
1 file changed, 13 insertions(+), 1
We can execute way fewer instructions by doing our boolean manipulation
on an int of bits at a time, while also reducing our working set size.
Reduces compile time of L4D2's slowest shader from 4s to 1.1s
(-72.4% +/- 0.2%, n=10)
---
.../drivers/dri/i965/brw_fs_live_variables.cpp | 44
After the previous fix that almost removes an allocation of 4*n^2
bytes, we can use a bitset to reduce another allocation from n^2 bytes
to n^2/8 bytes.
Between the previous commit and this one, the peak heap size for an
oglconform ARB_fragment_program max instructions test on i965 goes from
4GB
Not much to say about the code (the theory sounds sane) but I was
wondering about the comment.
Why did glsl implement this really as x * (1 - a) + y * a?
The usual way for lerp would be (y - x) * a + x, i.e. two ops for most
gpus (sub+mad, or sub+mul+add). But I'm wondering if that sacrifices
Gen6 has write-only MRF registers, and for ease of implementation we
paritition off 16 general purposes registers to act as MRFs on Gen7.
Knowing that our Gen7 MRFs are actually GRFs, we can potentially do
things we can't do with real MRFs:
- read from them;
- return values directly to them
total instructions in shared programs: 1376297 - 1375626 (-0.05%)
instructions in affected programs: 35977 - 35306 (-1.87%)
---
src/mesa/drivers/dri/i965/brw_fs.cpp |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
total instructions in shared programs: 346873 - 346847 (-0.01%)
instructions in affected programs: 364 - 338 (-7.14%)
(All affected shaders are from Lightsmark)
---
src/mesa/drivers/dri/i965/brw_vec4.cpp |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
https://bugs.freedesktop.org/show_bug.cgi?id=61153
Priority: medium
Bug ID: 61153
Keywords: regression
CC: bri...@vmware.com
Assignee: mesa-dev@lists.freedesktop.org
Summary: [softpipe] piglit
Ian Romanick i...@freedesktop.org writes:
From: Ian Romanick ian.d.roman...@intel.com
NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59740
Cc: Eric Anholt e...@anholt.net
I had make
Fixes resource leak defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/gallium/drivers/radeonsi/si_state.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index
85 matches
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