On Mon, Aug 11, 2014 at 10:40:25PM -0700, Kenneth Graunke wrote:
On Monday, August 11, 2014 07:53:11 PM Ben Widawsky wrote:
On Mon, Aug 11, 2014 at 05:29:31PM -0700, Kristian Høgsberg wrote:
[snip]
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c
On Mon, Aug 11, 2014 at 11:18:36PM -0700, Ben Widawsky wrote:
On Mon, Aug 11, 2014 at 10:40:25PM -0700, Kenneth Graunke wrote:
On Monday, August 11, 2014 07:53:11 PM Ben Widawsky wrote:
On Mon, Aug 11, 2014 at 05:29:31PM -0700, Kristian Høgsberg wrote:
[snip]
diff --git
On 12.08.2014 04:07, Ilia Mirkin wrote:
The sorting is different with LC_ALL=C. To avoid different people's
locale settings from fighting, force it to the one that was used to
generate the current file.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Not sure if there's a better way
On 12.08.2014 05:46, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
This maintains a list of all TBOs in a pipe_context.
Reviewed-by: Michel Dänzer michel.daen...@amd.com
--
Earthling Michel Dänzer| http://www.amd.com
Libre software enthusiast
I obviously can't test on Broadwell, but via eyeballs only:
For the series:
Reviewed-by: Chris Forbes chr...@ijw.co.nz
On Tue, Aug 12, 2014 at 5:18 PM, Kenneth Graunke kenn...@whitecape.org wrote:
Hello,
This series finishes getting Broadwell to use brw_eu_emit.c, and finally
kills off
Landed patches 1 2 to avoid holding up the nouveau enabling of this
feature while waiting for review on the i965 bits.
On Sun, Aug 10, 2014 at 2:22 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
On Sat, Aug 9, 2014 at 10:14 PM, Chris Forbes chr...@ijw.co.nz wrote:
If the array index is not a
https://bugs.freedesktop.org/show_bug.cgi?id=81680
--- Comment #17 from Eugene ken20...@ukr.net ---
Yeah, and not the only one, because I had to run 'continue' several times. But
when crash after firefox closing happend I still could not run bt ('no stack'
reply on my 'bt' try):
Starting
On Tue, Aug 12, 2014 at 4:22 AM, Connor Abbott cwabbo...@gmail.com wrote:
On Mon, Aug 11, 2014 at 4:32 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Wed, Aug 6, 2014 at 6:29 PM, Marek Olšák mar...@gmail.com wrote:
What IR? A flatland GLSL IR? A
So... any objections to this approach? All the other gs5 bits are in
for mesa/st now.
On Sat, Aug 9, 2014 at 11:01 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
The ARB_gpu_shader5 extension is made up of a lot of small sub-parts.
Instead of adding PIPE_CAP's for each of these, just rely on the
On Tue, Aug 12, 2014 at 3:07 AM, Michel Dänzer mic...@daenzer.net wrote:
On 12.08.2014 04:07, Ilia Mirkin wrote:
The sorting is different with LC_ALL=C. To avoid different people's
locale settings from fighting, force it to the one that was used to
generate the current file.
Signed-off-by:
On Mon, Aug 11, 2014 at 4:39 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
These are recommended values. Some additional tweeks will be needed
for tessellation.
For the series:
Reviewed-by: Alex Deucher alexander.deuc...@amd.com
---
On Mon, Aug 11, 2014 at 4:46 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
For the series:
Reviewed-by: Alex Deucher alexander.deuc...@amd.com
---
src/gallium/drivers/r600/evergreen_state.c | 104
++---
---
include/GL/glxext.h | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/GL/glxext.h b/include/GL/glxext.h
index b96133e..174fc21 100644
--- a/include/GL/glxext.h
+++ b/include/GL/glxext.h
@@ -33,10 +33,10 @@ extern C {
** used to make the header, and the
---
include/GL/wglext.h | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/GL/wglext.h b/include/GL/wglext.h
index 5860c86..daba410 100644
--- a/include/GL/wglext.h
+++ b/include/GL/wglext.h
@@ -33,7 +33,7 @@ extern C {
** used to make the header, and the
This brings in the new OpenGL 4.5 features.
---
include/GL/glext.h | 380 +++-
1 file changed, 378 insertions(+), 2 deletions(-)
diff --git a/include/GL/glext.h b/include/GL/glext.h
index 5e67830..256ad35 100644
--- a/include/GL/glext.h
+++
Hello,
Currently Mesa enables the user to tune some driver parameters via
.drirc, a xml file.
Driconf is a GUI app that allows the user to manipulate .drirc
It uses the program xdriinfo to get info about the possible options.
xdriinfo gives Driconf the driver name of the device used for
Should you also update gl_mangle.h? (See
http://patchwork.freedesktop.org/patch/31518/ and
http://patchwork.freedesktop.org/patch/31519/)
On Tue, Aug 12, 2014 at 9:32 AM, Brian Paul bri...@vmware.com wrote:
This brings in the new OpenGL 4.5 features.
---
include/GL/glext.h | 380
Yeah, I always forget about that. I'll post a patch for that too. Thanks.
-Brian
On 08/12/2014 07:56 AM, Ilia Mirkin wrote:
Should you also update gl_mangle.h? (See
---
include/GL/gl_mangle.h | 139
1 file changed, 139 insertions(+)
diff --git a/include/GL/gl_mangle.h b/include/GL/gl_mangle.h
index b3a9c88..e04cf66 100644
--- a/include/GL/gl_mangle.h
+++ b/include/GL/gl_mangle.h
@@ -106,6 +106,7 @@
#define
Series is Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
I'll drop my (hopefully identical) patches.
On Tue, Aug 12, 2014 at 10:02 AM, Brian Paul bri...@vmware.com wrote:
Yeah, I always forget about that. I'll post a patch for that too. Thanks.
-Brian
On 08/12/2014 07:56 AM, Ilia Mirkin
On 08/11/2014 01:07 PM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Not 100% sure about the KHR_robust_buffer_access_behavior -- is that part of
GL4.5?
docs/GL3.txt | 16
1 file changed, 16 insertions(+)
diff --git a/docs/GL3.txt b/docs/GL3.txt
Please note that drirc can also contain options that apply to all
drivers, not just one driver. I don't think the GUI has been updated
to support that.
Marek
On Tue, Aug 12, 2014 at 3:50 PM, Axel Davy axel.d...@ens.fr wrote:
Hello,
Currently Mesa enables the user to tune some driver
I'm not sure if we came to a decision about what to do with the
channel bits. I guess it's not really that important because probably
nothing uses it for compressed formats except to check for the
existence of the channels. Here is a v2 patch which picks 8/8/8/8 for
the RGBA formats and 16/16/16
https://bugs.freedesktop.org/show_bug.cgi?id=80848
Eero Tamminen eero.t.tammi...@intel.com changed:
What|Removed |Added
CC|
On Monday, August 11, 2014 11:18:36 PM Ben Widawsky wrote:
On Mon, Aug 11, 2014 at 10:40:25PM -0700, Kenneth Graunke wrote:
On Monday, August 11, 2014 07:53:11 PM Ben Widawsky wrote:
On Mon, Aug 11, 2014 at 05:29:31PM -0700, Kristian Høgsberg wrote:
[snip]
diff --git
On Tue, Aug 12, 2014 at 10:38 AM, Brian Paul bri...@vmware.com wrote:
On 08/11/2014 01:07 PM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Not 100% sure about the KHR_robust_buffer_access_behavior -- is that part
of
GL4.5?
docs/GL3.txt | 16
---
docs/relnotes/10.3.html |1 +
1 file changed, 1 insertion(+)
diff --git a/docs/relnotes/10.3.html b/docs/relnotes/10.3.html
index a1f2777..5aa37ac 100644
--- a/docs/relnotes/10.3.html
+++ b/docs/relnotes/10.3.html
@@ -63,6 +63,7 @@ Note: some of the new features are only available with
On 09/08/14 19:10, Eric Anholt wrote:
pipe-loader.h will include Xlib.h when HAVE_PIPE_LOADER_XLIB is set in the
build.
I really need to move all this mayhem (pipe-loader vs static targets) into one
place.
Reviewed-by: Emil Velikov emil.l.veli...@gmail.com
---
On Monday, August 11, 2014 05:29:36 PM Kristian Høgsberg wrote:
The data port has a SIMD16 'replicate data' message, which lets us write
the same color for all 16 pixels by sending the four floats in the
lower half of a register instead of sending 4 times 16 identical
component values in 8
On 08/12/2014 10:13 AM, Ilia Mirkin wrote:
On Tue, Aug 12, 2014 at 10:38 AM, Brian Paul bri...@vmware.com wrote:
On 08/11/2014 01:07 PM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Not 100% sure about the KHR_robust_buffer_access_behavior -- is that part
of
GL4.5?
On Monday, August 11, 2014 05:29:34 PM Kristian Høgsberg wrote:
The brw_draw_prims() function is the draw entry point into the driver,
and takes struct _mesa_prim for input. We want to be able to feed
native primitives into the driver, and to that end we introduce
BRW_PRIM_OFFSET, which lets
With a few tiny changes, we can just reuse the normal FB write handling.
I originally mistook the FS_OPCODE_BLORP_FB_WRITE opcode for the SIMD16
replicated data message used in certain BLORP color clears, when it was
actually just a normal SIMD16 message without a little bit of setup.
It's unnecessary, and makes pattern matching for simple clear programs
more difficult.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 1 +
2 files changed, 3 insertions(+), 1
Sorry, I didn't mean to make that much of a stink. Either's fine with me
as long as we're not doing 32 for half-float.
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com
On Tue, Aug 12, 2014 at 8:09 AM, Neil Roberts n...@linux.intel.com wrote:
I'm not sure if we came to a decision about
Series is
Reviewed-by: Matt Turner matts...@gmail.com
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Hi,
Here is a replacement patch for the one to use memcpy when copying
uniform values into the batch buffer here:
http://lists.freedesktop.org/archives/mesa-dev/2014-August/065179.html
Eric Anholt suggested instead of using memcpy we should change the
type of the pointer to uint32_t. I started
Both are
Reviewed-by: Matt Turner matts...@gmail.com
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These, plus the mangle regeneration are
Reviewed-by: Matt Turner matts...@gmail.com
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The link error occurs because the static libraries are linked in the wrong
order. This fixes it.
Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82483
---
src/gallium/drivers/r300/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1
This looks good to me. However I'm wondering if it would be better to
use a generic float/int union. I guess though these values actually
really are gl_constant_value type (as they come as gl params) so this
looks good.
Roland
Am 12.08.2014 20:04, schrieb Neil Roberts:
Hi,
Here is a
On Tue, Aug 12, 2014 at 11:14:06AM -0700, Jason Ekstrand wrote:
The link error occurs because the static libraries are linked in the wrong
order. This fixes it.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Bugzilla:
https://bugs.freedesktop.org/show_bug.cgi?id=82483
Jason Ekstrand ja...@jlekstrand.net changed:
What|Removed |Added
Status|NEW |RESOLVED
On Mon, Aug 11, 2014 at 11:22 AM, Matt Turner matts...@gmail.com wrote:
Comparing ~0u with a packed enum (i.e., 1 byte) always evaluates to
false. Shouldn't gcc warn about this?
Reported-by: Connor Abbott cwabbo...@gmail.com
---
src/mesa/drivers/dri/i965/brw_eu.c | 2 +-
Hello,
I was looking at the ARB_derivative_control spec and it has this bit:
It is typical to consider a 2x2 square of fragments or samples, and
compute independent dFdxFine per row and independent dFdyFine per column,
while computing only a single dFdxCoarse and a single dFdyCoarse
https://bugs.freedesktop.org/show_bug.cgi?id=82327
--- Comment #2 from Vinson Lee v...@freedesktop.org ---
mesa: ab66b196699b80cc32cf00fa7cd794cfa992cf3c (master 10.3.0-devel)
glcpp-test-cr-lf fails on FreeBSD.
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https://bugs.freedesktop.org/show_bug.cgi?id=82159
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Status|NEW |RESOLVED
On Tue, Aug 12, 2014 at 3:08 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Hello,
I was looking at the ARB_derivative_control spec and it has this bit:
It is typical to consider a 2x2 square of fragments or samples, and
compute independent dFdxFine per row and independent dFdyFine per
On Tuesday, August 12, 2014 07:04:23 PM Neil Roberts wrote:
Hi,
Here is a replacement patch for the one to use memcpy when copying
uniform values into the batch buffer here:
http://lists.freedesktop.org/archives/mesa-dev/2014-August/065179.html
Eric Anholt suggested instead of using
On Friday, August 01, 2014 12:43:38 PM Jordan Justen wrote:
On Fri, Aug 1, 2014 at 2:44 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Fri, Aug 01, 2014 at 12:53:40AM -0700, Jordan Justen wrote:
(a23cfb8 for gen6)
In layered rendering this will be 0. Otherwise it will be the
On Friday, August 01, 2014 12:53:44 AM Jordan Justen wrote:
We will want to setup gen6 separate stencil and hiz miptrees in a
layout that is similar to array_spacing_lod0. This is needed because
gen6 hiz and stencil only support a single mip-level.
In both use cases (gen7+ LOD0 spacing gen6
On Tuesday, August 12, 2014 02:06:31 PM Kenneth Graunke wrote:
On Friday, August 01, 2014 12:53:44 AM Jordan Justen wrote:
We will want to setup gen6 separate stencil and hiz miptrees in a
layout that is similar to array_spacing_lod0. This is needed because
gen6 hiz and stencil only support
On Friday, August 01, 2014 12:53:46 AM Jordan Justen wrote:
Previously array_layout ALL_SLICES_AT_EACH_LOD was only used for array
spacing lod0 on gen7+ and therefore was only used with a single mip
level.
gen6 separate stencil hiz only support LOD0, so we need to allocate
the miptree
On Fri, Aug 1, 2014 at 9:06 AM, Emil Velikov emil.l.veli...@gmail.com wrote:
When the compiler is not capable/does not accept -msse4.1 while the target
has the instruction set we'll blow up as _mesa_streaming_load_memcpy is
going to be undefined.
To make sure that never happens, wrap the
On Tue, Aug 12, 2014 at 2:52 PM, Matt Turner matts...@gmail.com wrote:
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b36ffc7..1691b15 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++
On Tue, Jul 29, 2014 at 2:36 AM, Petri Latvala petri.latv...@intel.com wrote:
optimization-test loops over directories that contain a file named
create_test_cases.py. For each occurrence, it enters the directory
that contains the file and executes it, and is then supposed to return
to the
On Sun, Aug 10, 2014 at 4:06 PM, Dave Airlie airl...@gmail.com wrote:
From: Dave Airlie airl...@redhat.com
This just cherry-pick the extensions into a list for GLES 3.1
I'm not actually sure if this list if complete or correct, maybe someone
else can tell me what I missed, and I'm not 100%
Reviewed-by: Chris Forbes chr...@ijw.co.nz
On Tue, Aug 12, 2014 at 7:07 AM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Not 100% sure about the KHR_robust_buffer_access_behavior -- is that part of
GL4.5?
docs/GL3.txt | 16
https://bugs.freedesktop.org/show_bug.cgi?id=41700
Bug 41700 depends on bug 50754, which changed state.
Bug 50754 Summary: Building 32 bit mesa on 64 bit OS fails since change for
automake
https://bugs.freedesktop.org/show_bug.cgi?id=50754
What|Removed |Added
https://bugs.freedesktop.org/show_bug.cgi?id=45466
Bug 45466 depends on bug 50754, which changed state.
Bug 50754 Summary: Building 32 bit mesa on 64 bit OS fails since change for
automake
https://bugs.freedesktop.org/show_bug.cgi?id=50754
What|Removed |Added
https://bugs.freedesktop.org/show_bug.cgi?id=50754
Emil Velikov emil.l.veli...@gmail.com changed:
What|Removed |Added
Status|REOPENED|RESOLVED
https://bugs.freedesktop.org/show_bug.cgi?id=82534
Priority: medium
Bug ID: 82534
Keywords: regression
CC: emil.l.veli...@gmail.com
Assignee: mesa-dev@lists.freedesktop.org
Summary: src\egl\main\eglapi.h : fatal error LNK1107:
https://bugs.freedesktop.org/show_bug.cgi?id=82536
Priority: medium
Bug ID: 82536
Keywords: bisected, regression
CC: alexandre.f.dem...@gmail.com,
emil.l.veli...@gmail.com, lem...@gmail.com
Assignee:
Passes all piglit tests.
v2: rebased
---
src/gallium/drivers/radeonsi/si_state.c | 20
1 file changed, 20 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 6e9a60a..4f7adea 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=82534
--- Comment #1 from Emil Velikov emil.l.veli...@gmail.com ---
It smells like msvc/scons issue, but it could easily be a bug on our end as
well. GCC builds it like a champ :)
Can you let me know the version of msvc, python and scons that you're
https://bugs.freedesktop.org/show_bug.cgi?id=82536
--- Comment #1 from Emil Velikov emil.l.veli...@gmail.com ---
Vinson if this report is automated can you add an option to provide the
configure parameters by default ? Is this the original mingw or mingw-w64,
which version ?
Thanks
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https://bugs.freedesktop.org/show_bug.cgi?id=82534
--- Comment #2 from Vinson Lee v...@freedesktop.org ---
MSVC 2012
Python 2.7.8
SCons 2.3.0
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https://bugs.freedesktop.org/show_bug.cgi?id=82538
Priority: medium
Bug ID: 82538
Assignee: mesa-dev@lists.freedesktop.org
Summary: Super Maryo Chronicles fails with st/mesa assertion
failure
Severity: normal
https://bugs.freedesktop.org/show_bug.cgi?id=82536
--- Comment #2 from Vinson Lee v...@freedesktop.org ---
./autogen.sh --enable-debug --enable-texture-float \
--host=x86_64-w64-mingw32 \
--disable-glx \
--disable-dri \
--disable-egl \
--enable-static \
--disable-gallium-llvm \
https://bugs.freedesktop.org/show_bug.cgi?id=81680
--- Comment #18 from Michel Dänzer mic...@daenzer.net ---
(In reply to comment #17)
But when crash after firefox closing happend I still could not run bt ('no
stack' reply on my 'bt' try):
[...]
Program received signal SIGSEGV, Segmentation
https://bugs.freedesktop.org/show_bug.cgi?id=82539
Priority: medium
Bug ID: 82539
Keywords: regression
CC: emil.l.veli...@gmail.com
Assignee: mesa-dev@lists.freedesktop.org
Summary: vmw_screen_dri.lo In file included from
https://bugs.freedesktop.org/show_bug.cgi?id=82539
--- Comment #1 from Emil Velikov emil.l.veli...@gmail.com ---
The only recent commit remotely possible of doing this is
fd7da27a43182169e6306d9df39e7e9498e38d28. Can you please confirm ?
Where is drm.h located on your system ? Does libdrm.pc
Am 06.08.2014 11:28, schrieb Michel Dänzer:
On 06.08.2014 03:08, Jason Ekstrand wrote:
Module: Mesa
Branch: master
Commit: 850fb0d1dca616179d3239a7b7bd94fe1979604c
URL:
https://bugs.freedesktop.org/show_bug.cgi?id=82477
--- Comment #2 from Kenneth Graunke kenn...@whitecape.org ---
That sounds pretty easy to fix, but we could also just disable the Mesa IR
optimizer for ARB_fragment_programs. Notably, in my commit, I measured gains
for ARB_vp, but only losses
When dual source blending, the visitor already stores a flag in
brw_wm_prog_data (dual_src_blend) for the state upload code to use.
The generator also receives this, so there's no need to pass an
additional flag.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
All we need to do is decompose this to two SIMD8 instructions, like we
do in many other cases. We even already have code for that.
I apparently just botched this last time I tried, and it was easy.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_fs.cpp
On Tue, Aug 12, 2014 at 9:55 PM, Kenneth Graunke kenn...@whitecape.org wrote:
All we need to do is decompose this to two SIMD8 instructions, like we
do in many other cases. We even already have code for that.
I apparently just botched this last time I tried, and it was easy.
Signed-off-by:
Reviewed-by: Matt Turner matts...@gmail.com
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Hi,
2014-08-08 16:28 GMT+02:00 Pekka Paalanen ppaala...@gmail.com:
From: Pekka Paalanen pekka.paala...@collabora.co.uk
The EGL_EXT_image_dma_buf_import specification was revised (according to
its revision history) on Dec 5th, 2013, for EGL to not take ownership of
the file descriptors.
Do
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