Ping. Are people ok with this historical text being removed?
On Thu, 2016-02-11 at 15:45 +1100, Timothy Arceri wrote:
> The bison/flex generated code hasn't been keeped in version control
> for a long time, and I doubt anyone is going to argue for putting
> all this validation in the parser.
> --
On Fri, 2016-03-04 at 22:30 -0800, Kenneth Graunke wrote:
> In a shader such as:
>
> struct S { float f; }
> float identity(float S) { return S; }
>
> we would think that "S" in "return S" referred to a structure, even
> though it's shadowed by the "float S" parameter in the inner struct.
The dEQP-GLES3.functional.fbo.completeness.renderable.texture.
{color0,depth,stencil}.{red,rg}_unsigned_byte tests appear to expect
GL_RED/GL_RG and GL_UNSIGNED_BYTE to map to GL_R8/GL_RG8, rather than
returning an INVALID_OPERATION error.
This makes perfect sense. However, RED and RG are strange
On Fri, 2016-03-04 at 21:11 -0800, Kenneth Graunke wrote:
> The lexer/parser use a symbol table to classify identifiers as
> variables, functions, or structure types.
>
> For some reason, we neglected to add variables in simple declarations
> such as
>
> int x = 5;
>
> but did add subsequent
In a shader such as:
struct S { float f; }
float identity(float S) { return S; }
we would think that "S" in "return S" referred to a structure, even
though it's shadowed by the "float S" parameter in the inner struct.
This led to the parser's grammar seeing TYPE_IDENTIFIER and getting
co
Both are
Reviewed-by: Matt Turner
___
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mesa-dev@lists.freedesktop.org
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The lexer/parser use a symbol table to classify identifiers as
variables, functions, or structure types.
For some reason, we neglected to add variables in simple declarations
such as
int x = 5;
but did add subsequent variables in multi-declarations:
int x = 5, y = 6; // y gets added, bu
This is not API facing, so just use bool.
Signed-off-by: Kenneth Graunke
---
src/mesa/main/genmipmap.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/main/genmipmap.c b/src/mesa/main/genmipmap.c
index 2a6..6eacd42 100644
--- a/src/mesa/main/genmipmap.c
+
If glGenerateMipmap was called with a bogus target, then it would
pass that to _mesa_get_current_tex_object(), which would raise a
_mesa_problem() telling people to file bugs. We'd then do the
proper error checking, raise an error, and bail.
Doing the check first avoids the _mesa_problem(). The
Matt Turner writes:
> Though there is a lot of overlap with has_side_effects(), these do mean
> different things.
Can we do it the other way around and implement is_scheduling_barrier()
in terms of has_side_effects()? has_side_effects() seems like the more
fundamental of the two and because is_
Thank you Jason for taking care and Aaron for testing /o\.
- Sedat -
On 3/2/16, Aaron Watry wrote:
> On Wed, Mar 2, 2016 at 1:46 PM, Jason Ekstrand
> wrote:
>
>> On Wed, Mar 2, 2016 at 9:03 AM, Sedat Dilek
>> wrote:
>>
>>> Any news on that?
>>>
>>
>> Out-of-tree builds including make check sho
Ken did this earlier, and this is just me reimplementing his patch a
little differently.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++
src/mesa/drivers/dri/i965/brw_ir_fs.h| 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++-
3 files changed, 9 insertions(+), 1 deletion(-)
diff
Though there is a lot of overlap with has_side_effects(), these do mean
different things.
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 6 ++
src/mesa/drivers/dri/i965/brw_shader.cpp| 12 +++-
src/mesa/drivers/dri/i965/brw_shader.h | 2
Instead of removing every instruction in add_insts_from_block(), just
move the instruction to its scheduled location. This is a step towards
doing both bottom-up and top-down scheduling without conflicts.
Note that this patch changes cycle counts for programs because it begins
including control fl
This reverts commit d0e1d6b7e27bf5f05436e47080d326d7daa63af2.
The change in the vec4 code is a mistake -- there's never an
FS_OPCODE_FB_WRITE in vec4 code.
The change in the fs code had the (harmless) effect of not recognizing
an FB_WRITE as a scheduling barrier even if it was marked EOT --
harml
These printed the cycle count the last basic block (sched.time is set
per basic block!). We have accurate, full program, data printed
elsewhere.
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 10 --
1 file changed, 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_
Missing this causes an assertion failure in the scheduler with the next
patch.
---
src/mesa/drivers/dri/i965/brw_ir_vec4.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
index 660beca..7cedf8e
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index dfe6afc..d007ed0 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw
I think when this code was written, basic blocks were always ended by a
control flow instruction or an end-of-thread message. That's no longer
the case, and removing this restriction actually helps things:
instructions in affected programs: 7267 -> 7244 (-0.32%)
helped: 4
total cycles in
All of these were simply code for "architecture register file" (and in
the case of destinations, "not the null register").
---
.../drivers/dri/i965/brw_schedule_instructions.cpp | 35 +-
1 file changed, 8 insertions(+), 27 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/br
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 2c7e4f7..51d9ce1 100644
--- a/src
Apparently this causes a slight difference in the parser's token
expectations, leading to a different error message.
It seems harmless, but I wanted to be cautious and separate it out.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/glcpp/glcpp-parse.y | 2 +-
I didn't want to pollute the previous patch with all the $4 -> $3
changes.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/glcpp/glcpp-parse.y | 36 +--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/src/compiler/glsl/glcpp/glcpp-parse.y
b/s
We resolved the implicit version directive when processing control lines,
such as #ifdef, to ensure any built-in macros exist. However, we failed
to resolve it when handling ordinary text.
For example,
int x = __VERSION__;
should resolve __VERSION__ to 110, but since we never resolved t
We now have a bigger hammer. The HASH_TOKEN NEWLINE rule still needs
to exist to ensure the 146-version-hash-first.c test still passes.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/glcpp/glcpp-parse.y | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff
Signed-off-by: Dieter Nützel
---
src/gallium/targets/opencl/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/targets/opencl/.gitignore
b/src/gallium/targets/opencl/.gitignore
index dad573f..8f12fdd 100644
--- a/src/gallium/targets/opencl/.gitignore
+++ b/src/gallium/tar
Alejandro Piñeiro writes:
> surface_access emit_untyped_read and emit_untyped_atomic provides the same
> functionality.
> ---
>
> This patch also fixes the indentation at switch (instr->intrinsic).
>
> src/mesa/drivers/dri/i965/brw_vec4.h | 7
> src/mesa/drivers/dri/i965/brw_vec4
Alejandro Piñeiro writes:
> Now that brw_vec4_visitor::emit_untyped_atomic was removed, there is no need
> to explicitly set it.
Reviewed-by: Francisco Jerez
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 11 +--
> 1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a
Not that I'm against this, but is there actual HW that supports the full 3d
stuff? From what I gather, no proprietary drivers expose this ext.
On Mar 4, 2016 8:17 PM, "Anuj Phogat" wrote:
> Anuj Phogat (16):
> mesa: Add block depth field in struct gl_format_info
> mesa: Add support to query b
Alejandro Piñeiro writes:
> This can happens if using emit_untyped_atomic for an atomic dec/inc
> ---
> src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp
>
Signed-off-by: Anuj Phogat
---
src/mesa/main/glformats.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c
index 607db95..f939b8b 100644
--- a/src/mesa/main/glformats.c
+++ b/src/mesa/main/glformats.c
@@ -82
Signed-off-by: Anuj Phogat
---
src/mesa/swrast/s_texfetch.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/mesa/swrast/s_texfetch.c b/src/mesa/swrast/s_texfetch.c
index 4a9ec2c..0acbc69 100644
--- a/src/mesa/swrast/s_texfetch.c
+++ b/src/mesa/swras
Signed-off-by: Anuj Phogat
---
src/mesa/main/teximage.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index ba72353..f5de1c5 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -1187,11 +1
Signed-off-by: Anuj Phogat
---
src/mesa/main/glformats.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c
index f939b8b..110ce47 100644
--- a/src/mesa/main/glformats.c
+++ b/src/mesa/main/glformats.c
@@ -2387,8 +2387,1
Signed-off-by: Anuj Phogat
---
src/mesa/main/glheader.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h
index 9d299e8..40fada1 100644
--- a/src/mesa/main/glheader.h
+++ b/src/mesa/main/glheader.h
@@ -99,6 +99,29 @@ t
Signed-off-by: Anuj Phogat
---
src/mesa/main/formats.c | 44 +++-
1 file changed, 23 insertions(+), 21 deletions(-)
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index 6c23dda..cd96bd6 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/ma
Signed-off-by: Anuj Phogat
---
src/mesa/main/formats.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/mesa/main/formats.h b/src/mesa/main/formats.h
index 2f8f63c..50bd63f 100644
--- a/src/mesa/main/formats.h
+++ b/src/mesa/main/formats.h
@@ -635,6 +635,27 @@ typede
Signed-off-by: Anuj Phogat
---
src/mesa/main/texcompress.c | 80 +
1 file changed, 80 insertions(+)
diff --git a/src/mesa/main/texcompress.c b/src/mesa/main/texcompress.c
index 23b6fbc..c5a1129 100644
--- a/src/mesa/main/texcompress.c
+++ b/src/mesa/ma
Signed-off-by: Anuj Phogat
---
src/mesa/main/texcompress.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/src/mesa/main/texcompress.c b/src/mesa/main/texcompress.c
index 9f2f171..23b6fbc 100644
--- a/src/mesa/main/texcompress.c
+++ b/src/mesa/main/texcompress.c
Signed-off-by: Anuj Phogat
---
src/mesa/main/extensions_table.h | 1 +
src/mesa/main/mtypes.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 674eb5c..4b04f6a 100644
--- a/src/mesa/main/extensions_table.h
++
Signed-off-by: Anuj Phogat
---
src/mesa/main/glformats.c | 32
1 file changed, 32 insertions(+)
diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c
index edfd7d6..607db95 100644
--- a/src/mesa/main/glformats.c
+++ b/src/mesa/main/glformats.c
@@ -86
Signed-off-by: Anuj Phogat
---
src/mesa/main/formats.csv | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/mesa/main/formats.csv b/src/mesa/main/formats.csv
index 8eb69ad..285921e 100644
--- a/src/mesa/main/formats.csv
+++ b/src/mesa/main/formats.csv
@@ -349,3 +349,24
Signed-off-by: Anuj Phogat
---
src/mesa/main/glheader.h | 58
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h
index a2d98d4..9d299e8 100644
--- a/src/mesa/main/glheader.h
+++ b/src
Signed-off-by: Anuj Phogat
---
src/mapi/glapi/gen/Makefile.am | 1 +
.../glapi/gen/OES_texture_compression_astc.xml | 61 ++
src/mapi/glapi/gen/gl_API.xml | 2 +
3 files changed, 64 insertions(+)
create mode 100644 src/mapi/glapi
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i915/intel_mipmap_tree.c| 8
src/mesa/drivers/dri/i915/intel_tex_layout.c | 4 ++--
src/mesa/drivers/dri/i965/brw_tex_layout.c | 21 +++--
src/mesa/drivers/dri/i965/intel_copy_image.c | 14 +++
This will be later required for 3D ASTC formats.
Signed-off-by: Anuj Phogat
---
src/mesa/main/format_info.py | 5 +-
src/mesa/main/format_parser.py | 15 +-
src/mesa/main/formats.c| 4 +-
src/mesa/main/formats.csv | 529 +
4 files chang
Ping.
Ilia and Marek voted for it.
Any progress?
Dieter
[Mesa-dev] [PATCH] r600g: Add support for PK2H/UP2H
Glenn Kennard glenn.kennard at gmail.com
Sun Jan 3 14:47:18 PST 2016
Previous message: [Mesa-dev] [PATCH 1/2] WIP gallivm: add support for
PK2H/UP2H Next message: [Mesa-dev] [PATCH] me
compute.c: In function ‘launch_grid’:
compute.c:435:20: warning: assignment discards ‘const’ qualifier from pointer
target type [enabled by default]
info.input = input;
^
Maybe the pipe_grid_info::input field should be const void *?
---
src/gallium/tests/trivial/comp
To measure the time spent flushing the command buffer.
---
src/gallium/drivers/svga/svga_context.c| 4
src/gallium/drivers/svga/svga_context.h| 16 +---
src/gallium/drivers/svga/svga_pipe_query.c | 9 +
src/gallium/drivers/svga/svga_screen.c | 2 ++
4 files
Anuj Phogat (16):
mesa: Add block depth field in struct gl_format_info
mesa: Add support to query block depth using
_mesa_get_format_block_size()
mesa: Add error conditions for compressed textures with 3D blocks
mesa: Account for block depth in _mesa_format_image_size()
glapi: Update
---
src/gallium/drivers/svga/svga_screen_cache.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_screen_cache.c
b/src/gallium/drivers/svga/svga_screen_cache.c
index 5b44129..321c564 100644
--- a/src/gallium/drivers/svga/svga_screen_cach
---
src/mesa/state_tracker/st_extensions.c | 175 -
1 file changed, 107 insertions(+), 68 deletions(-)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 24c6444..063daae 100644
--- a/src/mesa/state_tracker/st_extens
To know when we're flushing the command buffer because we need to
write to surface in the command buffer.
---
src/gallium/drivers/svga/svga_context.h | 16 +---
src/gallium/drivers/svga/svga_pipe_query.c | 9 +
src/gallium/drivers/svga/svga_resource_texture.c |
Wrap comments to 78 columns, etc.
---
src/gallium/auxiliary/util/u_debug_refcnt.c | 103 +++-
src/gallium/auxiliary/util/u_debug_refcnt.h | 12 +++-
2 files changed, 65 insertions(+), 50 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_debug_refcnt.c
b/src/gallium/
---
src/gallium/auxiliary/util/u_debug_refcnt.c | 20
1 file changed, 20 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_debug_refcnt.c
b/src/gallium/auxiliary/util/u_debug_refcnt.c
index c17c65f..3c030d7 100644
--- a/src/gallium/auxiliary/util/u_debug_refcnt.c
+++ b
---
src/gallium/auxiliary/util/u_debug_refcnt.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_debug_refcnt.c
b/src/gallium/auxiliary/util/u_debug_refcnt.c
index f486492..c17c65f 100644
--- a/src/gallium/auxiliary/util/u_debug_refc
---
src/gallium/auxiliary/util/u_debug_refcnt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/util/u_debug_refcnt.c
b/src/gallium/auxiliary/util/u_debug_refcnt.c
index a23f191..f486492 100644
--- a/src/gallium/auxiliary/util/u_debug_refcnt.c
+++ b/src/g
On 03/03/2016 07:02 PM, Ilia Mirkin wrote:
Since commit 922be4eab, the expectation is that the query result
contains the correct value. Unfortunately swrast does not distinguish
between GL_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED. As a result, we
must fix up the query result in a post-draw fixup.
https://bugs.freedesktop.org/show_bug.cgi?id=94399
Bug ID: 94399
Summary: [swrast] piglit getuniform-03 regression
Product: Mesa
Version: 11.2
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Keywords:
On Mon, Feb 22, 2016 at 11:35 AM, Jordan Justen
wrote:
> For Haswell, we need to initialize the SLM index in the state
> register. This can be copied out of the CS header dword 0.
>
> Fixes piglit: arb_compute_shader/execution/shared-atomics.shader_test
>
> Signed-off-by: Jordan Justen
> Cc: Ilia
https://bugs.freedesktop.org/show_bug.cgi?id=94394
--- Comment #4 from Emil Velikov ---
You are attempting to do a 32bit build on a 64bit platform. Thus the 32bit
dependencies should be met, there is no other way ;-)
The PKG... variable should be set before the configure call, and must point the
https://bugs.freedesktop.org/show_bug.cgi?id=94394
--- Comment #3 from tele ---
* - Do I need install all 32 bit dependencies before compile on 64 bit system ?
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.__
https://bugs.freedesktop.org/show_bug.cgi?id=94394
--- Comment #2 from tele ---
- Do I need all 32 bit dependencies before compile on 64 bit system ?
#
$ echo $PKG_CONFIG_PATH
/usr/lib64/pkgconfig
$ echo $PKG_CONFIG_PATH
/usr/lib64/pkgconfig
$ ld -ldrm --verbose
...
at
From: Nanley Chery
In addition to making the height addition more understandable, this
future-proofs the code for new tiling modes and keeps the image
height as small as possible.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_meta_blit.c | 13 +++--
1 file changed, 11 insertions
On Thu, Feb 25, 2016 at 11:50 PM, Jordan Justen
wrote:
> If the local workgroup size is sufficiently large, then the SIMD8
> program can't be used. In this case we can skip generating the SIMD8
> program. For complex programs this can save a significant amount of
> time.
That's a good idea.
Revi
On Thu, Feb 25, 2016 at 11:50 PM, Jordan Justen
wrote:
> For fragment shaders, we can always use a SIMD8 program. Therefore, if
> we detect spilling with a SIMD16 program, then it is better to skip
> generating a SIMD16 program to only rely on a SIMD8 program.
>
> Unfortunately, this doesn't work
Hi Tim,
On 4 March 2016 at 19:28, Tim Rowley wrote:
> Not a currently tested configuration, but these couple of small changes
> allow a 32-bit build.
A couple of trivial suggestions:
Please add the bugzilla link, before pushing.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94383
> --
On Wed, Mar 2, 2016 at 4:21 AM, Juan A. Suarez Romero
wrote:
> opt_vector_float() transforms several scalar MOV operations to a single
> vectorial MOV.
>
> This is done when those MOV covers all the components of the destination
> register. So something like:
>
> mov vgrf3.0.xy:D, 0D
> mov vgrf3.0
On 03/04/2016 12:26 PM, George Kyriazis wrote:
screen may still be used by other resources that are not yet freed.
To correctly fix this there will be a need to account for resources
differently, but this quick fix is not any worse than the original
code that leaked screens anyway.
---
src/gall
On 03/04/2016 12:28 PM, Tim Rowley wrote:
Not a currently tested configuration, but these couple of small changes
allow a 32-bit build.
---
src/gallium/drivers/swr/rasterizer/common/os.h | 1 -
src/gallium/drivers/swr/rasterizer/core/utils.h | 2 +-
2 files changed, 1 insertion(+), 2 deletio
https://bugs.freedesktop.org/show_bug.cgi?id=94394
Emil Velikov changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=91101
Vinson Lee changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=89960
Vinson Lee changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Bug 79706 depends on bug 89960, which changed state.
Bug 89960 Summary: [softpipe] piglit copy-pixels regreession
https://bugs.freedesktop.org/show_bug.cgi?id=89960
What|Removed |Added
--
On Fri, Mar 4, 2016 at 6:53 PM, Oded Gabbay wrote:
> On Fri, Mar 4, 2016 at 6:59 PM, Marek Olšák wrote:
>> On Fri, Mar 4, 2016 at 4:56 PM, Oded Gabbay wrote:
>>> On Fri, Mar 4, 2016 at 2:19 PM, Marek Olšák wrote:
Note that the DB only supports tiling and separate depth and stencil, so
https://bugs.freedesktop.org/show_bug.cgi?id=94394
Bug ID: 94394
Summary: Compile Mesa , specific compilation , /usr/bin/ld:
cannot find -ldrm
Product: Mesa
Version: 11.2
Hardware: x86-64 (AMD64)
OS: Linux (
On Fri, Mar 4, 2016 at 2:43 PM, Thomas Hellstrom wrote:
> On 03/04/2016 07:07 PM, Rob Clark wrote:
>> On Fri, Mar 4, 2016 at 12:59 PM, Rob Clark wrote:
>>> So, I've been advocating that for android, gallium drivers use
>>> gralloc_drm_pipe, since with android it seems like you end up with
>>> bot
On Fri, Mar 4, 2016 at 6:50 AM, Andres Gomez wrote:
> Hi,
>
> as complementary work to the one done to "Add FP64 support to the i965
> shader backends" at:
> https://bugs.freedesktop.org/show_bug.cgi?id=92760
>
> We've been working to add piglit tests that would check the new features
> added by t
On 03/04/2016 07:07 PM, Rob Clark wrote:
> On Fri, Mar 4, 2016 at 12:59 PM, Rob Clark wrote:
>> So, I've been advocating that for android, gallium drivers use
>> gralloc_drm_pipe, since with android it seems like you end up with
>> both gralloc and libGL in the same process, and having both share
"using namespace brw::surface_access" is already present at the
top of the source file.
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/
Reviewed-by: Jason Ekstrand
On Fri, Mar 4, 2016 at 10:03 AM, Nanley Chery wrote:
> From: Nanley Chery
>
> This field is no longer needed.
>
> Signed-off-by: Nanley Chery
> ---
> src/intel/isl/isl.h | 9 -
> src/intel/isl/isl_surface_state.c | 8
> src/intel/v
LGTM
On Fri, Mar 4, 2016 at 10:03 AM, Nanley Chery wrote:
> From: Nanley Chery
>
> Match the comment stated above the assignment.
>
> Signed-off-by: Nanley Chery
> ---
> src/intel/isl/isl_surface_state.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/isl/
Not a currently tested configuration, but these couple of small changes
allow a 32-bit build.
---
src/gallium/drivers/swr/rasterizer/common/os.h | 1 -
src/gallium/drivers/swr/rasterizer/core/utils.h | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/swr/ras
screen may still be used by other resources that are not yet freed.
To correctly fix this there will be a need to account for resources
differently, but this quick fix is not any worse than the original
code that leaked screens anyway.
---
src/gallium/state_trackers/glx/xlib/xm_api.c | 10 +++-
On Mar 4, 2016 7:53 PM, "Oded Gabbay" wrote:
>
> On Fri, Mar 4, 2016 at 6:59 PM, Marek Olšák wrote:
> > On Fri, Mar 4, 2016 at 4:56 PM, Oded Gabbay
wrote:
> >> On Fri, Mar 4, 2016 at 2:19 PM, Marek Olšák wrote:
> >>> Note that the DB only supports tiling and separate depth and stencil,
so
> >>>
Now that brw_vec4_visitor::emit_untyped_atomic was removed, there is no need
to explicitly set it.
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/
This can happens if using emit_untyped_atomic for an atomic dec/inc
---
src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_sur
surface_access emit_untyped_read and emit_untyped_atomic provides the same
functionality.
---
This patch also fixes the indentation at switch (instr->intrinsic).
src/mesa/drivers/dri/i965/brw_vec4.h | 7
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 39 --
src/
The same functionality is provided by emit_untyped_atomic and
emit_untyped_read at surface_access. Having two implementations of the
same is among other things confusing (I initially spent some time
checking if there was any practical reason to have both).
The real removal is done on the second pa
On 4 March 2016 at 17:38, Lucas Stach wrote:
> Am Freitag, den 04.03.2016, 17:20 + schrieb Daniel Stone:
>> Hi,
>>
>> On 4 March 2016 at 16:08, Lucas Stach wrote:
>> > Am Freitag, den 04.03.2016, 15:09 + schrieb Daniel Stone:
>> >> Thanks for taking this on, it looks really good! I just h
On Fri, Mar 4, 2016 at 12:26 PM, Ilia Mirkin wrote:
> The OES extensions clarify this behaviour to differentiate between
> per-sample invocation and per-sample interpolation. Using sampleid/pos
> will force per-sample invocation but not per-sample interpolation.
>
> See https://www.khronos.org/bug
On Fri, Mar 4, 2016 at 12:59 PM, Rob Clark wrote:
> So, I've been advocating that for android, gallium drivers use
> gralloc_drm_pipe, since with android it seems like you end up with
> both gralloc and libGL in the same process, and having both share the
> same pipe_screen avoids lots of headache
So, I've been advocating that for android, gallium drivers use
gralloc_drm_pipe, since with android it seems like you end up with
both gralloc and libGL in the same process, and having both share the
same pipe_screen avoids lots of headaches with multiple gem handles
pointing to same underlying buf
From: Nanley Chery
Match the comment stated above the assignment.
Signed-off-by: Nanley Chery
---
src/intel/isl/isl_surface_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/intel/isl/isl_surface_state.c
b/src/intel/isl/isl_surface_state.c
index fe8f07c..f3390a
From: Nanley Chery
This field is no longer needed.
Signed-off-by: Nanley Chery
---
src/intel/isl/isl.h | 9 -
src/intel/isl/isl_surface_state.c | 8
src/intel/vulkan/anv_image.c | 33 +++--
3 files changed, 7 insertions(+), 43 d
On Fri, Mar 4, 2016 at 6:59 PM, Marek Olšák wrote:
> On Fri, Mar 4, 2016 at 4:56 PM, Oded Gabbay wrote:
>> On Fri, Mar 4, 2016 at 2:19 PM, Marek Olšák wrote:
>>> Note that the DB only supports tiling and separate depth and stencil, so
>>> it's unmappable. Before transfers and sometimes even text
Am Freitag, den 04.03.2016, 17:20 + schrieb Daniel Stone:
> Hi,
>
> On 4 March 2016 at 16:08, Lucas Stach wrote:
> > Am Freitag, den 04.03.2016, 15:09 + schrieb Daniel Stone:
> >> Thanks for taking this on, it looks really good! I just have the one
> >> question though - did you look at t
The OES extensions clarify this behaviour to differentiate between
per-sample invocation and per-sample interpolation. Using sampleid/pos
will force per-sample invocation but not per-sample interpolation.
See https://www.khronos.org/bugzilla/show_bug.cgi?id=1462
Signed-off-by: Ilia Mirkin
Review
Hi,
On 4 March 2016 at 16:08, Lucas Stach wrote:
> Am Freitag, den 04.03.2016, 15:09 + schrieb Daniel Stone:
>> Thanks for taking this on, it looks really good! I just have the one
>> question though - did you look at the EGLDevice extension? Using that
>> to enumerate the GPUs, we could crea
On Fri, Mar 4, 2016 at 4:56 PM, Oded Gabbay wrote:
> On Fri, Mar 4, 2016 at 2:19 PM, Marek Olšák wrote:
>> Note that the DB only supports tiling and separate depth and stencil, so
>> it's unmappable. Before transfers and sometimes even texturing, the buffer
>> must be copied via the DB->CB path,
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