Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

[Andres Gomez]

On Fri, 2017-03-10 at 14:28 +1100, Timothy Arceri wrote:
> 
> On 10/03/17 08:46, Andres Gomez wrote:
> > On Fri, 2017-03-10 at 08:32 +1100, Timothy Arceri wrote:
> > > On 23/02/17 19:55, Andres Gomez wrote:
> > > > Commit f1293b2f9bc3 split apart buffer block arrays but introduced
> > > > also the possibility of a recount of active
> > > > blocks (NumUniformBlocks/NumShaderStorageBlocks) which would be
> > > > incoherent with the actual amount of active
> > > > blocks (UniformBlocks/ShaderStorageBlocks) in the program.
> > > > 
> > > > This could cause a segmentation fault if trying to use the index of a
> > > > block in a link failed program.
> > > 
> > > Where exactly does this segfault happen?
> > > interstage_cross_validate_uniform_blocks() should exit linking because
> > > we returned false.
> > 
> > It does exit, the segfault is not happening when running this code but
> > when using the link failed program later, as commented.
> > 
> > I caught this by using piglit's shader runner. In the "init_test"
> > function the last action is to call "setup_ubos":
> > https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n3704
> > 
> > This is done regardless the link status gotten previously. At
> > "setup_ubos" we ask first for the active UBOs:
> > https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n2652
> > 
> > And if there is any, we make use of them:
> > https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n2662
> > 
> > That's when the SIGSEV happens.
> > 
> > Of course, you could argue what are you doing using a link failed
> > program ☺ but the fact is that it should not return a value for the
> > active UBOs other than 0 and, most importantly, it shouldn't crash.
> > 
> > I hope this clarifies your doubt.
> > 
> 
> I'm not sure this is a bug. The section 7.3. (PROGRAM OBJECTS) of the 
> OpenGL 4.5 spec says:
> 
> "If a program is  not linked successfully, the link may have failed for 
> a number of reasons, including cases where the program required more 
> resources than supported by the implementation. Implementations are 
> permitted, but not required, to record lists of resources that would
> have been considered active had the program linked successfully."

According with that text it would be OK to report a different number
than 0 when asking for the active UBOs to the failed link program but
it still will be not OK that, when trying to use that active UBOs, we
would get a SIGSEV.

In other words, I think this is still a bug. The solution could be
different but, with current implementation, the most straight forward
is the patch I provided, setting the active UBOs to 0, which is
coherent with the rest of the internal state saved for the program.

Last, this patch is solving the "regression" that was caused by Commit
f1293b2f9bc3.

I set you to review because you are the author of that commit.

-- 
Br,

Andres
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Re: [Mesa-dev] [PATCH] anv/blorp: Turn off AUX after doing a CCS_D resolve

[Pohjolainen, Topi]

On Thu, Mar 09, 2017 at 04:42:06PM -0800, Jason Ekstrand wrote:
> For render passes with multiple subpasses on gen7, we only fast-clear at
> the top but an input attachment use can cause us to do a resolve in the
> middle of the render pass.  Once we've done so, we are no longer have a
> fast-cleared surface so we can just set aux_usage to NONE.

Reviewed-by: Topi Pohjolainen 

> ---
>  src/intel/vulkan/anv_blorp.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> index 72a5980..e15f33e 100644
> --- a/src/intel/vulkan/anv_blorp.c
> +++ b/src/intel/vulkan/anv_blorp.c
> @@ -1519,6 +1519,8 @@ ccs_resolve_attachment(struct anv_cmd_buffer 
> *cmd_buffer,
>  
> /* Once we've done any sort of resolve, we're no longer fast-cleared */
> att_state->fast_clear = false;
> +   if (att_state->aux_usage == ISL_AUX_USAGE_CCS_D)
> +  att_state->aux_usage = ISL_AUX_USAGE_NONE;
>  }
>  
>  void
> -- 
> 2.5.0.400.gff86faf
> 
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Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Kenneth Graunke]

On Thursday, March 9, 2017 8:30:44 PM PST Jason Ekstrand wrote:
> On Thu, Mar 9, 2017 at 8:18 PM, Kenneth Graunke 
> wrote:
> 
> > On Thursday, March 9, 2017 3:35:15 PM PST Nanley Chery wrote:
> > > The PRMs state that this packet is 16 DWORDS long. Ensure that the last
> > > three DWORDS are zeroed as required by the hardware when allocating a
> > > null surface state.
> > >
> > > Cc: 
> > > Signed-off-by: Nanley Chery 
> > > ---
> > >  src/intel/isl/isl.c| 2 +-
> > >  src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
> > >  2 files changed, 3 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > > index 6eb1e93efd..b4bdf2059a 100644
> > > --- a/src/intel/isl/isl.c
> > > +++ b/src/intel/isl/isl.c
> > > @@ -56,7 +56,7 @@ static const struct {
> > > [5] = {24, 32,  4},
> > > [6] = {24, 32,  4},
> > > [7] = {32, 32,  4, 24},
> > > -   [8] = {52, 64, 32, 40},
> > > +   [8] = {64, 64, 32, 40},
> > > [9] = {64, 64, 32, 40},
> > >  };
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > index 501531d4ad..f868293217 100644
> > > --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > @@ -46,10 +46,9 @@ static uint32_t *
> > >  gen8_allocate_surface_state(struct brw_context *brw,
> > >  uint32_t *out_offset, int index)
> > >  {
> > > -   int dwords = brw->gen >= 9 ? 16 : 13;
> > > uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> > > -  dwords * 4, 64, index,
> > out_offset);
> > > -   memset(surf, 0, dwords * 4);
> > > +  64, 64, index, out_offset);
> > > +   memset(surf, 0, 64);
> > > return surf;
> > >  }
> > >
> > >
> >
> > Does this actually fix anything, or just use more batch space?
> >
> 
> If you allocate more than one, it won't use any more batch space due to
> alignments.
> 

Good point.  Never mind the objection then.

--Ken


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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #22 from oia...@gmail.com ---
(In reply to Timothy Arceri from comment #19)
> (In reply to oiaohm from comment #17)
> > (In reply to Timothy Arceri from comment #15)
> > > (In reply to oiaohm from comment #12)
> > > > (In reply to Timothy Arceri from comment #11)
> > > > > (In reply to oiaohm from comment #9)
> > > > > > Jan Vesely
> > > > > > If the pointer size is the same and the timestamp is the same, 
> > > > > > the cache
> > > > > > will be reused, not deleted, and the problem does not exist.
> > > > > > 
> > > > > > I have a little problem. I have x32 and i386.   So pointer size is 
> > > > > > the same
> > > > > > timestamp and contents of cache should be different.   This will 
> > > > > > happen if I
> > > > > > am running a reproducible build with frozen time.   This can also 
> > > > > > happen if
> > > > > > you make to 64 library builds with frozen time because the two 
> > > > > > builds will
> > > > > > have the same timestamps even if they are completely different 
> > > > > > versions of
> > > > > > mesa incompatible disc cache requirements.
> > > > > > 
> > > > > > https://reproducible-builds.org/docs/timestamps/
> > > > > > 
> > > > > > The reason I provided this link is time is no longer trust-able as 
> > > > > > a unique
> > > > > > value.  Do note the usage of libfaketime its really simple to 
> > > > > > forget you
> > > > > > still have that loaded after doing a reproducible build so the 
> > > > > > clock is not
> > > > > > in fact ticking forwards for anything you are doing you wake up 
> > > > > > when you
> > > > > > finally do something that is dependant on the clock in fact 
> > > > > > ticking.   So
> > > > > > you need to look at other sources to get unique value.
> > > > > 
> > > > > x32 should end up in the ilp-32 directory. That's what the __ILP32__ 
> > > > > is
> > > > > meant to do. Even if it didn't and the cache wasn't deleted because 
> > > > > all your
> > > > > arch builds had the same timestamp it still wouldn't matter because 
> > > > > the
> > > > > timestamp is used to identify the Mesa version not the arch, the arch
> > > > > doesn't matter in terms of the cache it will work just fine. The only 
> > > > > reason
> > > > > for the different dirs is because we have no way of knowing if the 
> > > > > different
> > > > > timestamps are the same Mesa version
> > > > 
> > > > 1 if you are using timestamp it ID mesa version just use mesa version.
> > > 
> > > We can't, distros patch Mesa we can't depend on the version numbers being 
> > > an
> > > accurate representation of the source that was use to compile a Mesa
> > > binaray. There is an option to do a sha of the binaries but that is a 
> > > little
> > > more complex for opengl than it is for vulkan (where it is currently used 
> > > by
> > > Intel).
> > 
> > Distribution will block using timestamp.  So timestamp cannot be used to
> > perform task.
> 
> I'm pretty sure that's what Vulkan drivers were already doing in the
> previous release. If distros are going to disable features I can't stop that.
> 
> > 
> > Hashing to support your usage case might be the only way.
> 
> Happy for patches to implement this.
> 
> > > 
> > > > 
> > > > Next do read what x32 API is 
> > > > 
> > > > https://en.wikipedia.org/wiki/X32_ABI
> > > > There is a different count in registers between i386 and x32.  So yes 
> > > > they
> > > > both report as ilp-32
> > > 
> > > gcc only sets the __ILP32__ flag for x32 not i386. Clang may differ I'm 
> > > not
> > > sure, but it's not a major concern for me right now.
> > > 
> > http://stackoverflow.com/questions/34011718/is-ilp32-and-i386-a-valid-
> > configuration
> > Yes Clang sets __ILP32__ on i386 build modes.
> > 
> > __ILP32__ is a valid description for i386.   Should be presumed as being
> > possible to be set in i386.
> > 
> > In fact gcc not having __ILP32__ set for i386 could be called a bug. 
> > Depending on __ILP32__ to split i386 and x32 mode is depending on complier
> > behaviour not specification defined behaviour.
> 
> We want to avoid hooks into the build system. If you have a better idea how
> to do this than is currently done please submit a patch for review.

https://patchwork.freedesktop.org/patch/141891/
This patch almost does it.

The person here goes around a different.   Since you are using
autotools/configure script it has --target= that it either works out or your
provide.   This is the triplet.   This ready exist in configure as target_alias
and Macro: AC_CANONICAL_TARGET will get you target no matter what.

DEFINES="${DEFINES} -DCACHE_ARCH=\\\"$target\\""

But I will have to go through the complete configure because I would think it
strange if you have not already passed the target in somewhere for something to
the source code.

Might need something for platforms as fall back for those that are not Linux. 
And not using autotools.

When you say build system hooks does that include adding 

[Mesa-dev] [Bug 100061] LODQ instruction generated with invalid dst mask

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100061

sephirot...@gmail.com changed:

   What|Removed |Added

 CC||sephirot...@gmail.com

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #21 from oia...@gmail.com ---
(In reply to Emil Velikov from comment #20)
>
> As a final note: shader cache is not enabled on anything but r600/radeonsi
> atm, so the current code simply _cannot_ break your work-flows (workflow
> really).

Guess what graphic card I have.   I have a AMD graphics card so I can do Multi
architecture.   You have to use open source drivers because closed source
drivers is not option because you need to have the opengl libraries in the same
same architecture as the application.   So yes this direct hits my workflow.

This is why I am so upset.   As soon as this comes though I have possible
trouble with miss matched mesa versions crossing with each other in a cache
directory and being hard to debug.

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Re: [Mesa-dev] [PATCH] anv: change BLOCK_POOL_MEMFD_SIZE to exactly 2GB

[Tapani Pälli]

On 03/09/2017 10:06 PM, Jason Ekstrand wrote:

On Thu, Mar 9, 2017 at 8:37 AM, Eero Tamminen > wrote:

HI,

On 09.03.2017 13:28, Tapani Pälli wrote:
...

We had some discussion today with Eero and came to conclusion
that maybe
that 2GB is actually too big for 32bit system anyway and should
consider
to have even smaller block pool size in this case? Or should I
just send
a patch that adds '- 1' to ftruncate call? Opinions?


Vulkan driver taking 2GB out of application address space, doesn't
leave that much for rest of the memory mappings, if the application
itself would want to mmap() some large data files.


That's not really what's going on.  We ftruncate the file to 2GB to make
sure it's "big enough" but we only mmap a very small portion of it.
Dropping the size to 1GB should be just fine.


Right, it's not mapped as whole but pieces of it when utilized. I'll see 
what would be the minimal change here, probably just changing the define 
again, will test with 1GB.


// Tapani
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Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 8:18 PM, Kenneth Graunke 
wrote:

> On Thursday, March 9, 2017 3:35:15 PM PST Nanley Chery wrote:
> > The PRMs state that this packet is 16 DWORDS long. Ensure that the last
> > three DWORDS are zeroed as required by the hardware when allocating a
> > null surface state.
> >
> > Cc: 
> > Signed-off-by: Nanley Chery 
> > ---
> >  src/intel/isl/isl.c| 2 +-
> >  src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
> >  2 files changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > index 6eb1e93efd..b4bdf2059a 100644
> > --- a/src/intel/isl/isl.c
> > +++ b/src/intel/isl/isl.c
> > @@ -56,7 +56,7 @@ static const struct {
> > [5] = {24, 32,  4},
> > [6] = {24, 32,  4},
> > [7] = {32, 32,  4, 24},
> > -   [8] = {52, 64, 32, 40},
> > +   [8] = {64, 64, 32, 40},
> > [9] = {64, 64, 32, 40},
> >  };
> >
> > diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > index 501531d4ad..f868293217 100644
> > --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > @@ -46,10 +46,9 @@ static uint32_t *
> >  gen8_allocate_surface_state(struct brw_context *brw,
> >  uint32_t *out_offset, int index)
> >  {
> > -   int dwords = brw->gen >= 9 ? 16 : 13;
> > uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> > -  dwords * 4, 64, index,
> out_offset);
> > -   memset(surf, 0, dwords * 4);
> > +  64, 64, index, out_offset);
> > +   memset(surf, 0, 64);
> > return surf;
> >  }
> >
> >
>
> Does this actually fix anything, or just use more batch space?
>

If you allocate more than one, it won't use any more batch space due to
alignments.
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Re: [Mesa-dev] [PATCH 1/3] util/disk_cache: use LRU eviction rather than random eviction (v2)

[Timothy Arceri]

On 07/03/17 12:25, Alan Swanson wrote:

Still using random selection of two-character subdirectory in which
to check cache files rather than scanning entire cache.

v2: Factor out double strlen call
---
 src/util/disk_cache.c | 78 +++
 1 file changed, 35 insertions(+), 43 deletions(-)

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index 31a9336582..2a923be3dc 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -438,70 +438,60 @@ make_cache_file_directory(struct disk_cache *cache, const 
cache_key key)
free(dir);
 }

-/* Given a directory path and predicate function, count all entries in
- * that directory for which the predicate returns true. Then choose a
- * random entry from among those counted.
+/* Given a directory path and predicate function, find the entry with
+ * the oldest access time in that directory for which the predicate
+ * returns true.
  *
  * Returns: A malloc'ed string for the path to the chosen file, (or
  * NULL on any error). The caller should free the string when
  * finished.
  */
 static char *
-choose_random_file_matching(const char *dir_path,
-bool (*predicate)(const struct dirent *,
-  const char *dir_path))
+choose_lru_file_matching(const char *dir_path,
+ bool (*predicate)(const struct dirent *,
+   const char *dir_path))
 {
DIR *dir;
struct dirent *entry;
-   unsigned int count, victim;
+   struct stat sb;
+   char *tmp, *lru_name = NULL;
+   size_t len;
+   time_t lru_atime = 0;


Please try to declare variables where they are used. The original 
version of this file was written before we could use C99 features in Mesa.




char *filename;

dir = opendir(dir_path);
if (dir == NULL)
   return NULL;

-   count = 0;
-
-   while (1) {
-  entry = readdir(dir);
-  if (entry == NULL)
- break;
-  if (!predicate(entry, dir_path))
- continue;
-
-  count++;
-   }
-
-   if (count == 0) {
-  closedir(dir);
-  return NULL;
-   }
-
-   victim = rand() % count;
-
-   rewinddir(dir);
-   count = 0;
-
while (1) {
   entry = readdir(dir);
   if (entry == NULL)
  break;
   if (!predicate(entry, dir_path))
  continue;
-  if (count == victim)
- break;

-  count++;
+  if (fstatat(dirfd(dir), entry->d_name, , 0) == 0) {
+ if (!lru_atime || (sb.st_atime < lru_atime)) {
+len = strlen(entry->d_name) + 1;
+tmp = realloc(lru_name, len);
+if (tmp) {
+   lru_name = tmp;


I don't think we need tmp here. Why not use lru_name directly?

With these couple of nits addressed and the make check test updated for 
patch 2 this series looks good to me. Thanks for writing it.


If you can send these updates I'll push it once we have moved this stuff 
off into a thread [1].


[1] https://lists.freedesktop.org/archives/mesa-dev/2017-March/147442.html


+   memcpy(lru_name, entry->d_name, len);
+   lru_atime = sb.st_atime;
+}
+ }
+  }
}

-   if (entry == NULL) {
+   if (lru_name == NULL) {
   closedir(dir);
   return NULL;
}

-   if (asprintf(, "%s/%s", dir_path, entry->d_name) < 0)
+   if (asprintf(, "%s/%s", dir_path, lru_name) < 0)
   filename = NULL;

+   free(lru_name);
closedir(dir);

return filename;
@@ -533,12 +523,12 @@ is_regular_non_tmp_file(const struct dirent *entry, const 
char *path)

 /* Returns the size of the deleted file, (or 0 on any error). */
 static size_t
-unlink_random_file_from_directory(const char *path)
+unlink_lru_file_from_directory(const char *path)
 {
struct stat sb;
char *filename;

-   filename = choose_random_file_matching(path, is_regular_non_tmp_file);
+   filename = choose_lru_file_matching(path, is_regular_non_tmp_file);
if (filename == NULL)
   return 0;

@@ -581,7 +571,7 @@ is_two_character_sub_directory(const struct dirent *entry, 
const char *path)
 }

 static void
-evict_random_item(struct disk_cache *cache)
+evict_lru_item(struct disk_cache *cache)
 {
const char hex[] = "0123456789abcde";
char *dir_path;
@@ -591,6 +581,7 @@ evict_random_item(struct disk_cache *cache)
/* With a reasonably-sized, full cache, (and with keys generated
 * from a cryptographic hash), we can choose two random hex digits
 * and reasonably expect the directory to exist with a file in it.
+* Provides pseudo-LRU eviction to reduce checking all cache files.
 */
a = rand() % 16;
b = rand() % 16;
@@ -598,7 +589,7 @@ evict_random_item(struct disk_cache *cache)
if (asprintf(_path, "%s/%c%c", cache->path, hex[a], hex[b]) < 0)
   return;

-   size = unlink_random_file_from_directory(dir_path);
+   size = unlink_lru_file_from_directory(dir_path);

free(dir_path);

@@ -608,18 +599,19 @@ 

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Kenneth Graunke]

On Thursday, March 9, 2017 3:35:15 PM PST Nanley Chery wrote:
> The PRMs state that this packet is 16 DWORDS long. Ensure that the last
> three DWORDS are zeroed as required by the hardware when allocating a
> null surface state.
> 
> Cc: 
> Signed-off-by: Nanley Chery 
> ---
>  src/intel/isl/isl.c| 2 +-
>  src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
>  2 files changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 6eb1e93efd..b4bdf2059a 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -56,7 +56,7 @@ static const struct {
> [5] = {24, 32,  4},
> [6] = {24, 32,  4},
> [7] = {32, 32,  4, 24},
> -   [8] = {52, 64, 32, 40},
> +   [8] = {64, 64, 32, 40},
> [9] = {64, 64, 32, 40},
>  };
>  
> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> index 501531d4ad..f868293217 100644
> --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> @@ -46,10 +46,9 @@ static uint32_t *
>  gen8_allocate_surface_state(struct brw_context *brw,
>  uint32_t *out_offset, int index)
>  {
> -   int dwords = brw->gen >= 9 ? 16 : 13;
> uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> -  dwords * 4, 64, index, out_offset);
> -   memset(surf, 0, dwords * 4);
> +  64, 64, index, out_offset);
> +   memset(surf, 0, 64);
> return surf;
>  }
>  
> 

Does this actually fix anything, or just use more batch space?

--Ken


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Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

[Timothy Arceri]

On 10/03/17 08:46, Andres Gomez wrote:

On Fri, 2017-03-10 at 08:32 +1100, Timothy Arceri wrote:

On 23/02/17 19:55, Andres Gomez wrote:

Commit f1293b2f9bc3 split apart buffer block arrays but introduced
also the possibility of a recount of active
blocks (NumUniformBlocks/NumShaderStorageBlocks) which would be
incoherent with the actual amount of active
blocks (UniformBlocks/ShaderStorageBlocks) in the program.

This could cause a segmentation fault if trying to use the index of a
block in a link failed program.


Where exactly does this segfault happen?
interstage_cross_validate_uniform_blocks() should exit linking because
we returned false.


It does exit, the segfault is not happening when running this code but
when using the link failed program later, as commented.

I caught this by using piglit's shader runner. In the "init_test"
function the last action is to call "setup_ubos":
https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n3704

This is done regardless the link status gotten previously. At
"setup_ubos" we ask first for the active UBOs:
https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n2652

And if there is any, we make use of them:
https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n2662

That's when the SIGSEV happens.

Of course, you could argue what are you doing using a link failed
program ☺ but the fact is that it should not return a value for the
active UBOs other than 0 and, most importantly, it shouldn't crash.

I hope this clarifies your doubt.



I'm not sure this is a bug. The section 7.3. (PROGRAM OBJECTS) of the 
OpenGL 4.5 spec says:


"If a program is  not linked successfully, the link may have failed for 
a number of reasons, including cases where the program required more 
resources than supported by the implementation. Implementations are 
permitted, but not required, to record lists of resources that would

have been considered active had the program linked successfully."
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Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 5:32 PM, Nanley Chery  wrote:

> On Thu, Mar 09, 2017 at 05:03:30PM -0800, Jason Ekstrand wrote:
> > On Thu, Mar 9, 2017 at 3:35 PM, Nanley Chery 
> wrote:
> >
> > > The PRMs state that this packet is 16 DWORDS long. Ensure that the last
> > > three DWORDS are zeroed as required by the hardware when allocating a
> > > null surface state.
> > >
> > > Cc: 
> > > Signed-off-by: Nanley Chery 
> > > ---
> > >  src/intel/isl/isl.c| 2 +-
> > >  src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
> > >  2 files changed, 3 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > > index 6eb1e93efd..b4bdf2059a 100644
> > > --- a/src/intel/isl/isl.c
> > > +++ b/src/intel/isl/isl.c
> > > @@ -56,7 +56,7 @@ static const struct {
> > > [5] = {24, 32,  4},
> > > [6] = {24, 32,  4},
> > > [7] = {32, 32,  4, 24},
> > > -   [8] = {52, 64, 32, 40},
> > > +   [8] = {64, 64, 32, 40},
> > >
> >
> > you're right.  Thanks!
> >
> >
> > > [9] = {64, 64, 32, 40},
> > >  };
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > index 501531d4ad..f868293217 100644
> > > --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > > @@ -46,10 +46,9 @@ static uint32_t *
> > >  gen8_allocate_surface_state(struct brw_context *brw,
> > >  uint32_t *out_offset, int index)
> > >  {
> > > -   int dwords = brw->gen >= 9 ? 16 : 13;
> > > uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> > > -  dwords * 4, 64, index,
> out_offset);
> > > -   memset(surf, 0, dwords * 4);
> > > +  64, 64, index, out_offset);
> > > +   memset(surf, 0, 64);
> > >
> >
> > Actually, ISL (well, more like gen8_pack.h) does this for us when it
> fills
> > out the surface state so the memset isn't needed.
> >
> >
>
> This is done for the only surface state that ISL doesn't fill. See
> gen8_emit_null_surface_state().
>

Sorry, I missed that.  Good catch!

Reviewed-by: Jason Ekstrand 
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Re: [Mesa-dev] [PATCH 3/3] gbm: Export a get modifiers

[Jason Ekstrand]

Fairly straightforward and nothing seems amiss.

Reviewed-by: Jason Ekstrand 

On Thu, Mar 9, 2017 at 5:49 PM, Ben Widawsky  wrote:

> This patch originally had i965 specific code and was named:
> commit 61cd3c52b868cf8cb90b06e53a382a921eb42754
> Author: Ben Widawsky 
> Date:   Thu Oct 20 18:21:24 2016 -0700
>
> gbm: Get modifiers from DRI
>
> To accomplish this, two new query tokens are added to the extension:
> __DRI_IMAGE_ATTRIB_MODIFIER_UPPER
> __DRI_IMAGE_ATTRIB_MODIFIER_LOWER
>
> The query extension only supported 32b queries, and modifiers are 64b,
> so we needed two of them.
>
> NOTE: The extension version is still set to 13, so none of this will
> actually be called.
>
> Signed-off-by: Ben Widawsky 
> ---
>  src/gbm/backends/dri/gbm_dri.c | 36 
>  src/gbm/gbm-symbols-check  |  1 +
>  src/gbm/main/gbm.c | 19 +++
>  src/gbm/main/gbm.h |  3 +++
>  src/gbm/main/gbmint.h  |  1 +
>  5 files changed, 60 insertions(+)
>
> diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_
> dri.c
> index d45ba94080..2c467127c2 100644
> --- a/src/gbm/backends/dri/gbm_dri.c
> +++ b/src/gbm/backends/dri/gbm_dri.c
> @@ -39,6 +39,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  #include  /* dri_interface needs GL types */
>  #include 
> @@ -53,6 +54,14 @@
>  #include "../../../egl/wayland/wayland-drm/wayland-drm.h"
>  #endif
>
> +#ifndef DRM_FORMAT_MOD_INVALID
> +#define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
> +#endif
> +
> +#ifndef DRM_FORMAT_MOD_LINEAR
> +#define DRM_FORMAT_MOD_LINEAR 0
> +#endif
> +
>  static __DRIimage *
>  dri_lookup_egl_image(__DRIscreen *screen, void *image, void *data)
>  {
> @@ -735,6 +744,32 @@ gbm_dri_bo_get_offset(struct gbm_bo *_bo, int plane)
> return (uint32_t)offset;
>  }
>
> +static uint64_t
> +gbm_dri_bo_get_modifier(struct gbm_bo *_bo)
> +{
> +   struct gbm_dri_device *dri = gbm_dri_device(_bo->gbm);
> +   struct gbm_dri_bo *bo = gbm_dri_bo(_bo);
> +
> +   if (!dri->image || dri->image->base.version < 14) {
> +  errno = ENOSYS;
> +  return DRM_FORMAT_MOD_INVALID;
> +   }
> +
> +   /* Dumb buffers have no modifiers */
> +   if (!bo->image)
> +  return DRM_FORMAT_MOD_LINEAR;
> +
> +   uint64_t ret = 0;
> +   int mod;
> +   dri->image->queryImage(bo->image, __DRI_IMAGE_ATTRIB_MODIFIER_UPPER,
> );
> +   ret = (uint64_t)mod << 32;
> +
> +   dri->image->queryImage(bo->image, __DRI_IMAGE_ATTRIB_MODIFIER_LOWER,
> );
> +   ret |= mod;
> +
> +   return ret;
> +}
> +
>  static void
>  gbm_dri_bo_destroy(struct gbm_bo *_bo)
>  {
> @@ -1259,6 +1294,7 @@ dri_device_create(int fd)
> dri->base.base.bo_get_handle = gbm_dri_bo_get_handle_for_plane;
> dri->base.base.bo_get_stride = gbm_dri_bo_get_stride;
> dri->base.base.bo_get_offset = gbm_dri_bo_get_offset;
> +   dri->base.base.bo_get_modifier = gbm_dri_bo_get_modifier;
> dri->base.base.bo_destroy = gbm_dri_bo_destroy;
> dri->base.base.destroy = dri_destroy;
> dri->base.base.surface_create = gbm_dri_surface_create;
> diff --git a/src/gbm/gbm-symbols-check b/src/gbm/gbm-symbols-check
> index c137c6cd93..c72fb66b03 100755
> --- a/src/gbm/gbm-symbols-check
> +++ b/src/gbm/gbm-symbols-check
> @@ -23,6 +23,7 @@ gbm_bo_get_handle
>  gbm_bo_get_fd
>  gbm_bo_get_plane_count
>  gbm_bo_get_handle_for_plane
> +gbm_bo_get_modifier
>  gbm_bo_write
>  gbm_bo_set_user_data
>  gbm_bo_get_user_data
> diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c
> index 0fb62657ed..7ceaccdc21 100644
> --- a/src/gbm/main/gbm.c
> +++ b/src/gbm/main/gbm.c
> @@ -280,6 +280,25 @@ gbm_bo_get_handle_for_plane(struct gbm_bo *bo, int
> plane)
> return bo->gbm->bo_get_handle(bo, plane);
>  }
>
> +/**
> + * Get the chosen modifier for the buffer object
> + *
> + * This function returns the modifier that was chosen for the object.
> These
> + * properties may be generic, or platform/implementation dependent.
> + *
> + * \param bo The buffer object
> + * \return Returns the selected modifier (chosen by the implementation)
> for the
> + * BO.
> + * \sa gbm_bo_create_with_modifiers() where possible modifiers are set
> + * \sa gbm_surface_create_with_modifiers() where possible modifiers are
> set
> + * \sa define DRM_FORMAT_MOD_* in drm_fourcc.h for possible modifiers
> + */
> +GBM_EXPORT uint64_t
> +gbm_bo_get_modifier(struct gbm_bo *bo)
> +{
> +   return bo->gbm->bo_get_modifier(bo);
> +}
> +
>  /** Write data into the buffer object
>   *
>   * If the buffer object was created with the GBM_BO_USE_WRITE flag,
> diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
> index 5f588dab58..a774b50951 100644
> --- a/src/gbm/main/gbm.h
> +++ b/src/gbm/main/gbm.h
> @@ -327,6 +327,9 @@ gbm_bo_get_handle(struct gbm_bo *bo);
>  int
>  gbm_bo_get_fd(struct gbm_bo *bo);
>
> +uint64_t
> +gbm_bo_get_modifier(struct gbm_bo *bo);
> +
>  int
>  

Re: [Mesa-dev] [PATCH 2/3] gbm: Introduce modifiers into surface/bo creation

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 5:48 PM, Ben Widawsky  wrote:

> The idea behind modifiers like this is that the user of GBM will have
> some mechanism to query what properties the hardware supports for its BO
> or surface. This information is directly passed in (and stored) so that
> the DRI implementation can create an image with the appropriate
> attributes.
>
> A getter() will be added later so that the user GBM will be able to
> query what modifier should be used.
>
> Only in surface creation, the modifiers are stored until the BO is
> actually allocated. In regular buffer allocation, the correct modifier
> can (will be, in future patches be chosen at creation time.
>
> v2: Make sure to check if count is non-zero in addition to testing if
> calloc fails. (Daniel)
>
> v3: Remove "usage" and "flags" from modifier creation. Requested by
> Kristian.
>
> v4: Take advantage of the "INVALID" modifier added by the GET_PLANE2
> series.
>
> v5: Don't bother with storing modifiers for gbm_bo_create because that's
> a synchronous operation and we can actually select the correct modifier
> at create time (done in a later patch) (Jason)
>
> Cc: Kristian Høgsberg 
> Cc: Jason Ekstrand 
> References (v4): https://lists.freedesktop.org/
> archives/intel-gfx/2017-January/116636.html
> Signed-off-by: Ben Widawsky 
> Reviewed-by: Eric Engestrom  (v1)
> Acked-by: Daniel Stone 
> ---
>  src/egl/drivers/dri2/platform_drm.c  | 19 ---
>  src/gbm/backends/dri/gbm_dri.c   | 42
> ++--
>  src/gbm/gbm-symbols-check|  2 ++
>  src/gbm/main/gbm.c   | 29 --
>  src/gbm/main/gbm.h   | 12 +
>  src/gbm/main/gbmint.h| 12 +++--
>  src/mesa/drivers/dri/i965/intel_screen.c | 18 ++
>  7 files changed, 119 insertions(+), 15 deletions(-)
>
> diff --git a/src/egl/drivers/dri2/platform_drm.c
> b/src/egl/drivers/dri2/platform_drm.c
> index e5e8c60596..cf35ce8a1f 100644
> --- a/src/egl/drivers/dri2/platform_drm.c
> +++ b/src/egl/drivers/dri2/platform_drm.c
> @@ -230,10 +230,21 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
>
> if (dri2_surf->back == NULL)
>return -1;
> -   if (dri2_surf->back->bo == NULL)
> -  dri2_surf->back->bo = gbm_bo_create(_dpy->gbm_dri->base.base,
> - surf->base.width,
> surf->base.height,
> - surf->base.format,
> surf->base.flags);
> +   if (dri2_surf->back->bo == NULL) {
> +  if (surf->base.modifiers)
> + dri2_surf->back->bo = gbm_bo_create_with_modifiers(&
> dri2_dpy->gbm_dri->base.base,
> +
> surf->base.width, surf->base.height,
> +
> surf->base.format,
> +
> surf->base.modifiers,
> +
> surf->base.count);
> +  else
> + dri2_surf->back->bo = gbm_bo_create(_dpy->gbm_d
> ri->base.base,
> + surf->base.width,
> + surf->base.height,
> + surf->base.format,
> + surf->base.flags);
> +
> +   }
> if (dri2_surf->back->bo == NULL)
>return -1;
>
> diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri
> .c
> index 7106dc1229..d45ba94080 100644
> --- a/src/gbm/backends/dri/gbm_dri.c
> +++ b/src/gbm/backends/dri/gbm_dri.c
> @@ -1023,13 +1023,20 @@ free_bo:
>  static struct gbm_bo *
>  gbm_dri_bo_create(struct gbm_device *gbm,
>uint32_t width, uint32_t height,
> -  uint32_t format, uint32_t usage)
> +  uint32_t format, uint32_t usage,
> +  const uint64_t *modifiers,
> +  const unsigned int count)
>  {
> struct gbm_dri_device *dri = gbm_dri_device(gbm);
> struct gbm_dri_bo *bo;
> int dri_format;
> unsigned dri_use = 0;
>
> +   /* Callers of this may specify a modifier, or a dri usage, but not
> both. The
> +* newer modifier interface deprecates the older usage flags.
> +*/
> +   assert(!(usage && count));
> +
> if (usage & GBM_BO_USE_WRITE || dri->image == NULL)
>return create_dumb(gbm, width, height, format, usage);
>
> @@ -1087,11 +1094,21 @@ gbm_dri_bo_create(struct gbm_device *gbm,
> /* Gallium drivers requires shared in order to get the handle/stride */
> dri_use |= __DRI_IMAGE_USE_SHARE;
>
> -   bo->image =
> -  dri->image->createImage(dri->screen,
> -  width, height,
> -  dri_format, dri_use,
> -  bo);
> +   if (!dri->image || dri->image->base.version < 14 ||
> +   !dri->image->createImageWithModifiers) {
> +  if (modifiers)
> + fprintf(stderr, "Modifiers specified, but DRI is too old\n");
>

Re: [Mesa-dev] [PATCH 1/3] dri: Add an image creation with modifiers

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 5:48 PM, Ben Widawsky  wrote:

> Modifiers will be obtains or guessed by the client and passed in during
>

"obtained"


> image creation/import.
>
> This requires bumping the DRIimage version.
>
> As of this patch, the modifiers aren't plumbed all the way down, this
> patch simply makes sure the interface level stuff is correct.
>
> v2: Don't allow usage + modifiers
>
> v3: Make NAND actually NAND. Bug introduced in v2. (Jason)
>
> Cc: Kristian Høgsberg 
> Cc: Jason Ekstrand 
> Signed-off-by: Ben Widawsky 
> Reviewed-by: Eric Engestrom  (v1)
> Acked-by: Daniel Stone 
> ---
>  include/GL/internal/dri_interface.h  | 27 ++-
>  src/gallium/state_trackers/dri/dri2.c|  1 +
>  src/mesa/drivers/dri/i965/intel_screen.c | 32
> +++-
>  3 files changed, 58 insertions(+), 2 deletions(-)
>
> diff --git a/include/GL/internal/dri_interface.h
> b/include/GL/internal/dri_interface.h
> index 598d111f33..53fac6fc3c 100644
> --- a/include/GL/internal/dri_interface.h
> +++ b/include/GL/internal/dri_interface.h
> @@ -1136,7 +1136,7 @@ struct __DRIdri2ExtensionRec {
>   * extensions.
>   */
>  #define __DRI_IMAGE "DRI_IMAGE"
> -#define __DRI_IMAGE_VERSION 13
> +#define __DRI_IMAGE_VERSION 14
>
>  /**
>   * These formats correspond to the similarly named MESA_FORMAT_*
> @@ -1257,6 +1257,8 @@ struct __DRIdri2ExtensionRec {
>  #define __DRI_IMAGE_ATTRIB_NUM_PLANES   0x2009 /* available in versions
> 11 */
>
>  #define __DRI_IMAGE_ATTRIB_OFFSET 0x200A /* available in versions 13 */
> +#define __DRI_IMAGE_ATTRIB_MODIFIER_LOWER 0x200B /* available in
> versions 14 */
> +#define __DRI_IMAGE_ATTRIB_MODIFIER_UPPER 0x200C /* available in
> versions 14 */
>
>  enum __DRIYUVColorSpace {
> __DRI_YUV_COLOR_SPACE_UNDEFINED = 0,
> @@ -1468,6 +1470,29 @@ struct __DRIimageExtensionRec {
>  */
> void (*unmapImage)(__DRIcontext *context, __DRIimage *image, void
> *data);
>
> +
> +   /**
> +* Creates an image with implementation's favorite modifiers.
> +*
> +* This acts like createImage except there is a list of modifiers
> passed in
> +* which the implementation may selectively use to create the
> DRIimage. The
> +* result should be the implementation selects one modifier (perhaps
> it would
> +* hold on to a few and later pick).
> +*
> +* The created image should be destroyed with destroyImage().
> +*
> +* Returns the new DRIimage. The chosen modifier can be obtained later
> on
> +* and passed back to things like the kernel's AddFB2 interface.
> +*
> +* \sa __DRIimageRec::createImage
> +*
> +* \since 14
> +*/
> +   __DRIimage *(*createImageWithModifiers)(__DRIscreen *screen,
> +   int width, int height, int
> format,
> +   const uint64_t *modifiers,
> +   const unsigned int
> modifier_count,
> +   void *loaderPrivate);
>  };
>
>
> diff --git a/src/gallium/state_trackers/dri/dri2.c
> b/src/gallium/state_trackers/dri/dri2.c
> index b50e096443..12e466c6f1 100644
> --- a/src/gallium/state_trackers/dri/dri2.c
> +++ b/src/gallium/state_trackers/dri/dri2.c
> @@ -1413,6 +1413,7 @@ static __DRIimageExtension dri2ImageExtension = {
>  .getCapabilities  = dri2_get_capabilities,
>  .mapImage = dri2_map_image,
>  .unmapImage   = dri2_unmap_image,
> +.createImageWithModifiers = NULL,
>  };
>
>
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 21786eb54a..3452572874 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -510,9 +510,11 @@ intel_destroy_image(__DRIimage *image)
>  }
>
>  static __DRIimage *
> -intel_create_image(__DRIscreen *dri_screen,
> +__intel_create_image(__DRIscreen *dri_screen,
>int width, int height, int format,
>unsigned int use,
> +   const uint64_t *modifiers,
> +   unsigned count,
>void *loaderPrivate)
>  {
> __DRIimage *image;
> @@ -521,6 +523,12 @@ intel_create_image(__DRIscreen *dri_screen,
> int cpp;
> unsigned long pitch;
>
> +   /* Callers of this may specify a modifier, or a dri usage, but not
> both. The
> +* newer modifier interface deprecates the older usage flags newer
> modifier
> +* interface deprecates the older usage flags.
> +*/
> +   assert(!(use && count));
> +
> tiling = I915_TILING_X;
> if (use & __DRI_IMAGE_USE_CURSOR) {
>if (width != 64 || height != 64)
> @@ -550,6 +558,27 @@ intel_create_image(__DRIscreen *dri_screen,
> return image;
>  }
>
> +static 

[Mesa-dev] [PATCH 8/8] radeonsi: use a thread queue to write to shader cache

[Timothy Arceri]

---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 18 ++
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 343cb83..8c00967 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -202,26 +202,36 @@ static bool si_shader_cache_insert_shader(struct 
si_screen *sscreen,
 
if (_mesa_hash_table_insert(sscreen->shader_cache, tgsi_binary,
hw_binary) == NULL) {
FREE(hw_binary);
return false;
}
 
if (sscreen->b.disk_shader_cache && insert_into_disk_cache) {
_mesa_sha1_compute(tgsi_binary, *((uint32_t *)tgsi_binary), 
key);
 
+   size_t hw_binary_size = *((uint32_t *) hw_binary);
+
+   /* The binary could be freed before we write it to disk so
+* make a copy.
+*/
+   void *hw_binary_cp = malloc(hw_binary_size);
+   memcpy(hw_binary_cp, hw_binary, hw_binary_size);
+
struct disk_cache_put_job *dc_job =
disk_cache_create_put_job(sscreen->b.disk_shader_cache,
- key, hw_binary,
- *((uint32_t *) hw_binary),
- NULL);
-   disk_cache_put(dc_job, 0);
+ key, hw_binary_cp,
+ hw_binary_size, hw_binary_cp);
+   util_queue_fence_init(_job->fence);
+   util_queue_add_job(>b.disk_shader_cache->cache_queue,
+  dc_job, _job->fence, disk_cache_put,
+  disk_cache_destroy_put_job);
}
 
return true;
 }
 
 static bool si_shader_cache_load_shader(struct si_screen *sscreen,
void *tgsi_binary,
struct si_shader *shader)
 {
struct hash_entry *entry =
-- 
2.9.3

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[Mesa-dev] [PATCH 6/8] util/u_queue: make u_queue accessible to cpp

[Timothy Arceri]

---
 src/util/u_queue.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/util/u_queue.h b/src/util/u_queue.h
index 0073890..4aec1f2 100644
--- a/src/util/u_queue.h
+++ b/src/util/u_queue.h
@@ -31,20 +31,24 @@
  */
 
 #ifndef U_QUEUE_H
 #define U_QUEUE_H
 
 #include 
 
 #include "util/list.h"
 #include "util/u_thread.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* Job completion fence.
  * Put this into your job structure.
  */
 struct util_queue_fence {
mtx_t mutex;
cnd_t cond;
int signalled;
 };
 
 typedef void (*util_queue_execute_func)(void *job, int thread_index);
@@ -99,11 +103,15 @@ util_queue_is_initialized(struct util_queue *queue)
 {
return queue->threads != NULL;
 }
 
 static inline bool
 util_queue_fence_is_signalled(struct util_queue_fence *fence)
 {
return fence->signalled != 0;
 }
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
-- 
2.9.3

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[Mesa-dev] [PATCH 5/8] util/disk_cache: move disk_cache declaration to the header

[Timothy Arceri]

This will allow use to access members outside if the disk cache util.
---
 src/util/disk_cache.c | 21 -
 src/util/disk_cache.h | 21 -
 2 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index e0b540c..d3dcb1b 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -49,41 +49,20 @@
 
 /* Number of bits to mask off from a cache key to get an index. */
 #define CACHE_INDEX_KEY_BITS 16
 
 /* Mask for computing an index from a key. */
 #define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
 
 /* The number of keys that can be stored in the index. */
 #define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS)
 
-struct disk_cache {
-   /* The path to the cache directory. */
-   char *path;
-
-   /* Thread queue for compressing and writing cache entries to disk */
-   struct util_queue cache_queue;
-
-   /* A pointer to the mmapped index file within the cache directory. */
-   uint8_t *index_mmap;
-   size_t index_mmap_size;
-
-   /* Pointer to total size of all objects in cache (within index_mmap) */
-   uint64_t *size;
-
-   /* Pointer to stored keys, (within index_mmap). */
-   uint8_t *stored_keys;
-
-   /* Maximum size of all cached objects (in bytes). */
-   uint64_t max_size;
-};
-
 /* Create a directory named 'path' if it does not already exist.
  *
  * Returns: 0 if path already exists as a directory or if created.
  * -1 in all other cases.
  */
 static int
 mkdir_if_needed(const char *path)
 {
struct stat sb;
 
diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index 19eb1a9..d1e1ab0 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -36,21 +36,40 @@
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* Size of cache keys in bytes. */
 #define CACHE_KEY_SIZE 20
 
 typedef uint8_t cache_key[CACHE_KEY_SIZE];
 
-struct disk_cache;
+struct disk_cache {
+   /* The path to the cache directory. */
+   char *path;
+
+   /* Thread queue for compressing and writing cache entries to disk */
+   struct util_queue cache_queue;
+
+   /* A pointer to the mmapped index file within the cache directory. */
+   uint8_t *index_mmap;
+   size_t index_mmap_size;
+
+   /* Pointer to total size of all objects in cache (within index_mmap) */
+   uint64_t *size;
+
+   /* Pointer to stored keys, (within index_mmap). */
+   uint8_t *stored_keys;
+
+   /* Maximum size of all cached objects (in bytes). */
+   uint64_t max_size;
+};
 
 struct disk_cache_put_job {
struct util_queue_fence fence;
 
struct disk_cache *cache;
 
cache_key key;
 
/* Cache data to be compressed and written. */
const void *data;
-- 
2.9.3

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[Mesa-dev] [PATCH 7/8] st/mesa/glsl: use a thread queue to write to shader cache

[Timothy Arceri]

This uses a thread queue for the GLSL IR cache and the TGSI cache
when adding entries.

This should help reduce any overhead added by the shader cache
when programs are not found in the cache.
---
 src/compiler/glsl/shader_cache.cpp   | 7 ---
 src/mesa/state_tracker/st_shader_cache.c | 7 ---
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/compiler/glsl/shader_cache.cpp 
b/src/compiler/glsl/shader_cache.cpp
index 1865e96..bbe10a1 100644
--- a/src/compiler/glsl/shader_cache.cpp
+++ b/src/compiler/glsl/shader_cache.cpp
@@ -53,20 +53,21 @@
 #include "ir_rvalue_visitor.h"
 #include "ir_uniform.h"
 #include "linker.h"
 #include "link_varyings.h"
 #include "main/core.h"
 #include "nir.h"
 #include "program.h"
 #include "shader_cache.h"
 #include "util/mesa-sha1.h"
 #include "util/string_to_uint_map.h"
+#include "util/u_queue.h"
 
 extern "C" {
 #include "main/enums.h"
 #include "main/shaderobj.h"
 #include "program/program.h"
 }
 
 static void
 compile_shaders(struct gl_context *ctx, struct gl_shader_program *prog) {
for (unsigned i = 0; i < prog->NumShaders; i++) {
@@ -1272,23 +1273,23 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
   disk_cache_put_key(cache, prog->Shaders[i]->sha1);
   if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
  fprintf(stderr, "marking shader: %s\n",
  _mesa_sha1_format(sha1_buf, prog->Shaders[i]->sha1));
   }
}
 
struct disk_cache_put_job *dc_job =
   disk_cache_create_put_job(cache, prog->data->sha1, metadata->data,
 metadata->size, metadata);
-   disk_cache_put(dc_job, 0);
-
-   free(metadata);
+   util_queue_fence_init(_job->fence);
+   util_queue_add_job(>cache_queue, dc_job, _job->fence,
+  disk_cache_put, disk_cache_destroy_put_job);
 
if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
   fprintf(stderr, "putting program metadata in cache: %s\n",
   _mesa_sha1_format(sha1_buf, prog->data->sha1));
}
 }
 
 bool
 shader_cache_read_program_metadata(struct gl_context *ctx,
struct gl_shader_program *prog)
diff --git a/src/mesa/state_tracker/st_shader_cache.c 
b/src/mesa/state_tracker/st_shader_cache.c
index 040fbc1..3753533 100644
--- a/src/mesa/state_tracker/st_shader_cache.c
+++ b/src/mesa/state_tracker/st_shader_cache.c
@@ -22,20 +22,21 @@
  */
 
 #include 
 
 #include "st_program.h"
 #include "st_shader_cache.h"
 #include "compiler/glsl/program.h"
 #include "pipe/p_shader_tokens.h"
 #include "program/ir_to_mesa.h"
 #include "util/u_memory.h"
+#include "util/u_queue.h"
 
 static void
 write_stream_out_to_cache(struct blob *blob,
   struct pipe_shader_state *tgsi)
 {
blob_write_bytes(blob, >stream_output,
 sizeof(tgsi->stream_output));
 }
 
 static void
@@ -43,21 +44,23 @@ write_tgsi_to_cache(struct blob *blob, struct 
pipe_shader_state *tgsi,
 struct st_context *st, unsigned char *sha1,
 unsigned num_tokens)
 {
blob_write_uint32(blob, num_tokens);
blob_write_bytes(blob, tgsi->tokens,
 num_tokens * sizeof(struct tgsi_token));
 
struct disk_cache_put_job *dc_job =
   disk_cache_create_put_job(st->ctx->Cache, sha1, blob->data, blob->size,
 blob);
-   disk_cache_put(dc_job, 0);
+   util_queue_fence_init(_job->fence);
+   util_queue_add_job(>ctx->Cache->cache_queue, dc_job, _job->fence,
+  disk_cache_put, disk_cache_destroy_put_job);
 }
 
 /**
  * Store tgsi and any other required state in on-disk shader cache.
  */
 void
 st_store_tgsi_in_disk_cache(struct st_context *st, struct gl_program *prog,
 struct pipe_shader_state *out_state,
 unsigned num_tokens)
 {
@@ -129,22 +132,20 @@ st_store_tgsi_in_disk_cache(struct st_context *st, struct 
gl_program *prog,
default:
   unreachable("Unsupported stage");
}
 
if (st->ctx->_Shader->Flags & GLSL_CACHE_INFO) {
   char sha1_buf[41];
   _mesa_sha1_format(sha1_buf, sha1);
   fprintf(stderr, "putting %s tgsi_tokens in cache: %s\n",
   _mesa_shader_stage_to_string(prog->info.stage), sha1_buf);
}
-
-   free(blob);
 }
 
 static void
 read_stream_out_from_cache(struct blob_reader *blob_reader,
struct pipe_shader_state *tgsi)
 {
blob_copy_bytes(blob_reader, (uint8_t *) >stream_output,
 sizeof(tgsi->stream_output));
 }
 
-- 
2.9.3

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[Mesa-dev] [PATCH 4/8] util/disk_cache: make disk_cache_put() compatible with u_queue

[Timothy Arceri]

---
 src/compiler/glsl/shader_cache.cpp  |  5 -
 src/compiler/glsl/tests/cache_test.c| 29 -
 src/gallium/drivers/radeonsi/si_state_shaders.c |  9 ++--
 src/mesa/state_tracker/st_shader_cache.c|  5 -
 src/util/disk_cache.c   | 27 +--
 src/util/disk_cache.h   |  7 ++
 6 files changed, 55 insertions(+), 27 deletions(-)

diff --git a/src/compiler/glsl/shader_cache.cpp 
b/src/compiler/glsl/shader_cache.cpp
index 6e2c527..1865e96 100644
--- a/src/compiler/glsl/shader_cache.cpp
+++ b/src/compiler/glsl/shader_cache.cpp
@@ -1269,21 +1269,24 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
 
char sha1_buf[41];
for (unsigned i = 0; i < prog->NumShaders; i++) {
   disk_cache_put_key(cache, prog->Shaders[i]->sha1);
   if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
  fprintf(stderr, "marking shader: %s\n",
  _mesa_sha1_format(sha1_buf, prog->Shaders[i]->sha1));
   }
}
 
-   disk_cache_put(cache, prog->data->sha1, metadata->data, metadata->size);
+   struct disk_cache_put_job *dc_job =
+  disk_cache_create_put_job(cache, prog->data->sha1, metadata->data,
+metadata->size, metadata);
+   disk_cache_put(dc_job, 0);
 
free(metadata);
 
if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
   fprintf(stderr, "putting program metadata in cache: %s\n",
   _mesa_sha1_format(sha1_buf, prog->data->sha1));
}
 }
 
 bool
diff --git a/src/compiler/glsl/tests/cache_test.c 
b/src/compiler/glsl/tests/cache_test.c
index 7a1ff0a..a2b33f7 100644
--- a/src/compiler/glsl/tests/cache_test.c
+++ b/src/compiler/glsl/tests/cache_test.c
@@ -251,31 +251,37 @@ test_put_and_get(void)
cache = disk_cache_create("test", "make_check");
 
_mesa_sha1_compute(blob, sizeof(blob), blob_key);
 
/* Ensure that disk_cache_get returns nothing before anything is added. */
result = disk_cache_get(cache, blob_key, );
expect_null(result, "disk_cache_get with non-existent item (pointer)");
expect_equal(size, 0, "disk_cache_get with non-existent item (size)");
 
/* Simple test of put and get. */
-   disk_cache_put(cache, blob_key, blob, sizeof(blob));
+   struct disk_cache_put_job *dc_job =
+  disk_cache_create_put_job(cache, blob_key, blob, sizeof(blob), NULL);
+   disk_cache_put(dc_job, 0);
+   free(dc_job);
 
result = disk_cache_get(cache, blob_key, );
expect_equal_str(blob, result, "disk_cache_get of existing item (pointer)");
expect_equal(size, sizeof(blob), "disk_cache_get of existing item (size)");
 
free(result);
 
/* Test put and get of a second item. */
_mesa_sha1_compute(string, sizeof(string), string_key);
-   disk_cache_put(cache, string_key, string, sizeof(string));
+   dc_job = disk_cache_create_put_job(cache, string_key, string,
+  sizeof(string), NULL);
+   disk_cache_put(dc_job, 0);
+   free(dc_job);
 
result = disk_cache_get(cache, string_key, );
expect_equal_str(result, string, "2nd disk_cache_get of existing item 
(pointer)");
expect_equal(size, sizeof(string), "2nd disk_cache_get of existing item 
(size)");
 
free(result);
 
/* Set the cache size to 1KB and add a 1KB item to force an eviction. */
disk_cache_destroy(cache);
 
@@ -297,21 +303,23 @@ test_put_and_get(void)
 * That's actually expected given how the eviction code is
 * implemented, (which expects to only evict once things are more
 * interestingly full than that).
 *
 * For this test, we force this signature to land in the same
 * directory as the original blob first written to the cache.
 */
_mesa_sha1_compute(one_KB, 1024, one_KB_key);
one_KB_key[0] = blob_key_byte_zero;
 
-   disk_cache_put(cache, one_KB_key, one_KB, 1024);
+   dc_job = disk_cache_create_put_job(cache, one_KB_key, one_KB, 1024, NULL);
+   disk_cache_put(dc_job, 0);
+   free(dc_job);
 
free(one_KB);
 
result = disk_cache_get(cache, one_KB_key, );
expect_non_null(result, "3rd disk_cache_get of existing item (pointer)");
expect_equal(size, 1024, "3rd disk_cache_get of existing item (size)");
 
free(result);
 
/* Ensure eviction happened by checking that only one of the two
@@ -327,42 +335,51 @@ test_put_and_get(void)
expect_equal(count, 1, "disk_cache_put eviction with MAX_SIZE=1K");
 
/* Now increase the size to 1M, add back both items, and ensure all
 * three that have been added are available via disk_cache_get.
 */
disk_cache_destroy(cache);
 
setenv("MESA_GLSL_CACHE_MAX_SIZE", "1M", 1);
cache = disk_cache_create("test", "make_check");
 
-   disk_cache_put(cache, blob_key, blob, sizeof(blob));
-   disk_cache_put(cache, string_key, string, sizeof(string));
+   dc_job = disk_cache_create_put_job(cache, blob_key, blob, sizeof(blob),
+  

[Mesa-dev] [PATCH 1/8] glsl: don't use ralloc for blob creation

[Timothy Arceri]

There is no need to use ralloc here.
---
 src/compiler/glsl/blob.c |  9 +++--
 src/compiler/glsl/blob.h |  4 ++--
 src/compiler/glsl/shader_cache.cpp   |  4 ++--
 src/compiler/glsl/tests/blob_test.c  | 18 --
 src/mesa/state_tracker/st_shader_cache.c |  4 ++--
 5 files changed, 17 insertions(+), 22 deletions(-)

diff --git a/src/compiler/glsl/blob.c b/src/compiler/glsl/blob.c
index 14dc690..769ebf1 100644
--- a/src/compiler/glsl/blob.c
+++ b/src/compiler/glsl/blob.c
@@ -17,21 +17,20 @@
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  * IN THE SOFTWARE.
  */
 
 #include 
 
 #include "main/macros.h"
-#include "util/ralloc.h"
 #include "blob.h"
 
 #define BLOB_INITIAL_SIZE 4096
 
 /* Ensure that \blob will be able to fit an additional object of size
  * \additional.  The growing (if any) will occur by doubling the existing
  * allocation.
  */
 static bool
 grow_to_fit(struct blob *blob, size_t additional)
@@ -42,21 +41,21 @@ grow_to_fit(struct blob *blob, size_t additional)
if (blob->size + additional <= blob->allocated)
   return true;
 
if (blob->allocated == 0)
   to_allocate = BLOB_INITIAL_SIZE;
else
   to_allocate = blob->allocated * 2;
 
to_allocate = MAX2(to_allocate, blob->allocated + additional);
 
-   new_data = reralloc_size(blob, blob->data, to_allocate);
+   new_data = realloc(blob->data, to_allocate);
if (new_data == NULL)
   return false;
 
blob->data = new_data;
blob->allocated = to_allocate;
 
return true;
 }
 
 /* Align the blob->size so that reading or writing a value at (blob->data +
@@ -81,25 +80,23 @@ align_blob(struct blob *blob, size_t alignment)
return true;
 }
 
 static void
 align_blob_reader(struct blob_reader *blob, size_t alignment)
 {
blob->current = blob->data + ALIGN(blob->current - blob->data, alignment);
 }
 
 struct blob *
-blob_create(void *mem_ctx)
+blob_create()
 {
-   struct blob *blob;
-
-   blob = ralloc(mem_ctx, struct blob);
+   struct blob *blob = (struct blob *) malloc(sizeof(struct blob));
if (blob == NULL)
   return NULL;
 
blob->data = NULL;
blob->allocated = 0;
blob->size = 0;
 
return blob;
 }
 
diff --git a/src/compiler/glsl/blob.h b/src/compiler/glsl/blob.h
index 21fa43d..6d21ffd 100644
--- a/src/compiler/glsl/blob.h
+++ b/src/compiler/glsl/blob.h
@@ -66,26 +66,26 @@ struct blob {
  *   2. blob->overrun should be false, (otherwise, too much was read).
  */
 struct blob_reader {
uint8_t *data;
uint8_t *end;
uint8_t *current;
bool overrun;
 };
 
 /**
- * Create a new, empty blob, belonging to \mem_ctx.
+ * Create a new, empty blob.
  *
  * \return The new blob, (or NULL in case of allocation failure).
  */
 struct blob *
-blob_create(void *mem_ctx);
+blob_create(void);
 
 /**
  * Add some unstructured, fixed-size data to a blob.
  *
  * \return True unless allocation failed.
  */
 bool
 blob_write_bytes(struct blob *blob, const void *bytes, size_t to_write);
 
 /**
diff --git a/src/compiler/glsl/shader_cache.cpp 
b/src/compiler/glsl/shader_cache.cpp
index 4450657..6e2c527 100644
--- a/src/compiler/glsl/shader_cache.cpp
+++ b/src/compiler/glsl/shader_cache.cpp
@@ -1223,21 +1223,21 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
 
/* Exit early when we are dealing with a ff shader with no source file to
 * generate a source from.
 *
 * TODO: In future we should use another method to generate a key for ff
 * programs.
 */
if (*prog->data->sha1 == 0)
   return;
 
-   struct blob *metadata = blob_create(NULL);
+   struct blob *metadata = blob_create();
 
write_uniforms(ctx, metadata, prog);
 
write_hash_tables(metadata, prog);
 
blob_write_uint32(metadata, prog->data->Version);
blob_write_uint32(metadata, prog->data->linked_stages);
 
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
   struct gl_linked_shader *sh = prog->_LinkedShaders[i];
@@ -1271,21 +1271,21 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
for (unsigned i = 0; i < prog->NumShaders; i++) {
   disk_cache_put_key(cache, prog->Shaders[i]->sha1);
   if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
  fprintf(stderr, "marking shader: %s\n",
  _mesa_sha1_format(sha1_buf, prog->Shaders[i]->sha1));
   }
}
 
disk_cache_put(cache, prog->data->sha1, metadata->data, metadata->size);
 
-   ralloc_free(metadata);
+   free(metadata);
 
if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
   fprintf(stderr, "putting program metadata in cache: %s\n",
   _mesa_sha1_format(sha1_buf, prog->data->sha1));
}
 }
 
 bool
 

[Mesa-dev] [PATCH 3/8] util/disk_cache: add helpers for creating/destroying disk cache put jobs

[Timothy Arceri]

---
 src/util/disk_cache.c | 28 
 src/util/disk_cache.h | 39 +++
 2 files changed, 67 insertions(+)

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index 426cc55..37b3576 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -727,20 +727,48 @@ deflate_and_write_to_disk(const void *in_data, size_t 
in_data_size, int dest,
} while (flush != Z_FINISH);
 
/* stream should be complete */
assert(ret == Z_STREAM_END);
 
/* clean up and return */
(void)deflateEnd();
return compressed_size;
 }
 
+struct disk_cache_put_job *
+disk_cache_create_put_job(struct disk_cache *cache, const cache_key key,
+  const void *data, size_t size, void *mem)
+{
+   struct disk_cache_put_job *dc_job = (struct disk_cache_put_job *)
+  malloc(sizeof(struct disk_cache_put_job));
+
+   if (dc_job) {
+  dc_job->cache = cache;
+  memcpy(dc_job->key, key, sizeof(cache_key));
+  dc_job->data = data;
+  dc_job->size = size;
+  dc_job->mem = mem;
+   }
+
+   return dc_job;
+}
+
+void
+disk_cache_destroy_put_job(void *job, int thread_index)
+{
+   if (job) {
+  struct disk_cache_put_job *dc_job = (struct disk_cache_put_job *) job;
+  free(dc_job->mem);
+  free(dc_job);
+   }
+}
+
 struct cache_entry_file_data {
uint32_t crc32;
uint32_t uncompressed_size;
 };
 
 void
 disk_cache_put(struct disk_cache *cache,
   const cache_key key,
   const void *data,
   size_t size)
diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index f707ee4..136140e 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -38,20 +38,40 @@
 extern "C" {
 #endif
 
 /* Size of cache keys in bytes. */
 #define CACHE_KEY_SIZE 20
 
 typedef uint8_t cache_key[CACHE_KEY_SIZE];
 
 struct disk_cache;
 
+struct disk_cache_put_job {
+   struct util_queue_fence fence;
+
+   struct disk_cache *cache;
+
+   cache_key key;
+
+   /* Cache data to be compressed and written. */
+   const void *data;
+
+   /* Size of data to be compressed and written. */
+   size_t size;
+
+   /* Memory to be freed by util_queue_execute_func cleanup.
+*
+* Note: The memory is expected to have been created with ralloc.
+*/
+   void *mem;
+};
+
 static inline const char *
 get_arch_bitness_str(void)
 {
 if (sizeof(void *) == 4)
 #ifdef __ILP32__
 return "ilp-32";
 #else
 return "32";
 #endif
 if (sizeof(void *) == 8)
@@ -119,20 +139,27 @@ disk_cache_create(const char *gpu_name, const char 
*timestamp);
  */
 void
 disk_cache_destroy(struct disk_cache *cache);
 
 /**
  * Remove the item in the cache under the name \key.
  */
 void
 disk_cache_remove(struct disk_cache *cache, const cache_key key);
 
+struct disk_cache_put_job *
+disk_cache_create_put_job(struct disk_cache *cache, const cache_key key,
+  const void *data, size_t size, void *mem);
+
+void
+disk_cache_destroy_put_job(void *job, int thread_index);
+
 /**
  * Store an item in the cache under the name \key.
  *
  * The item can be retrieved later with disk_cache_get(), (unless the item has
  * been evicted in the interim).
  *
  * Any call to disk_cache_put() may cause an existing, random item to be
  * evicted from the cache.
  */
 void
@@ -186,20 +213,32 @@ static inline struct disk_cache *
 disk_cache_create(const char *gpu_name, const char *timestamp)
 {
return NULL;
 }
 
 static inline void
 disk_cache_destroy(struct disk_cache *cache) {
return;
 }
 
+struct disk_cache_put_job *
+disk_cache_create_put_job(struct disk_cache *cache, const cache_key key,
+  const void *data, size_t size, void *mem)
+{
+   return NULL;
+}
+
+static inline void
+disk_cache_destroy_put_job(void *job, int thread_index) {
+   return;
+}
+
 static inline void
 disk_cache_put(struct disk_cache *cache, const cache_key key,
   const void *data, size_t size)
 {
return;
 }
 
 static inline void
 disk_cache_remove(struct disk_cache *cache, const cache_key key)
 {
-- 
2.9.3

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[Mesa-dev] [PATCH 2/8] util/disk_cache: add thread queue to disk cache

[Timothy Arceri]

---
 src/util/disk_cache.c | 15 ++-
 src/util/disk_cache.h |  2 ++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index facdcec..426cc55 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -53,20 +53,23 @@
 /* Mask for computing an index from a key. */
 #define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
 
 /* The number of keys that can be stored in the index. */
 #define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS)
 
 struct disk_cache {
/* The path to the cache directory. */
char *path;
 
+   /* Thread queue for compressing and writing cache entries to disk */
+   struct util_queue cache_queue;
+
/* A pointer to the mmapped index file within the cache directory. */
uint8_t *index_mmap;
size_t index_mmap_size;
 
/* Pointer to total size of all objects in cache (within index_mmap) */
uint64_t *size;
 
/* Pointer to stored keys, (within index_mmap). */
uint8_t *stored_keys;
 
@@ -370,39 +373,49 @@ disk_cache_create(const char *gpu_name, const char 
*timestamp)
  }
   }
}
 
/* Default to 1GB for maximum cache size. */
if (max_size == 0)
   max_size = 1024*1024*1024;
 
cache->max_size = max_size;
 
+   /* A limit of 32 jobs was choosen as observations of Deus Ex start-up times
+* showed that we reached at most 11 jobs on an Intel i5-6400 CPU@2.70GHz
+* (a fairly modist desktop CPU). 1 thread was choosen because we don't
+* really care about getting things to disk quickly just that it's not
+* blocking other tasks.
+*/
+   util_queue_init(>cache_queue, "disk_cache", 32, 1);
+
ralloc_free(local);
 
return cache;
 
  fail:
if (fd != -1)
   close(fd);
if (cache)
   ralloc_free(cache);
ralloc_free(local);
 
return NULL;
 }
 
 void
 disk_cache_destroy(struct disk_cache *cache)
 {
-   if (cache)
+   if (cache) {
+  util_queue_destroy(>cache_queue);
   munmap(cache->index_mmap, cache->index_mmap_size);
+   }
 
ralloc_free(cache);
 }
 
 /* Return a filename within the cache's directory corresponding to 'key'. The
  * returned filename is ralloced with 'cache' as the parent context.
  *
  * Returns NULL if out of memory.
  */
 static char *
diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index 3659b6d..f707ee4 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -25,20 +25,22 @@
 #define DISK_CACHE_H
 
 #ifdef ENABLE_SHADER_CACHE
 #include 
 #endif
 #include 
 #include 
 #include 
 #include 
 
+#include "util/u_queue.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* Size of cache keys in bytes. */
 #define CACHE_KEY_SIZE 20
 
 typedef uint8_t cache_key[CACHE_KEY_SIZE];
 
 struct disk_cache;
-- 
2.9.3

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[Mesa-dev] RFC Thread queue for shader cache compression/writes (real)

[Timothy Arceri]

This series was created to attempt to address regressions in compile times
cause by the shader cache when the cache is cold. However my testing has
shown no noticable change either way in start-up times of Deus Ex on my
Intel i5-6400 CPU.

The reports were for slow compression times on an older AMD cpu so maybe
it will help more there.

It's also possible this will help in-game but I have no stats for that
currently.

While working on this I found the major cause of the regression in compile
times and fixed it here [1].

For this to apply there are still some patches on the list that need to
be reviewed and land in master [2] [3].

[1] https://lists.freedesktop.org/archives/mesa-dev/2017-March/147324.html
[2] https://patchwork.freedesktop.org/series/20872/
[3] https://patchwork.freedesktop.org/series/20873/

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[Mesa-dev] [PATCH 4/8] glsl: don't recompile a shader on fallback unless needed

[Timothy Arceri]

Because we optimistically skip compiling shaders if we have seen them
before we may need to compile them later at link time if they haven't
yet been use in a specific combination to create a program.

Rather than always recompiling we take advantage of the
gl_compile_status enum introduced in the previous patch to only
compile when we have previously skipped compilation.

This should help with regressions in app start-up times on cold cache
runs, compared with no cache.
---
 src/compiler/glsl/glsl_parser_extras.cpp | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/compiler/glsl/glsl_parser_extras.cpp 
b/src/compiler/glsl/glsl_parser_extras.cpp
index 59114a7..776636c 100644
--- a/src/compiler/glsl/glsl_parser_extras.cpp
+++ b/src/compiler/glsl/glsl_parser_extras.cpp
@@ -1945,20 +1945,27 @@ _mesa_glsl_compile_shader(struct gl_context *ctx, 
struct gl_shader *shader,
  if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
 fprintf(stderr, "deferring compile of shader: %s\n",
 _mesa_sha1_format(buf, shader->sha1));
  }
  shader->CompileStatus = compile_skipped;
 
  free((void *)shader->FallbackSource);
  shader->FallbackSource = NULL;
  return;
   }
+   } else {
+  /* We should only ever end up here if a re-compile has been forced by a
+   * shader cache miss. In which case we can skip the compile if its
+   * already be done by a previous fallback or the initial compile call.
+   */
+  if (shader->CompileStatus == compile_success)
+ return;
}
 
if (!state->error) {
  _mesa_glsl_lexer_ctor(state, source);
  _mesa_glsl_parse(state);
  _mesa_glsl_lexer_dtor(state);
  do_late_parsing_checks(state);
}
 
if (dump_ast) {
-- 
2.9.3

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[Mesa-dev] [PATCH 6/8] util/disk_cache: add thread queue to disk cache

[Timothy Arceri]

---
 src/util/disk_cache.c | 15 ++-
 src/util/disk_cache.h |  2 ++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index facdcec..426cc55 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -53,20 +53,23 @@
 /* Mask for computing an index from a key. */
 #define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
 
 /* The number of keys that can be stored in the index. */
 #define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS)
 
 struct disk_cache {
/* The path to the cache directory. */
char *path;
 
+   /* Thread queue for compressing and writing cache entries to disk */
+   struct util_queue cache_queue;
+
/* A pointer to the mmapped index file within the cache directory. */
uint8_t *index_mmap;
size_t index_mmap_size;
 
/* Pointer to total size of all objects in cache (within index_mmap) */
uint64_t *size;
 
/* Pointer to stored keys, (within index_mmap). */
uint8_t *stored_keys;
 
@@ -370,39 +373,49 @@ disk_cache_create(const char *gpu_name, const char 
*timestamp)
  }
   }
}
 
/* Default to 1GB for maximum cache size. */
if (max_size == 0)
   max_size = 1024*1024*1024;
 
cache->max_size = max_size;
 
+   /* A limit of 32 jobs was choosen as observations of Deus Ex start-up times
+* showed that we reached at most 11 jobs on an Intel i5-6400 CPU@2.70GHz
+* (a fairly modist desktop CPU). 1 thread was choosen because we don't
+* really care about getting things to disk quickly just that it's not
+* blocking other tasks.
+*/
+   util_queue_init(>cache_queue, "disk_cache", 32, 1);
+
ralloc_free(local);
 
return cache;
 
  fail:
if (fd != -1)
   close(fd);
if (cache)
   ralloc_free(cache);
ralloc_free(local);
 
return NULL;
 }
 
 void
 disk_cache_destroy(struct disk_cache *cache)
 {
-   if (cache)
+   if (cache) {
+  util_queue_destroy(>cache_queue);
   munmap(cache->index_mmap, cache->index_mmap_size);
+   }
 
ralloc_free(cache);
 }
 
 /* Return a filename within the cache's directory corresponding to 'key'. The
  * returned filename is ralloced with 'cache' as the parent context.
  *
  * Returns NULL if out of memory.
  */
 static char *
diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index 3659b6d..f707ee4 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -25,20 +25,22 @@
 #define DISK_CACHE_H
 
 #ifdef ENABLE_SHADER_CACHE
 #include 
 #endif
 #include 
 #include 
 #include 
 #include 
 
+#include "util/u_queue.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* Size of cache keys in bytes. */
 #define CACHE_KEY_SIZE 20
 
 typedef uint8_t cache_key[CACHE_KEY_SIZE];
 
 struct disk_cache;
-- 
2.9.3

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[Mesa-dev] RFC Thread queue for shader cache compression/writes

[Timothy Arceri]

This series was created to attempt to address regressions in compile times
cause by the shader cache when the cache is cold. However my testing has
shown no noticable change either way in start-up times of Deus Ex on my
Intel i5-6400 CPU.

The reports were for slow compression times on an older AMD cpu so maybe
it will help more there.

It's also possible this will help in-game but I have no stats for that
currently.

While working on this I found the major cause of the regression in compile
times and fixed it here [1].

For this to apply there are still some patches on the list that need to
be reviewed and land in master [2] [3].

[1] https://lists.freedesktop.org/archives/mesa-dev/2017-March/147324.html
[2] https://patchwork.freedesktop.org/series/20872/
[3] https://patchwork.freedesktop.org/series/20873/

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[Mesa-dev] [PATCH 5/8] glsl: don't use ralloc for blob creation

[Timothy Arceri]

There is no need to use ralloc here.
---
 src/compiler/glsl/blob.c |  9 +++--
 src/compiler/glsl/blob.h |  4 ++--
 src/compiler/glsl/shader_cache.cpp   |  4 ++--
 src/compiler/glsl/tests/blob_test.c  | 18 --
 src/mesa/state_tracker/st_shader_cache.c |  4 ++--
 5 files changed, 17 insertions(+), 22 deletions(-)

diff --git a/src/compiler/glsl/blob.c b/src/compiler/glsl/blob.c
index 14dc690..769ebf1 100644
--- a/src/compiler/glsl/blob.c
+++ b/src/compiler/glsl/blob.c
@@ -17,21 +17,20 @@
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  * IN THE SOFTWARE.
  */
 
 #include 
 
 #include "main/macros.h"
-#include "util/ralloc.h"
 #include "blob.h"
 
 #define BLOB_INITIAL_SIZE 4096
 
 /* Ensure that \blob will be able to fit an additional object of size
  * \additional.  The growing (if any) will occur by doubling the existing
  * allocation.
  */
 static bool
 grow_to_fit(struct blob *blob, size_t additional)
@@ -42,21 +41,21 @@ grow_to_fit(struct blob *blob, size_t additional)
if (blob->size + additional <= blob->allocated)
   return true;
 
if (blob->allocated == 0)
   to_allocate = BLOB_INITIAL_SIZE;
else
   to_allocate = blob->allocated * 2;
 
to_allocate = MAX2(to_allocate, blob->allocated + additional);
 
-   new_data = reralloc_size(blob, blob->data, to_allocate);
+   new_data = realloc(blob->data, to_allocate);
if (new_data == NULL)
   return false;
 
blob->data = new_data;
blob->allocated = to_allocate;
 
return true;
 }
 
 /* Align the blob->size so that reading or writing a value at (blob->data +
@@ -81,25 +80,23 @@ align_blob(struct blob *blob, size_t alignment)
return true;
 }
 
 static void
 align_blob_reader(struct blob_reader *blob, size_t alignment)
 {
blob->current = blob->data + ALIGN(blob->current - blob->data, alignment);
 }
 
 struct blob *
-blob_create(void *mem_ctx)
+blob_create()
 {
-   struct blob *blob;
-
-   blob = ralloc(mem_ctx, struct blob);
+   struct blob *blob = (struct blob *) malloc(sizeof(struct blob));
if (blob == NULL)
   return NULL;
 
blob->data = NULL;
blob->allocated = 0;
blob->size = 0;
 
return blob;
 }
 
diff --git a/src/compiler/glsl/blob.h b/src/compiler/glsl/blob.h
index 21fa43d..6d21ffd 100644
--- a/src/compiler/glsl/blob.h
+++ b/src/compiler/glsl/blob.h
@@ -66,26 +66,26 @@ struct blob {
  *   2. blob->overrun should be false, (otherwise, too much was read).
  */
 struct blob_reader {
uint8_t *data;
uint8_t *end;
uint8_t *current;
bool overrun;
 };
 
 /**
- * Create a new, empty blob, belonging to \mem_ctx.
+ * Create a new, empty blob.
  *
  * \return The new blob, (or NULL in case of allocation failure).
  */
 struct blob *
-blob_create(void *mem_ctx);
+blob_create(void);
 
 /**
  * Add some unstructured, fixed-size data to a blob.
  *
  * \return True unless allocation failed.
  */
 bool
 blob_write_bytes(struct blob *blob, const void *bytes, size_t to_write);
 
 /**
diff --git a/src/compiler/glsl/shader_cache.cpp 
b/src/compiler/glsl/shader_cache.cpp
index 4450657..6e2c527 100644
--- a/src/compiler/glsl/shader_cache.cpp
+++ b/src/compiler/glsl/shader_cache.cpp
@@ -1223,21 +1223,21 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
 
/* Exit early when we are dealing with a ff shader with no source file to
 * generate a source from.
 *
 * TODO: In future we should use another method to generate a key for ff
 * programs.
 */
if (*prog->data->sha1 == 0)
   return;
 
-   struct blob *metadata = blob_create(NULL);
+   struct blob *metadata = blob_create();
 
write_uniforms(ctx, metadata, prog);
 
write_hash_tables(metadata, prog);
 
blob_write_uint32(metadata, prog->data->Version);
blob_write_uint32(metadata, prog->data->linked_stages);
 
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
   struct gl_linked_shader *sh = prog->_LinkedShaders[i];
@@ -1271,21 +1271,21 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
for (unsigned i = 0; i < prog->NumShaders; i++) {
   disk_cache_put_key(cache, prog->Shaders[i]->sha1);
   if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
  fprintf(stderr, "marking shader: %s\n",
  _mesa_sha1_format(sha1_buf, prog->Shaders[i]->sha1));
   }
}
 
disk_cache_put(cache, prog->data->sha1, metadata->data, metadata->size);
 
-   ralloc_free(metadata);
+   free(metadata);
 
if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
   fprintf(stderr, "putting program metadata in cache: %s\n",
   _mesa_sha1_format(sha1_buf, prog->data->sha1));
}
 }
 
 bool
 

[Mesa-dev] [PATCH 8/8] util/disk_cache: make disk_cache_put() compatible with u_queue

[Timothy Arceri]

---
 src/compiler/glsl/shader_cache.cpp  |  5 -
 src/gallium/drivers/radeonsi/si_state_shaders.c |  9 +++--
 src/mesa/state_tracker/st_shader_cache.c|  5 -
 src/util/disk_cache.c   | 27 ++---
 src/util/disk_cache.h   |  7 ++-
 5 files changed, 32 insertions(+), 21 deletions(-)

diff --git a/src/compiler/glsl/shader_cache.cpp 
b/src/compiler/glsl/shader_cache.cpp
index 6e2c527..1865e96 100644
--- a/src/compiler/glsl/shader_cache.cpp
+++ b/src/compiler/glsl/shader_cache.cpp
@@ -1269,21 +1269,24 @@ shader_cache_write_program_metadata(struct gl_context 
*ctx,
 
char sha1_buf[41];
for (unsigned i = 0; i < prog->NumShaders; i++) {
   disk_cache_put_key(cache, prog->Shaders[i]->sha1);
   if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
  fprintf(stderr, "marking shader: %s\n",
  _mesa_sha1_format(sha1_buf, prog->Shaders[i]->sha1));
   }
}
 
-   disk_cache_put(cache, prog->data->sha1, metadata->data, metadata->size);
+   struct disk_cache_put_job *dc_job =
+  disk_cache_create_put_job(cache, prog->data->sha1, metadata->data,
+metadata->size, metadata);
+   disk_cache_put(dc_job, 0);
 
free(metadata);
 
if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
   fprintf(stderr, "putting program metadata in cache: %s\n",
   _mesa_sha1_format(sha1_buf, prog->data->sha1));
}
 }
 
 bool
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 9cde0aa..343cb83 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -201,22 +201,27 @@ static bool si_shader_cache_insert_shader(struct 
si_screen *sscreen,
return false;
 
if (_mesa_hash_table_insert(sscreen->shader_cache, tgsi_binary,
hw_binary) == NULL) {
FREE(hw_binary);
return false;
}
 
if (sscreen->b.disk_shader_cache && insert_into_disk_cache) {
_mesa_sha1_compute(tgsi_binary, *((uint32_t *)tgsi_binary), 
key);
-   disk_cache_put(sscreen->b.disk_shader_cache, key, hw_binary,
-  *((uint32_t *) hw_binary));
+
+   struct disk_cache_put_job *dc_job =
+   disk_cache_create_put_job(sscreen->b.disk_shader_cache,
+ key, hw_binary,
+ *((uint32_t *) hw_binary),
+ NULL);
+   disk_cache_put(dc_job, 0);
}
 
return true;
 }
 
 static bool si_shader_cache_load_shader(struct si_screen *sscreen,
void *tgsi_binary,
struct si_shader *shader)
 {
struct hash_entry *entry =
diff --git a/src/mesa/state_tracker/st_shader_cache.c 
b/src/mesa/state_tracker/st_shader_cache.c
index 4383194..040fbc1 100644
--- a/src/mesa/state_tracker/st_shader_cache.c
+++ b/src/mesa/state_tracker/st_shader_cache.c
@@ -40,21 +40,24 @@ write_stream_out_to_cache(struct blob *blob,
 
 static void
 write_tgsi_to_cache(struct blob *blob, struct pipe_shader_state *tgsi,
 struct st_context *st, unsigned char *sha1,
 unsigned num_tokens)
 {
blob_write_uint32(blob, num_tokens);
blob_write_bytes(blob, tgsi->tokens,
 num_tokens * sizeof(struct tgsi_token));
 
-   disk_cache_put(st->ctx->Cache, sha1, blob->data, blob->size);
+   struct disk_cache_put_job *dc_job =
+  disk_cache_create_put_job(st->ctx->Cache, sha1, blob->data, blob->size,
+blob);
+   disk_cache_put(dc_job, 0);
 }
 
 /**
  * Store tgsi and any other required state in on-disk shader cache.
  */
 void
 st_store_tgsi_in_disk_cache(struct st_context *st, struct gl_program *prog,
 struct pipe_shader_state *out_state,
 unsigned num_tokens)
 {
diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index 37b3576..e0b540c 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -761,48 +761,50 @@ disk_cache_destroy_put_job(void *job, int thread_index)
   free(dc_job);
}
 }
 
 struct cache_entry_file_data {
uint32_t crc32;
uint32_t uncompressed_size;
 };
 
 void
-disk_cache_put(struct disk_cache *cache,
-  const cache_key key,
-  const void *data,
-  size_t size)
+disk_cache_put(void *job, int thread_index)
 {
+   if (!job)
+  return;
+
+   struct disk_cache_put_job *dc_job = (struct disk_cache_put_job *) job;
+
int fd = -1, fd_final = -1, err, ret;
size_t len;
char *filename = NULL, *filename_tmp = NULL;
 
-   filename = get_cache_file(cache, key);
+   filename = 

[Mesa-dev] [PATCH 7/8] util/disk_cache: add helpers for creating/destroying disk cache put jobs

[Timothy Arceri]

---
 src/util/disk_cache.c | 28 
 src/util/disk_cache.h | 39 +++
 2 files changed, 67 insertions(+)

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index 426cc55..37b3576 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -727,20 +727,48 @@ deflate_and_write_to_disk(const void *in_data, size_t 
in_data_size, int dest,
} while (flush != Z_FINISH);
 
/* stream should be complete */
assert(ret == Z_STREAM_END);
 
/* clean up and return */
(void)deflateEnd();
return compressed_size;
 }
 
+struct disk_cache_put_job *
+disk_cache_create_put_job(struct disk_cache *cache, const cache_key key,
+  const void *data, size_t size, void *mem)
+{
+   struct disk_cache_put_job *dc_job = (struct disk_cache_put_job *)
+  malloc(sizeof(struct disk_cache_put_job));
+
+   if (dc_job) {
+  dc_job->cache = cache;
+  memcpy(dc_job->key, key, sizeof(cache_key));
+  dc_job->data = data;
+  dc_job->size = size;
+  dc_job->mem = mem;
+   }
+
+   return dc_job;
+}
+
+void
+disk_cache_destroy_put_job(void *job, int thread_index)
+{
+   if (job) {
+  struct disk_cache_put_job *dc_job = (struct disk_cache_put_job *) job;
+  free(dc_job->mem);
+  free(dc_job);
+   }
+}
+
 struct cache_entry_file_data {
uint32_t crc32;
uint32_t uncompressed_size;
 };
 
 void
 disk_cache_put(struct disk_cache *cache,
   const cache_key key,
   const void *data,
   size_t size)
diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index f707ee4..136140e 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -38,20 +38,40 @@
 extern "C" {
 #endif
 
 /* Size of cache keys in bytes. */
 #define CACHE_KEY_SIZE 20
 
 typedef uint8_t cache_key[CACHE_KEY_SIZE];
 
 struct disk_cache;
 
+struct disk_cache_put_job {
+   struct util_queue_fence fence;
+
+   struct disk_cache *cache;
+
+   cache_key key;
+
+   /* Cache data to be compressed and written. */
+   const void *data;
+
+   /* Size of data to be compressed and written. */
+   size_t size;
+
+   /* Memory to be freed by util_queue_execute_func cleanup.
+*
+* Note: The memory is expected to have been created with ralloc.
+*/
+   void *mem;
+};
+
 static inline const char *
 get_arch_bitness_str(void)
 {
 if (sizeof(void *) == 4)
 #ifdef __ILP32__
 return "ilp-32";
 #else
 return "32";
 #endif
 if (sizeof(void *) == 8)
@@ -119,20 +139,27 @@ disk_cache_create(const char *gpu_name, const char 
*timestamp);
  */
 void
 disk_cache_destroy(struct disk_cache *cache);
 
 /**
  * Remove the item in the cache under the name \key.
  */
 void
 disk_cache_remove(struct disk_cache *cache, const cache_key key);
 
+struct disk_cache_put_job *
+disk_cache_create_put_job(struct disk_cache *cache, const cache_key key,
+  const void *data, size_t size, void *mem);
+
+void
+disk_cache_destroy_put_job(void *job, int thread_index);
+
 /**
  * Store an item in the cache under the name \key.
  *
  * The item can be retrieved later with disk_cache_get(), (unless the item has
  * been evicted in the interim).
  *
  * Any call to disk_cache_put() may cause an existing, random item to be
  * evicted from the cache.
  */
 void
@@ -186,20 +213,32 @@ static inline struct disk_cache *
 disk_cache_create(const char *gpu_name, const char *timestamp)
 {
return NULL;
 }
 
 static inline void
 disk_cache_destroy(struct disk_cache *cache) {
return;
 }
 
+struct disk_cache_put_job *
+disk_cache_create_put_job(struct disk_cache *cache, const cache_key key,
+  const void *data, size_t size, void *mem)
+{
+   return NULL;
+}
+
+static inline void
+disk_cache_destroy_put_job(void *job, int thread_index) {
+   return;
+}
+
 static inline void
 disk_cache_put(struct disk_cache *cache, const cache_key key,
   const void *data, size_t size)
 {
return;
 }
 
 static inline void
 disk_cache_remove(struct disk_cache *cache, const cache_key key)
 {
-- 
2.9.3

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[Mesa-dev] [PATCH 3/8] mesa/glsl: introduce new gl_compile_status enum

[Timothy Arceri]

This will allow us to tell if a shader really has been compiled or
if the shader cache has just seen it before.
---
 src/compiler/glsl/glsl_parser_extras.cpp |  4 ++--
 src/mesa/drivers/common/meta.c   |  2 +-
 src/mesa/main/ff_fragment_shader.cpp |  2 +-
 src/mesa/main/mtypes.h   | 14 +-
 src/mesa/main/shaderapi.c|  6 +++---
 5 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/src/compiler/glsl/glsl_parser_extras.cpp 
b/src/compiler/glsl/glsl_parser_extras.cpp
index 44fb46a..59114a7 100644
--- a/src/compiler/glsl/glsl_parser_extras.cpp
+++ b/src/compiler/glsl/glsl_parser_extras.cpp
@@ -1939,21 +1939,21 @@ _mesa_glsl_compile_shader(struct gl_context *ctx, 
struct gl_shader *shader,
 
if (!force_recompile) {
   char buf[41];
   _mesa_sha1_compute(source, strlen(source), shader->sha1);
   if (ctx->Cache && disk_cache_has_key(ctx->Cache, shader->sha1)) {
  /* We've seen this shader before and know it compiles */
  if (ctx->_Shader->Flags & GLSL_CACHE_INFO) {
 fprintf(stderr, "deferring compile of shader: %s\n",
 _mesa_sha1_format(buf, shader->sha1));
  }
- shader->CompileStatus = true;
+ shader->CompileStatus = compile_skipped;
 
  free((void *)shader->FallbackSource);
  shader->FallbackSource = NULL;
  return;
   }
}
 
if (!state->error) {
  _mesa_glsl_lexer_ctor(state, source);
  _mesa_glsl_parse(state);
@@ -2027,21 +2027,21 @@ _mesa_glsl_compile_shader(struct gl_context *ctx, 
struct gl_shader *shader,
   validate_ir_tree(shader->ir);
}
 
if (shader->InfoLog)
   ralloc_free(shader->InfoLog);
 
if (!state->error)
   set_shader_inout_layout(shader, state);
 
shader->symbols = new(shader->ir) glsl_symbol_table;
-   shader->CompileStatus = !state->error;
+   shader->CompileStatus = state->error ? compile_failure : compile_success;
shader->InfoLog = state->info_log;
shader->Version = state->language_version;
shader->IsES = state->es_shader;
 
/* Retain any live IR, but trash the rest. */
reparent_ir(shader->ir, shader->ir);
 
/* Destroy the symbol table.  Create a new symbol table that contains only
 * the variables and functions that still exist in the IR.  The symbol
 * table will be used later during linking.
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 2db4668..d8deaaf 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -124,21 +124,21 @@ _mesa_meta_framebuffer_texture_image(struct gl_context 
*ctx,
 
 static struct gl_shader *
 meta_compile_shader_with_debug(struct gl_context *ctx, gl_shader_stage stage,
const GLcharARB *source)
 {
const GLuint name = ~0;
struct gl_shader *sh;
 
sh = _mesa_new_shader(name, stage);
sh->Source = strdup(source);
-   sh->CompileStatus = false;
+   sh->CompileStatus = compile_failure;
_mesa_compile_shader(ctx, sh);
 
if (!sh->CompileStatus) {
   if (sh->InfoLog) {
  _mesa_problem(ctx,
"meta program compile failed:\n%s\nsource:\n%s\n",
sh->InfoLog, source);
   }
 
   _mesa_reference_shader(ctx, , NULL);
diff --git a/src/mesa/main/ff_fragment_shader.cpp 
b/src/mesa/main/ff_fragment_shader.cpp
index b2942f1..be382fa 100644
--- a/src/mesa/main/ff_fragment_shader.cpp
+++ b/src/mesa/main/ff_fragment_shader.cpp
@@ -1266,21 +1266,21 @@ create_new_program(struct gl_context *ctx, struct 
state_key *key)
 
/* Conservative approach: Don't optimize here, the linker does it too. */
if (!ctx->Const.GLSLOptimizeConservatively) {
   while (do_common_optimization(p.shader->ir, false, false, options,
 ctx->Const.NativeIntegers))
  ;
}
 
reparent_ir(p.shader->ir, p.shader->ir);
 
-   p.shader->CompileStatus = true;
+   p.shader->CompileStatus = compile_success;
p.shader->Version = state->language_version;
p.shader_program->Shaders =
   (gl_shader **)malloc(sizeof(*p.shader_program->Shaders));
p.shader_program->Shaders[0] = p.shader;
p.shader_program->NumShaders = 1;
 
_mesa_glsl_link_shader(ctx, p.shader_program);
 
if (!p.shader_program->data->LinkStatus)
   _mesa_problem(ctx, "Failed to link fixed function fragment shader: %s\n",
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 28be54d..261ad36 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2393,36 +2393,48 @@ static inline GLbitfield gl_external_samplers(struct 
gl_program *prog)
while (mask) {
   int idx = u_bit_scan();
   if (prog->sh.SamplerTargets[idx] == TEXTURE_EXTERNAL_INDEX)
  external_samplers |= (1 << idx);
}
 
return external_samplers;
 }
 
 /**
+ * Compile status enum. compile_skipped is used to indicate the compile
+ * was 

[Mesa-dev] [PATCH 2/8] gallium/util: replace pipe_thread_setname() with u_thread_setname()

[Timothy Arceri]

They do the same thing we are just moving the function to be
accessible to all of Mesa.
---
 src/gallium/auxiliary/os/os_thread.h | 12 
 src/gallium/drivers/llvmpipe/lp_rast.c   |  2 +-
 src/gallium/state_trackers/nine/nine_state.c |  4 ++--
 3 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/src/gallium/auxiliary/os/os_thread.h 
b/src/gallium/auxiliary/os/os_thread.h
index ecd8f8a..b6e0698 100644
--- a/src/gallium/auxiliary/os/os_thread.h
+++ b/src/gallium/auxiliary/os/os_thread.h
@@ -35,32 +35,20 @@
 
 #ifndef OS_THREAD_H_
 #define OS_THREAD_H_
 
 
 #include "pipe/p_compiler.h"
 #include "util/u_debug.h" /* for assert */
 #include "util/u_thread.h"
 
 
-static inline void pipe_thread_setname( const char *name )
-{
-#if defined(HAVE_PTHREAD)
-#  if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && 
defined(__GLIBC_MINOR__) && \
-  (__GLIBC__ >= 3 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 12))
-   pthread_setname_np(pthread_self(), name);
-#  endif
-#endif
-   (void)name;
-}
-
-
 static inline int pipe_thread_is_self( thrd_t thread )
 {
 #if defined(HAVE_PTHREAD)
 #  if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && 
defined(__GLIBC_MINOR__) && \
   (__GLIBC__ >= 3 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 12))
return pthread_equal(pthread_self(), thread);
 #  endif
 #endif
return 0;
 }
diff --git a/src/gallium/drivers/llvmpipe/lp_rast.c 
b/src/gallium/drivers/llvmpipe/lp_rast.c
index d746778..b25ade3 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast.c
@@ -784,21 +784,21 @@ lp_rast_finish( struct lp_rasterizer *rast )
 static int
 thread_function(void *init_data)
 {
struct lp_rasterizer_task *task = (struct lp_rasterizer_task *) init_data;
struct lp_rasterizer *rast = task->rast;
boolean debug = false;
char thread_name[16];
unsigned fpstate;
 
util_snprintf(thread_name, sizeof thread_name, "llvmpipe-%u", 
task->thread_index);
-   pipe_thread_setname(thread_name);
+   u_thread_setname(thread_name);
 
/* Make sure that denorms are treated like zeros. This is 
 * the behavior required by D3D10. OpenGL doesn't care.
 */
fpstate = util_fpstate_get();
util_fpstate_set_denorms_to_zero(fpstate);
 
while (1) {
   /* wait for work */
   if (debug)
diff --git a/src/gallium/state_trackers/nine/nine_state.c 
b/src/gallium/state_trackers/nine/nine_state.c
index ef33942..26c21f2 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -88,21 +88,21 @@ nine_csmt_wait_processed(struct csmt_context *ctx)
 
 /* CSMT worker thread */
 static
 int
 nine_csmt_worker(void *arg)
 {
 struct csmt_context *ctx = arg;
 struct csmt_instruction *instr;
 DBG("CSMT worker spawned\n");
 
-pipe_thread_setname("CSMT-Worker");
+u_thread_setname("CSMT-Worker");
 
 while (1) {
 nine_queue_wait_flush(ctx->pool);
 mtx_lock(>thread_running);
 
 /* Get instruction. NULL on empty cmdbuf. */
 while (!p_atomic_read(>terminate) &&
(instr = (struct csmt_instruction *)nine_queue_get(ctx->pool))) 
{
 
 /* decode */
@@ -151,21 +151,21 @@ nine_csmt_create( struct NineDevice9 *This )
 if (!ctx->pool) {
 FREE(ctx);
 return NULL;
 }
 cnd_init(>event_processed);
 (void) mtx_init(>mutex_processed, mtx_plain);
 (void) mtx_init(>thread_running, mtx_plain);
 (void) mtx_init(>thread_resume, mtx_plain);
 
 #if DEBUG
-pipe_thread_setname("Main thread");
+u_thread_setname("Main thread");
 #endif
 
 ctx->device = This;
 
 ctx->worker = u_thread_create(nine_csmt_worker, ctx);
 if (!ctx->worker) {
 nine_queue_delete(ctx->pool);
 FREE(ctx);
 return NULL;
 }
-- 
2.9.3

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[Mesa-dev] [PATCH 1/8] gallium/util: replace pipe_thread_get_time_nano() with u_thread_get_time_nano()

[Timothy Arceri]

They do the same thing we are just moving the function to be
accessible to all of Mesa.
---
 src/gallium/auxiliary/os/os_thread.h | 18 +-
 1 file changed, 1 insertion(+), 17 deletions(-)

diff --git a/src/gallium/auxiliary/os/os_thread.h 
b/src/gallium/auxiliary/os/os_thread.h
index 468fbfe..ecd8f8a 100644
--- a/src/gallium/auxiliary/os/os_thread.h
+++ b/src/gallium/auxiliary/os/os_thread.h
@@ -251,38 +251,22 @@ pipe_tsd_set(pipe_tsd *tsd, void *value)
   exit(-1);
}
 }
 
 
 
 /*
  * Thread statistics.
  */
 
-/* Return the time of a thread's CPU time clock. */
-static inline int64_t
-pipe_thread_get_time_nano(thrd_t thread)
-{
-#if defined(PIPE_OS_LINUX) && defined(HAVE_PTHREAD)
-   struct timespec ts;
-   clockid_t cid;
-
-   pthread_getcpuclockid(thread, );
-   clock_gettime(cid, );
-   return (int64_t)ts.tv_sec * 10 + ts.tv_nsec;
-#else
-   return 0;
-#endif
-}
-
 /* Return the time of the current thread's CPU time clock. */
 static inline int64_t
 pipe_current_thread_get_time_nano(void)
 {
 #if defined(HAVE_PTHREAD)
-   return pipe_thread_get_time_nano(pthread_self());
+   return u_thread_get_time_nano(pthread_self());
 #else
return 0;
 #endif
 }
 
 #endif /* OS_THREAD_H_ */
-- 
2.9.3

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[Mesa-dev] [PATCH 2/3] gbm: Introduce modifiers into surface/bo creation

[Ben Widawsky]

The idea behind modifiers like this is that the user of GBM will have
some mechanism to query what properties the hardware supports for its BO
or surface. This information is directly passed in (and stored) so that
the DRI implementation can create an image with the appropriate
attributes.

A getter() will be added later so that the user GBM will be able to
query what modifier should be used.

Only in surface creation, the modifiers are stored until the BO is
actually allocated. In regular buffer allocation, the correct modifier
can (will be, in future patches be chosen at creation time.

v2: Make sure to check if count is non-zero in addition to testing if
calloc fails. (Daniel)

v3: Remove "usage" and "flags" from modifier creation. Requested by
Kristian.

v4: Take advantage of the "INVALID" modifier added by the GET_PLANE2
series.

v5: Don't bother with storing modifiers for gbm_bo_create because that's
a synchronous operation and we can actually select the correct modifier
at create time (done in a later patch) (Jason)

Cc: Kristian Høgsberg 
Cc: Jason Ekstrand 
References (v4): 
https://lists.freedesktop.org/archives/intel-gfx/2017-January/116636.html
Signed-off-by: Ben Widawsky 
Reviewed-by: Eric Engestrom  (v1)
Acked-by: Daniel Stone 
---
 src/egl/drivers/dri2/platform_drm.c  | 19 ---
 src/gbm/backends/dri/gbm_dri.c   | 42 ++--
 src/gbm/gbm-symbols-check|  2 ++
 src/gbm/main/gbm.c   | 29 --
 src/gbm/main/gbm.h   | 12 +
 src/gbm/main/gbmint.h| 12 +++--
 src/mesa/drivers/dri/i965/intel_screen.c | 18 ++
 7 files changed, 119 insertions(+), 15 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index e5e8c60596..cf35ce8a1f 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -230,10 +230,21 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
 
if (dri2_surf->back == NULL)
   return -1;
-   if (dri2_surf->back->bo == NULL)
-  dri2_surf->back->bo = gbm_bo_create(_dpy->gbm_dri->base.base,
- surf->base.width, surf->base.height,
- surf->base.format, surf->base.flags);
+   if (dri2_surf->back->bo == NULL) {
+  if (surf->base.modifiers)
+ dri2_surf->back->bo = 
gbm_bo_create_with_modifiers(_dpy->gbm_dri->base.base,
+surf->base.width, 
surf->base.height,
+surf->base.format,
+
surf->base.modifiers,
+surf->base.count);
+  else
+ dri2_surf->back->bo = gbm_bo_create(_dpy->gbm_dri->base.base,
+ surf->base.width,
+ surf->base.height,
+ surf->base.format,
+ surf->base.flags);
+
+   }
if (dri2_surf->back->bo == NULL)
   return -1;
 
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index 7106dc1229..d45ba94080 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -1023,13 +1023,20 @@ free_bo:
 static struct gbm_bo *
 gbm_dri_bo_create(struct gbm_device *gbm,
   uint32_t width, uint32_t height,
-  uint32_t format, uint32_t usage)
+  uint32_t format, uint32_t usage,
+  const uint64_t *modifiers,
+  const unsigned int count)
 {
struct gbm_dri_device *dri = gbm_dri_device(gbm);
struct gbm_dri_bo *bo;
int dri_format;
unsigned dri_use = 0;
 
+   /* Callers of this may specify a modifier, or a dri usage, but not both. The
+* newer modifier interface deprecates the older usage flags.
+*/
+   assert(!(usage && count));
+
if (usage & GBM_BO_USE_WRITE || dri->image == NULL)
   return create_dumb(gbm, width, height, format, usage);
 
@@ -1087,11 +1094,21 @@ gbm_dri_bo_create(struct gbm_device *gbm,
/* Gallium drivers requires shared in order to get the handle/stride */
dri_use |= __DRI_IMAGE_USE_SHARE;
 
-   bo->image =
-  dri->image->createImage(dri->screen,
-  width, height,
-  dri_format, dri_use,
-  bo);
+   if (!dri->image || dri->image->base.version < 14 ||
+   !dri->image->createImageWithModifiers) {
+  if (modifiers)
+ fprintf(stderr, "Modifiers specified, but DRI is too old\n");
+
+  bo->image = dri->image->createImage(dri->screen, width, height,

[Mesa-dev] [PATCH 1/3] dri: Add an image creation with modifiers

[Ben Widawsky]

Modifiers will be obtains or guessed by the client and passed in during
image creation/import.

This requires bumping the DRIimage version.

As of this patch, the modifiers aren't plumbed all the way down, this
patch simply makes sure the interface level stuff is correct.

v2: Don't allow usage + modifiers

v3: Make NAND actually NAND. Bug introduced in v2. (Jason)

Cc: Kristian Høgsberg 
Cc: Jason Ekstrand 
Signed-off-by: Ben Widawsky 
Reviewed-by: Eric Engestrom  (v1)
Acked-by: Daniel Stone 
---
 include/GL/internal/dri_interface.h  | 27 ++-
 src/gallium/state_trackers/dri/dri2.c|  1 +
 src/mesa/drivers/dri/i965/intel_screen.c | 32 +++-
 3 files changed, 58 insertions(+), 2 deletions(-)

diff --git a/include/GL/internal/dri_interface.h 
b/include/GL/internal/dri_interface.h
index 598d111f33..53fac6fc3c 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -1136,7 +1136,7 @@ struct __DRIdri2ExtensionRec {
  * extensions.
  */
 #define __DRI_IMAGE "DRI_IMAGE"
-#define __DRI_IMAGE_VERSION 13
+#define __DRI_IMAGE_VERSION 14
 
 /**
  * These formats correspond to the similarly named MESA_FORMAT_*
@@ -1257,6 +1257,8 @@ struct __DRIdri2ExtensionRec {
 #define __DRI_IMAGE_ATTRIB_NUM_PLANES   0x2009 /* available in versions 11 */
 
 #define __DRI_IMAGE_ATTRIB_OFFSET 0x200A /* available in versions 13 */
+#define __DRI_IMAGE_ATTRIB_MODIFIER_LOWER 0x200B /* available in versions 14 */
+#define __DRI_IMAGE_ATTRIB_MODIFIER_UPPER 0x200C /* available in versions 14 */
 
 enum __DRIYUVColorSpace {
__DRI_YUV_COLOR_SPACE_UNDEFINED = 0,
@@ -1468,6 +1470,29 @@ struct __DRIimageExtensionRec {
 */
void (*unmapImage)(__DRIcontext *context, __DRIimage *image, void *data);
 
+
+   /**
+* Creates an image with implementation's favorite modifiers.
+*
+* This acts like createImage except there is a list of modifiers passed in
+* which the implementation may selectively use to create the DRIimage. The
+* result should be the implementation selects one modifier (perhaps it 
would
+* hold on to a few and later pick).
+*
+* The created image should be destroyed with destroyImage().
+*
+* Returns the new DRIimage. The chosen modifier can be obtained later on
+* and passed back to things like the kernel's AddFB2 interface.
+*
+* \sa __DRIimageRec::createImage
+*
+* \since 14
+*/
+   __DRIimage *(*createImageWithModifiers)(__DRIscreen *screen,
+   int width, int height, int format,
+   const uint64_t *modifiers,
+   const unsigned int modifier_count,
+   void *loaderPrivate);
 };
 
 
diff --git a/src/gallium/state_trackers/dri/dri2.c 
b/src/gallium/state_trackers/dri/dri2.c
index b50e096443..12e466c6f1 100644
--- a/src/gallium/state_trackers/dri/dri2.c
+++ b/src/gallium/state_trackers/dri/dri2.c
@@ -1413,6 +1413,7 @@ static __DRIimageExtension dri2ImageExtension = {
 .getCapabilities  = dri2_get_capabilities,
 .mapImage = dri2_map_image,
 .unmapImage   = dri2_unmap_image,
+.createImageWithModifiers = NULL,
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index 21786eb54a..3452572874 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -510,9 +510,11 @@ intel_destroy_image(__DRIimage *image)
 }
 
 static __DRIimage *
-intel_create_image(__DRIscreen *dri_screen,
+__intel_create_image(__DRIscreen *dri_screen,
   int width, int height, int format,
   unsigned int use,
+   const uint64_t *modifiers,
+   unsigned count,
   void *loaderPrivate)
 {
__DRIimage *image;
@@ -521,6 +523,12 @@ intel_create_image(__DRIscreen *dri_screen,
int cpp;
unsigned long pitch;
 
+   /* Callers of this may specify a modifier, or a dri usage, but not both. The
+* newer modifier interface deprecates the older usage flags newer modifier
+* interface deprecates the older usage flags.
+*/
+   assert(!(use && count));
+
tiling = I915_TILING_X;
if (use & __DRI_IMAGE_USE_CURSOR) {
   if (width != 64 || height != 64)
@@ -550,6 +558,27 @@ intel_create_image(__DRIscreen *dri_screen,
return image;
 }
 
+static __DRIimage *
+intel_create_image(__DRIscreen *dri_screen,
+  int width, int height, int format,
+  unsigned int use,
+  void *loaderPrivate)
+{
+   return __intel_create_image(dri_screen, width, height, format, use, NULL, 0,
+   loaderPrivate);
+}
+
+static 

[Mesa-dev] [PATCH 0/3] GBM modifier plumbing

[Ben Widawsky]

This is essential the creation and getter for GBM modifiers (via DRI images).

This was the second chunk of the Renderbuffer Decompression series (aka GBM
modifiers). Splitting this up to make merging easier. These patches are simple
plumbing for getting modifiers through the various GBM functions as well as
exposing the new entry points.

Ben Widawsky (3):
  dri: Add an image creation with modifiers
  gbm: Introduce modifiers into surface/bo creation
  gbm: Export a get modifiers

 include/GL/internal/dri_interface.h  | 27 ++-
 src/egl/drivers/dri2/platform_drm.c  | 19 ++--
 src/gallium/state_trackers/dri/dri2.c|  1 +
 src/gbm/backends/dri/gbm_dri.c   | 78 +---
 src/gbm/gbm-symbols-check|  3 ++
 src/gbm/main/gbm.c   | 48 +++-
 src/gbm/main/gbm.h   | 15 ++
 src/gbm/main/gbmint.h| 13 +-
 src/mesa/drivers/dri/i965/intel_screen.c | 50 +++-
 9 files changed, 237 insertions(+), 17 deletions(-)

-- 
2.12.0

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[Mesa-dev] [PATCH 3/3] gbm: Export a get modifiers

[Ben Widawsky]

This patch originally had i965 specific code and was named:
commit 61cd3c52b868cf8cb90b06e53a382a921eb42754
Author: Ben Widawsky 
Date:   Thu Oct 20 18:21:24 2016 -0700

gbm: Get modifiers from DRI

To accomplish this, two new query tokens are added to the extension:
__DRI_IMAGE_ATTRIB_MODIFIER_UPPER
__DRI_IMAGE_ATTRIB_MODIFIER_LOWER

The query extension only supported 32b queries, and modifiers are 64b,
so we needed two of them.

NOTE: The extension version is still set to 13, so none of this will
actually be called.

Signed-off-by: Ben Widawsky 
---
 src/gbm/backends/dri/gbm_dri.c | 36 
 src/gbm/gbm-symbols-check  |  1 +
 src/gbm/main/gbm.c | 19 +++
 src/gbm/main/gbm.h |  3 +++
 src/gbm/main/gbmint.h  |  1 +
 5 files changed, 60 insertions(+)

diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index d45ba94080..2c467127c2 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -39,6 +39,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include  /* dri_interface needs GL types */
 #include 
@@ -53,6 +54,14 @@
 #include "../../../egl/wayland/wayland-drm/wayland-drm.h"
 #endif
 
+#ifndef DRM_FORMAT_MOD_INVALID
+#define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
+#endif
+
+#ifndef DRM_FORMAT_MOD_LINEAR
+#define DRM_FORMAT_MOD_LINEAR 0
+#endif
+
 static __DRIimage *
 dri_lookup_egl_image(__DRIscreen *screen, void *image, void *data)
 {
@@ -735,6 +744,32 @@ gbm_dri_bo_get_offset(struct gbm_bo *_bo, int plane)
return (uint32_t)offset;
 }
 
+static uint64_t
+gbm_dri_bo_get_modifier(struct gbm_bo *_bo)
+{
+   struct gbm_dri_device *dri = gbm_dri_device(_bo->gbm);
+   struct gbm_dri_bo *bo = gbm_dri_bo(_bo);
+
+   if (!dri->image || dri->image->base.version < 14) {
+  errno = ENOSYS;
+  return DRM_FORMAT_MOD_INVALID;
+   }
+
+   /* Dumb buffers have no modifiers */
+   if (!bo->image)
+  return DRM_FORMAT_MOD_LINEAR;
+
+   uint64_t ret = 0;
+   int mod;
+   dri->image->queryImage(bo->image, __DRI_IMAGE_ATTRIB_MODIFIER_UPPER, );
+   ret = (uint64_t)mod << 32;
+
+   dri->image->queryImage(bo->image, __DRI_IMAGE_ATTRIB_MODIFIER_LOWER, );
+   ret |= mod;
+
+   return ret;
+}
+
 static void
 gbm_dri_bo_destroy(struct gbm_bo *_bo)
 {
@@ -1259,6 +1294,7 @@ dri_device_create(int fd)
dri->base.base.bo_get_handle = gbm_dri_bo_get_handle_for_plane;
dri->base.base.bo_get_stride = gbm_dri_bo_get_stride;
dri->base.base.bo_get_offset = gbm_dri_bo_get_offset;
+   dri->base.base.bo_get_modifier = gbm_dri_bo_get_modifier;
dri->base.base.bo_destroy = gbm_dri_bo_destroy;
dri->base.base.destroy = dri_destroy;
dri->base.base.surface_create = gbm_dri_surface_create;
diff --git a/src/gbm/gbm-symbols-check b/src/gbm/gbm-symbols-check
index c137c6cd93..c72fb66b03 100755
--- a/src/gbm/gbm-symbols-check
+++ b/src/gbm/gbm-symbols-check
@@ -23,6 +23,7 @@ gbm_bo_get_handle
 gbm_bo_get_fd
 gbm_bo_get_plane_count
 gbm_bo_get_handle_for_plane
+gbm_bo_get_modifier
 gbm_bo_write
 gbm_bo_set_user_data
 gbm_bo_get_user_data
diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c
index 0fb62657ed..7ceaccdc21 100644
--- a/src/gbm/main/gbm.c
+++ b/src/gbm/main/gbm.c
@@ -280,6 +280,25 @@ gbm_bo_get_handle_for_plane(struct gbm_bo *bo, int plane)
return bo->gbm->bo_get_handle(bo, plane);
 }
 
+/**
+ * Get the chosen modifier for the buffer object
+ *
+ * This function returns the modifier that was chosen for the object. These
+ * properties may be generic, or platform/implementation dependent.
+ *
+ * \param bo The buffer object
+ * \return Returns the selected modifier (chosen by the implementation) for the
+ * BO.
+ * \sa gbm_bo_create_with_modifiers() where possible modifiers are set
+ * \sa gbm_surface_create_with_modifiers() where possible modifiers are set
+ * \sa define DRM_FORMAT_MOD_* in drm_fourcc.h for possible modifiers
+ */
+GBM_EXPORT uint64_t
+gbm_bo_get_modifier(struct gbm_bo *bo)
+{
+   return bo->gbm->bo_get_modifier(bo);
+}
+
 /** Write data into the buffer object
  *
  * If the buffer object was created with the GBM_BO_USE_WRITE flag,
diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
index 5f588dab58..a774b50951 100644
--- a/src/gbm/main/gbm.h
+++ b/src/gbm/main/gbm.h
@@ -327,6 +327,9 @@ gbm_bo_get_handle(struct gbm_bo *bo);
 int
 gbm_bo_get_fd(struct gbm_bo *bo);
 
+uint64_t
+gbm_bo_get_modifier(struct gbm_bo *bo);
+
 int
 gbm_bo_get_plane_count(struct gbm_bo *bo);
 
diff --git a/src/gbm/main/gbmint.h b/src/gbm/main/gbmint.h
index d8c9f6e5d7..5ad85cc80f 100644
--- a/src/gbm/main/gbmint.h
+++ b/src/gbm/main/gbmint.h
@@ -82,6 +82,7 @@ struct gbm_device {
union gbm_bo_handle (*bo_get_handle)(struct gbm_bo *bo, int plane);
uint32_t (*bo_get_stride)(struct gbm_bo *bo, int plane);
int64_t (*bo_get_offset)(struct gbm_bo *bo, int plane);
+   uint64_t (*bo_get_modifier)(struct gbm_bo *bo);
void 

[Mesa-dev] [PATCH 0/3] GBM modifier plumbing

[Ben Widawsky]

This is essential the creation and getter for GBM modifiers (via DRI images).

This was the second chunk of the Renderbuffer Decompression series (aka GBM
modifiers). Splitting this up to make merging easier. These patches are simple
plumbing for getting modifiers through the various GBM functions as well as
exposing the new entry points.

Ben Widawsky (3):
  dri: Add an image creation with modifiers
  gbm: Introduce modifiers into surface/bo creation
  gbm: Export a get modifiers

 include/GL/internal/dri_interface.h  | 27 ++-
 src/egl/drivers/dri2/platform_drm.c  | 19 ++--
 src/gallium/state_trackers/dri/dri2.c|  1 +
 src/gbm/backends/dri/gbm_dri.c   | 78 +---
 src/gbm/gbm-symbols-check|  3 ++
 src/gbm/main/gbm.c   | 48 +++-
 src/gbm/main/gbm.h   | 15 ++
 src/gbm/main/gbmint.h| 13 +-
 src/mesa/drivers/dri/i965/intel_screen.c | 50 +++-
 9 files changed, 237 insertions(+), 17 deletions(-)

-- 
2.12.0

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Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Nanley Chery]

On Thu, Mar 09, 2017 at 05:03:30PM -0800, Jason Ekstrand wrote:
> On Thu, Mar 9, 2017 at 3:35 PM, Nanley Chery  wrote:
> 
> > The PRMs state that this packet is 16 DWORDS long. Ensure that the last
> > three DWORDS are zeroed as required by the hardware when allocating a
> > null surface state.
> >
> > Cc: 
> > Signed-off-by: Nanley Chery 
> > ---
> >  src/intel/isl/isl.c| 2 +-
> >  src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
> >  2 files changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > index 6eb1e93efd..b4bdf2059a 100644
> > --- a/src/intel/isl/isl.c
> > +++ b/src/intel/isl/isl.c
> > @@ -56,7 +56,7 @@ static const struct {
> > [5] = {24, 32,  4},
> > [6] = {24, 32,  4},
> > [7] = {32, 32,  4, 24},
> > -   [8] = {52, 64, 32, 40},
> > +   [8] = {64, 64, 32, 40},
> >
> 
> you're right.  Thanks!
> 
> 
> > [9] = {64, 64, 32, 40},
> >  };
> >
> > diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > index 501531d4ad..f868293217 100644
> > --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > @@ -46,10 +46,9 @@ static uint32_t *
> >  gen8_allocate_surface_state(struct brw_context *brw,
> >  uint32_t *out_offset, int index)
> >  {
> > -   int dwords = brw->gen >= 9 ? 16 : 13;
> > uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> > -  dwords * 4, 64, index, out_offset);
> > -   memset(surf, 0, dwords * 4);
> > +  64, 64, index, out_offset);
> > +   memset(surf, 0, 64);
> >
> 
> Actually, ISL (well, more like gen8_pack.h) does this for us when it fills
> out the surface state so the memset isn't needed.
> 
> 

This is done for the only surface state that ISL doesn't fill. See
gen8_emit_null_surface_state().
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Re: [Mesa-dev] [PATCH] i965: Move brw_init_compaction_tables() to brw_create_compiler().

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 4:06 PM, Matt Turner  wrote:

> ... so that we can avoid threading complications or unnecessary
> compaction table initializations (which just consists of setting some
> pointers based on devinfo->gen).
> ---
>  src/mesa/drivers/dri/i965/brw_compiler.c   | 2 ++
>  src/mesa/drivers/dri/i965/brw_eu.c | 2 --
>  src/mesa/drivers/dri/i965/brw_eu_compact.c | 5 -
>  3 files changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c
> b/src/mesa/drivers/dri/i965/brw_compiler.c
> index fcad570..cd9473f 100644
> --- a/src/mesa/drivers/dri/i965/brw_compiler.c
> +++ b/src/mesa/drivers/dri/i965/brw_compiler.c
> @@ -23,6 +23,7 @@
>
>  #include "brw_compiler.h"
>  #include "brw_shader.h"
> +#include "brw_eu.h"
>  #include "common/gen_debug.h"
>  #include "compiler/nir/nir.h"
>  #include "main/errors.h"
> @@ -107,6 +108,7 @@ brw_compiler_create(void *mem_ctx, const struct
> gen_device_info *devinfo)
>
> brw_fs_alloc_reg_sets(compiler);
> brw_vec4_alloc_reg_set(compiler);
> +   brw_init_compaction_tables(devinfo);
>

Technically, you can call brw_compiler_create arbitrarily many times but
that's not really a thing that's going to happen.  It's also not really a
problem.  So

Reviewed-by: Jason Ekstrand 


>
> compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG",
> false);
>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu.c
> b/src/mesa/drivers/dri/i965/brw_eu.c
> index 1344f2b..d280ffd 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu.c
> @@ -354,8 +354,6 @@ brw_init_codegen(const struct gen_device_info *devinfo,
> p->loop_stack_array_size = 16;
> p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
> p->if_depth_in_loop = rzalloc_array(mem_ctx, int,
> p->loop_stack_array_size);
> -
> -   brw_init_compaction_tables(devinfo);
>  }
>
>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c
> b/src/mesa/drivers/dri/i965/brw_eu_compact.c
> index 5b8e9b2..b2af76d 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
> @@ -76,7 +76,6 @@
>  #include "brw_shader.h"
>  #include "intel_asm_annotation.h"
>  #include "common/gen_debug.h"
> -#include "util/u_atomic.h" /* for p_atomic_cmpxchg */
>
>  static const uint32_t g45_control_index_table[32] = {
> 0b0,
> @@ -1345,10 +1344,6 @@ update_gen4_jump_count(const struct gen_device_info
> *devinfo, brw_inst *insn,
>  void
>  brw_init_compaction_tables(const struct gen_device_info *devinfo)
>  {
> -   static bool initialized;
> -   if (initialized || p_atomic_cmpxchg(, false, true) !=
> false)
> -  return;
> -
> assert(g45_control_index_table[ARRAY_SIZE(g45_control_index_table) -
> 1] != 0);
> assert(g45_datatype_table[ARRAY_SIZE(g45_datatype_table) - 1] != 0);
> assert(g45_subreg_table[ARRAY_SIZE(g45_subreg_table) - 1] != 0);
> --
> 2.10.2
>
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Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 3:35 PM, Nanley Chery  wrote:

> The PRMs state that this packet is 16 DWORDS long. Ensure that the last
> three DWORDS are zeroed as required by the hardware when allocating a
> null surface state.
>
> Cc: 
> Signed-off-by: Nanley Chery 
> ---
>  src/intel/isl/isl.c| 2 +-
>  src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
>  2 files changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 6eb1e93efd..b4bdf2059a 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -56,7 +56,7 @@ static const struct {
> [5] = {24, 32,  4},
> [6] = {24, 32,  4},
> [7] = {32, 32,  4, 24},
> -   [8] = {52, 64, 32, 40},
> +   [8] = {64, 64, 32, 40},
>

you're right.  Thanks!


> [9] = {64, 64, 32, 40},
>  };
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> index 501531d4ad..f868293217 100644
> --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> @@ -46,10 +46,9 @@ static uint32_t *
>  gen8_allocate_surface_state(struct brw_context *brw,
>  uint32_t *out_offset, int index)
>  {
> -   int dwords = brw->gen >= 9 ? 16 : 13;
> uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> -  dwords * 4, 64, index, out_offset);
> -   memset(surf, 0, dwords * 4);
> +  64, 64, index, out_offset);
> +   memset(surf, 0, 64);
>

Actually, ISL (well, more like gen8_pack.h) does this for us when it fills
out the surface state so the memset isn't needed.


> return surf;
>  }
>
> --
> 2.12.0
>
>
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Re: [Mesa-dev] r600g: Support spilling temp arrays

[Dieter Nützel]

Hello Glenn,

I've tested this on r600g, Turks XT / HD6670, 2 GB (same as you have?).
It was hard work to apply this on master. Do you have a rebase handy?

But works so far.

Am 05.03.2017 18:26, schrieb Glenn Kennard:

This patch series implements support for spilling temporary arrays on
R6xx/R7xx/Evergreen/NI if hardware GPR limits are exceeded. It opts for 
a
simple pessimistic scheme of spilling the largest arrays until things 
fit.


This fixes some subset of issues where "GPR limit exceeded" or "TGSI
translation error" is printed to the console.


LS2015 - Landwirtschafts-Simulator 2015 / FarmingSimulator 2015
https://www.farming-simulator.com
under 'wine' changed ouput from:

EE r600_shader.c:158 r600_pipe_shader_create - translation from TGSI 
failed !
EE r600_state_common.c:765 r600_shader_select - Failed to build shader 
variant (type=0) -12
EE r600_shader.c:2523 r600_shader_from_tgsi - GPR limit exceeded - 
shader requires 167 registers


to:
EE r600_shader.c:183 r600_pipe_shader_create - translation from TGSI 
failed !
EE r600_state_common.c:799 r600_shader_select - Failed to build shader 
variant (type=0) -12
EE r600_shader.c:3862 r600_shader_from_tgsi - GPR limit exceeded - 
shader requires -10 registers



Exercises left to reader:
* Test on R600/R700, I suspect R600 in particular might need some 
additional

  fixups for write masking in tgsi_src().
* Implement support for spilling regular TGSI temps. Most of the
  infrastructure needed is in this patch series so should be 
straightforward.

  This would fix the remaining GPR limit exceeded issues.


Our children can't wait for this...;-)))

Tested-by: Dieter Nützel 
GREAT work!

-Dieter
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[Mesa-dev] [PATCH] anv/blorp: Turn off AUX after doing a CCS_D resolve

[Jason Ekstrand]

For render passes with multiple subpasses on gen7, we only fast-clear at
the top but an input attachment use can cause us to do a resolve in the
middle of the render pass.  Once we've done so, we are no longer have a
fast-cleared surface so we can just set aux_usage to NONE.
---
 src/intel/vulkan/anv_blorp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 72a5980..e15f33e 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1519,6 +1519,8 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
 
/* Once we've done any sort of resolve, we're no longer fast-cleared */
att_state->fast_clear = false;
+   if (att_state->aux_usage == ISL_AUX_USAGE_CCS_D)
+  att_state->aux_usage = ISL_AUX_USAGE_NONE;
 }
 
 void
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #20 from Emil Velikov  ---
oia...@gmail.com let me put a couple of suggestions:

 - try to keep your answers brief
 - try to keep your analysis distro agnostic
 - keep Wikipedia references to a minimum - it'll get you an F in University
;-)
 - carefully check the code before calling things out (re: the reproducible
builds) 

But above all - a patch says a thousand words, when sending out consider a)
previous review feedback and b) maintainability.

As a final note: shader cache is not enabled on anything but r600/radeonsi atm,
so the current code simply _cannot_ break your work-flows (workflow really).

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #19 from Timothy Arceri  ---
(In reply to oiaohm from comment #17)
> (In reply to Timothy Arceri from comment #15)
> > (In reply to oiaohm from comment #12)
> > > (In reply to Timothy Arceri from comment #11)
> > > > (In reply to oiaohm from comment #9)
> > > > > Jan Vesely
> > > > > If the pointer size is the same and the timestamp is the same, the 
> > > > > cache
> > > > > will be reused, not deleted, and the problem does not exist.
> > > > > 
> > > > > I have a little problem. I have x32 and i386.   So pointer size is 
> > > > > the same
> > > > > timestamp and contents of cache should be different.   This will 
> > > > > happen if I
> > > > > am running a reproducible build with frozen time.   This can also 
> > > > > happen if
> > > > > you make to 64 library builds with frozen time because the two builds 
> > > > > will
> > > > > have the same timestamps even if they are completely different 
> > > > > versions of
> > > > > mesa incompatible disc cache requirements.
> > > > > 
> > > > > https://reproducible-builds.org/docs/timestamps/
> > > > > 
> > > > > The reason I provided this link is time is no longer trust-able as a 
> > > > > unique
> > > > > value.  Do note the usage of libfaketime its really simple to forget 
> > > > > you
> > > > > still have that loaded after doing a reproducible build so the clock 
> > > > > is not
> > > > > in fact ticking forwards for anything you are doing you wake up when 
> > > > > you
> > > > > finally do something that is dependant on the clock in fact ticking.  
> > > > >  So
> > > > > you need to look at other sources to get unique value.
> > > > 
> > > > x32 should end up in the ilp-32 directory. That's what the __ILP32__ is
> > > > meant to do. Even if it didn't and the cache wasn't deleted because all 
> > > > your
> > > > arch builds had the same timestamp it still wouldn't matter because the
> > > > timestamp is used to identify the Mesa version not the arch, the arch
> > > > doesn't matter in terms of the cache it will work just fine. The only 
> > > > reason
> > > > for the different dirs is because we have no way of knowing if the 
> > > > different
> > > > timestamps are the same Mesa version
> > > 
> > > 1 if you are using timestamp it ID mesa version just use mesa version.
> > 
> > We can't, distros patch Mesa we can't depend on the version numbers being an
> > accurate representation of the source that was use to compile a Mesa
> > binaray. There is an option to do a sha of the binaries but that is a little
> > more complex for opengl than it is for vulkan (where it is currently used by
> > Intel).
> 
> Distribution will block using timestamp.  So timestamp cannot be used to
> perform task.

I'm pretty sure that's what Vulkan drivers were already doing in the previous
release. If distros are going to disable features I can't stop that.

> 
> Hashing to support your usage case might be the only way.

Happy for patches to implement this.

> > 
> > > 
> > > Next do read what x32 API is 
> > > 
> > > https://en.wikipedia.org/wiki/X32_ABI
> > > There is a different count in registers between i386 and x32.  So yes they
> > > both report as ilp-32
> > 
> > gcc only sets the __ILP32__ flag for x32 not i386. Clang may differ I'm not
> > sure, but it's not a major concern for me right now.
> > 
> http://stackoverflow.com/questions/34011718/is-ilp32-and-i386-a-valid-
> configuration
> Yes Clang sets __ILP32__ on i386 build modes.
> 
> __ILP32__ is a valid description for i386.   Should be presumed as being
> possible to be set in i386.
> 
> In fact gcc not having __ILP32__ set for i386 could be called a bug. 
> Depending on __ILP32__ to split i386 and x32 mode is depending on complier
> behaviour not specification defined behaviour.

We want to avoid hooks into the build system. If you have a better idea how to
do this than is currently done please submit a patch for review.

> 
> > > but if you are running a software rendering engine how
> > > the how the shader code has to be optimised is totally different to take
> > > advantage of x32 mode.
> > 
> > How about you go read about gpu architectures. Shader code is for the gpu,
> > x32
> > is for the cpu. There is no shader code optimisations to take advantage of
> > x32 mode.
> 
> In upstream currently there are none at the moment for software rendering
> you are right.  In prototype hack patches to get more performance out of
> software rendering in x32 mode there is.   As I said to take advantage of
> x32 mode it need to be different.  Not that upstream has it different now. 
> To make it possible for in future x32 patches to go upstream it need to be
> kept split at the cache.

There is no shader cache for software renderers so this, or any other issues to
do with caching for software renders in not a current concern. It would be more
likely that we would use the gpu_id as a way to distinguish between
implementations 

[Mesa-dev] [PATCH] i965: Move brw_init_compaction_tables() to brw_create_compiler().

[Matt Turner]

... so that we can avoid threading complications or unnecessary
compaction table initializations (which just consists of setting some
pointers based on devinfo->gen).
---
 src/mesa/drivers/dri/i965/brw_compiler.c   | 2 ++
 src/mesa/drivers/dri/i965/brw_eu.c | 2 --
 src/mesa/drivers/dri/i965/brw_eu_compact.c | 5 -
 3 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c 
b/src/mesa/drivers/dri/i965/brw_compiler.c
index fcad570..cd9473f 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.c
+++ b/src/mesa/drivers/dri/i965/brw_compiler.c
@@ -23,6 +23,7 @@
 
 #include "brw_compiler.h"
 #include "brw_shader.h"
+#include "brw_eu.h"
 #include "common/gen_debug.h"
 #include "compiler/nir/nir.h"
 #include "main/errors.h"
@@ -107,6 +108,7 @@ brw_compiler_create(void *mem_ctx, const struct 
gen_device_info *devinfo)
 
brw_fs_alloc_reg_sets(compiler);
brw_vec4_alloc_reg_set(compiler);
+   brw_init_compaction_tables(devinfo);
 
compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG", false);
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c 
b/src/mesa/drivers/dri/i965/brw_eu.c
index 1344f2b..d280ffd 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -354,8 +354,6 @@ brw_init_codegen(const struct gen_device_info *devinfo,
p->loop_stack_array_size = 16;
p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
-
-   brw_init_compaction_tables(devinfo);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c 
b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 5b8e9b2..b2af76d 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -76,7 +76,6 @@
 #include "brw_shader.h"
 #include "intel_asm_annotation.h"
 #include "common/gen_debug.h"
-#include "util/u_atomic.h" /* for p_atomic_cmpxchg */
 
 static const uint32_t g45_control_index_table[32] = {
0b0,
@@ -1345,10 +1344,6 @@ update_gen4_jump_count(const struct gen_device_info 
*devinfo, brw_inst *insn,
 void
 brw_init_compaction_tables(const struct gen_device_info *devinfo)
 {
-   static bool initialized;
-   if (initialized || p_atomic_cmpxchg(, false, true) != false)
-  return;
-
assert(g45_control_index_table[ARRAY_SIZE(g45_control_index_table) - 1] != 
0);
assert(g45_datatype_table[ARRAY_SIZE(g45_datatype_table) - 1] != 0);
assert(g45_subreg_table[ARRAY_SIZE(g45_subreg_table) - 1] != 0);
-- 
2.10.2

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #18 from Ilia Mirkin  ---
Since the different arch's libraries will almost invariably be different, this
is comparable to flipping back and forth between versions.

I expect it to be a fairly common developer scenario to have a system mesa
install and a "I'm debugging this version" mesa install. It'd be nice to handle
these in some moderately reasonable way.

Perhaps we should keep N directories around, and check the mtime (or whatever)
of the directory before deleting it?

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[Mesa-dev] [PATCH] intel: Correct the BDW surface state size

[Nanley Chery]

The PRMs state that this packet is 16 DWORDS long. Ensure that the last
three DWORDS are zeroed as required by the hardware when allocating a
null surface state.

Cc: 
Signed-off-by: Nanley Chery 
---
 src/intel/isl/isl.c| 2 +-
 src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++---
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 6eb1e93efd..b4bdf2059a 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -56,7 +56,7 @@ static const struct {
[5] = {24, 32,  4},
[6] = {24, 32,  4},
[7] = {32, 32,  4, 24},
-   [8] = {52, 64, 32, 40},
+   [8] = {64, 64, 32, 40},
[9] = {64, 64, 32, 40},
 };
 
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 501531d4ad..f868293217 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -46,10 +46,9 @@ static uint32_t *
 gen8_allocate_surface_state(struct brw_context *brw,
 uint32_t *out_offset, int index)
 {
-   int dwords = brw->gen >= 9 ? 16 : 13;
uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
-  dwords * 4, 64, index, out_offset);
-   memset(surf, 0, dwords * 4);
+  64, 64, index, out_offset);
+   memset(surf, 0, 64);
return surf;
 }
 
-- 
2.12.0

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #17 from oia...@gmail.com ---
(In reply to Timothy Arceri from comment #15)
> (In reply to oiaohm from comment #12)
> > (In reply to Timothy Arceri from comment #11)
> > > (In reply to oiaohm from comment #9)
> > > > Jan Vesely
> > > > If the pointer size is the same and the timestamp is the same, the 
> > > > cache
> > > > will be reused, not deleted, and the problem does not exist.
> > > > 
> > > > I have a little problem. I have x32 and i386.   So pointer size is the 
> > > > same
> > > > timestamp and contents of cache should be different.   This will happen 
> > > > if I
> > > > am running a reproducible build with frozen time.   This can also 
> > > > happen if
> > > > you make to 64 library builds with frozen time because the two builds 
> > > > will
> > > > have the same timestamps even if they are completely different versions 
> > > > of
> > > > mesa incompatible disc cache requirements.
> > > > 
> > > > https://reproducible-builds.org/docs/timestamps/
> > > > 
> > > > The reason I provided this link is time is no longer trust-able as a 
> > > > unique
> > > > value.  Do note the usage of libfaketime its really simple to forget you
> > > > still have that loaded after doing a reproducible build so the clock is 
> > > > not
> > > > in fact ticking forwards for anything you are doing you wake up when you
> > > > finally do something that is dependant on the clock in fact ticking.   
> > > > So
> > > > you need to look at other sources to get unique value.
> > > 
> > > x32 should end up in the ilp-32 directory. That's what the __ILP32__ is
> > > meant to do. Even if it didn't and the cache wasn't deleted because all 
> > > your
> > > arch builds had the same timestamp it still wouldn't matter because the
> > > timestamp is used to identify the Mesa version not the arch, the arch
> > > doesn't matter in terms of the cache it will work just fine. The only 
> > > reason
> > > for the different dirs is because we have no way of knowing if the 
> > > different
> > > timestamps are the same Mesa version
> > 
> > 1 if you are using timestamp it ID mesa version just use mesa version.
> 
> We can't, distros patch Mesa we can't depend on the version numbers being an
> accurate representation of the source that was use to compile a Mesa
> binaray. There is an option to do a sha of the binaries but that is a little
> more complex for opengl than it is for vulkan (where it is currently used by
> Intel).

Distribution will block using timestamp.  So timestamp cannot be used to
perform task.

Hashing to support your usage case might be the only way.
> 
> > 
> > Next do read what x32 API is 
> > 
> > https://en.wikipedia.org/wiki/X32_ABI
> > There is a different count in registers between i386 and x32.  So yes they
> > both report as ilp-32
> 
> gcc only sets the __ILP32__ flag for x32 not i386. Clang may differ I'm not
> sure, but it's not a major concern for me right now.
> 
http://stackoverflow.com/questions/34011718/is-ilp32-and-i386-a-valid-configuration
Yes Clang sets __ILP32__ on i386 build modes.

__ILP32__ is a valid description for i386.   Should be presumed as being
possible to be set in i386.

In fact gcc not having __ILP32__ set for i386 could be called a bug.  Depending
on __ILP32__ to split i386 and x32 mode is depending on complier behaviour not
specification defined behaviour.

> > but if you are running a software rendering engine how
> > the how the shader code has to be optimised is totally different to take
> > advantage of x32 mode.
> 
> How about you go read about gpu architectures. Shader code is for the gpu,
> x32
> is for the cpu. There is no shader code optimisations to take advantage of
> x32 mode.

In upstream currently there are none at the moment for software rendering you
are right.  In prototype hack patches to get more performance out of software
rendering in x32 mode there is.   As I said to take advantage of x32 mode it
need to be different.  Not that upstream has it different now.  To make it
possible for in future x32 patches to go upstream it need to be kept split at
the cache.

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #16 from oia...@gmail.com ---
(In reply to Ilia Mirkin from comment #14)
> (In reply to oiaohm from comment #13)
> > All I can guess is you are not interested in solving problem for my workflow
> > so I should not bother opening bugs in future.
> 
> I have been trying to get you to explain your workflow, which you hadn't up
> until now.
> 
> To summarize, your workflow is to run applications using multiple
> architectures (and thus multiple library binaries) while having $HOME set to
> the same directory.
> 
> Is that an accurate assessment? Is there more to it?

That is close enough.  Exact would require the following extra
Multi architectures using qemu usermode registered in binfmt_misc so they
binary all straight up run.   So its 1 system and operating system running
applications from multiple architectures.   

But these bits really don't change the problem most likely can be ignored. 

Yes they all use 1 home directory someone NFS sharing a home directory between
computer of different architectures could also run into a problem with just
splitting 32 and 64 bit instead of using a triplet.

Darren Salt patch using triplet
https://patchwork.freedesktop.org/patch/141891/
Will make my workflow work and others with shared home directories with
multi-architectures by other means.  I don't see how this would break workflows
what the patch I class as defective fixed other than leaving behind not used
cache directories.

Of course there is still those who want to custom build own instances of Mesa
who I think with the triplet option could be told to use a custom triplet.  If
they want to stick date/time/version in the triplet they can.

I have not considered the case of Multi different distributions sharing the
same home directory but that is broken most of the time anyhow this would most
likely require using version tag or something like that.   Debian same version
different architecture sharing home directory has been fairly safe.

If someone wants Multi different distribution support using a single home
directory I think that should be a bug in it own right.

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Re: [Mesa-dev] [PATCH 11/11] st/va: add config support for 10bit decoding

[Mark Thompson]

On 09/03/17 14:08, Christian König wrote:
> 
> Done, new set on the mailing list.
> 
> I've dropped the VDPAU support since nobody seems to be interested in that 
> any more.
> 
> Any more comments or are we good to go with that?

Decode all looks good now.

Postprocess-scale of P016 still misses the chroma plane, fixed by:

diff --git a/src/gallium/state_trackers/va/postproc.c 
b/src/gallium/state_trackers/va/postproc.c
index fbec69aec3..8467b0e8f4 100644
--- a/src/gallium/state_trackers/va/postproc.c
+++ b/src/gallium/state_trackers/va/postproc.c
@@ -292,7 +292,8 @@ vlVaHandleVAProcPipelineParameterBufferType(vlVaDriver 
*drv, vlVaContext *contex
src_region = vlVaRegionDefault(param->surface_region, src_surface->buffer, 
_src_region);
dst_region = vlVaRegionDefault(param->output_region, context->target, 
_dst_region);
 
-   if (context->target->buffer_format != PIPE_FORMAT_NV12)
+   if (context->target->buffer_format != PIPE_FORMAT_NV12 &&
+   context->target->buffer_format != PIPE_FORMAT_P016)
   return vlVaPostProcCompositor(drv, context, src_region, dst_region,
 src, context->target, deinterlace);
else

P016 -> NV12 then still fails because NV12 surfaces are by default created 
interlaced and P016 are not.  I guess I can live with that, though, because the 
encoder runs into the same problem (and, like there, VAAPI_DISABLE_INTERLACE is 
usable as a workaround).

After that, everything I would expect to work does and the series is 
Reviewed-by: Mark Thompson .

Thanks,

- Mark
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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #15 from Timothy Arceri  ---
(In reply to oiaohm from comment #12)
> (In reply to Timothy Arceri from comment #11)
> > (In reply to oiaohm from comment #9)
> > > Jan Vesely
> > > If the pointer size is the same and the timestamp is the same, the 
> > > cache
> > > will be reused, not deleted, and the problem does not exist.
> > > 
> > > I have a little problem. I have x32 and i386.   So pointer size is the 
> > > same
> > > timestamp and contents of cache should be different.   This will happen 
> > > if I
> > > am running a reproducible build with frozen time.   This can also happen 
> > > if
> > > you make to 64 library builds with frozen time because the two builds will
> > > have the same timestamps even if they are completely different versions of
> > > mesa incompatible disc cache requirements.
> > > 
> > > https://reproducible-builds.org/docs/timestamps/
> > > 
> > > The reason I provided this link is time is no longer trust-able as a 
> > > unique
> > > value.  Do note the usage of libfaketime its really simple to forget you
> > > still have that loaded after doing a reproducible build so the clock is 
> > > not
> > > in fact ticking forwards for anything you are doing you wake up when you
> > > finally do something that is dependant on the clock in fact ticking.   So
> > > you need to look at other sources to get unique value.
> > 
> > x32 should end up in the ilp-32 directory. That's what the __ILP32__ is
> > meant to do. Even if it didn't and the cache wasn't deleted because all your
> > arch builds had the same timestamp it still wouldn't matter because the
> > timestamp is used to identify the Mesa version not the arch, the arch
> > doesn't matter in terms of the cache it will work just fine. The only reason
> > for the different dirs is because we have no way of knowing if the different
> > timestamps are the same Mesa version
> 
> 1 if you are using timestamp it ID mesa version just use mesa version.

We can't, distros patch Mesa we can't depend on the version numbers being an
accurate representation of the source that was use to compile a Mesa binaray.
There is an option to do a sha of the binaries but that is a little more
complex for opengl than it is for vulkan (where it is currently used by Intel).

> 
> Next do read what x32 API is 
> 
> https://en.wikipedia.org/wiki/X32_ABI
> There is a different count in registers between i386 and x32.  So yes they
> both report as ilp-32

gcc only sets the __ILP32__ flag for x32 not i386. Clang may differ I'm not
sure, but it's not a major concern for me right now.

> but if you are running a software rendering engine how
> the how the shader code has to be optimised is totally different to take
> advantage of x32 mode.

How about you go read about gpu architectures. Shader code is for the gpu, x32
is for the cpu. There is no shader code optimisations to take advantage of x32
mode.

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Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

[Dylan Baker]

Quoting Jason Ekstrand (2017-03-09 14:19:33)
> On Thu, Mar 9, 2017 at 12:25 PM, Dylan Baker  wrote:
> 
> 
> 
> Quoting Jason Ekstrand (2017-03-09 10:23:56)
> > +def op_bit_sizes(op):
> > +    sizes = set([8, 16, 32, 64])
> > +    if not type_has_size(op.output_type):
> > +        sizes = sizes.intersection(set(type_sizes(op.output_type)))
> > +    for input_type in op.input_types:
> > +      if not type_has_size(input_type):
> 
> The indent looks off here, mixed tabs?
> 
> 
> No, it's 4 tabs vs. 3 that's causing problems.  Fixed locally.

Thanks!

>  
> 
> with that fixed:
> Reviewed-by: Dylan Baker 


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Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

[Lionel Landwerlin]

Looks fine :

Reviewed-by: Lionel Landwerlin 

On 09/03/17 22:05, Jason Ekstrand wrote:

Apart from avoiding some unneeded size cases, this shouldn't have any
actual functional impact.
---
  src/compiler/nir/nir_constant_expressions.py | 51 +++-
  1 file changed, 27 insertions(+), 24 deletions(-)

diff --git a/src/compiler/nir/nir_constant_expressions.py 
b/src/compiler/nir/nir_constant_expressions.py
index 273d6ce..aecca8b 100644
--- a/src/compiler/nir/nir_constant_expressions.py
+++ b/src/compiler/nir/nir_constant_expressions.py
@@ -1,17 +1,19 @@
  #! /usr/bin/python2
  
+import re

+
+type_split_re = re.compile(r'(?P[a-z]+)(?P\d+)')
+
  def type_has_size(type_):
  return type_[-1:].isdigit()
  
+def type_size(type_):

+assert type_has_size(type_)
+return int(type_split_re.match(type_).group('bits'))
+
  def type_sizes(type_):
-if type_.endswith("8"):
-return [8]
-elif type_.endswith("16"):
-return [16]
-elif type_.endswith("32"):
-return [32]
-elif type_.endswith("64"):
-return [64]
+if type_has_size(type_):
+return [type_size(type_)]
  else:
  return [32, 64]
  
@@ -20,23 +22,23 @@ def type_add_size(type_, size):

  return type_
  return type_ + str(size)
  
+def op_bit_sizes(op):

+sizes = set([8, 16, 32, 64])
+if not type_has_size(op.output_type):
+sizes = sizes.intersection(set(type_sizes(op.output_type)))
+for input_type in op.input_types:
+  if not type_has_size(input_type):
+  sizes = sizes.intersection(set(type_sizes(input_type)))
+return sorted(list(sizes))
+
  def get_const_field(type_):
-if type_ == "int32":
-return "i32"
-if type_ == "uint32":
-return "u32"
-if type_ == "int64":
-return "i64"
-if type_ == "uint64":
-return "u64"
  if type_ == "bool32":
  return "u32"
-if type_ == "float32":
-return "f32"
-if type_ == "float64":
-return "f64"
-raise Exception(str(type_))
-assert(0)
+else:
+m = type_split_re.match(type_)
+if not m:
+raise Exception(str(type_))
+return m.group('type')[0] + m.group('bits')
  
  template = """\

  /*
@@ -248,7 +250,7 @@ typedef float float32_t;
  typedef double float64_t;
  typedef bool bool32_t;
  % for type in ["float", "int", "uint"]:
-% for width in [32, 64]:
+% for width in type_sizes(type):
  struct ${type}${width}_vec {
 ${type}${width}_t x;
 ${type}${width}_t y;
@@ -273,7 +275,7 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
 nir_const_value _dst_val = { {0, } };
  
 switch (bit_size) {

-   % for bit_size in [32, 64]:
+   % for bit_size in op_bit_sizes(op):
 case ${bit_size}: {
<%
output_type = type_add_size(op.output_type, bit_size)
@@ -407,4 +409,5 @@ from mako.template import Template
  print Template(template).render(opcodes=opcodes, type_sizes=type_sizes,
  type_has_size=type_has_size,
  type_add_size=type_add_size,
+op_bit_sizes=op_bit_sizes,
  get_const_field=get_const_field)



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Re: [Mesa-dev] [PATCH v2 25/25] configure.ac: do not require the i965 driver for ANV

[Jason Ekstrand]

You left brw_defines.h in compiler/Makefile.sources.  With that fixed,

Reviewed-by: Jason Ekstrand 

On Thu, Mar 9, 2017 at 11:07 AM, Emil Velikov 
wrote:

> From: Emil Velikov 
>
> As of last commit we have the two split, thus we no longer require the
> i965 in order to have the ANV driver.
>
> Even though ANV does not link against libdrm nor libdrm_intel, we still
> require those as dependencies due to the headers they provide.
>
> Signed-off-by: Emil Velikov 
> ---
>  configure.ac | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index 628aec3ceb..aa5cb75dfb 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1786,9 +1786,8 @@ if test -n "$with_vulkan_drivers"; then
>  for driver in $VULKAN_DRIVERS; do
>  case "x$driver" in
>  xintel)
> -if test "x$HAVE_I965_DRI" != xyes; then
> -AC_MSG_ERROR([Intel Vulkan driver requires the i965 dri
> driver])
> -fi
> +require_libdrm "i965"
> +PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED
> libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
>  HAVE_INTEL_VULKAN=yes
>
>  ;;
> --
> 2.11.1
>
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Re: [Mesa-dev] [PATCH v2 19/25] i965: Move the back-end compiler to src/intel/compiler

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 11:07 AM, Emil Velikov 
wrote:

> From: Jason Ekstrand 
>
> Mostly a dummy git mv with a couple of noticable parts:
>  - With the earlier header cleanups, nothing in src/intel depends
> files from src/mesa/drivers/dri/i965/
>  - Both Autoconf and Android builds are addressed. Thanks to Mauro and
> Tapani for the fixups in the latter
>  - brw_util.[ch] is not really compiler specific, so it's moved to i965.
>
> v2:
>  - move brw_eu_defines.h instead of brw_defines.h
>  - remove no-longer applicable includes
>  - add missing vulkan/ prefix in the Android build (thanks Tapani)
>
> [Emil Velikov: commit message, various small fixes througout]
> Signed-off-by: Emil Velikov 
> ---
>  src/intel/Android.blorp.mk |   2 +-
>  .../Android.gen.mk => intel/Android.compiler.mk}   |  41 ++-
>  src/intel/Android.isl.mk   |   5 +-
>  src/intel/Android.mk   |   1 +
>  src/intel/Makefile.am  |   6 +-
>  src/intel/Makefile.compiler.am | 121
> +
>  src/intel/Makefile.sources |  90 +++
>  src/intel/blorp/blorp.c|   4 +-
>  src/intel/blorp/blorp_clear.c  |   2 +-
>  src/intel/blorp/blorp_priv.h   |   2 +-
>  src/intel/compiler/.gitignore  |  10 ++
>  .../dri/i965 => intel/compiler}/brw_cfg.cpp|   0
>  .../drivers/dri/i965 => intel/compiler}/brw_cfg.h  |   0
>  .../dri/i965 => intel/compiler}/brw_compiler.c |   0
>  .../dri/i965 => intel/compiler}/brw_compiler.h |   0
>  .../compiler}/brw_dead_control_flow.cpp|   0
>  .../compiler}/brw_dead_control_flow.h  |   0
>  .../dri/i965 => intel/compiler}/brw_disasm.c   |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_eu.c   |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_eu.h   |   0
>  .../dri/i965 => intel/compiler}/brw_eu_compact.c   |   0
>  .../dri/i965 => intel/compiler}/brw_eu_defines.h   |   0
>  .../dri/i965 => intel/compiler}/brw_eu_emit.c  |   0
>  .../dri/i965 => intel/compiler}/brw_eu_util.c  |   0
>  .../dri/i965 => intel/compiler}/brw_eu_validate.c  |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_fs.cpp |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_fs.h   |   0
>  .../dri/i965 => intel/compiler}/brw_fs_builder.h   |   0
>  .../compiler}/brw_fs_cmod_propagation.cpp  |   0
>  .../compiler}/brw_fs_combine_constants.cpp |   0
>  .../compiler}/brw_fs_copy_propagation.cpp  |   0
>  .../dri/i965 => intel/compiler}/brw_fs_cse.cpp |   0
>  .../compiler}/brw_fs_dead_code_eliminate.cpp   |   0
>  .../i965 => intel/compiler}/brw_fs_generator.cpp   |   0
>  .../compiler}/brw_fs_live_variables.cpp|   0
>  .../compiler}/brw_fs_live_variables.h  |   0
>  .../i965 => intel/compiler}/brw_fs_lower_d2x.cpp   |   0
>  .../i965 => intel/compiler}/brw_fs_lower_pack.cpp  |   0
>  .../dri/i965 => intel/compiler}/brw_fs_nir.cpp |   0
>  .../compiler}/brw_fs_reg_allocate.cpp  |   0
>  .../compiler}/brw_fs_register_coalesce.cpp |   0
>  .../compiler}/brw_fs_saturate_propagation.cpp  |   0
>  .../compiler}/brw_fs_sel_peephole.cpp  |   0
>  .../compiler}/brw_fs_surface_builder.cpp   |   0
>  .../compiler}/brw_fs_surface_builder.h |   0
>  .../i965 => intel/compiler}/brw_fs_validate.cpp|   0
>  .../dri/i965 => intel/compiler}/brw_fs_visitor.cpp |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_inst.h |   0
>  .../compiler}/brw_interpolation_map.c  |   0
>  .../dri/i965 => intel/compiler}/brw_ir_allocator.h |   0
>  .../dri/i965 => intel/compiler}/brw_ir_fs.h|   0
>  .../dri/i965 => intel/compiler}/brw_ir_vec4.h  |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_nir.c  |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_nir.h  |   0
>  .../compiler}/brw_nir_analyze_boolean_resolves.c   |   0
>  .../compiler}/brw_nir_attribute_workarounds.c  |   0
>  .../i965 => intel/compiler}/brw_nir_intrinsics.c   |   0
>  .../compiler}/brw_nir_opt_peephole_ffma.c  |   0
>  .../compiler}/brw_nir_tcs_workarounds.c|   0
>  .../compiler}/brw_nir_trig_workarounds.py  |   0
>  .../dri/i965 => intel/compiler}/brw_packed_float.c |   0
>  .../compiler}/brw_predicated_break.cpp |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_reg.h  |   0
>  .../compiler}/brw_schedule_instructions.cpp|   0
>  .../dri/i965 => intel/compiler}/brw_shader.cpp |   0
>  .../dri/i965 => intel/compiler}/brw_shader.h   |   0
>  .../dri/i965 => intel/compiler}/brw_vec4.cpp   |   0
>  .../drivers/dri/i965 => intel/compiler}/brw_vec4.h |   0
>  .../dri/i965 => intel/compiler}/brw_vec4_builder.h |   0

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #14 from Ilia Mirkin  ---
(In reply to oiaohm from comment #13)
> All I can guess is you are not interested in solving problem for my workflow
> so I should not bother opening bugs in future.

I have been trying to get you to explain your workflow, which you hadn't up
until now.

To summarize, your workflow is to run applications using multiple architectures
(and thus multiple library binaries) while having $HOME set to the same
directory.

Is that an accurate assessment? Is there more to it?

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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #13 from oia...@gmail.com ---
(In reply to Ilia Mirkin from comment #10)
> There are lots of words, with lots of mentions of how Debian is awesome, but
> still no usage scenario. Let me help you. A usage scenario looks like:
> 
> """
> Step 1: run X
> Step 2: run Y
> Step 3: run Z
> 
> Note how when you run Z, things don't work or otherwise suck.
> """
> 
> Everything you're talking about is generic hypotheticals with various
> assumptions built in.. I want an actual use-case.

This is a set of assumptions.  Why do I have to 100 percent wait for real world
error.

1) you set your distribution to multiarch.
2) you install programs from different 32 and 64 bit archs as I have now.
This can result in like mesa-utils that contains glxgears being installed for
arm64 and having blender installed for amd64


apt-get install mesa-utils:x32  kicad:i386 blender:amd64  gltron:arm64

Yes you can install from different arch using a single command line.

Now you try to run glgears, kicad, blender and gltron. 

You have 4 versions of mesa on the system.   So the first fix handle the kicad
to blender that works now.   But gltron:arm64 or anything else I have built for
arm64 is going to have trouble.   So I can build binary on x86 PC that is fast
test it on x86 PC without needing extra vm stuff.

Yes building binary normally still involves a container/chroot linking
container/chroot to x11 is a pain and pointless when you are on debian.

The kicad one installed as i386 can be at times that amd64 does not work
correctly when using particular extensions.  gltron would be to test that arm64
it work. 

I don't know what architectures I will have set multi in the future it will be
linked to what boards I am dealing with.

The stuff I have in x32 is mostly internal that you don't have permission to
have access to. 

Ilia Mirkin the reality what you have been calling hypothetical will break my
work-flows.  This is why I opened the bug. 

All I can guess is you are not interested in solving problem for my workflow so
I should not bother opening bugs in future.

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Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 12:25 PM, Dylan Baker  wrote:

>
>
> Quoting Jason Ekstrand (2017-03-09 10:23:56)
> > +def op_bit_sizes(op):
> > +sizes = set([8, 16, 32, 64])
> > +if not type_has_size(op.output_type):
> > +sizes = sizes.intersection(set(type_sizes(op.output_type)))
> > +for input_type in op.input_types:
> > +  if not type_has_size(input_type):
>
> The indent looks off here, mixed tabs?
>

No, it's 4 tabs vs. 3 that's causing problems.  Fixed locally.


> with that fixed:
> Reviewed-by: Dylan Baker 
>
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[Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

[Jason Ekstrand]

Apart from avoiding some unneeded size cases, this shouldn't have any
actual functional impact.
---
 src/compiler/nir/nir_constant_expressions.py | 51 +++-
 1 file changed, 27 insertions(+), 24 deletions(-)

diff --git a/src/compiler/nir/nir_constant_expressions.py 
b/src/compiler/nir/nir_constant_expressions.py
index 273d6ce..aecca8b 100644
--- a/src/compiler/nir/nir_constant_expressions.py
+++ b/src/compiler/nir/nir_constant_expressions.py
@@ -1,17 +1,19 @@
 #! /usr/bin/python2
 
+import re
+
+type_split_re = re.compile(r'(?P[a-z]+)(?P\d+)')
+
 def type_has_size(type_):
 return type_[-1:].isdigit()
 
+def type_size(type_):
+assert type_has_size(type_)
+return int(type_split_re.match(type_).group('bits'))
+
 def type_sizes(type_):
-if type_.endswith("8"):
-return [8]
-elif type_.endswith("16"):
-return [16]
-elif type_.endswith("32"):
-return [32]
-elif type_.endswith("64"):
-return [64]
+if type_has_size(type_):
+return [type_size(type_)]
 else:
 return [32, 64]
 
@@ -20,23 +22,23 @@ def type_add_size(type_, size):
 return type_
 return type_ + str(size)
 
+def op_bit_sizes(op):
+sizes = set([8, 16, 32, 64])
+if not type_has_size(op.output_type):
+sizes = sizes.intersection(set(type_sizes(op.output_type)))
+for input_type in op.input_types:
+  if not type_has_size(input_type):
+  sizes = sizes.intersection(set(type_sizes(input_type)))
+return sorted(list(sizes))
+
 def get_const_field(type_):
-if type_ == "int32":
-return "i32"
-if type_ == "uint32":
-return "u32"
-if type_ == "int64":
-return "i64"
-if type_ == "uint64":
-return "u64"
 if type_ == "bool32":
 return "u32"
-if type_ == "float32":
-return "f32"
-if type_ == "float64":
-return "f64"
-raise Exception(str(type_))
-assert(0)
+else:
+m = type_split_re.match(type_)
+if not m:
+raise Exception(str(type_))
+return m.group('type')[0] + m.group('bits')
 
 template = """\
 /*
@@ -248,7 +250,7 @@ typedef float float32_t;
 typedef double float64_t;
 typedef bool bool32_t;
 % for type in ["float", "int", "uint"]:
-% for width in [32, 64]:
+% for width in type_sizes(type):
 struct ${type}${width}_vec {
${type}${width}_t x;
${type}${width}_t y;
@@ -273,7 +275,7 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
nir_const_value _dst_val = { {0, } };
 
switch (bit_size) {
-   % for bit_size in [32, 64]:
+   % for bit_size in op_bit_sizes(op):
case ${bit_size}: {
   <%
   output_type = type_add_size(op.output_type, bit_size)
@@ -407,4 +409,5 @@ from mako.template import Template
 print Template(template).render(opcodes=opcodes, type_sizes=type_sizes,
 type_has_size=type_has_size,
 type_add_size=type_add_size,
+op_bit_sizes=op_bit_sizes,
 get_const_field=get_const_field)
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 0/2] nir: Add support for 8 and 16-bit types

[Jason Ekstrand]

This tiny series adds support in NIR for 8 and 16-bit types.  In
particular, it now supports int8_t, uint8_t, int16_t, uint16_t, and
float16_t.  No 8-bit floating-point type is supported because 8-bit float
would be stupid.

These patches have been tested in Jenkins but no 8 or 16-bit code has been
run through it yet.  Even if we're people don't want to land the second
patch (due to not having a vertical slice), I'd like to land the first
refactor patch.

Jason Ekstrand (2):
  nir/constant_expressions: Refactor helper functions
  nir: Add support for 8 and 16-bit types

 src/compiler/nir/nir.h   |  4 ++
 src/compiler/nir/nir_constant_expressions.py | 67 +---
 src/compiler/nir/nir_opcodes.py  |  6 ++-
 3 files changed, 51 insertions(+), 26 deletions(-)

-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 2/2] nir: Add support for 8 and 16-bit types

[Jason Ekstrand]

---
 src/compiler/nir/nir.h   |  4 
 src/compiler/nir/nir_constant_expressions.py | 16 +++-
 src/compiler/nir/nir_opcodes.py  |  6 +-
 3 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 57b8be3..eaa103d 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -105,6 +105,10 @@ typedef enum {
 typedef union {
float f32[4];
double f64[4];
+   int8_t i8[4];
+   uint8_t u8[4];
+   int16_t i16[4];
+   uint16_t u16[4];
int32_t i32[4];
uint32_t u32[4];
int64_t i64[4];
diff --git a/src/compiler/nir/nir_constant_expressions.py 
b/src/compiler/nir/nir_constant_expressions.py
index aecca8b..cbda4b1 100644
--- a/src/compiler/nir/nir_constant_expressions.py
+++ b/src/compiler/nir/nir_constant_expressions.py
@@ -14,8 +14,10 @@ def type_size(type_):
 def type_sizes(type_):
 if type_has_size(type_):
 return [type_size(type_)]
+elif type_ == 'float':
+return [16, 32, 64]
 else:
-return [32, 64]
+return [8, 16, 32, 64]
 
 def type_add_size(type_, size):
 if type_has_size(type_):
@@ -34,6 +36,8 @@ def op_bit_sizes(op):
 def get_const_field(type_):
 if type_ == "bool32":
 return "u32"
+elif type_ == "float16":
+return "u16"
 else:
 m = type_split_re.match(type_)
 if not m:
@@ -246,6 +250,7 @@ unpack_half_1x16(uint16_t u)
 }
 
 /* Some typed vector structures to make things like src0.y work */
+typedef float float16_t;
 typedef float float32_t;
 typedef double float64_t;
 typedef bool bool32_t;
@@ -297,6 +302,8 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
  % for k in range(op.input_sizes[j]):
 % if input_types[j] == "bool32":
_src[${j}].u32[${k}] != 0,
+% elif input_types[j] == "float16":
+   _mesa_half_to_float(_src[${j}].u16[${k}]),
 % else:
_src[${j}].${get_const_field(input_types[j])}[${k}],
 % endif
@@ -322,6 +329,9 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
   <% continue %>
% elif input_types[j] == "bool32":
   const bool src${j} = _src[${j}].u32[_i] != 0;
+   % elif input_types[j] == "float16":
+  const float src${j} =
+ _mesa_half_to_float(_src[${j}].u16[_i]);
% else:
   const ${input_types[j]}_t src${j} =
  _src[${j}].${get_const_field(input_types[j])}[_i];
@@ -344,6 +354,8 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
 % if output_type == "bool32":
## Sanitize the C value to a proper NIR bool
_dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+% elif output_type == "float16":
+   _dst_val.u16[_i] = _mesa_float_to_half(dst);
 % else:
_dst_val.${get_const_field(output_type)}[_i] = dst;
 % endif
@@ -371,6 +383,8 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
 % if output_type == "bool32":
## Sanitize the C value to a proper NIR bool
_dst_val.u32[${k}] = dst.${"xyzw"[k]} ? NIR_TRUE : NIR_FALSE;
+% elif output_type == "float16":
+   _dst_val.u16[${k}] = _mesa_float_to_half(dst.${"xyzw"[k]});
 % else:
_dst_val.${get_const_field(output_type)}[${k}] = 
dst.${"xyzw"[k]};
 % endif
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 53e9aff..37c655b 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -175,7 +175,11 @@ for src_t in [tint, tuint, tfloat]:
   dst_types = [tint, tuint, tfloat]
 
for dst_t in dst_types:
-  for bit_size in [32, 64]:
+  if dst_t == tfloat:
+ bit_sizes = [16, 32, 64]
+  else:
+ bit_sizes = [8, 16, 32, 64]
+  for bit_size in bit_sizes:
  unop_convert("{}2{}{}".format(src_t[0], dst_t[0], bit_size),
   dst_t + str(bit_size), src_t, "src0")
 
-- 
2.5.0.400.gff86faf

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Re: [Mesa-dev] [Mesa-stable] [PATCH] glapi: fix typo in count_scale

[Marek Olšák]

On Thu, Mar 9, 2017 at 10:20 PM, Timothy Arceri  wrote:
>
>
> On 09/03/17 02:38, Emil Velikov wrote:
>>
>> On 6 March 2017 at 04:25, Timothy Arceri  wrote:
>>>
>>> From: Gregory Hainaut 
>>>
>>>  2*4=8
>>>
>>> Signed-off-by: Gregory Hainaut 
>>> Reviewed-by: Timothy Arceri 
>>> ---
>>>  src/mapi/glapi/gen/gl_API.xml | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/src/mapi/glapi/gen/gl_API.xml
>>> b/src/mapi/glapi/gen/gl_API.xml
>>> index f81ad1d..c94 100644
>>> --- a/src/mapi/glapi/gen/gl_API.xml
>>> +++ b/src/mapi/glapi/gen/gl_API.xml
>>> @@ -5869,21 +5869,21 @@
>>>  
>>>  
>>>  
>>>  >> count_scale="6"/>
>>>  
>>>  
>>>  
>>>  
>>>  
>>>  
>>> ->> count_scale="6"/>
>>> +>> count_scale="8"/>
>>
>>
>> Fairly sure we want this in stable... feel free to shout otherwise.
>
>
> It wont hurt but I think this was introduced for gl thread so I think it's
> unused otherwise. Or I'm I wrong about that?

I've forgotten most things about glthread, need to re-read the code.
Your answer lies in the glthread branch. ;)

Marek
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Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

[Andres Gomez]

On Fri, 2017-03-10 at 08:32 +1100, Timothy Arceri wrote:
> On 23/02/17 19:55, Andres Gomez wrote:
> > Commit f1293b2f9bc3 split apart buffer block arrays but introduced
> > also the possibility of a recount of active
> > blocks (NumUniformBlocks/NumShaderStorageBlocks) which would be
> > incoherent with the actual amount of active
> > blocks (UniformBlocks/ShaderStorageBlocks) in the program.
> > 
> > This could cause a segmentation fault if trying to use the index of a
> > block in a link failed program.
> 
> Where exactly does this segfault happen? 
> interstage_cross_validate_uniform_blocks() should exit linking because 
> we returned false.

It does exit, the segfault is not happening when running this code but
when using the link failed program later, as commented.

I caught this by using piglit's shader runner. In the "init_test"
function the last action is to call "setup_ubos":
https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n3704

This is done regardless the link status gotten previously. At
"setup_ubos" we ask first for the active UBOs:
https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n2652

And if there is any, we make use of them:
https://cgit.freedesktop.org/piglit/tree/tests/shaders/shader_runner.c#n2662

That's when the SIGSEV happens.

Of course, you could argue what are you doing using a link failed
program ☺ but the fact is that it should not return a value for the
active UBOs other than 0 and, most importantly, it shouldn't crash.

I hope this clarifies your doubt.

-- 
Br,

Andres
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[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100073

--- Comment #12 from oia...@gmail.com ---
(In reply to Timothy Arceri from comment #11)
> (In reply to oiaohm from comment #9)
> > Jan Vesely
> > If the pointer size is the same and the timestamp is the same, the cache
> > will be reused, not deleted, and the problem does not exist.
> > 
> > I have a little problem. I have x32 and i386.   So pointer size is the same
> > timestamp and contents of cache should be different.   This will happen if I
> > am running a reproducible build with frozen time.   This can also happen if
> > you make to 64 library builds with frozen time because the two builds will
> > have the same timestamps even if they are completely different versions of
> > mesa incompatible disc cache requirements.
> > 
> > https://reproducible-builds.org/docs/timestamps/
> > 
> > The reason I provided this link is time is no longer trust-able as a unique
> > value.  Do note the usage of libfaketime its really simple to forget you
> > still have that loaded after doing a reproducible build so the clock is not
> > in fact ticking forwards for anything you are doing you wake up when you
> > finally do something that is dependant on the clock in fact ticking.   So
> > you need to look at other sources to get unique value.
> 
> x32 should end up in the ilp-32 directory. That's what the __ILP32__ is
> meant to do. Even if it didn't and the cache wasn't deleted because all your
> arch builds had the same timestamp it still wouldn't matter because the
> timestamp is used to identify the Mesa version not the arch, the arch
> doesn't matter in terms of the cache it will work just fine. The only reason
> for the different dirs is because we have no way of knowing if the different
> timestamps are the same Mesa version

1 if you are using timestamp it ID mesa version just use mesa version.

Next do read what x32 API is 

https://en.wikipedia.org/wiki/X32_ABI
There is a different count in registers between i386 and x32.  So yes they both
report as ilp-32 but if you are running a software rendering engine how the how
the shader code has to be optimised is totally different to take advantage of
x32 mode.

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Re: [Mesa-dev] [Mesa-announce] Mesa 17.1.0 release plan

[Marek Olšák]

Threaded Gallium dispatch is possible for radeonsi within 5 weeks. I
have most things done. It won't have as big an impact as glthread, but
we might be able to enable it for all apps in radeonsi.

Marek

On Thu, Mar 9, 2017 at 4:52 PM, Emil Velikov  wrote:
> Hi all,
>
> Here is the current tentative 17.1.0 release schedule.
>
>  Apr 14 2017 - Feature freeze/Release candidate 1
>  Apr 21 2017 - Release candidate 2
>  Apr 28 2017 - Release candidate 3
>  May 05 2017 - Release candidate 4/final release
>
> This gives us approximately five (5) weeks to get new features in.
>
> Here is a rough list of people and tasks, which come to mind. Have I missed
> anything, do any of these sound like they won't make it ?
>
>  - Christian:
> P010/P016 support for Gallium drivers via the VAAPI, OMX(?) and VDPAU(?) API
>  - Emil:
> pthread-stubs, drmDevice2, EGL GLVND, broken glsl tests
>  - Timothy:
> shader cache (anything outstanding?), gl threaded dispatch
>  - Francisco, the Igalia team:
> OpenGL 4.0 to Ivybridge/Baytrail
>
> Regards,
> Emil
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Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

[Timothy Arceri]

On 23/02/17 19:55, Andres Gomez wrote:

Commit f1293b2f9bc3 split apart buffer block arrays but introduced
also the possibility of a recount of active
blocks (NumUniformBlocks/NumShaderStorageBlocks) which would be
incoherent with the actual amount of active
blocks (UniformBlocks/ShaderStorageBlocks) in the program.

This could cause a segmentation fault if trying to use the index of a
block in a link failed program.


Where exactly does this segfault happen? 
interstage_cross_validate_uniform_blocks() should exit linking because 
we returned false.





Signed-off-by: Andres Gomez 
Cc: Timothy Arceri 
---
 src/compiler/glsl/linker.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index b6f8bc4212e..bb9c101f430 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -1181,6 +1181,7 @@ interstage_cross_validate_uniform_blocks(struct 
gl_shader_program *prog,
 for (unsigned k = 0; k <= i; k++) {
delete[] InterfaceBlockStageIndex[k];
 }
+*num_blks = 0;
 return false;
  }



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Re: [Mesa-dev] [PATCH] glapi: fix typo in count_scale

[Timothy Arceri]

On 09/03/17 02:38, Emil Velikov wrote:

On 6 March 2017 at 04:25, Timothy Arceri  wrote:

From: Gregory Hainaut 

 2*4=8

Signed-off-by: Gregory Hainaut 
Reviewed-by: Timothy Arceri 
---
 src/mapi/glapi/gen/gl_API.xml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index f81ad1d..c94 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -5869,21 +5869,21 @@
 
 
 
 
 
 
 
 
 
 
-
+


Fairly sure we want this in stable... feel free to shout otherwise.


It wont hurt but I think this was introduced for gl thread so I think 
it's unused otherwise. Or I'm I wrong about that?




-Emil


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Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

[Dylan Baker]

Quoting Jason Ekstrand (2017-03-09 10:23:56)
> +def op_bit_sizes(op):
> +sizes = set([8, 16, 32, 64])
> +if not type_has_size(op.output_type):
> +sizes = sizes.intersection(set(type_sizes(op.output_type)))
> +for input_type in op.input_types:
> +  if not type_has_size(input_type):

The indent looks off here, mixed tabs?

with that fixed:
Reviewed-by: Dylan Baker 


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Re: [Mesa-dev] [PATCH] anv: change BLOCK_POOL_MEMFD_SIZE to exactly 2GB

[Jason Ekstrand]

On Thu, Mar 9, 2017 at 8:37 AM, Eero Tamminen 
wrote:

> HI,
>
> On 09.03.2017 13:28, Tapani Pälli wrote:
> ...
>
>> We had some discussion today with Eero and came to conclusion that maybe
>> that 2GB is actually too big for 32bit system anyway and should consider
>> to have even smaller block pool size in this case? Or should I just send
>> a patch that adds '- 1' to ftruncate call? Opinions?
>>
>
> Vulkan driver taking 2GB out of application address space, doesn't leave
> that much for rest of the memory mappings, if the application itself would
> want to mmap() some large data files.
>

That's not really what's going on.  We ftruncate the file to 2GB to make
sure it's "big enough" but we only mmap a very small portion of it.
Dropping the size to 1GB should be just fine.
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Re: [Mesa-dev] [RFC 02/11] glsl: Add "built-in" function to do neg(fp64)

[Ian Romanick]

On 03/03/2017 09:13 AM, Ilia Mirkin wrote:
> On Fri, Mar 3, 2017 at 11:57 AM, tournier.elie  
> wrote:
>> On 3 March 2017 at 16:29, Ilia Mirkin  wrote:
>>> On Fri, Mar 3, 2017 at 11:22 AM, Elie Tournier  
>>> wrote:
 Signed-off-by: Elie Tournier 
 ---
  src/compiler/glsl/builtin_float64.h | 19 +++
  src/compiler/glsl/builtin_functions.cpp |  4 
  src/compiler/glsl/builtin_functions.h   |  3 +++
  src/compiler/glsl/float64.glsl  | 10 ++
  4 files changed, 36 insertions(+)

 diff --git a/src/compiler/glsl/builtin_float64.h 
 b/src/compiler/glsl/builtin_float64.h
 index c1ec89d210..6df91e10f5 100644
 --- a/src/compiler/glsl/builtin_float64.h
 +++ b/src/compiler/glsl/builtin_float64.h
 @@ -17,3 +17,22 @@ fabs64(void *mem_ctx, builtin_available_predicate avail)
 sig->replace_parameters(_parameters);
 return sig;
  }
 +ir_function_signature *
 +fneg64(void *mem_ctx, builtin_available_predicate avail)
 +{
 +   ir_function_signature *const sig =
 +  new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
 +   ir_factory body(>body, mem_ctx);
 +   sig->is_defined = true;
 +
 +   exec_list sig_parameters;
 +
 +   ir_variable *const r000C = new(mem_ctx) 
 ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
 +   sig_parameters.push_tail(r000C);
 +   body.emit(assign(r000C, bit_xor(swizzle_x(r000C), 
 body.constant(2147483648u)), 0x01));
 +
 +   body.emit(ret(r000C));
 +
 +   sig->replace_parameters(_parameters);
 +   return sig;
 +}
 diff --git a/src/compiler/glsl/builtin_functions.cpp 
 b/src/compiler/glsl/builtin_functions.cpp
 index b0b1781725..a189b84190 100644
 --- a/src/compiler/glsl/builtin_functions.cpp
 +++ b/src/compiler/glsl/builtin_functions.cpp
 @@ -3133,6 +3133,10 @@ builtin_builder::create_builtins()
  generate_ir::fabs64(mem_ctx, integer_functions_supported),
  NULL);

 +   add_function("__builtin_fneg64",
 +generate_ir::fneg64(mem_ctx, integer_functions_supported),
 +NULL);
 +
  #undef F
  #undef FI
  #undef FIUD_VEC
 diff --git a/src/compiler/glsl/builtin_functions.h 
 b/src/compiler/glsl/builtin_functions.h
 index abe02d97b6..37c6cc33c2 100644
 --- a/src/compiler/glsl/builtin_functions.h
 +++ b/src/compiler/glsl/builtin_functions.h
 @@ -66,6 +66,9 @@ sign64(void *mem_ctx, builtin_available_predicate avail);
  ir_function_signature *
  fabs64(void *mem_ctx, builtin_available_predicate avail);

 +ir_function_signature *
 +fneg64(void *mem_ctx, builtin_available_predicate avail);
 +
  }

  #endif /* BULITIN_FUNCTIONS_H */
 diff --git a/src/compiler/glsl/float64.glsl 
 b/src/compiler/glsl/float64.glsl
 index b8f0c2e444..82875e9407 100644
 --- a/src/compiler/glsl/float64.glsl
 +++ b/src/compiler/glsl/float64.glsl
 @@ -26,3 +26,13 @@ fabs64( uvec2 a )
  a.x &= 0x7FFFu;
  return a;
  }
 +
 +/* Negate value of a Float64 :
 + * Toggle the sign bit
 + */
 +uvec2
 +fneg64( uvec2 a )
 +{
 +a.x ^= (1u<<31);
>>>
>>> Is this right for NaN? Presumably neg(NaN) should == NaN.
>>
>> The IEEE 754 standard say :
>>
>> " 6.3 The sign bit
>>
>> When either an input or result is NaN, this standard does not
>> interpret the sign of a NaN. Note, however,
>> that operations on bit strings copy, negate, abs, copySign specify the
>> sign bit of a NaN result,
>> sometimes based upon the sign bit of a NaN operand. The logical
>> predicate totalOrder is also affected by
>> the sign bit of a NaN operand. For all other operations, this standard
>> does not specify the sign bit of a NaN
>> result, even when there is only one input NaN, or when the NaN is
>> produced from an invalid operation. "
>>
>> So neg(NaN) == NaN
> 
> Right ... I guess I meant that there's a certain amount of
> normalization that's required to be applied to results of floating
> point operations. I was wondering if the sign bit of a NaN had to be
> cleared, so that it would be in canonical form. (Just like you'd set
> all of the mantissa bits, even though setting any of them results in a
> NaN when exp == 0x7ff.) You've been digging in the FP64 standard a lot
> more than I have, so if you think it's acceptable to have a fp64
> function return a NaN with the sign bit set, that's fine by me.

This would be easy enough to test, and we probably should.  We can check
unpackDouble2x32(-packDouble2x32(uvec2_that_is_NAN)) ==
unpackDouble2x32(packDouble2x32(uvec2_that_is_NAN)).  We could also
check this on a CPU.

>   -ilia

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Re: [Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

[Ian Romanick]

On 03/03/2017 11:16 AM, Jason Ekstrand wrote:
> Hey Elie!
> 
> On Fri, Mar 3, 2017 at 8:22 AM, Elie Tournier  > wrote:
> 
> From: Elie Tournier  >
> 
> This series is based on Ian's work about GL_ARB_gpu_shader_int64 [1].
> The goal is to expose GL_ARB_shader_fp64 to OpenGL 3.0 GPUs.
> 
> Each function can be independently tested using shader_runner from
> piglit.
> The piglit files are stored on github [2].
> 
> [1]
> https://lists.freedesktop.org/archives/mesa-dev/2016-November/136718.html
> 
> 
> [2] https://github.com/Hopetech/libSoftFloat
> 
> 
> 
> Glad to see this finally turning into code.
> 
> Before, we get too far into things, I'd like to talk about the approach
> a bit.  First off, if we (Intel) are going to use this on any hardware,
> we would really like it to be in NIR.  The reason for this is that NIR
> has a much more powerful algebraic optimizer than GLSL IR and we would
> like to have as few fp64 instructions as possible before we start
> lowering them to piles of integer math.  I believe Ian's plan for this
> was that someone would write a nir_builder back-end for the stand-alone
> compiler.  Unfortunately, he sort-of left that as "an exercise to the
> reader" and no code exists to my knowledge.  If we're going to write
> things in GLSL, we really need that NIR back-end.
> 
> When implemneting int64 (which needs similar lowering) for the Vulkan
> driver, I took the opportunity to try doing it directly in nir_builder
> instead of writing back-end code for the stand-alone compiler.  All in
> all, I'm fairly happy with the result.  You can find my (almost
> finished) branch here:
> 
> https://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/nir-int64
> 
> This approach had several advantages:
> 
>  1. The compiler does less work.  Loops can be automatically unrolled,
> you can choose to use select instead of control-flow, it doesn't
> generate functions that have to be inlined, etc.  Now, in GLSL IR, using
> functions may actually be a requirement because it's a tree-based IR and
> adding stuff to the middle of the tree can be tricky.  Also, I'm pretty
> sure they're a requirement for control-flow.  NIR is flat so it's a bit
> nicer in that regard.
> 
>  2. It doesn't require additional compiler infrastructure for converting
> GLSL to compiler code.  We've gone back-and-forth over the years about
> how much is too much codegen.  At one point, the build process built the
> GLSL compiler and used it to compile GLSL to compiler code for the
> built-ins and then built that into the compiler.  The build system for
> doing this was a mess.  The result was that Eric wrote ir_builder and
> all the code was moved over to that.  A quick look at eiether GLSL IR or
> NIR will show you that we haven't completely rejected codegen but one
> always has to ask if it's really the best solution.  Running the
> stand-alone compiler to generate code and then checking it in isn't a
> terrible solution, but it does seem like at it could be a least one too
> many levels of abstraction.
> 
>  3. It's actually less code.  The nir_builder code is approximately 50%
> larger than the GLSL code but, because you don't have to add built-in
> functions and do all of the other plumbing per-opcode, it actually ends
> up being smaller.  Due to the way vectorization is handled (see next
> point), it also involves a lot less infastructure in the lowering pass. 
> Also, it doesn't need 750 lines of standalone compiler code.
> 
>  4. Because I used the "split" pack/unpack opcodes and bcsel instead of
> "if", everything vectorizes automatically.  It turns a i64vec4 iadd, for
> instance, into a bunch of ivec4 operations and kicks out a i32vec4
> result in the end without ever splitting into 4 int64's.  (The one
> exception to this is the if statement in the division lowering which
> required a little special care).  This means that we don't have to carry
> extra code to split all "dvec4" values into 4 "double" values because it
> gets handled by the normal nir_alu_to_scalar pass that we already have. 
> Also, because it uses entirely vector instructions, it can work on an
> entire dvec4 at a time on vec4 hardware (all geometry stages on Intel
> Haswell and earlier).  This should make it about 4x as fast on vec4
> hardware.
> 
> The downside, of course, to writing it nir_builder was that I duplicated
> Ian's GLSL IR pass.  I'm not a fan of duplicating code but, if int64 on

I'd say that writing a low-level representation instead of a high-level
representation is also a disadvantage.  It's really easy for most people
with some C experience to look at and understand GLSL.  Looking at and
understanding NIR builder code requires quite a bit more 

[Mesa-dev] [PATCH v2 22/25] intel/compiler: whitespace cleanups

[Emil Velikov]

From: Emil Velikov 

Signed-off-by: Emil Velikov 
---
 src/intel/compiler/brw_eu_util.c | 4 
 src/intel/compiler/brw_wm_iz.cpp | 1 -
 2 files changed, 5 deletions(-)

diff --git a/src/intel/compiler/brw_eu_util.c b/src/intel/compiler/brw_eu_util.c
index 8c84cb4500..31c21a4972 100644
--- a/src/intel/compiler/brw_eu_util.c
+++ b/src/intel/compiler/brw_eu_util.c
@@ -117,7 +117,3 @@ void brw_copy_from_indirect(struct brw_codegen *p,
   brw_MOV(p, byte_offset(dst, delta+16), deref_4f(ptr, delta+16));
}
 }
-
-
-
-
diff --git a/src/intel/compiler/brw_wm_iz.cpp b/src/intel/compiler/brw_wm_iz.cpp
index 5162a36976..11d4f76b36 100644
--- a/src/intel/compiler/brw_wm_iz.cpp
+++ b/src/intel/compiler/brw_wm_iz.cpp
@@ -166,4 +166,3 @@ void fs_visitor::setup_fs_payload_gen4()
 
payload.num_regs = reg;
 }
-
-- 
2.11.1

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[Mesa-dev] [PATCH v2 25/25] configure.ac: do not require the i965 driver for ANV

[Emil Velikov]

From: Emil Velikov 

As of last commit we have the two split, thus we no longer require the
i965 in order to have the ANV driver.

Even though ANV does not link against libdrm nor libdrm_intel, we still
require those as dependencies due to the headers they provide.

Signed-off-by: Emil Velikov 
---
 configure.ac | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/configure.ac b/configure.ac
index 628aec3ceb..aa5cb75dfb 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1786,9 +1786,8 @@ if test -n "$with_vulkan_drivers"; then
 for driver in $VULKAN_DRIVERS; do
 case "x$driver" in
 xintel)
-if test "x$HAVE_I965_DRI" != xyes; then
-AC_MSG_ERROR([Intel Vulkan driver requires the i965 dri 
driver])
-fi
+require_libdrm "i965"
+PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED 
libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
 HAVE_INTEL_VULKAN=yes
 
 ;;
-- 
2.11.1

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[Mesa-dev] [PATCH v2 23/25] intel/tools: Use a makefile included from intel/Makefile.am

[Emil Velikov]

From: Jason Ekstrand 

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Emil Velikov 
---
 configure.ac   |  1 -
 src/Makefile.am|  4 --
 src/intel/Makefile.am  |  2 +
 src/intel/{tools/Makefile.am => Makefile.tools.am} | 54 +++---
 4 files changed, 19 insertions(+), 42 deletions(-)
 rename src/intel/{tools/Makefile.am => Makefile.tools.am} (58%)

diff --git a/configure.ac b/configure.ac
index 19a9cdd007..5ab906898a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2687,7 +2687,6 @@ AC_CONFIG_FILES([Makefile
src/glx/windows/windowsdriproto.pc
src/gtest/Makefile
src/intel/Makefile
-   src/intel/tools/Makefile
src/intel/vulkan/Makefile
src/loader/Makefile
src/mapi/Makefile
diff --git a/src/Makefile.am b/src/Makefile.am
index 25b9253fc3..01e9edfc48 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -117,10 +117,6 @@ if HAVE_EGL
 SUBDIRS += egl
 endif
 
-if HAVE_INTEL_DRIVERS
-SUBDIRS += intel/tools
-endif
-
 ## Requires the i965 compiler (part of mesa) and wayland-drm
 if HAVE_INTEL_VULKAN
 SUBDIRS += intel/vulkan
diff --git a/src/intel/Makefile.am b/src/intel/Makefile.am
index 8d852a09c9..fc749bfc95 100644
--- a/src/intel/Makefile.am
+++ b/src/intel/Makefile.am
@@ -49,6 +49,7 @@ MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D)
 PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS)
 
 noinst_LTLIBRARIES =
+noinst_PROGRAMS =
 check_PROGRAMS =
 TESTS =
 BUILT_SOURCES =
@@ -60,5 +61,6 @@ include Makefile.common.am
 include Makefile.compiler.am
 include Makefile.genxml.am
 include Makefile.isl.am
+include Makefile.tools.am
 
 CLEANFILES += $(BUILT_SOURCES)
diff --git a/src/intel/tools/Makefile.am b/src/intel/Makefile.tools.am
similarity index 58%
rename from src/intel/tools/Makefile.am
rename to src/intel/Makefile.tools.am
index 3ef4f31ade..5838819f25 100644
--- a/src/intel/tools/Makefile.am
+++ b/src/intel/Makefile.tools.am
@@ -1,4 +1,4 @@
-# Copyright © 2016 Intel Corporation
+# Copyright 2015-2017 Intel Corporation
 #
 # Permission is hereby granted, free of charge, to any person obtaining a
 # copy of this software and associated documentation files (the "Software"),
@@ -19,45 +19,25 @@
 # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 # IN THE SOFTWARE.
 
-# The gallium includes are for the util/u_math.h include from main/macros.h
-AM_CPPFLAGS = \
-   $(INTEL_CFLAGS) \
-   $(VALGRIND_CFLAGS) \
-   $(DEFINES) \
-   -I$(top_srcdir)/include \
-   -I$(top_builddir)/src \
-   -I$(top_srcdir)/src \
-   -I$(top_srcdir)/src/mapi \
-   -I$(top_srcdir)/src/mesa \
-   -I$(top_srcdir)/src/gallium/auxiliary \
-   -I$(top_srcdir)/src/gallium/include \
-   -I$(top_builddir)/src/intel \
-   -I$(top_srcdir)/src/intel
+noinst_PROGRAMS += tools/aubinator
 
-aubinator_DEPS = \
-   $(top_builddir)/src/intel/common/libintel_common.la \
-   $(top_builddir)/src/intel/compiler/libintel_compiler.la \
+tools_aubinator_SOURCES = \
+   tools/aubinator.c \
+   tools/decoder.c \
+   tools/decoder.h \
+   tools/disasm.c \
+   tools/gen_disasm.h
+
+tools_aubinator_CFLAGS = \
+   $(AM_CFLAGS) \
+   $(EXPAT_CFLAGS)
+
+tools_aubinator_LDADD = \
+   common/libintel_common.la \
+   compiler/libintel_compiler.la \
$(top_builddir)/src/util/libmesautil.la \
$(PER_GEN_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
+   $(EXPAT_LIBS) \
-lm
-
-noinst_PROGRAMS = aubinator
-
-aubinator_SOURCES = \
-   aubinator.c \
-   decoder.c \
-   decoder.h \
-   disasm.c \
-   gen_disasm.h
-
-aubinator_LDADD = \
-   $(aubinator_DEPS) \
-   $(EXPAT_LIBS)
-
-aubinator_CFLAGS = \
-   $(AM_CFLAGS) \
-   $(EXPAT_CFLAGS) \
-   -I$(top_srcdir)/include \
-   -I$(top_srcdir)/src
-- 
2.11.1

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[Mesa-dev] [PATCH v2 17/25] util/bitscan: use correct signature for ffs/ffsll

[Emil Velikov]

From: Emil Velikov 

Otherwise we'll get errors such as

error: conflicting types for ‘ffs’
error: conflicting types for ‘ffsll’

We might want to improve the heuristics and provide a definition only
when a native one is missing. We can address that at a later stage.

Signed-off-by: Emil Velikov 
---
 src/util/bitscan.c | 4 ++--
 src/util/bitscan.h | 8 
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/util/bitscan.c b/src/util/bitscan.c
index ceca59eba9..7858291bf6 100644
--- a/src/util/bitscan.c
+++ b/src/util/bitscan.c
@@ -32,7 +32,7 @@
 #elif defined(_MSC_VER) && (_M_IX86 || _M_ARM || _M_AMD64 || _M_IA64)
 #else
 int
-ffs(unsigned i)
+ffs(int i)
 {
int bit = 0;
if (!i)
@@ -63,7 +63,7 @@ ffs(unsigned i)
 #elif defined(_MSC_VER) && (_M_AMD64 || _M_ARM || _M_IA64)
 #else
 int
-ffsll(uint64_t val)
+ffsll(long long int val)
 {
int bit;
 
diff --git a/src/util/bitscan.h b/src/util/bitscan.h
index 32e027165c..7a605e0370 100644
--- a/src/util/bitscan.h
+++ b/src/util/bitscan.h
@@ -52,7 +52,7 @@ extern "C" {
 #define ffs __builtin_ffs
 #elif defined(_MSC_VER) && (_M_IX86 || _M_ARM || _M_AMD64 || _M_IA64)
 static inline
-int ffs(unsigned i)
+int ffs(int i)
 {
unsigned long index;
if (_BitScanForward(, i))
@@ -62,14 +62,14 @@ int ffs(unsigned i)
 }
 #else
 extern
-int ffs(unsigned i);
+int ffs(int i);
 #endif
 
 #ifdef HAVE___BUILTIN_FFSLL
 #define ffsll __builtin_ffsll
 #elif defined(_MSC_VER) && (_M_AMD64 || _M_ARM || _M_IA64)
 static inline int
-ffsll(uint64_t i)
+ffsll(long long int i)
 {
unsigned long index;
if (_BitScanForward64(, i))
@@ -79,7 +79,7 @@ ffsll(uint64_t i)
 }
 #else
 extern int
-ffsll(uint64_t val);
+ffsll(long long int val);
 #endif
 
 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 21/25] intel/compiler: link all tests again gtest, even test_eu_compact"

[Emil Velikov]

From: Emil Velikov 

At the moment all the tests but test_eu_compact are actual C++ gtests.
To simplify things, we can move the gtest.la to the common TEST_LIBS.
As we're here, we can rename change the test extension [to .cpp] to
avoid using the confusing dummy.cpp.

Add a nice comment in the makefile for posterity.

Signed-off-by: Emil Velikov 
---
 src/intel/Makefile.compiler.am | 38 +++---
 .../{test_eu_compact.c => test_eu_compact.cpp} |  2 +-
 2 files changed, 13 insertions(+), 27 deletions(-)
 rename src/intel/compiler/{test_eu_compact.c => test_eu_compact.cpp} (98%)

diff --git a/src/intel/Makefile.compiler.am b/src/intel/Makefile.compiler.am
index b30c01a5bd..3ab550c96b 100644
--- a/src/intel/Makefile.compiler.am
+++ b/src/intel/Makefile.compiler.am
@@ -45,6 +45,7 @@ EXTRA_DIST += \
 # 
 
 TEST_LIBS = \
+   $(top_builddir)/src/gtest/libgtest.la \
compiler/libintel_compiler.la \
common/libintel_common.la \
$(top_builddir)/src/compiler/nir/libnir.la \
@@ -69,53 +70,38 @@ check_PROGRAMS += $(COMPILER_TESTS)
 
 compiler_test_fs_cmod_propagation_SOURCES = \
compiler/test_fs_cmod_propagation.cpp
-compiler_test_fs_cmod_propagation_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_fs_cmod_propagation_LDADD = $(TEST_LIBS)
 
 compiler_test_fs_copy_propagation_SOURCES = \
compiler/test_fs_copy_propagation.cpp
-compiler_test_fs_copy_propagation_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_fs_copy_propagation_LDADD = $(TEST_LIBS)
 
 compiler_test_fs_saturate_propagation_SOURCES = \
compiler/test_fs_saturate_propagation.cpp
-compiler_test_fs_saturate_propagation_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_fs_saturate_propagation_LDADD = $(TEST_LIBS)
 
 compiler_test_vf_float_conversions_SOURCES = \
compiler/test_vf_float_conversions.cpp
-compiler_test_vf_float_conversions_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_vf_float_conversions_LDADD = $(TEST_LIBS)
 
 compiler_test_vec4_register_coalesce_SOURCES = \
compiler/test_vec4_register_coalesce.cpp
-compiler_test_vec4_register_coalesce_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_vec4_register_coalesce_LDADD = $(TEST_LIBS)
 
 compiler_test_vec4_copy_propagation_SOURCES = \
compiler/test_vec4_copy_propagation.cpp
-compiler_test_vec4_copy_propagation_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_vec4_copy_propagation_LDADD = $(TEST_LIBS)
 
 compiler_test_vec4_cmod_propagation_SOURCES = \
compiler/test_vec4_cmod_propagation.cpp
-compiler_test_vec4_cmod_propagation_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_vec4_cmod_propagation_LDADD = $(TEST_LIBS)
 
+# Strictly speaking this is neither a C++ test nor using gtest - we can address
+# address that at a later point. Until then, this allows us a to simplify 
things.
 compiler_test_eu_compact_SOURCES = \
-   compiler/test_eu_compact.c
-nodist_EXTRA_compiler_test_eu_compact_SOURCES = dummy.cpp
+   compiler/test_eu_compact.cpp
 compiler_test_eu_compact_LDADD = $(TEST_LIBS)
 
 compiler_test_eu_validate_SOURCES = \
compiler/test_eu_validate.cpp
-compiler_test_eu_validate_LDADD = \
-   $(top_builddir)/src/gtest/libgtest.la \
-   $(TEST_LIBS)
+compiler_test_eu_validate_LDADD = $(TEST_LIBS)
diff --git a/src/intel/compiler/test_eu_compact.c 
b/src/intel/compiler/test_eu_compact.cpp
similarity index 98%
rename from src/intel/compiler/test_eu_compact.c
rename to src/intel/compiler/test_eu_compact.cpp
index d7453613b6..d1f6822f94 100644
--- a/src/intel/compiler/test_eu_compact.c
+++ b/src/intel/compiler/test_eu_compact.cpp
@@ -287,7 +287,7 @@ run_tests(const struct gen_device_info *devinfo)
 int
 main(int argc, char **argv)
 {
-   struct gen_device_info *devinfo = calloc(1, sizeof(*devinfo));
+   struct gen_device_info *devinfo = (struct gen_device_info *)calloc(1, 
sizeof(*devinfo));
devinfo->gen = 6;
bool fail = false;
 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 24/25] intel/vulkan: Get rid of recursive make

[Emil Velikov]

From: Jason Ekstrand 

v2 [Emil Velikov]
 - Various fixes and initial stab at the Android build.
 - Keep the generation rules/EXTRA_DIST outside the conditional
---
 configure.ac   |   1 -
 src/Makefile.am|   5 -
 src/intel/Android.mk   |   2 +-
 src/intel/{vulkan/Android.mk => Android.vulkan.mk} |  24 +--
 src/intel/Makefile.am  |   6 +
 src/intel/Makefile.sources |  65 ++
 src/intel/Makefile.vulkan.am   | 220 +
 src/intel/vulkan/Makefile.am   | 204 ---
 src/intel/vulkan/Makefile.sources  |  85 
 9 files changed, 305 insertions(+), 307 deletions(-)
 rename src/intel/{vulkan/Android.mk => Android.vulkan.mk} (89%)
 create mode 100644 src/intel/Makefile.vulkan.am
 delete mode 100644 src/intel/vulkan/Makefile.am
 delete mode 100644 src/intel/vulkan/Makefile.sources

diff --git a/configure.ac b/configure.ac
index 5ab906898a..628aec3ceb 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2687,7 +2687,6 @@ AC_CONFIG_FILES([Makefile
src/glx/windows/windowsdriproto.pc
src/gtest/Makefile
src/intel/Makefile
-   src/intel/vulkan/Makefile
src/loader/Makefile
src/mapi/Makefile
src/mapi/es1api/glesv1_cm.pc
diff --git a/src/Makefile.am b/src/Makefile.am
index 01e9edfc48..aa5f8aaf7d 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -117,11 +117,6 @@ if HAVE_EGL
 SUBDIRS += egl
 endif
 
-## Requires the i965 compiler (part of mesa) and wayland-drm
-if HAVE_INTEL_VULKAN
-SUBDIRS += intel/vulkan
-endif
-
 # Requires wayland-drm
 if HAVE_RADEON_VULKAN
 SUBDIRS += amd/vulkan
diff --git a/src/intel/Android.mk b/src/intel/Android.mk
index be2ba2fd9e..db6c770f35 100644
--- a/src/intel/Android.mk
+++ b/src/intel/Android.mk
@@ -30,4 +30,4 @@ include $(LOCAL_PATH)/Android.common.mk
 include $(LOCAL_PATH)/Android.compiler.mk
 include $(LOCAL_PATH)/Android.genxml.mk
 include $(LOCAL_PATH)/Android.isl.mk
-include $(LOCAL_PATH)/vulkan/Android.mk
+include $(LOCAL_PATH)/Android.vulkan.mk
diff --git a/src/intel/vulkan/Android.mk b/src/intel/Android.vulkan.mk
similarity index 89%
rename from src/intel/vulkan/Android.mk
rename to src/intel/Android.vulkan.mk
index 69e4d0c648..65357afef2 100644
--- a/src/intel/vulkan/Android.mk
+++ b/src/intel/Android.vulkan.mk
@@ -23,7 +23,7 @@ LOCAL_PATH := $(call my-dir)
 include $(CLEAR_VARS)
 include $(LOCAL_PATH)/Makefile.sources
 
-VK_ENTRYPOINTS_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/anv_entrypoints_gen.py
+VK_ENTRYPOINTS_SCRIPT := $(MESA_PYTHON2) 
$(LOCAL_PATH)/vulkan/anv_entrypoints_gen.py
 
 VULKAN_COMMON_INCLUDES := \
$(MESA_TOP)/include/vulkan \
@@ -51,15 +51,16 @@ intermediates := $(call local-generated-sources-dir)
 LOCAL_C_INCLUDES := \
$(VULKAN_COMMON_INCLUDES)
 
-LOCAL_GENERATED_SOURCES += $(intermediates)/anv_entrypoints.h
-LOCAL_GENERATED_SOURCES += $(intermediates)/dummy.c
+LOCAL_GENERATED_SOURCES += $(intermediates)/vulkan/anv_entrypoints.h
+LOCAL_GENERATED_SOURCES += $(intermediates)/vulkan/dummy.c
 
-$(intermediates)/dummy.c:
+$(intermediates)/vulkan/dummy.c:
@mkdir -p $(dir $@)
@echo "Gen Dummy: $(PRIVATE_MODULE) <= $(notdir $(@))"
$(hide) touch $@
 
-$(intermediates)/anv_entrypoints.h:
+$(intermediates)/vulkan/anv_entrypoints.h:
+   @mkdir -p $(dir $@)
$(hide) cat $(MESA_TOP)/src/vulkan/registry/vk.xml | 
$(VK_ENTRYPOINTS_SCRIPT) header > $@
 
 LOCAL_EXPORT_C_INCLUDE_DIRS := \
@@ -84,7 +85,7 @@ include $(CLEAR_VARS)
 LOCAL_MODULE := libmesa_anv_gen7
 LOCAL_MODULE_CLASS := STATIC_LIBRARIES
 
-LOCAL_SRC_FILES := $(GEN7_FILES)
+LOCAL_SRC_FILES := $(VULKAN_GEN7_FILES)
 LOCAL_CFLAGS := -DGEN_VERSIONx10=70
 
 LOCAL_C_INCLUDES := $(ANV_INCLUDES)
@@ -104,7 +105,7 @@ include $(CLEAR_VARS)
 LOCAL_MODULE := libmesa_anv_gen75
 LOCAL_MODULE_CLASS := STATIC_LIBRARIES
 
-LOCAL_SRC_FILES := $(GEN75_FILES)
+LOCAL_SRC_FILES := $(VULKAN_GEN75_FILES)
 LOCAL_CFLAGS := -DGEN_VERSIONx10=75
 
 LOCAL_C_INCLUDES := $(ANV_INCLUDES)
@@ -124,7 +125,7 @@ include $(CLEAR_VARS)
 LOCAL_MODULE := libmesa_anv_gen8
 LOCAL_MODULE_CLASS := STATIC_LIBRARIES
 
-LOCAL_SRC_FILES := $(GEN8_FILES)
+LOCAL_SRC_FILES := $(VULKAN_GEN8_FILES)
 LOCAL_CFLAGS := -DGEN_VERSIONx10=80
 
 LOCAL_C_INCLUDES := $(ANV_INCLUDES)
@@ -144,7 +145,7 @@ include $(CLEAR_VARS)
 LOCAL_MODULE := libmesa_anv_gen9
 LOCAL_MODULE_CLASS := STATIC_LIBRARIES
 
-LOCAL_SRC_FILES := $(GEN9_FILES)
+LOCAL_SRC_FILES := $(VULKAN_GEN9_FILES)
 LOCAL_CFLAGS := -DGEN_VERSIONx10=90
 
 LOCAL_C_INCLUDES := $(ANV_INCLUDES)
@@ -177,9 +178,10 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
libmesa_genxml \
libmesa_vulkan_util
 
-LOCAL_GENERATED_SOURCES += $(intermediates)/anv_entrypoints.c
+LOCAL_GENERATED_SOURCES += 

[Mesa-dev] [PATCH v2 16/25] i965: add missing brw_defines.h include in brw_program.c

[Emil Velikov]

From: Emil Velikov 

File is using MI_LOAD_REGISTER_IMM, GEN7_CACHE_MODE_1 and others as
defined in the header.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_state_upload.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 0fcbb73c9c..f22567d2f6 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -32,6 +32,7 @@
 
 
 #include "brw_context.h"
+#include "brw_defines.h"
 #include "brw_state.h"
 #include "brw_program.h"
 #include "drivers/common/meta.h"
-- 
2.11.1

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[Mesa-dev] [PATCH v2 20/25] i965: remove i965_symbols_test reference from .gitignore

[Emil Velikov]

From: Emil Velikov 

The test/binary was removed back in 2012. With that one gone, we can
drop the .gitignore file all together.

Cc: Eric Anholt 
Fixes: c8850394423 ("i965: Drop the missing symbols link test.")
Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/.gitignore | 1 -
 1 file changed, 1 deletion(-)
 delete mode 100644 src/mesa/drivers/dri/i965/.gitignore

diff --git a/src/mesa/drivers/dri/i965/.gitignore 
b/src/mesa/drivers/dri/i965/.gitignore
deleted file mode 100644
index b806e740c2..00
--- a/src/mesa/drivers/dri/i965/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-i965_symbols_test
-- 
2.11.1

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[Mesa-dev] [PATCH v2 18/25] i965: split EU defines to brw_eu_defines.h

[Emil Velikov]

From: Emil Velikov 

Split out the EU defines from the 'generic' ones, as the former are more
compiler oriented.

With a later commit we'll move brw_eu_defines.h alongside the compiler
infra to src/intel/. Pulling all the defines in there seems overzealous.

Some defines are used by both i965 and the i965 compiler. Those are
moved to brw_eu_defines.h, and annotated accordingly. The i965 users
were updated to have the extre include to indicate that.

With future work we might provide a better, split but for now this seems
reasonable.

Cc: Kenneth Graunke 
Cc: Jason Ekstrand 
Signed-off-by: Emil Velikov 
---
 src/intel/blorp/blorp_clear.c|2 +-
 src/mesa/drivers/dri/i965/Makefile.sources   |3 +-
 src/mesa/drivers/dri/i965/brw_defines.h  | 1188 
 src/mesa/drivers/dri/i965/brw_disasm.c   |2 +-
 src/mesa/drivers/dri/i965/brw_draw.c |1 +
 src/mesa/drivers/dri/i965/brw_eu.c   |2 +-
 src/mesa/drivers/dri/i965/brw_eu.h   |2 +-
 src/mesa/drivers/dri/i965/brw_eu_defines.h   | 1246 ++
 src/mesa/drivers/dri/i965/brw_eu_emit.c  |2 +-
 src/mesa/drivers/dri/i965/brw_eu_util.c  |2 +-
 src/mesa/drivers/dri/i965/brw_inst.h |2 +-
 src/mesa/drivers/dri/i965/brw_misc_state.c   |1 +
 src/mesa/drivers/dri/i965/brw_reg.h  |2 +-
 src/mesa/drivers/dri/i965/brw_shader.h   |2 +-
 src/mesa/drivers/dri/i965/brw_util.c |1 +
 src/mesa/drivers/dri/i965/gen6_clip_state.c  |1 +
 src/mesa/drivers/dri/i965/gen6_wm_state.c|1 +
 src/mesa/drivers/dri/i965/gen7_wm_state.c|1 +
 src/mesa/drivers/dri/i965/gen8_depth_state.c |1 +
 19 files changed, 1264 insertions(+), 1198 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_eu_defines.h

diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 4d63bbe4d9..2c3b4e6bef 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -27,7 +27,7 @@
 #include "util/format_rgb9e5.h"
 
 #include "blorp_priv.h"
-#include "brw_defines.h"
+#include "brw_eu_defines.h"
 
 #include "compiler/nir/nir_builder.h"
 
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index b1776a8513..8c0ef4942b 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -5,10 +5,10 @@ i965_compiler_FILES = \
brw_compiler.h \
brw_dead_control_flow.cpp \
brw_dead_control_flow.h \
-   brw_defines.h \
brw_disasm.c \
brw_eu.c \
brw_eu_compact.c \
+   brw_eu_defines.h \
brw_eu_emit.c \
brw_eu.h \
brw_eu_util.c \
@@ -110,6 +110,7 @@ i965_FILES = \
brw_cs.c \
brw_cs.h \
brw_curbe.c \
+   brw_defines.h \
brw_draw.c \
brw_draw.h \
brw_draw_upload.c \
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index b286990823..885e9ddf2b 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -65,29 +65,6 @@
 # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
 # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
 
-#define _3DPRIM_POINTLIST 0x01
-#define _3DPRIM_LINELIST  0x02
-#define _3DPRIM_LINESTRIP 0x03
-#define _3DPRIM_TRILIST   0x04
-#define _3DPRIM_TRISTRIP  0x05
-#define _3DPRIM_TRIFAN0x06
-#define _3DPRIM_QUADLIST  0x07
-#define _3DPRIM_QUADSTRIP 0x08
-#define _3DPRIM_LINELIST_ADJ  0x09 /* G45+ */
-#define _3DPRIM_LINESTRIP_ADJ 0x0A /* G45+ */
-#define _3DPRIM_TRILIST_ADJ   0x0B /* G45+ */
-#define _3DPRIM_TRISTRIP_ADJ  0x0C /* G45+ */
-#define _3DPRIM_TRISTRIP_REVERSE  0x0D
-#define _3DPRIM_POLYGON   0x0E
-#define _3DPRIM_RECTLIST  0x0F
-#define _3DPRIM_LINELOOP  0x10
-#define _3DPRIM_POINTLIST_BF  0x11
-#define _3DPRIM_LINESTRIP_CONT0x12
-#define _3DPRIM_LINESTRIP_BF  0x13
-#define _3DPRIM_LINESTRIP_CONT_BF 0x14
-#define _3DPRIM_TRIFAN_NOSTIPPLE  0x16
-#define _3DPRIM_PATCHLIST(n) ({ assert(n > 0 && n <= 32); 0x20 + (n - 1); })
-
 #define BRW_ANISORATIO_2 0
 #define BRW_ANISORATIO_4 1
 #define BRW_ANISORATIO_6 2
@@ -497,1128 +474,6 @@ enum brw_wrap_mode {
 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS  1
 
 
-/* Execution Unit (EU) defines
- */
-
-#define BRW_ALIGN_1   0
-#define BRW_ALIGN_16  1
-
-#define BRW_ADDRESS_DIRECT0
-#define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER1
-
-#define BRW_CHANNEL_X 0
-#define BRW_CHANNEL_Y 1
-#define BRW_CHANNEL_Z 2
-#define BRW_CHANNEL_W 3
-
-enum brw_compression {
-   BRW_COMPRESSION_NONE   = 0,
-   BRW_COMPRESSION_2NDHALF= 1,
-   

[Mesa-dev] [PATCH v2 15/25] i965: add missing brw_defines.h include in brw_program.c

[Emil Velikov]

From: Emil Velikov 

File is using the PIPE_CONTROL_* macros as defined in the header.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_program.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
b/src/mesa/drivers/dri/i965/brw_program.c
index dbc39e53f2..7767e54d65 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -44,6 +44,7 @@
 #include "brw_program.h"
 #include "brw_context.h"
 #include "brw_nir.h"
+#include "brw_defines.h"
 #include "intel_batchbuffer.h"
 
 static void
-- 
2.11.1

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[Mesa-dev] [PATCH v2 14/25] i965: add missing #include in brw_inst.h

[Emil Velikov]

From: Emil Velikov 

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_inst.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_inst.h 
b/src/mesa/drivers/dri/i965/brw_inst.h
index e73093eb8d..3284938f90 100644
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -31,6 +31,7 @@
 #ifndef BRW_INST_H
 #define BRW_INST_H
 
+#include 
 #include 
 
 #include "brw_defines.h"
-- 
2.11.1

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[Mesa-dev] [PATCH v2 19/25] i965: Move the back-end compiler to src/intel/compiler

[Emil Velikov]

From: Jason Ekstrand 

Mostly a dummy git mv with a couple of noticable parts:
 - With the earlier header cleanups, nothing in src/intel depends
files from src/mesa/drivers/dri/i965/
 - Both Autoconf and Android builds are addressed. Thanks to Mauro and
Tapani for the fixups in the latter
 - brw_util.[ch] is not really compiler specific, so it's moved to i965.

v2:
 - move brw_eu_defines.h instead of brw_defines.h
 - remove no-longer applicable includes
 - add missing vulkan/ prefix in the Android build (thanks Tapani)

[Emil Velikov: commit message, various small fixes througout]
Signed-off-by: Emil Velikov 
---
 src/intel/Android.blorp.mk |   2 +-
 .../Android.gen.mk => intel/Android.compiler.mk}   |  41 ++-
 src/intel/Android.isl.mk   |   5 +-
 src/intel/Android.mk   |   1 +
 src/intel/Makefile.am  |   6 +-
 src/intel/Makefile.compiler.am | 121 +
 src/intel/Makefile.sources |  90 +++
 src/intel/blorp/blorp.c|   4 +-
 src/intel/blorp/blorp_clear.c  |   2 +-
 src/intel/blorp/blorp_priv.h   |   2 +-
 src/intel/compiler/.gitignore  |  10 ++
 .../dri/i965 => intel/compiler}/brw_cfg.cpp|   0
 .../drivers/dri/i965 => intel/compiler}/brw_cfg.h  |   0
 .../dri/i965 => intel/compiler}/brw_compiler.c |   0
 .../dri/i965 => intel/compiler}/brw_compiler.h |   0
 .../compiler}/brw_dead_control_flow.cpp|   0
 .../compiler}/brw_dead_control_flow.h  |   0
 .../dri/i965 => intel/compiler}/brw_disasm.c   |   0
 .../drivers/dri/i965 => intel/compiler}/brw_eu.c   |   0
 .../drivers/dri/i965 => intel/compiler}/brw_eu.h   |   0
 .../dri/i965 => intel/compiler}/brw_eu_compact.c   |   0
 .../dri/i965 => intel/compiler}/brw_eu_defines.h   |   0
 .../dri/i965 => intel/compiler}/brw_eu_emit.c  |   0
 .../dri/i965 => intel/compiler}/brw_eu_util.c  |   0
 .../dri/i965 => intel/compiler}/brw_eu_validate.c  |   0
 .../drivers/dri/i965 => intel/compiler}/brw_fs.cpp |   0
 .../drivers/dri/i965 => intel/compiler}/brw_fs.h   |   0
 .../dri/i965 => intel/compiler}/brw_fs_builder.h   |   0
 .../compiler}/brw_fs_cmod_propagation.cpp  |   0
 .../compiler}/brw_fs_combine_constants.cpp |   0
 .../compiler}/brw_fs_copy_propagation.cpp  |   0
 .../dri/i965 => intel/compiler}/brw_fs_cse.cpp |   0
 .../compiler}/brw_fs_dead_code_eliminate.cpp   |   0
 .../i965 => intel/compiler}/brw_fs_generator.cpp   |   0
 .../compiler}/brw_fs_live_variables.cpp|   0
 .../compiler}/brw_fs_live_variables.h  |   0
 .../i965 => intel/compiler}/brw_fs_lower_d2x.cpp   |   0
 .../i965 => intel/compiler}/brw_fs_lower_pack.cpp  |   0
 .../dri/i965 => intel/compiler}/brw_fs_nir.cpp |   0
 .../compiler}/brw_fs_reg_allocate.cpp  |   0
 .../compiler}/brw_fs_register_coalesce.cpp |   0
 .../compiler}/brw_fs_saturate_propagation.cpp  |   0
 .../compiler}/brw_fs_sel_peephole.cpp  |   0
 .../compiler}/brw_fs_surface_builder.cpp   |   0
 .../compiler}/brw_fs_surface_builder.h |   0
 .../i965 => intel/compiler}/brw_fs_validate.cpp|   0
 .../dri/i965 => intel/compiler}/brw_fs_visitor.cpp |   0
 .../drivers/dri/i965 => intel/compiler}/brw_inst.h |   0
 .../compiler}/brw_interpolation_map.c  |   0
 .../dri/i965 => intel/compiler}/brw_ir_allocator.h |   0
 .../dri/i965 => intel/compiler}/brw_ir_fs.h|   0
 .../dri/i965 => intel/compiler}/brw_ir_vec4.h  |   0
 .../drivers/dri/i965 => intel/compiler}/brw_nir.c  |   0
 .../drivers/dri/i965 => intel/compiler}/brw_nir.h  |   0
 .../compiler}/brw_nir_analyze_boolean_resolves.c   |   0
 .../compiler}/brw_nir_attribute_workarounds.c  |   0
 .../i965 => intel/compiler}/brw_nir_intrinsics.c   |   0
 .../compiler}/brw_nir_opt_peephole_ffma.c  |   0
 .../compiler}/brw_nir_tcs_workarounds.c|   0
 .../compiler}/brw_nir_trig_workarounds.py  |   0
 .../dri/i965 => intel/compiler}/brw_packed_float.c |   0
 .../compiler}/brw_predicated_break.cpp |   0
 .../drivers/dri/i965 => intel/compiler}/brw_reg.h  |   0
 .../compiler}/brw_schedule_instructions.cpp|   0
 .../dri/i965 => intel/compiler}/brw_shader.cpp |   0
 .../dri/i965 => intel/compiler}/brw_shader.h   |   0
 .../dri/i965 => intel/compiler}/brw_vec4.cpp   |   0
 .../drivers/dri/i965 => intel/compiler}/brw_vec4.h |   0
 .../dri/i965 => intel/compiler}/brw_vec4_builder.h |   0
 .../compiler}/brw_vec4_cmod_propagation.cpp|   0
 .../compiler}/brw_vec4_copy_propagation.cpp|   0
 .../dri/i965 => intel/compiler}/brw_vec4_cse.cpp   |   0
 .../compiler}/brw_vec4_dead_code_eliminate.cpp |   0
 .../i965 => 

[Mesa-dev] [PATCH v2 13/25] i965: move brw_define.h ifndef guard to the top

[Emil Velikov]

From: Emil Velikov 

Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_defines.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 28f180b279..b286990823 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -29,6 +29,9 @@
   *   Keith Whitwell 
   */
 
+#ifndef BRW_DEFINES_H
+#define BRW_DEFINES_H
+
 #include "util/macros.h"
 
 #define INTEL_MASK(high, low) (((1u<<((high)-(low)+1))-1)<<(low))
@@ -49,9 +52,6 @@
  */
 #define REG_MASK(value) ((value) << 16)
 
-#ifndef BRW_DEFINES_H
-#define BRW_DEFINES_H
-
 /* 3D state:
  */
 #define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */
-- 
2.11.1

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[Mesa-dev] [PATCH v2 11/25] i965: remove unused brw_program.h include

[Emil Velikov]

From: Emil Velikov 

Neither of the changed files requires the brw_program.h include. Since
we're about to move them [to src/intel/compiler] with the next commit
there's no point in having the include.

Let alone the very confusing compiler include directive
[-I${top_srcdir}/src/mesa/drivers/dri/i965/] that one would have to use.

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 1 -
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp   | 1 -
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 -
 src/mesa/drivers/dri/i965/brw_vec4.h | 1 -
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 1 -
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp   | 1 -
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp   | 1 -
 7 files changed, 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2eefe00801..c410efc29d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -34,7 +34,6 @@
 #include "brw_nir.h"
 #include "brw_vec4_gs_visitor.h"
 #include "brw_cfg.h"
-#include "brw_program.h"
 #include "brw_dead_control_flow.h"
 #include "common/gen_debug.h"
 #include "compiler/glsl_types.h"
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 65c75e63d2..aeed6a1197 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -30,7 +30,6 @@
 #include "brw_eu.h"
 #include "brw_fs.h"
 #include "brw_cfg.h"
-#include "brw_program.h"
 
 static enum brw_reg_file
 brw_file_from_reg(fs_reg *reg)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 3d5967aaec..d403dec535 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -25,7 +25,6 @@
 #include "brw_fs.h"
 #include "brw_fs_surface_builder.h"
 #include "brw_nir.h"
-#include "brw_program.h"
 
 using namespace brw;
 using namespace brw::surface_access;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 29b203af89..a84048d8c6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -25,7 +25,6 @@
 #define BRW_VEC4_H
 
 #include "brw_shader.h"
-#include "brw_program.h"
 
 #ifdef __cplusplus
 #include "brw_ir_vec4.h"
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index abf522a782..2ac287f17f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -23,7 +23,6 @@
 #include "brw_vec4.h"
 #include "brw_cfg.h"
 #include "brw_eu.h"
-#include "brw_program.h"
 #include "common/gen_debug.h"
 
 using namespace brw;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index a7f048a0f8..4e88b79504 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -25,7 +25,6 @@
 #include "brw_vec4.h"
 #include "brw_vec4_builder.h"
 #include "brw_vec4_surface_builder.h"
-#include "brw_program.h"
 
 using namespace brw;
 using namespace brw::surface_access;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index f376618b3c..262a084ca8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -24,7 +24,6 @@
 #include "brw_vec4.h"
 #include "brw_cfg.h"
 #include "brw_eu.h"
-#include "brw_program.h"
 
 namespace brw {
 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 06/25] intel/isl: Stop linking libi965_compiler.la into tests

[Emil Velikov]

From: Jason Ekstrand 

Reviewed-by: Emil Velikov 
---
 src/intel/Makefile.isl.am | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/intel/Makefile.isl.am b/src/intel/Makefile.isl.am
index 5a317f522b..ee2215df1d 100644
--- a/src/intel/Makefile.isl.am
+++ b/src/intel/Makefile.isl.am
@@ -74,7 +74,6 @@ TESTS += $(check_PROGRAMS)
 isl_tests_isl_surf_get_image_offset_test_LDADD = \
common/libintel_common.la \
isl/libisl.la \
-   $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \
-lm
 
 # 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 09/25] i965: remove dead brw_new_shader() declaration

[Emil Velikov]

From: Emil Velikov 

Cc: Timothy Arceri 
Fixes: 194537ebe44 ("mesa/glsl/i965: remove Driver.NewShader()")
Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_program.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_program.h 
b/src/mesa/drivers/dri/i965/brw_program.h
index 68cdd2e2f6..c961c702b0 100644
--- a/src/mesa/drivers/dri/i965/brw_program.h
+++ b/src/mesa/drivers/dri/i965/brw_program.h
@@ -80,8 +80,6 @@ bool brw_fs_precompile(struct gl_context *ctx, struct 
gl_program *prog);
 bool brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog);
 
 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program 
*prog);
-struct gl_linked_shader *brw_new_shader(gl_shader_stage stage);
-
 
 void brw_upload_tcs_prog(struct brw_context *brw);
 void brw_tcs_populate_key(struct brw_context *brw,
-- 
2.11.1

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[Mesa-dev] [PATCH v2 04/25] radv/wsi: Don't include wayland headers

[Emil Velikov]

From: Emil Velikov 

Unused and we'll rework the way wayland-drm-client-protocol.h is
generated with later commit.

Signed-off-by: Emil Velikov 
---
 src/amd/vulkan/radv_wsi_wayland.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/src/amd/vulkan/radv_wsi_wayland.c 
b/src/amd/vulkan/radv_wsi_wayland.c
index c6a9667d90..d9a4c72d67 100644
--- a/src/amd/vulkan/radv_wsi_wayland.c
+++ b/src/amd/vulkan/radv_wsi_wayland.c
@@ -23,9 +23,6 @@
  * IN THE SOFTWARE.
  */
 
-#include 
-#include 
-
 #include "wsi_common_wayland.h"
 #include "radv_private.h"
 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 07/25] anv: Stop including brw_context.h

[Emil Velikov]

From: Jason Ekstrand 

---
 src/intel/vulkan/anv_private.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 27c1923945..2552226879 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -67,9 +67,9 @@ struct gen_l3_config;
 #include 
 
 #include "anv_entrypoints.h"
-#include "brw_context.h"
 #include "isl/isl.h"
 
+#include "common/gen_debug.h"
 #include "wsi_common.h"
 
 /* Allowing different clear colors requires us to perform a depth resolve at
-- 
2.11.1

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[Mesa-dev] [PATCH v2 08/25] i965: remove unused brw_cs.h include

[Emil Velikov]

From: Emil Velikov 

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index ead5b26132..2eefe00801 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -31,7 +31,6 @@
 #include "main/macros.h"
 #include "brw_eu.h"
 #include "brw_fs.h"
-#include "brw_cs.h"
 #include "brw_nir.h"
 #include "brw_vec4_gs_visitor.h"
 #include "brw_cfg.h"
-- 
2.11.1

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[Mesa-dev] [PATCH v2 01/25] wayland: move .gitignore where applicable

[Emil Velikov]

From: Emil Velikov 

Strictly speaking things work as-is, but let's move the file alongside
the artefacts it references. Analogous to all other places in mesa.

Signed-off-by: Emil Velikov 
---
 src/egl/wayland/{ => wayland-drm}/.gitignore | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename src/egl/wayland/{ => wayland-drm}/.gitignore (100%)

diff --git a/src/egl/wayland/.gitignore b/src/egl/wayland/wayland-drm/.gitignore
similarity index 100%
rename from src/egl/wayland/.gitignore
rename to src/egl/wayland/wayland-drm/.gitignore
-- 
2.11.1

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[Mesa-dev] [PATCH v2 10/25] i965: remove duplicate declaration of brw_mark_surface_used

[Emil Velikov]

From: Emil Velikov 

Function was made static and moved to another header with earlier
commit.

Cc: Jason Ekstrand 
Fixes: 760c8a1d950 ("i965: Make mark_surface_used a static inline in 
brw_compiler.h")
Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_program.h | 4 
 1 file changed, 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_program.h 
b/src/mesa/drivers/dri/i965/brw_program.h
index c961c702b0..687b554b3b 100644
--- a/src/mesa/drivers/dri/i965/brw_program.h
+++ b/src/mesa/drivers/dri/i965/brw_program.h
@@ -59,10 +59,6 @@ brw_assign_common_binding_table_offsets(const struct 
gen_device_info *devinfo,
 uint32_t next_binding_table_offset);
 
 void
-brw_mark_surface_used(struct brw_stage_prog_data *prog_data,
-  unsigned surf_index);
-
-void
 brw_stage_prog_data_free(const void *prog_data);
 
 void
-- 
2.11.1

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[Mesa-dev] [PATCH v2 12/25] i965: remove unused macros from brw_defines.h

[Emil Velikov]

From: Emil Velikov 

The follow three groups are not used by neither the DRI module nor the
compiler.
 BRW_POLYGON_*_FACING
 BRW_POLYGON_FACING_*
 BRW_STATELESS_BUFFER_*

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/i965/brw_defines.h | 20 +---
 1 file changed, 1 insertion(+), 19 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 796e56af06..28f180b279 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -216,9 +216,6 @@
 #define BRW_ADDRESS_ROUNDING_ENABLE_R_MAG  0x02
 #define BRW_ADDRESS_ROUNDING_ENABLE_R_MIN  0x01
 
-#define BRW_POLYGON_FRONT_FACING 0
-#define BRW_POLYGON_BACK_FACING  1
-
 #define BRW_PREFILTER_ALWAYS 0x0
 #define BRW_PREFILTER_NEVER  0x1
 #define BRW_PREFILTER_LESS   0x2
@@ -499,6 +496,7 @@ enum brw_wrap_mode {
 #define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS  0
 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS  1
 
+
 /* Execution Unit (EU) defines
  */
 
@@ -1310,22 +1308,6 @@ enum PACKED brw_width {
BRW_WIDTH_16 = 4,
 };
 
-#define BRW_STATELESS_BUFFER_BOUNDARY_1K  0
-#define BRW_STATELESS_BUFFER_BOUNDARY_2K  1
-#define BRW_STATELESS_BUFFER_BOUNDARY_4K  2
-#define BRW_STATELESS_BUFFER_BOUNDARY_8K  3
-#define BRW_STATELESS_BUFFER_BOUNDARY_16K 4
-#define BRW_STATELESS_BUFFER_BOUNDARY_32K 5
-#define BRW_STATELESS_BUFFER_BOUNDARY_64K 6
-#define BRW_STATELESS_BUFFER_BOUNDARY_128K7
-#define BRW_STATELESS_BUFFER_BOUNDARY_256K8
-#define BRW_STATELESS_BUFFER_BOUNDARY_512K9
-#define BRW_STATELESS_BUFFER_BOUNDARY_1M  10
-#define BRW_STATELESS_BUFFER_BOUNDARY_2M  11
-
-#define BRW_POLYGON_FACING_FRONT  0
-#define BRW_POLYGON_FACING_BACK   1
-
 /**
  * Message target: Shared Function ID for where to SEND a message.
  *
-- 
2.11.1

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[Mesa-dev] [PATCH v2 03/25] anv/wsi: Don't include wayland headers

[Emil Velikov]

From: Jason Ekstrand 

Unused and we'll rework the way wayland-drm-client-protocol.h is
generated with later commit.

v2 [Emil]
 - Also remove wayland-client.h

Signed-off-by: Emil Velikov 
---
 src/intel/vulkan/anv_wsi_wayland.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/src/intel/vulkan/anv_wsi_wayland.c 
b/src/intel/vulkan/anv_wsi_wayland.c
index 5d4967145b..3aeb199411 100644
--- a/src/intel/vulkan/anv_wsi_wayland.c
+++ b/src/intel/vulkan/anv_wsi_wayland.c
@@ -21,9 +21,6 @@
  * IN THE SOFTWARE.
  */
 
-#include 
-#include 
-
 #include "vk_format_info.h"
 #include 
 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 02/25] configure.ac: provide a fall-back define for WAYLAND_SCANNER

[Emil Velikov]

From: Emil Velikov 

In some cases, we can end up calling WAYLAND_SCANNER even when
there's no binary. Do follow the other's approach set by
AX_PROG_FLEX/BISON and set the variable to :

Signed-off-by: Emil Velikov 
---
 configure.ac | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/configure.ac b/configure.ac
index d64ed2d3e8..19a9cdd007 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2106,7 +2106,7 @@ PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
 WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner 
wayland-scanner`,
 WAYLAND_SCANNER='')
 if test "x$WAYLAND_SCANNER" = x; then
-AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner])
+AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
 fi
 
 # Do per-EGL platform setups and checks
@@ -2117,7 +2117,7 @@ for plat in $egl_platforms; do
 
PKG_CHECK_MODULES([WAYLAND], [wayland-client >= 
$WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED])
 
-   if test "x$WAYLAND_SCANNER" = x; then
+   if test "x$WAYLAND_SCANNER" = "x:"; then
AC_MSG_ERROR([wayland-scanner is needed to compile the 
wayland egl platform])
fi
;;
-- 
2.11.1

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[Mesa-dev] [PATCH v2 05/25] vulkan/wsi: Generate wayland protocol headers separately from EGL

[Emil Velikov]

From: Jason Ekstrand 

Previously, we were depending on EGL for generating the headers and
providing the protocol symbols. However, since neither Vulkan driver
actually wants to link against EGL, this is kind of pointless. It also
creates a weird build dependency.

v2 [Jason]
 - Add missing wsi/ prefix, MKDIR_GEN

v3 [Emil Velikov]
 - include BUILT_SOURCES/generation rules outside of conditional

Reviewed-by: Emil Velikov 
---
 src/amd/vulkan/Makefile.am  |  3 ---
 src/intel/vulkan/Makefile.am|  7 ---
 src/vulkan/Makefile.am  | 20 
 src/vulkan/Makefile.sources |  4 
 src/vulkan/wsi/.gitignore   |  2 ++
 src/vulkan/wsi/wsi_common_wayland.c |  2 +-
 6 files changed, 23 insertions(+), 15 deletions(-)
 create mode 100644 src/vulkan/wsi/.gitignore

diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am
index 3379a3d6a8..fbd9f5a030 100644
--- a/src/amd/vulkan/Makefile.am
+++ b/src/amd/vulkan/Makefile.am
@@ -77,15 +77,12 @@ endif
 
 if HAVE_PLATFORM_WAYLAND
 AM_CPPFLAGS += \
-   -I$(top_builddir)/src/egl/wayland/wayland-drm \
-   -I$(top_srcdir)/src/egl/wayland/wayland-drm \
$(WAYLAND_CFLAGS) \
-DVK_USE_PLATFORM_WAYLAND_KHR
 
 VULKAN_SOURCES += $(VULKAN_WSI_WAYLAND_FILES)
 
 VULKAN_LIB_DEPS += \
-   $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \
$(WAYLAND_LIBS)
 endif
 
diff --git a/src/intel/vulkan/Makefile.am b/src/intel/vulkan/Makefile.am
index 3cd01e4d02..6c902b52e1 100644
--- a/src/intel/vulkan/Makefile.am
+++ b/src/intel/vulkan/Makefile.am
@@ -63,12 +63,6 @@ AM_CPPFLAGS = \
-I$(top_builddir)/src/intel \
-I$(top_srcdir)/src/intel
 
-if HAVE_PLATFORM_WAYLAND
-AM_CPPFLAGS += \
-   -I$(top_builddir)/src/egl/wayland/wayland-drm \
-   -I$(top_srcdir)/src/egl/wayland/wayland-drm
-endif
-
 AM_CPPFLAGS += \
$(LIBDRM_CFLAGS) \
$(INTEL_CFLAGS) \
@@ -119,7 +113,6 @@ AM_CPPFLAGS += \
 VULKAN_SOURCES += $(VULKAN_WSI_WAYLAND_FILES)
 
 VULKAN_LIB_DEPS += \
-   $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \
$(WAYLAND_LIBS)
 endif
 
diff --git a/src/vulkan/Makefile.am b/src/vulkan/Makefile.am
index f7aca8e937..f8d6fae40b 100644
--- a/src/vulkan/Makefile.am
+++ b/src/vulkan/Makefile.am
@@ -48,17 +48,29 @@ VULKAN_WSI_SOURCES += $(VULKAN_WSI_X11_FILES)
 VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS) -lX11-xcb
 endif
 
+BUILT_SOURCES += $(VULKAN_WSI_WAYLAND_GENERATED_FILES)
+CLEANFILES = $(BUILT_SOURCES)
+
+WL_DRM_XML = $(top_srcdir)/src/egl/wayland/wayland-drm/wayland-drm.xml
+
+wsi/wayland-drm-protocol.c : $(WL_DRM_XML)
+   $(MKDIR_GEN)
+   $(AM_V_GEN)$(WAYLAND_SCANNER) code < $< > $@
+
+wsi/wayland-drm-client-protocol.h : $(WL_DRM_XML)
+   $(MKDIR_GEN)
+   $(AM_V_GEN)$(WAYLAND_SCANNER) client-header < $< > $@
+
 if HAVE_PLATFORM_WAYLAND
 AM_CPPFLAGS += \
-   -I$(top_builddir)/src/egl/wayland/wayland-drm \
-   -I$(top_srcdir)/src/egl/wayland/wayland-drm \
$(WAYLAND_CFLAGS) \
-DVK_USE_PLATFORM_WAYLAND_KHR
 
-VULKAN_WSI_SOURCES += $(VULKAN_WSI_WAYLAND_FILES)
+VULKAN_WSI_SOURCES += \
+   $(VULKAN_WSI_WAYLAND_FILES) \
+   $(VULKAN_WSI_WAYLAND_GENERATED_FILES)
 
 VULKAN_LIB_DEPS += \
-   $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \
$(WAYLAND_LIBS)
 endif
 
diff --git a/src/vulkan/Makefile.sources b/src/vulkan/Makefile.sources
index 7510d7264e..63f4ac1162 100644
--- a/src/vulkan/Makefile.sources
+++ b/src/vulkan/Makefile.sources
@@ -7,6 +7,10 @@ VULKAN_WSI_WAYLAND_FILES := \
wsi/wsi_common_wayland.c \
wsi/wsi_common_wayland.h
 
+VULKAN_WSI_WAYLAND_GENERATED_FILES := \
+   wsi/wayland-drm-protocol.c \
+   wsi/wayland-drm-client-protocol.h
+
 VULKAN_WSI_X11_FILES := \
wsi/wsi_common_x11.c \
wsi/wsi_common_x11.h
diff --git a/src/vulkan/wsi/.gitignore b/src/vulkan/wsi/.gitignore
new file mode 100644
index 00..0b7b71bb66
--- /dev/null
+++ b/src/vulkan/wsi/.gitignore
@@ -0,0 +1,2 @@
+wayland-drm-client-protocol.h
+wayland-drm-protocol.c
diff --git a/src/vulkan/wsi/wsi_common_wayland.c 
b/src/vulkan/wsi/wsi_common_wayland.c
index 67ac0b8372..2e47183b9d 100644
--- a/src/vulkan/wsi/wsi_common_wayland.c
+++ b/src/vulkan/wsi/wsi_common_wayland.c
@@ -22,7 +22,6 @@
  */
 
 #include 
-#include 
 
 #include 
 #include 
@@ -33,6 +32,7 @@
 #include 
 
 #include "wsi_common_wayland.h"
+#include "wayland-drm-client-protocol.h"
 
 #include 
 #include 
-- 
2.11.1

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[Mesa-dev] [PATCH v2 00/25] Move i965 compiler to src/intel/

[Emil Velikov]

Changes since v1 include:

- brw_eu_defines.h split and associated fixes
Split it not perfect, but I think is reasonable for the time being.

  i965: remove unused macros from brw_defines.h
  i965: move brw_define.h ifndef guard to the top
  i965: add missing #include  in brw_inst.h
  i965: add missing brw_defines.h include in brw_program.c
  i965: add missing brw_defines.h include in brw_program.c
  util/bitscan: use correct signature for ffs/ffsll
  i965: split EU defines to brw_eu_defines.h

- removed i965_dri configure dependency when building ANV
  configure.ac: do not require the i965 driver for ANV

- updated includes to be consistent and hence, dropped unneeded -I from the

- android build should be fixed

- reword the test_eu_compact commit message

The lot is available in
https://github.com/evelikov/Mesa/commits/compiler-move-v2

Cheers,
Emil

Emil Velikov (18):
  wayland: move .gitignore where applicable
  configure.ac: provide a fall-back define for WAYLAND_SCANNER
  radv/wsi: Don't include wayland headers
  i965: remove unused brw_cs.h include
  i965: remove dead brw_new_shader() declaration
  i965: remove duplicate declaration of brw_mark_surface_used
  i965: remove unused brw_program.h include
  i965: remove unused macros from brw_defines.h
  i965: move brw_define.h ifndef guard to the top
  i965: add missing #include  in brw_inst.h
  i965: add missing brw_defines.h include in brw_program.c
  i965: add missing brw_defines.h include in brw_program.c
  util/bitscan: use correct signature for ffs/ffsll
  i965: split EU defines to brw_eu_defines.h
  i965: remove i965_symbols_test reference from .gitignore
  intel/compiler: link all tests again gtest, even test_eu_compact"
  intel/compiler: whitespace cleanups
  configure.ac: do not require the i965 driver for ANV

Jason Ekstrand (7):
  anv/wsi: Don't include wayland headers
  vulkan/wsi: Generate wayland protocol headers separately from EGL
  intel/isl: Stop linking libi965_compiler.la into tests
  anv: Stop including brw_context.h
  i965: Move the back-end compiler to src/intel/compiler
  intel/tools: Use a makefile included from intel/Makefile.am
  intel/vulkan: Get rid of recursive make

 configure.ac   |   11 +-
 src/Makefile.am|9 -
 src/amd/vulkan/Makefile.am |3 -
 src/amd/vulkan/radv_wsi_wayland.c  |3 -
 src/egl/wayland/{ => wayland-drm}/.gitignore   |0
 src/intel/Android.blorp.mk |2 +-
 .../Android.gen.mk => intel/Android.compiler.mk}   |   41 +-
 src/intel/Android.isl.mk   |5 +-
 src/intel/Android.mk   |3 +-
 src/intel/{vulkan/Android.mk => Android.vulkan.mk} |   29 +-
 src/intel/Makefile.am  |   14 +-
 src/intel/Makefile.compiler.am |  107 ++
 src/intel/Makefile.isl.am  |1 -
 src/intel/Makefile.sources |  155 +++
 src/intel/{tools/Makefile.am => Makefile.tools.am} |   56 +-
 src/intel/Makefile.vulkan.am   |  220 
 src/intel/blorp/blorp.c|4 +-
 src/intel/blorp/blorp_clear.c  |2 +-
 src/intel/blorp/blorp_priv.h   |2 +-
 .../drivers/dri/i965 => intel/compiler}/.gitignore |9 +-
 .../dri/i965 => intel/compiler}/brw_cfg.cpp|0
 .../drivers/dri/i965 => intel/compiler}/brw_cfg.h  |0
 .../dri/i965 => intel/compiler}/brw_compiler.c |0
 .../dri/i965 => intel/compiler}/brw_compiler.h |0
 .../compiler}/brw_dead_control_flow.cpp|0
 .../compiler}/brw_dead_control_flow.h  |0
 .../dri/i965 => intel/compiler}/brw_disasm.c   |2 +-
 .../drivers/dri/i965 => intel/compiler}/brw_eu.c   |2 +-
 .../drivers/dri/i965 => intel/compiler}/brw_eu.h   |2 +-
 .../dri/i965 => intel/compiler}/brw_eu_compact.c   |0
 src/intel/compiler/brw_eu_defines.h| 1246 
 .../dri/i965 => intel/compiler}/brw_eu_emit.c  |2 +-
 .../dri/i965 => intel/compiler}/brw_eu_util.c  |6 +-
 .../dri/i965 => intel/compiler}/brw_eu_validate.c  |0
 .../drivers/dri/i965 => intel/compiler}/brw_fs.cpp |2 -
 .../drivers/dri/i965 => intel/compiler}/brw_fs.h   |0
 .../dri/i965 => intel/compiler}/brw_fs_builder.h   |0
 .../compiler}/brw_fs_cmod_propagation.cpp  |0
 .../compiler}/brw_fs_combine_constants.cpp |0
 .../compiler}/brw_fs_copy_propagation.cpp  |0
 .../dri/i965 => intel/compiler}/brw_fs_cse.cpp |0
 .../compiler}/brw_fs_dead_code_eliminate.cpp   |0
 .../i965 => intel/compiler}/brw_fs_generator.cpp   |1 -
 .../compiler}/brw_fs_live_variables.cpp|0
 .../compiler}/brw_fs_live_variables.h  |0
 .../i965 => intel/compiler}/brw_fs_lower_d2x.cpp   |

[Mesa-dev] [Bug 100037] [vmwgfx] Invalid SVGA3D command: 1202

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100037

--- Comment #5 from Deepak  ---
Hello,

I meant that I can reproduce it already. Thanks for providing the details.

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[Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

[Jason Ekstrand]

Apart from avoiding some unneeded size cases, this shouldn't have any
actual functional impact.
---
 src/compiler/nir/nir_constant_expressions.py | 51 +++-
 1 file changed, 27 insertions(+), 24 deletions(-)

diff --git a/src/compiler/nir/nir_constant_expressions.py 
b/src/compiler/nir/nir_constant_expressions.py
index 273d6ce..aecca8b 100644
--- a/src/compiler/nir/nir_constant_expressions.py
+++ b/src/compiler/nir/nir_constant_expressions.py
@@ -1,17 +1,19 @@
 #! /usr/bin/python2
 
+import re
+
+type_split_re = re.compile(r'(?P[a-z]+)(?P\d+)')
+
 def type_has_size(type_):
 return type_[-1:].isdigit()
 
+def type_size(type_):
+assert type_has_size(type_)
+return int(type_split_re.match(type_).group('bits'))
+
 def type_sizes(type_):
-if type_.endswith("8"):
-return [8]
-elif type_.endswith("16"):
-return [16]
-elif type_.endswith("32"):
-return [32]
-elif type_.endswith("64"):
-return [64]
+if type_has_size(type_):
+return [type_size(type_)]
 else:
 return [32, 64]
 
@@ -20,23 +22,23 @@ def type_add_size(type_, size):
 return type_
 return type_ + str(size)
 
+def op_bit_sizes(op):
+sizes = set([8, 16, 32, 64])
+if not type_has_size(op.output_type):
+sizes = sizes.intersection(set(type_sizes(op.output_type)))
+for input_type in op.input_types:
+  if not type_has_size(input_type):
+  sizes = sizes.intersection(set(type_sizes(input_type)))
+return sorted(list(sizes))
+
 def get_const_field(type_):
-if type_ == "int32":
-return "i32"
-if type_ == "uint32":
-return "u32"
-if type_ == "int64":
-return "i64"
-if type_ == "uint64":
-return "u64"
 if type_ == "bool32":
 return "u32"
-if type_ == "float32":
-return "f32"
-if type_ == "float64":
-return "f64"
-raise Exception(str(type_))
-assert(0)
+else:
+m = type_split_re.match(type_)
+if not m:
+raise Exception(str(type_))
+return m.group('type')[0] + m.group('bits')
 
 template = """\
 /*
@@ -248,7 +250,7 @@ typedef float float32_t;
 typedef double float64_t;
 typedef bool bool32_t;
 % for type in ["float", "int", "uint"]:
-% for width in [32, 64]:
+% for width in type_sizes(type):
 struct ${type}${width}_vec {
${type}${width}_t x;
${type}${width}_t y;
@@ -273,7 +275,7 @@ evaluate_${name}(MAYBE_UNUSED unsigned num_components, 
unsigned bit_size,
nir_const_value _dst_val = { {0, } };
 
switch (bit_size) {
-   % for bit_size in [32, 64]:
+   % for bit_size in op_bit_sizes(op):
case ${bit_size}: {
   <%
   output_type = type_add_size(op.output_type, bit_size)
@@ -407,4 +409,5 @@ from mako.template import Template
 print Template(template).render(opcodes=opcodes, type_sizes=type_sizes,
 type_has_size=type_has_size,
 type_add_size=type_add_size,
+op_bit_sizes=op_bit_sizes,
 get_const_field=get_const_field)
-- 
2.5.0.400.gff86faf

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