Re: [Mesa-dev] [PATCH 1/3] isl: Add a null surface fill function.

[Jason Ekstrand]

On Fri, Aug 18, 2017 at 9:46 PM, Kenneth Graunke 
wrote:

> On Thursday, August 17, 2017 10:26:44 PM PDT Jason Ekstrand wrote:
> > On August 17, 2017 4:36:42 PM Kenneth Graunke 
> wrote:
> >
> > > ISL already offers functions to fill out most kinds of SURFACE_STATE,
> > > so why not handle null surfaces too?
> > >
> > > Null surfaces are simple, so we can just take the dimensions, rather
> > > than an entirte fill structure.
> > > ---
> > >  src/intel/isl/isl.c   |  7 +++
> > >  src/intel/isl/isl.h   |  4 
> > >  src/intel/isl/isl_genX_priv.h |  3 +++
> > >  src/intel/isl/isl_surface_state.c | 26 ++
> > >  4 files changed, 40 insertions(+)
> > >
> > >  Applies on top of Jason's patches:
> > >  https://lists.freedesktop.org/archives/mesa-dev/2017-August/
> 166628.html
> > >
> > > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > > index 3788f9c2ead..59f512fc050 100644
> > > --- a/src/intel/isl/isl.c
> > > +++ b/src/intel/isl/isl.c
> > > @@ -1811,6 +1811,13 @@ isl_buffer_fill_state_s(const struct isl_device
> > > *dev, void *state,
> > > isl_genX_call(dev, buffer_fill_state_s, state, info);
> > >  }
> > >
> > > +void
> > > +isl_null_fill_state(const struct isl_device *dev, void *state,
> > > +struct isl_extent3d size)
> >
> > I might be inclined to make this an extent4d, assert that one off depth
> and
> > array_length is zero, and take the maximum of the two as the depth.
> Thoughts?
>
> I suppose if you wanted a null surface with a different depth and render
> target view extent, then an isl_extent4d could be useful.  But...neither
> driver actually wants to do that today.  So it seems simpler to keep them
> the same, and make the caller pass the width/height/depth they want the
> surface to have.  Seems like less magic.  That's my preference, anyway.
>

My thought was more that layered rendering is more of a 2d array thing so
you want width, height, and array_len and not depth.  ISL tries very hard
to distinguish between depth and array_len.  To be honest, it's one of the
more annoying parts of the API though it is useful for clerity at some
points.  I think 3D is probably fine in this case.

All three are

Reviewed-by: Jason Ekstrand 


> > > +{
> > > +   isl_genX_call(dev, null_fill_state, state, size);
> >
> > This is so much nicer.  Thanks for complaining.
>
> Thanks for tidying it up :)
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/3] i965: Use ISL for emitting null surface states.

[Jason Ekstrand]

On Thu, Aug 17, 2017 at 4:36 PM, Kenneth Graunke 
wrote:

> We handle the Sandybridge multisampled 2D surface hack here, rather
> than in ISL, because it requires allocating a BO, and is kind of messy.
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources|   2 -
>  src/mesa/drivers/dri/i965/brw_context.c   |   4 +-
>  src/mesa/drivers/dri/i965/brw_context.h   |   5 -
>  src/mesa/drivers/dri/i965/brw_state.h |   8 -
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 119 ++
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 180
> --
>  src/mesa/drivers/dri/i965/gen8_surface_state.c|  82 --
>  7 files changed, 49 insertions(+), 351 deletions(-)
>

Look at that diffstat. :-)


>  delete mode 100644 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
>  delete mode 100644 src/mesa/drivers/dri/i965/gen8_surface_state.c
>
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index 425c883de84..9687eb957e1 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -74,10 +74,8 @@ i965_FILES = \
> gen7_misc_state.c \
> gen7_sol_state.c \
> gen7_urb.c \
> -   gen7_wm_surface_state.c \
> gen8_depth_state.c \
> gen8_multisample_state.c \
> -   gen8_surface_state.c \
> hsw_queryobj.c \
> hsw_sol.c \
> intel_batchbuffer.c \
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c
> b/src/mesa/drivers/dri/i965/brw_context.c
> index d97a24fbf82..d157f059704 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -866,10 +866,10 @@ brwCreateContext(gl_api api,
> brw->gs.base.stage = MESA_SHADER_GEOMETRY;
> brw->wm.base.stage = MESA_SHADER_FRAGMENT;
> if (brw->gen >= 8) {
> -  gen8_init_vtable_surface_functions(brw);
> +  gen6_init_vtable_surface_functions(brw);
>brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
> } else if (brw->gen >= 7) {
> -  gen7_init_vtable_surface_functions(brw);
> +  gen6_init_vtable_surface_functions(brw);
>brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
> } else if (brw->gen >= 6) {
>gen6_init_vtable_surface_functions(brw);
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 9061dc19936..932240bfc50 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -637,11 +637,6 @@ struct brw_context
>struct gl_renderbuffer *rb,
>uint32_t flags, unsigned
> unit,
>uint32_t surf_index);
> -  void (*emit_null_surface_state)(struct brw_context *brw,
> -  unsigned width,
> -  unsigned height,
> -  unsigned samples,
> -  uint32_t *out_offset);
>
>/**
> * Send the appropriate state packets to configure depth, stencil,
> and
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h
> b/src/mesa/drivers/dri/i965/brw_state.h
> index 46665aae12b..dc893e5b7bd 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -232,14 +232,6 @@ void brw_update_renderbuffer_surfaces(struct
> brw_context *brw,
>uint32_t render_target_start,
>uint32_t *surf_offset);
>
> -/* gen7_wm_surface_state.c */
> -void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
> -void gen7_init_vtable_surface_functions(struct brw_context *brw);
> -
> -/* gen8_surface_state.c */
> -
> -void gen8_init_vtable_surface_functions(struct brw_context *brw);
> -
>  /* brw_sampler_state.c */
>  void brw_emit_sampler_state(struct brw_context *brw,
>  uint32_t *sampler_state,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 4a0a338fa5a..358fdb48d44 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -832,72 +832,48 @@ const struct brw_tracked_state brw_wm_pull_constants
> = {
>   * hardware discard the target 0 color output..
>   */
>  static void
> -brw_emit_null_surface_state(struct brw_context *brw,
> -unsigned width,
> -unsigned height,
> -unsigned samples,
> -uint32_t *out_offset)
> +emit_null_surface_state(struct brw_context *brw,
>

Not really sure why you felt the need to drop the brw_  I don't really care
that 

Re: [Mesa-dev] [PATCH 1/3] isl: Add a null surface fill function.

[Kenneth Graunke]

On Thursday, August 17, 2017 10:26:44 PM PDT Jason Ekstrand wrote:
> On August 17, 2017 4:36:42 PM Kenneth Graunke  wrote:
> 
> > ISL already offers functions to fill out most kinds of SURFACE_STATE,
> > so why not handle null surfaces too?
> >
> > Null surfaces are simple, so we can just take the dimensions, rather
> > than an entirte fill structure.
> > ---
> >  src/intel/isl/isl.c   |  7 +++
> >  src/intel/isl/isl.h   |  4 
> >  src/intel/isl/isl_genX_priv.h |  3 +++
> >  src/intel/isl/isl_surface_state.c | 26 ++
> >  4 files changed, 40 insertions(+)
> >
> >  Applies on top of Jason's patches:
> >  https://lists.freedesktop.org/archives/mesa-dev/2017-August/166628.html
> >
> > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > index 3788f9c2ead..59f512fc050 100644
> > --- a/src/intel/isl/isl.c
> > +++ b/src/intel/isl/isl.c
> > @@ -1811,6 +1811,13 @@ isl_buffer_fill_state_s(const struct isl_device 
> > *dev, void *state,
> > isl_genX_call(dev, buffer_fill_state_s, state, info);
> >  }
> >
> > +void
> > +isl_null_fill_state(const struct isl_device *dev, void *state,
> > +struct isl_extent3d size)
> 
> I might be inclined to make this an extent4d, assert that one off depth and 
> array_length is zero, and take the maximum of the two as the depth.  Thoughts?

I suppose if you wanted a null surface with a different depth and render
target view extent, then an isl_extent4d could be useful.  But...neither
driver actually wants to do that today.  So it seems simpler to keep them
the same, and make the caller pass the width/height/depth they want the
surface to have.  Seems like less magic.  That's my preference, anyway.

> > +{
> > +   isl_genX_call(dev, null_fill_state, state, size);
> 
> This is so much nicer.  Thanks for complaining.

Thanks for tidying it up :)

signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH V2 2/2] mesa: Modify drirc option types

[QuRyu]

From: Quentin Liu 

The type and default values of certain drirc options are changed, namely,
those semantically boolean options such as pp_celshade.
---
 src/gallium/auxiliary/pipe-loader/driinfo_gallium.h | 8 
 src/util/xmlpool/t_options.h| 8 
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/pipe-loader/driinfo_gallium.h 
b/src/gallium/auxiliary/pipe-loader/driinfo_gallium.h
index 48a57c9..2327446 100644
--- a/src/gallium/auxiliary/pipe-loader/driinfo_gallium.h
+++ b/src/gallium/auxiliary/pipe-loader/driinfo_gallium.h
@@ -8,10 +8,10 @@ DRI_CONF_SECTION_END
 
 DRI_CONF_SECTION_QUALITY
DRI_CONF_FORCE_S3TC_ENABLE("false")
-   DRI_CONF_PP_CELSHADE(0)
-   DRI_CONF_PP_NORED(0)
-   DRI_CONF_PP_NOGREEN(0)
-   DRI_CONF_PP_NOBLUE(0)
+   DRI_CONF_PP_CELSHADE("false")
+   DRI_CONF_PP_NORED("false")
+   DRI_CONF_PP_NOGREEN("false")
+   DRI_CONF_PP_NOBLUE("false")
DRI_CONF_PP_JIMENEZMLAA(0, 0, 32)
DRI_CONF_PP_JIMENEZMLAA_COLOR(0, 0, 32)
 DRI_CONF_SECTION_END
diff --git a/src/util/xmlpool/t_options.h b/src/util/xmlpool/t_options.h
index d3f31fc..4ea3615 100644
--- a/src/util/xmlpool/t_options.h
+++ b/src/util/xmlpool/t_options.h
@@ -220,22 +220,22 @@ DRI_CONF_OPT_BEGIN_B(float_depth, def) \
 DRI_CONF_OPT_END
 
 #define DRI_CONF_PP_CELSHADE(def) \
-DRI_CONF_OPT_BEGIN_V(pp_celshade,enum,def,"0:1") \
+DRI_CONF_OPT_BEGIN_B(pp_celshade,def) \
 DRI_CONF_DESC(en,gettext("A post-processing filter to cel-shade the 
output")) \
 DRI_CONF_OPT_END
 
 #define DRI_CONF_PP_NORED(def) \
-DRI_CONF_OPT_BEGIN_V(pp_nored,enum,def,"0:1") \
+DRI_CONF_OPT_BEGIN_B(pp_nored,def) \
 DRI_CONF_DESC(en,gettext("A post-processing filter to remove the red 
channel")) \
 DRI_CONF_OPT_END
 
 #define DRI_CONF_PP_NOGREEN(def) \
-DRI_CONF_OPT_BEGIN_V(pp_nogreen,enum,def,"0:1") \
+DRI_CONF_OPT_BEGIN_B(pp_nogreen,def) \
 DRI_CONF_DESC(en,gettext("A post-processing filter to remove the green 
channel")) \
 DRI_CONF_OPT_END
 
 #define DRI_CONF_PP_NOBLUE(def) \
-DRI_CONF_OPT_BEGIN_V(pp_noblue,enum,def,"0:1") \
+DRI_CONF_OPT_BEGIN_B(pp_noblue,def) \
 DRI_CONF_DESC(en,gettext("A post-processing filter to remove the blue 
channel")) \
 DRI_CONF_OPT_END
 
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH V2 1/2] mesa: Fix backward compatibility for XML parser

[QuRyu]

From: Quentin Liu 

If the type of drirc options are changed, the parser will not be able to
 recognize xml files that had been present before the change. To achieve
backward compatibility, the parser is relaxed to recognize boolean type
options with enum values.
---
 src/util/xmlconfig.c | 17 +++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/src/util/xmlconfig.c b/src/util/xmlconfig.c
index d3f47ec..d81a07b 100644
--- a/src/util/xmlconfig.c
+++ b/src/util/xmlconfig.c
@@ -317,8 +317,21 @@ parseValue(driOptionValue *v, driOptionType type, const 
XML_Char *string)
 v->_bool = true;
 tail = string + 4;
 }
-else
-return false;
+else {
+/* Some drirc options, such as pp_celshalde, were formerly enum
+ * values. Now that they have been turned into boolean values, 
+ * to achieve backward compatibility relax the check here a
+ * little bit */
+int value = strToI(string, , 0);
+if (value == 1) 
+v->_bool = true;
+else if (value == 0) 
+v->_bool = false;
+else 
+return false; /* wrong value here */
+}
+   }
+
 break;
   case DRI_ENUM: /* enum is just a special integer */
   case DRI_INT:
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH V2 0/2] mesa: Modify drirc options

[QuRyu]

From: Quentin Liu 

This serie of patches changes drirc's semanticaclly boolean options, options 
that are enum type options but which in essence are boolean options e.g. 
pp_shalde, into actual boolean optioinns.

Backwawrd compatbility is maintained by relaxinig xmlconfig parser so that xml 
files before this change can still be parsed correctly.
Driconf, unfortunately, will be affected by this. The issue will be addressedd 
later by releasing a new version of Driconf.

Also note that these changes are made to fulfil requirementss to participate in 
EVoC (Endless Vacaction of Code) hosted by X.org.

Quentin Liu (2):
  mesa: Fix backward compatibility for XML parser
  mesa: Modify drirc option types

 src/gallium/auxiliary/pipe-loader/driinfo_gallium.h |  8 
 src/util/xmlconfig.c| 17 +++--
 src/util/xmlpool/t_options.h|  8 
 3 files changed, 23 insertions(+), 10 deletions(-)

-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] gallium/radeon: pass LLVM processor to the disk shader cache

[Timothy Arceri]

On 18/08/17 20:49, Nicolai Hähnle wrote:

On 11.08.2017 20:37, Marek Olšák wrote:
On Fri, Aug 11, 2017 at 6:00 PM, Nicolai Hähnle  
wrote:

On 10.08.2017 21:57, Marek Olšák wrote:


From: Marek Olšák 

---
   src/gallium/drivers/radeon/r600_pipe_common.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 95458d2e..0038c9a 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -878,21 +878,21 @@ static void r600_disk_cache_create(struct
r600_common_screen *rscreen)
   #endif
 if (res != -1) {
 /* These flags affect shader compilation. */
 uint64_t shader_debug_flags =
 rscreen->debug_flags &
 (DBG_FS_CORRECT_DERIVS_AFTER_KILL |
  DBG_SI_SCHED |
  DBG_UNSAFE_MATH);
 rscreen->disk_shader_cache =
-
disk_cache_create(r600_get_family_name(rscreen),
+
disk_cache_create(r600_get_llvm_processor_name(rscreen->family),



What's the advantage of this?


It's added to the shader cache key. It allows shaders cached for
Vega10 to be used by Raven and vice versa. Same for Polaris11 and
Polaris12. It makes things nicer for some multi-GPU setups or when
swapping GPUs.


I'm not a huge fan of this since the shader code does have access to the 
family, and there might be a need for family-specific workarounds. I'm 
actually not a huge fan of this overall, because the debug_flags thing 
seems flaky as well.


There's currently some corruption in Unigine demos which seems related 
to the shader cache, which just goes to show how difficult it is to 
really get this stuff right. I'd rather be on the safe side.


I'm not sure if its related, but I noticed recently that there was at 
least 1 piglit test that seems to have regressed for the shader cache.


Should be reproducible by running piglit twice in a row, I haven't 
looked into it any further and can't recall what it was testing.





Cheers,
Nicolai



Marek





___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Android: Fix LLVM duplicated symbols linking for N and M

[Yu, Qiang]

> gallium_dri_la_LDFLAGS += \
>   -Wl,--version-script=$(top_srcdir)/src/gallium/targets/dri/dri.sym
A nice trick to know about.

Regards,
Qiang

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Android: Fix LLVM duplicated symbols linking for N and M

[Chih-Wei Huang]

2017-08-19 8:27 GMT+08:00 Emil Velikov :
> On 18 August 2017 at 20:46, Rob Herring  wrote:
>> Both statically linking libLLVMCore and dynamically linking libLLVM causes
>> duplicated symbols in gallium_dri.so and it fails to dlopen. We don't
>> really need to link libLLVMCore, but just need generated headers to be
>> built first. Dynamically linking to libLLVM instead is enough to do
>> that. Thanks to Qiang Yu for finding the root cause.
>>
> Nice find indeed, thanks.
>
> This reminds me - a small task for a rainy day.
> - Wire the version script files into the Android build - see the
> autoconf snippet below.
> It will hide the hundreds of symbols when static linking LLVM (aka
> sidestep the current issue) and make the binary noticeably smaller.
>
> gallium_dri_la_LDFLAGS += \
>-Wl,--version-script=$(top_srcdir)/src/gallium/targets/dri/dri.sym
>
>> With this change, we can align all versions and just have libLLVM as a
>> shared lib dependency.
>>
>> This also requires changes in the M and N versions of LLVM to export the
>> include paths for libLLVM. AOSP master is okay.
>>
> Perfect :-)
>
>> Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
>> Reported-by: Mauro Rossi 
>> Cc: Emil Velikov 
>> Cc: 17.2 
>> Signed-off-by: Qiang Yu 
>> Signed-off-by: Rob Herring 
>
> Reviewed-by: Emil Velikov 
>
>> ---
>>  Android.mk  | 12 
>>  src/amd/Android.common.mk   |  4 +---
>>  src/gallium/drivers/radeon/Android.mk   |  2 +-
>>  src/gallium/drivers/radeonsi/Android.mk |  2 +-
>>  4 files changed, 7 insertions(+), 13 deletions(-)
>>
>> diff --git a/Android.mk b/Android.mk
>> index 6571161c8783..dc4041364551 100644
>> --- a/Android.mk
>> +++ b/Android.mk
>> @@ -92,16 +92,12 @@ define mesa-build-with-llvm
>>$(if $(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5), \
>>  $(warning Unsupported LLVM version in Android 
>> $(MESA_ANDROID_MAJOR_VERSION)),) \
>>$(if $(filter 6,$(MESA_ANDROID_MAJOR_VERSION)), \
>> -$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0) \
>> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
>> -$(eval LOCAL_C_INCLUDES += external/llvm/include 
>> external/llvm/device/include),) \
>> +$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 
>> -DMESA_LLVM_VERSION_PATCH=0),) \

Hmm, why do we need an extra comma?
Does it correspond to the else case of $(if ...)?
If so it could be omitted.

>>$(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
>> -$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
>> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
>> -$(eval LOCAL_C_INCLUDES += external/llvm/include 
>> external/llvm/device/include),) \
>> +$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 
>> -DMESA_LLVM_VERSION_PATCH=0),) \
>>$(if $(filter O,$(MESA_ANDROID_MAJOR_VERSION)), \
>> -$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0) \
>> -$(eval LOCAL_HEADER_LIBRARIES += llvm-headers),)
>> +$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 
>> -DMESA_LLVM_VERSION_PATCH=0),) \
>> +  $(eval LOCAL_SHARED_LIBRARIES += libLLVM)
> Am I the only person getting tad confused by amount of brackets?
> As mentioned by Chih-Wei - a shell switch is not possible, but how
> about a test vague like the following?
>
> test "x$(MESA_ANDROID_MAJOR_VERSION)" = "xO" &&
>$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0)

Only possible if you put it into $(shell ...)
That gives me an idea. Maybe we ca do like

$(shell case "$(MESA_ANDROID_MAJOR_VERSION)" in \
6) echo ... ;; \
7) echo ... ;; \
*)  echo ... ;; \
esac)

I haven't really try it yet.

-- 
Chih-Wei
Android-x86 project
http://www.android-x86.org
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH] radeonsi: update non-resident bindless descriptors if needed

[Marek Olšák]

On Sat, Aug 19, 2017 at 1:49 AM, Emil Velikov  wrote:
> Hi Samuel,
>
> On 9 August 2017 at 14:47, Samuel Pitoiset  wrote:
>> Only resident bindless descriptors are currently updated and
>> re-uploaded, this makes sure that the non-resident ones are
>> also updated.
>>
>> Signed-off-by: Samuel Pitoiset 
>> Cc: "17.2" 
> AFAICT the patch has not landed in master hence It won't be in stable, yet.
> Has it fallen through the cracks or it's been superseded?

I don't know where Samuel is, but "vacation" would be my guess.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] mistake in "mesa/vbo: move some Draw checks out of validation"?

[Timothy Arceri]

On 19/08/17 08:02, Brian Paul wrote:

Hi Timothy,

I happened to be looking at the VBO vertex array code and I think I 
spotted a mistake in this commit:


commit 4df2931a87fe082f90871564a89a09c826641f5b
Author: Timothy Arceri 
Date:   Mon Apr 3 16:38:18 2017 +1000

 mesa/vbo: move some Draw checks out of validation

 These checks do not generate any errors. Move them so we can add
 KHR_no_error support and still make sure we do these checks.

 Reviewed-by: Nicolai Hähnle 


Specifically, the old code in check_valid_to_render() to check whether 
vertex attribute array 0 is enabled for API_OPENGLES was:


/* For OpenGL ES, only draw if we have vertex positions
 */
if (!ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled)
   return false;  //BP: don't draw

your patch moved this into skip_validated_draw() where the return value 
is basically inverted from the old code.


   /* For OpenGL ES, only draw if we have vertex positions
*/
   if (ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled)
  return false; >break;

if we don't return false there, we'll unconditionally return false at 
the end of the function (i.e. we can never return true).


I think the above condition should read:

   if (!ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled)
  return true;  //BP: skip draw

The //BP: comments are added by me.

I guess we don't have any piglit tests for ES that check that drawing is 
skipped when the vertex position array is disabled.


-Brian


Hi Brian,

Yes your assessment does seem correct to me. I can write a patch but I 
won't get to it until later today or tomorrow.


Thanks,
Tim
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] XDC 2017 : Call for paper

[Stéphane Marchesin]

On Tue, Jun 6, 2017 at 4:19 PM, Martin Peres  wrote:
> Hello,
>
> I have the pleasure to announce that the X.org Developer Conference 2017
> will be held in Mountain View, California from September 20th to
> September 22nd. The venue is located at the Googleplex.
>
> The official page for the event is http://www.x.org/wiki/Events/XDC2017
> while the call for paper is at http://www.x.org/wiki/Other/Press/CFP2017/
>
> As usual, we are open to talks across the layers of the graphics stack,
> from the kernel to desktop environments / graphical applications and
> about how to make things better for the developers who build them.
> Given that the conference is located at Google, we would welcome topics
> related to Android and Chromebooks. We would also like to hear about
> Virtual Reality and end-to-end buffer format negociation. If you're not
> sure if something might fit, mail me or add it to the ideas list found
> in the program page.
>
> The conference is free of charge and open to the general public. If
> you plan on coming, please add yourself to the attendees list. We'll
> use this list to make badges and plan for the catering, so if you are
> attending please add your name as early as possible.
>
> I am looking forward to seeing you there. If you have any
> inquiries/questions, please send them to Stéphane Marchesin (please also
> CC: board at foundation.x.org).

Hi all,

For logistical reasons, we would like to be able to finalize the
attendee list by September 8. If at all possible, please register on
the wiki (or email me if you don't have access and I will add you).

Thanks,
Stéphane

>
> Martin Peres
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Android: Fix LLVM duplicated symbols linking for N and M

[Emil Velikov]

On 18 August 2017 at 20:46, Rob Herring  wrote:
> Both statically linking libLLVMCore and dynamically linking libLLVM causes
> duplicated symbols in gallium_dri.so and it fails to dlopen. We don't
> really need to link libLLVMCore, but just need generated headers to be
> built first. Dynamically linking to libLLVM instead is enough to do
> that. Thanks to Qiang Yu for finding the root cause.
>
Nice find indeed, thanks.

This reminds me - a small task for a rainy day.
- Wire the version script files into the Android build - see the
autoconf snippet below.
It will hide the hundreds of symbols when static linking LLVM (aka
sidestep the current issue) and make the binary noticeably smaller.

gallium_dri_la_LDFLAGS += \
   -Wl,--version-script=$(top_srcdir)/src/gallium/targets/dri/dri.sym

> With this change, we can align all versions and just have libLLVM as a
> shared lib dependency.
>
> This also requires changes in the M and N versions of LLVM to export the
> include paths for libLLVM. AOSP master is okay.
>
Perfect :-)

> Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
> Reported-by: Mauro Rossi 
> Cc: Emil Velikov 
> Cc: 17.2 
> Signed-off-by: Qiang Yu 
> Signed-off-by: Rob Herring 

Reviewed-by: Emil Velikov 

> ---
>  Android.mk  | 12 
>  src/amd/Android.common.mk   |  4 +---
>  src/gallium/drivers/radeon/Android.mk   |  2 +-
>  src/gallium/drivers/radeonsi/Android.mk |  2 +-
>  4 files changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/Android.mk b/Android.mk
> index 6571161c8783..dc4041364551 100644
> --- a/Android.mk
> +++ b/Android.mk
> @@ -92,16 +92,12 @@ define mesa-build-with-llvm
>$(if $(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5), \
>  $(warning Unsupported LLVM version in Android 
> $(MESA_ANDROID_MAJOR_VERSION)),) \
>$(if $(filter 6,$(MESA_ANDROID_MAJOR_VERSION)), \
> -$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0) \
> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
> -$(eval LOCAL_C_INCLUDES += external/llvm/include 
> external/llvm/device/include),) \
> +$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0),) 
> \
>$(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
> -$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
> -$(eval LOCAL_C_INCLUDES += external/llvm/include 
> external/llvm/device/include),) \
> +$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0),) 
> \
>$(if $(filter O,$(MESA_ANDROID_MAJOR_VERSION)), \
> -$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0) \
> -$(eval LOCAL_HEADER_LIBRARIES += llvm-headers),)
> +$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0),) 
> \
> +  $(eval LOCAL_SHARED_LIBRARIES += libLLVM)
Am I the only person getting tad confused by amount of brackets?
As mentioned by Chih-Wei - a shell switch is not possible, but how
about a test vague like the following?

test "x$(MESA_ANDROID_MAJOR_VERSION)" = "xO" &&
   $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0)

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 5/6] broadcom: Add VC5 NIR compiler.

[Eric Anholt]

This is a pretty straightforward fork of VC4's NIR compiler to VC5.  The
condition codes, registers, and I/O have all changed, making the backend
hard to share, though their heritage is still recognizable.
---

Contents trimmed due to patch size.  Full series at:
https://github.com/anholt/mesa/commits/vc5

 src/broadcom/Makefile.am  |2 +
 src/broadcom/Makefile.sources |   13 +
 src/broadcom/Makefile.vc5.am  |1 +
 src/broadcom/nir/nir_to_qir.c | 2079 +
 src/broadcom/nir/qir.c|  644 +
 src/broadcom/nir/qir_dump.c   |  334 +
 src/broadcom/nir/qir_live_variables.c |  340 +
 src/broadcom/nir/qir_lower_uniforms.c |  209 +++
 src/broadcom/nir/qir_opt_copy_propagate.c |  233 
 src/broadcom/nir/qir_opt_dead_code.c  |  162 +++
 src/broadcom/nir/qir_register_allocate.c  |  253 
 src/broadcom/nir/qir_to_qpu.c |  357 +
 src/broadcom/nir/qpu_schedule.c   | 1362 +++
 src/broadcom/nir/qpu_validate.c   |  208 +++
 src/broadcom/nir/vc5_compiler.c   |   43 +
 src/broadcom/nir/vc5_compiler.h   |  858 
 src/broadcom/nir/vc5_nir_lower_io.c   |  181 +++
 17 files changed, 7279 insertions(+)
 create mode 100644 src/broadcom/nir/nir_to_qir.c
 create mode 100644 src/broadcom/nir/qir.c
 create mode 100644 src/broadcom/nir/qir_dump.c
 create mode 100644 src/broadcom/nir/qir_live_variables.c
 create mode 100644 src/broadcom/nir/qir_lower_uniforms.c
 create mode 100644 src/broadcom/nir/qir_opt_copy_propagate.c
 create mode 100644 src/broadcom/nir/qir_opt_dead_code.c
 create mode 100644 src/broadcom/nir/qir_register_allocate.c
 create mode 100644 src/broadcom/nir/qir_to_qpu.c
 create mode 100644 src/broadcom/nir/qpu_schedule.c
 create mode 100644 src/broadcom/nir/qpu_validate.c
 create mode 100644 src/broadcom/nir/vc5_compiler.c
 create mode 100644 src/broadcom/nir/vc5_compiler.h
 create mode 100644 src/broadcom/nir/vc5_nir_lower_io.c
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 6/6] broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.

[Eric Anholt]

V3D 3.3 is a continuation of the 3D implementation in VC4 (v2.1 and v2.6).
V3D 3.3 introduces an MMU (no more CMA allocations) and support for
GLES3.1.  This driver is not currently conformant, though that will be a
target as soon as possible.

V3D 3.x parts use a new texture tiling layout common across many Broadcom
graphics parts including and the HVS scanout engine.  It also massively
changes the QPU instructions, introducing a common physical register file
(no more A/B split) and half-float instructions, while removing the 4x8
unorm instructions in favor of half-float for talking to fixed function
interfaces.  Because so much has changed, vc5 is implemented in a separate
gallium driver, using only the XML code-generation support from vc4.
---

Contents trimmed due to patch size.  Full series at:
https://github.com/anholt/mesa/commits/vc5

 configure.ac   |   2 +
 src/Makefile.am|   4 +
 src/gallium/Makefile.am|   5 +
 .../auxiliary/pipe-loader/pipe_loader_drm.c|   5 +
 src/gallium/auxiliary/target-helpers/drm_helper.h  |  23 +
 .../auxiliary/target-helpers/drm_helper_public.h   |   3 +
 src/gallium/drivers/vc5/.editorconfig  |   3 +
 src/gallium/drivers/vc5/Automake.inc   |   9 +
 src/gallium/drivers/vc5/Makefile.am|  43 ++
 src/gallium/drivers/vc5/Makefile.sources   |  26 +
 src/gallium/drivers/vc5/vc5_blit.c | 226 ++
 src/gallium/drivers/vc5/vc5_bufmgr.c   | 580 
 src/gallium/drivers/vc5/vc5_bufmgr.h   | 140 
 src/gallium/drivers/vc5/vc5_cl.c   |  86 +++
 src/gallium/drivers/vc5/vc5_cl.h   | 248 +++
 src/gallium/drivers/vc5/vc5_context.c  | 172 +
 src/gallium/drivers/vc5/vc5_context.h  | 504 ++
 src/gallium/drivers/vc5/vc5_draw.c | 606 
 src/gallium/drivers/vc5/vc5_drm.h  | 189 +
 src/gallium/drivers/vc5/vc5_emit.c | 497 ++
 src/gallium/drivers/vc5/vc5_fence.c|  93 +++
 src/gallium/drivers/vc5/vc5_formats.c  | 412 +++
 src/gallium/drivers/vc5/vc5_job.c  | 434 
 src/gallium/drivers/vc5/vc5_program.c  | 678 ++
 src/gallium/drivers/vc5/vc5_query.c|  91 +++
 src/gallium/drivers/vc5/vc5_rcl.c  | 217 ++
 src/gallium/drivers/vc5/vc5_resource.c | 763 +
 src/gallium/drivers/vc5/vc5_resource.h | 158 +
 src/gallium/drivers/vc5/vc5_screen.c   | 648 +
 src/gallium/drivers/vc5/vc5_screen.h   | 107 +++
 src/gallium/drivers/vc5/vc5_simulator.c| 682 ++
 src/gallium/drivers/vc5/vc5_state.c| 580 
 src/gallium/drivers/vc5/vc5_tiling.c   | 402 +++
 src/gallium/drivers/vc5/vc5_tiling.h   |  43 ++
 src/gallium/drivers/vc5/vc5_uniforms.c | 416 +++
 src/gallium/targets/dri/Makefile.am|   1 +
 src/gallium/targets/dri/target.c   |   4 +
 src/gallium/winsys/vc5/drm/Android.mk  |  33 +
 src/gallium/winsys/vc5/drm/Makefile.am |  31 +
 src/gallium/winsys/vc5/drm/Makefile.sources|   3 +
 src/gallium/winsys/vc5/drm/vc5_drm_public.h|  31 +
 src/gallium/winsys/vc5/drm/vc5_drm_winsys.c|  35 +
 42 files changed, 9233 insertions(+)
 create mode 100644 src/gallium/drivers/vc5/.editorconfig
 create mode 100644 src/gallium/drivers/vc5/Automake.inc
 create mode 100644 src/gallium/drivers/vc5/Makefile.am
 create mode 100644 src/gallium/drivers/vc5/Makefile.sources
 create mode 100644 src/gallium/drivers/vc5/vc5_blit.c
 create mode 100644 src/gallium/drivers/vc5/vc5_bufmgr.c
 create mode 100644 src/gallium/drivers/vc5/vc5_bufmgr.h
 create mode 100644 src/gallium/drivers/vc5/vc5_cl.c
 create mode 100644 src/gallium/drivers/vc5/vc5_cl.h
 create mode 100644 src/gallium/drivers/vc5/vc5_context.c
 create mode 100644 src/gallium/drivers/vc5/vc5_context.h
 create mode 100644 src/gallium/drivers/vc5/vc5_draw.c
 create mode 100644 src/gallium/drivers/vc5/vc5_drm.h
 create mode 100644 src/gallium/drivers/vc5/vc5_emit.c
 create mode 100644 src/gallium/drivers/vc5/vc5_fence.c
 create mode 100644 src/gallium/drivers/vc5/vc5_formats.c
 create mode 100644 src/gallium/drivers/vc5/vc5_job.c
 create mode 100644 src/gallium/drivers/vc5/vc5_program.c
 create mode 100644 src/gallium/drivers/vc5/vc5_query.c
 create mode 100644 src/gallium/drivers/vc5/vc5_rcl.c
 create mode 100644 src/gallium/drivers/vc5/vc5_resource.c
 create mode 100644 src/gallium/drivers/vc5/vc5_resource.h
 create mode 100644 src/gallium/drivers/vc5/vc5_screen.c
 create mode 100644 src/gallium/drivers/vc5/vc5_screen.h
 create 

[Mesa-dev] [PATCH 2/6] configure: Add the new "vc5" driver to the list, requiring a simulator.

[Eric Anholt]

My intent is to develop the vc5 driver in-tree for some time to build the
CL generation and shader compiler code, and keep out-of-tree patches for
talking to an actual kernel driver until the kernel driver can be
stabilized on the hardware.
---
 configure.ac | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 53d52f6d52f9..5f501d5da938 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1272,7 +1272,7 @@ GALLIUM_DRIVERS_DEFAULT="r300,r600,svga,swrast"
 AC_ARG_WITH([gallium-drivers],
 [AS_HELP_STRING([--with-gallium-drivers@<:@=DIRS...@:>@],
 [comma delimited Gallium drivers list, e.g.
-
"i915,nouveau,r300,r600,radeonsi,freedreno,pl111,svga,swrast,swr,vc4,virgl,etnaviv,imx"
+
"i915,nouveau,r300,r600,radeonsi,freedreno,pl111,svga,swrast,swr,vc4,vc5,virgl,etnaviv,imx"
 @<:@default=r300,r600,svga,swrast@:>@])],
 [with_gallium_drivers="$withval"],
 [with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT"])
@@ -2584,6 +2584,14 @@ if test -n "$with_gallium_drivers"; then
DEFINES="$DEFINES -DUSE_VC4_SIMULATOR"],
   [USE_VC4_SIMULATOR=no])
 ;;
+xvc5)
+HAVE_GALLIUM_VC5=yes
+
+PKG_CHECK_MODULES([VC5_SIMULATOR], [v3dv3],
+  [USE_VC5_SIMULATOR=yes;
+   DEFINES="$DEFINES -DUSE_VC5_SIMULATOR"],
+  [AC_MSG_ERROR([vc5 requires the simulator])])
+;;
 xpl111)
 HAVE_GALLIUM_PL111=yes
 ;;
@@ -2708,6 +2716,7 @@ AM_CONDITIONAL(HAVE_GALLIUM_SWRAST, test 
"x$HAVE_GALLIUM_SOFTPIPE" = xyes -o \
  "x$HAVE_GALLIUM_LLVMPIPE" = xyes -o \
  "x$HAVE_GALLIUM_SWR" = xyes)
 AM_CONDITIONAL(HAVE_GALLIUM_VC4, test "x$HAVE_GALLIUM_VC4" = xyes)
+AM_CONDITIONAL(HAVE_GALLIUM_VC5, test "x$HAVE_GALLIUM_VC5" = xyes)
 AM_CONDITIONAL(HAVE_GALLIUM_VIRGL, test "x$HAVE_GALLIUM_VIRGL" = xyes)
 
 AM_CONDITIONAL(HAVE_GALLIUM_STATIC_TARGETS, test 
"x$enable_shared_pipe_drivers" = xno)
@@ -2744,6 +2753,7 @@ AM_CONDITIONAL(NEED_WINSYS_XLIB, test "x$enable_glx" = 
xgallium-xlib)
 AM_CONDITIONAL(HAVE_GALLIUM_COMPUTE, test x$enable_opencl = xyes)
 AM_CONDITIONAL(HAVE_GALLIUM_LLVM, test "x$enable_llvm" = xyes)
 AM_CONDITIONAL(USE_VC4_SIMULATOR, test x$USE_VC4_SIMULATOR = xyes)
+AM_CONDITIONAL(USE_VC5_SIMULATOR, test x$USE_VC5_SIMULATOR = xyes)
 
 AM_CONDITIONAL(HAVE_LIBDRM, test "x$have_libdrm" = xyes)
 AM_CONDITIONAL(HAVE_OSMESA, test "x$enable_osmesa" = xyes)
-- 
2.14.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 0/6] vc5 driver to merge

[Eric Anholt]

I'm feeling good enough about the core of the vc5 driver that I'd like
to merge it at this point.

I'm passing about 2/3 of tests in simulation with GLES3.0 exposed.
The current top piglit problems:

* polygonmode is still not a thing the hardware can do.
* MSAA isn't done.
* stencil blits aren't done.
* 16-bit unorm is broken.

I've set it up so that it only builds against the simulator for now,
since I don't have a kernel driver to merge yet and don't want any
ioctl calls to be present in somebody's mistakenly built experimental
driver.

Dave, does this sound OK to you as far as UABI concerns go?  Anyone
else want to ack/nack merging at this early stage?

Eric Anholt (6):
  nir: Move vc4's alpha test lowering to core NIR.
  configure: Add the new "vc5" driver to the list, requiring a
simulator.
  broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.
  broadcom: Add vc5 CLIF dumping
  broadcom: Add VC5 NIR compiler.
  broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.

 configure.ac   |   14 +-
 src/Makefile.am|4 +
 src/broadcom/Makefile.am   |   14 +
 src/broadcom/Makefile.sources  |   20 +
 src/broadcom/Makefile.vc5.am   |   19 +
 src/broadcom/clif/clif_dump.c  |  268 +++
 src/broadcom/clif/clif_dump.h  |   42 +
 src/broadcom/nir/nir_to_qir.c  | 2079 
 src/broadcom/nir/qir.c |  644 ++
 src/broadcom/nir/qir_dump.c|  334 
 src/broadcom/nir/qir_live_variables.c  |  340 
 src/broadcom/nir/qir_lower_uniforms.c  |  209 ++
 src/broadcom/nir/qir_opt_copy_propagate.c  |  233 +++
 src/broadcom/nir/qir_opt_dead_code.c   |  162 ++
 src/broadcom/nir/qir_register_allocate.c   |  253 +++
 src/broadcom/nir/qir_to_qpu.c  |  357 
 src/broadcom/nir/qpu_schedule.c| 1362 +
 src/broadcom/nir/qpu_validate.c|  208 ++
 src/broadcom/nir/vc5_compiler.c|   43 +
 .../vc4/vc4_qir.h => broadcom/nir/vc5_compiler.h}  |  796 
 src/broadcom/nir/vc5_nir_lower_io.c|  181 ++
 src/broadcom/qpu/qpu_disasm.c  |  298 +++
 src/broadcom/qpu/qpu_disasm.h  |   39 +
 src/broadcom/qpu/qpu_instr.c   |  645 ++
 src/broadcom/qpu/qpu_instr.h   |  411 
 src/broadcom/qpu/qpu_pack.c| 1206 
 src/broadcom/qpu/qpu_validate.c|0
 src/broadcom/qpu/tests/.gitignore  |1 +
 src/broadcom/qpu/tests/qpu_disasm.c|  146 ++
 src/compiler/Makefile.sources  |1 +
 src/compiler/nir/nir.h |2 +
 src/compiler/nir/nir_builder.h |   25 +
 src/compiler/nir/nir_lower_alpha_test.c|  111 ++
 src/compiler/shader_enums.h|   17 +
 src/gallium/Makefile.am|5 +
 .../auxiliary/pipe-loader/pipe_loader_drm.c|5 +
 src/gallium/auxiliary/target-helpers/drm_helper.h  |   23 +
 .../auxiliary/target-helpers/drm_helper_public.h   |3 +
 src/gallium/drivers/vc4/vc4_nir_lower_blend.c  |   50 -
 src/gallium/drivers/vc4/vc4_program.c  |   15 +-
 src/gallium/drivers/vc4/vc4_qir.h  |1 -
 src/gallium/drivers/vc5/.editorconfig  |3 +
 src/gallium/drivers/vc5/Automake.inc   |9 +
 src/{broadcom => gallium/drivers/vc5}/Makefile.am  |   46 +-
 src/gallium/drivers/vc5/Makefile.sources   |   26 +
 src/gallium/drivers/vc5/vc5_blit.c |  226 +++
 src/gallium/drivers/vc5/vc5_bufmgr.c   |  580 ++
 src/gallium/drivers/vc5/vc5_bufmgr.h   |  140 ++
 src/gallium/drivers/vc5/vc5_cl.c   |   86 +
 src/gallium/drivers/vc5/vc5_cl.h   |  248 +++
 src/gallium/drivers/vc5/vc5_context.c  |  172 ++
 src/gallium/drivers/vc5/vc5_context.h  |  504 +
 src/gallium/drivers/vc5/vc5_draw.c |  606 ++
 src/gallium/drivers/vc5/vc5_drm.h  |  189 ++
 src/gallium/drivers/vc5/vc5_emit.c |  497 +
 src/gallium/drivers/vc5/vc5_fence.c|   93 +
 src/gallium/drivers/vc5/vc5_formats.c  |  412 
 src/gallium/drivers/vc5/vc5_job.c  |  434 
 src/gallium/drivers/vc5/vc5_program.c  |  678 +++
 src/gallium/drivers/vc5/vc5_query.c|   91 +
 src/gallium/drivers/vc5/vc5_rcl.c  |  217 ++
 src/gallium/drivers/vc5/vc5_resource.c |  763 +++
 src/gallium/drivers/vc5/vc5_resource.h |  158 ++
 

[Mesa-dev] [PATCH 3/6] broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.

[Eric Anholt]

Unlike VC4, I've defined an unpacked instruction format with pack/unpack
functions to convert to 64-bit encoded instructions.  This will let us
incrementally put together our instructions and validate them in a more
natural way than the QPU_GET_FIELD/QPU_SET_FIELD used to.

The pack/unpack unfortuantely are written by hand.  While I could define
genxml for parts of it, there are many special cases (like operand order
of commutative binops choosing which binop is being performed!) and it
probably wouldn't come out much cleaner.

The disasm unit test ensures that we have the same assembly format as
Broadcom's internal tools, other than whitespace changes.
---
 src/broadcom/Makefile.am|   12 +
 src/broadcom/Makefile.sources   |5 +
 src/broadcom/Makefile.vc5.am|   17 +
 src/broadcom/qpu/qpu_disasm.c   |  298 +
 src/broadcom/qpu/qpu_disasm.h   |   39 ++
 src/broadcom/qpu/qpu_instr.c|  645 +++
 src/broadcom/qpu/qpu_instr.h|  411 
 src/broadcom/qpu/qpu_pack.c | 1206 +++
 src/broadcom/qpu/qpu_validate.c |0
 src/broadcom/qpu/tests/.gitignore   |1 +
 src/broadcom/qpu/tests/qpu_disasm.c |  146 +
 11 files changed, 2780 insertions(+)
 create mode 100644 src/broadcom/Makefile.vc5.am
 create mode 100644 src/broadcom/qpu/qpu_disasm.c
 create mode 100644 src/broadcom/qpu/qpu_disasm.h
 create mode 100644 src/broadcom/qpu/qpu_instr.c
 create mode 100644 src/broadcom/qpu/qpu_instr.h
 create mode 100644 src/broadcom/qpu/qpu_pack.c
 create mode 100644 src/broadcom/qpu/qpu_validate.c
 create mode 100644 src/broadcom/qpu/tests/.gitignore
 create mode 100644 src/broadcom/qpu/tests/qpu_disasm.c

diff --git a/src/broadcom/Makefile.am b/src/broadcom/Makefile.am
index 9ebfe4584bf0..4ca995301341 100644
--- a/src/broadcom/Makefile.am
+++ b/src/broadcom/Makefile.am
@@ -32,6 +32,15 @@ AM_CFLAGS = \
 
 include Makefile.sources
 
+AM_CPPFLAGS = \
+   $(DEFINES) \
+   $(VALGRIND_CFLAGS) \
+   -I$(top_srcdir)/include \
+   -I$(top_srcdir)/src \
+   -I$(top_srcdir)/src/broadcom/ \
+   -I$(top_srcdir)/src/broadcom/include \
+   $(NULL)
+
 lib_LTLIBRARIES =
 check_LTLIBRARIES =
 noinst_DATA =
@@ -44,10 +53,13 @@ BUILT_SOURCES =
 CLEANFILES =
 EXTRA_DIST = $(BROADCOM_FILES)
 
+noinst_LTLIBRARIES = libbroadcom.la
+
 MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D)
 PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS)
 
 include Makefile.genxml.am
 include Makefile.cle.am
+include Makefile.vc5.am
 
 CLEANFILES += $(BUILT_SOURCES)
diff --git a/src/broadcom/Makefile.sources b/src/broadcom/Makefile.sources
index 70ed415c5aa0..0091c84baa3c 100644
--- a/src/broadcom/Makefile.sources
+++ b/src/broadcom/Makefile.sources
@@ -12,6 +12,11 @@ BROADCOM_GENXML_XML_FILES = \
 BROADCOM_FILES = \
cle/v3d_packet_helpers.h \
common/v3d_device_info.h \
+   qpu/qpu_disasm.c \
+   qpu/qpu_disasm.h \
+   qpu/qpu_instr.c \
+   qpu/qpu_instr.h \
+   qpu/qpu_pack.c \
$()
 
 BROADCOM_DECODER_FILES = \
diff --git a/src/broadcom/Makefile.vc5.am b/src/broadcom/Makefile.vc5.am
new file mode 100644
index ..23fe719e09b6
--- /dev/null
+++ b/src/broadcom/Makefile.vc5.am
@@ -0,0 +1,17 @@
+if USE_VC5_SIMULATOR
+AM_CFLAGS = $(VC5_SIMULATOR_CFLAGS)
+libbroadcom_la_LDFLAGS = $(VC5_SIMULATOR_LIBS)
+endif
+
+libbroadcom_la_SOURCES = $(BROADCOM_FILES)
+
+check_PROGRAMS = \
+   qpu/tests/qpu_disasm \
+   $(NULL)
+
+LDADD = \
+   libbroadcom.la \
+   $(top_builddir)/src/util/libmesautil.la \
+   $(NULL)
+
+TESTS = $(check_PROGRAMS)
diff --git a/src/broadcom/qpu/qpu_disasm.c b/src/broadcom/qpu/qpu_disasm.c
new file mode 100644
index ..5ee834852bd7
--- /dev/null
+++ b/src/broadcom/qpu/qpu_disasm.c
@@ -0,0 +1,298 @@
+/*
+ * Copyright © 2016 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE 

[Mesa-dev] [PATCH 1/6] nir: Move vc4's alpha test lowering to core NIR.

[Eric Anholt]

I've been doing this inside of vc4, but vc5 wants it as well and it may be
useful for other drivers (Intel has a related path for pre-gen6 with MRT,
and freedreno had a TGSI path for it at one point).

This required defining a common enum for the standard comparison
functions, but other lowering passes are likely to also want that enum.
---
 src/compiler/Makefile.sources |   1 +
 src/compiler/nir/nir.h|   2 +
 src/compiler/nir/nir_builder.h|  25 ++
 src/compiler/nir/nir_lower_alpha_test.c   | 111 ++
 src/compiler/shader_enums.h   |  17 
 src/gallium/drivers/vc4/vc4_nir_lower_blend.c |  50 
 src/gallium/drivers/vc4/vc4_program.c |  15 +++-
 src/gallium/drivers/vc4/vc4_qir.h |   1 -
 8 files changed, 167 insertions(+), 55 deletions(-)
 create mode 100644 src/compiler/nir/nir_lower_alpha_test.c

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index a56a7103515b..7d4eaaa03bee 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -205,6 +205,7 @@ NIR_FILES = \
nir/nir_loop_analyze.c \
nir/nir_loop_analyze.h \
nir/nir_lower_64bit_packing.c \
+   nir/nir_lower_alpha_test.c \
nir/nir_lower_alu_to_scalar.c \
nir/nir_lower_atomics.c \
nir/nir_lower_atomics_to_ssbo.c \
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 9313b7ac9072..b67516c52f8c 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2434,6 +2434,8 @@ bool nir_lower_constant_initializers(nir_shader *shader,
 
 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
 bool nir_lower_vec_to_movs(nir_shader *shader);
+void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
+  bool alpha_to_one);
 bool nir_lower_alu_to_scalar(nir_shader *shader);
 bool nir_lower_load_const_to_scalar(nir_shader *shader);
 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index 7c65886356d5..4bd5628ff7d4 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -643,4 +643,29 @@ nir_jump(nir_builder *build, nir_jump_type jump_type)
nir_builder_instr_insert(build, >instr);
 }
 
+static inline nir_ssa_def *
+nir_compare_func(nir_builder *b, enum compare_func func,
+ nir_ssa_def *src0, nir_ssa_def *src1)
+{
+   switch (func) {
+   case COMPARE_FUNC_NEVER:
+  return nir_imm_int(b, 0);
+   case COMPARE_FUNC_ALWAYS:
+  return nir_imm_int(b, ~0);
+   case COMPARE_FUNC_EQUAL:
+  return nir_feq(b, src0, src1);
+   case COMPARE_FUNC_NOTEQUAL:
+  return nir_fne(b, src0, src1);
+   case COMPARE_FUNC_GREATER:
+  return nir_flt(b, src1, src0);
+   case COMPARE_FUNC_GEQUAL:
+  return nir_fge(b, src0, src1);
+   case COMPARE_FUNC_LESS:
+  return nir_flt(b, src0, src1);
+   case COMPARE_FUNC_LEQUAL:
+  return nir_fge(b, src1, src0);
+   }
+   unreachable("bad compare func");
+}
+
 #endif /* NIR_BUILDER_H */
diff --git a/src/compiler/nir/nir_lower_alpha_test.c 
b/src/compiler/nir/nir_lower_alpha_test.c
new file mode 100644
index ..bd433b8ec66c
--- /dev/null
+++ b/src/compiler/nir/nir_lower_alpha_test.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright © 2017 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/**
+ * @file
+ *
+ * Implements GL alpha testing by comparing the output color's alpha to the
+ * alpha_ref intrinsic and emitting a discard based on it.
+ *
+ * The alpha_to_one value overrides the source alpha to 1.0 to implement
+ * GL_SAMPLE_ALPHA_TO_ONE, which applies before the alpha test (and would be
+ * rather silly to use with alpha test, but the spec permits).
+ */
+
+#include "nir/nir.h"
+#include "nir/nir_builder.h"
+
+void

[Mesa-dev] [PATCH 4/6] broadcom: Add vc5 CLIF dumping

[Eric Anholt]

This will be usable with "VC5_DEBUG=cl" on the vc5 driver to stream a CLIF
file (the Broadcom equivalent of i965's AUB) to stderr.  I haven't tested
that this is actually usable with the internal CLIF-consuming tools, but
is close enough as a baseline and is useful for visually inspecting the
command stream.
---
 src/broadcom/Makefile.sources |   2 +
 src/broadcom/Makefile.vc5.am  |   1 +
 src/broadcom/clif/clif_dump.c | 268 ++
 src/broadcom/clif/clif_dump.h |  42 +++
 4 files changed, 313 insertions(+)
 create mode 100644 src/broadcom/clif/clif_dump.c
 create mode 100644 src/broadcom/clif/clif_dump.h

diff --git a/src/broadcom/Makefile.sources b/src/broadcom/Makefile.sources
index 0091c84baa3c..38c1c2c2319f 100644
--- a/src/broadcom/Makefile.sources
+++ b/src/broadcom/Makefile.sources
@@ -11,6 +11,8 @@ BROADCOM_GENXML_XML_FILES = \
 
 BROADCOM_FILES = \
cle/v3d_packet_helpers.h \
+   clif/clif_dump.c \
+   clif/clif_dump.h \
common/v3d_device_info.h \
qpu/qpu_disasm.c \
qpu/qpu_disasm.h \
diff --git a/src/broadcom/Makefile.vc5.am b/src/broadcom/Makefile.vc5.am
index 23fe719e09b6..912baceba5d8 100644
--- a/src/broadcom/Makefile.vc5.am
+++ b/src/broadcom/Makefile.vc5.am
@@ -4,6 +4,7 @@ libbroadcom_la_LDFLAGS = $(VC5_SIMULATOR_LIBS)
 endif
 
 libbroadcom_la_SOURCES = $(BROADCOM_FILES)
+libbroadcom_la_LIBADD = cle/libbroadcom_cle.la
 
 check_PROGRAMS = \
qpu/tests/qpu_disasm \
diff --git a/src/broadcom/clif/clif_dump.c b/src/broadcom/clif/clif_dump.c
new file mode 100644
index ..8e9e248c0e47
--- /dev/null
+++ b/src/broadcom/clif/clif_dump.c
@@ -0,0 +1,268 @@
+/*
+ * Copyright © 2016 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include "clif_dump.h"
+#include "util/list.h"
+#include "util/ralloc.h"
+
+#include "broadcom/cle/v3d_decoder.h"
+
+#define __gen_user_data void
+#define __gen_address_type uint32_t
+#define __gen_address_offset(reloc) (*reloc)
+#define __gen_emit_reloc(cl, reloc)
+#define __gen_unpack_address(cl, s, e) (__gen_unpack_uint(cl, s, e) << (31 - 
(e - s)))
+
+enum reloc_worklist_type {
+reloc_gl_shader_state,
+};
+
+struct reloc_worklist_entry {
+struct list_head link;
+
+enum reloc_worklist_type type;
+uint32_t addr;
+
+union {
+struct {
+uint32_t num_attrs;
+} shader_state;
+};
+};
+
+struct clif_dump {
+const struct v3d_device_info *devinfo;
+bool (*lookup_vaddr)(void *data, uint32_t addr, void **vaddr);
+FILE *out;
+/* Opaque data from the caller that is passed to the callbacks. */
+void *data;
+
+struct v3d_spec *spec;
+
+/* List of struct reloc_worklist_entry */
+struct list_head worklist;
+};
+
+static void
+out(struct clif_dump *clif, const char *fmt, ...)
+{
+va_list args;
+
+va_start(args, fmt);
+vfprintf(clif->out, fmt, args);
+va_end(args);
+}
+
+#include "broadcom/cle/v3d_packet_v33_pack.h"
+
+static struct reloc_worklist_entry *
+clif_dump_add_address_to_worklist(struct clif_dump *clif,
+  enum reloc_worklist_type type,
+  uint32_t addr)
+{
+struct reloc_worklist_entry *entry =
+rzalloc(clif, struct reloc_worklist_entry);
+if (!entry)
+return NULL;
+
+entry->type = type;
+entry->addr = addr;
+
+list_addtail(>link, >worklist);
+
+return entry;
+}
+
+struct clif_dump *
+clif_dump_init(const struct v3d_device_info *devinfo,
+   FILE *out,
+   bool (*lookup_vaddr)(void *data, uint32_t addr, void **vaddr),
+   void *data)
+{
+struct clif_dump *clif = rzalloc(NULL, struct clif_dump);
+
+ 

Re: [Mesa-dev] [PATCH 2/2] egl: Add dma_buf_import_modifiers for glvnd

[Emil Velikov]

On 11 August 2017 at 11:18, Daniel Stone  wrote:
> On 31 July 2017 at 15:15, Daniel Stone  wrote:
>> Make sure we advertise the new entrypoints to libglvnd's EGL dispatch.
>
> Anyone?
>
I might be too tired but I think things should work fine even without the patch.
Regardless, the commit should not cause any issues.

Can you please drop the bugzilla tag - the issue seems to be different.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965/miptree: Set supports_fast_clear = false in make_shareable

[Emil Velikov]

On 14 August 2017 at 19:42, Jason Ekstrand  wrote:
> I missed the stable CC when I pushed this one.  It needs to be in 17.2
>
Ack, queued up.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH] radeonsi: update non-resident bindless descriptors if needed

[Emil Velikov]

Hi Samuel,

On 9 August 2017 at 14:47, Samuel Pitoiset  wrote:
> Only resident bindless descriptors are currently updated and
> re-uploaded, this makes sure that the non-resident ones are
> also updated.
>
> Signed-off-by: Samuel Pitoiset 
> Cc: "17.2" 
AFAICT the patch has not landed in master hence It won't be in stable, yet.
Has it fallen through the cracks or it's been superseded?

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: Stop looking at NewDriverState when emitting 3DSTATE_URB

[Kenneth Graunke]

On Friday, August 18, 2017 4:21:39 PM PDT Jason Ekstrand wrote:
> Looking at NewDriverState is not safe in general.  The state atom system
> is set up to ensure that new bits that get added to NewDriverState get
> accumulated into the set of bits used when emitting atoms but it doesn't
> go the other way.  If we read NewDriverState, we may not get the full
> picture because the per-pipeline state (3D or compute) does not get
> added to NewDriverState before state emit is done.  It's especially
> dangerous to do this from BLORP (either explicitly or implicitly when
> BLORP calls gen7_upload_urb) because that does not happen during one of
> the normal state upload paths.
> 
> This commit solves the problem by whacking all of the per-shader-stage
> URB sizes to zero whenever we change the total URB size.  We still have
> to flag BRW_NEW_URB_SIZE to ensure that the gen7_urb atom triggers but
> the actual decision in gen7_upload_urb can now be based entirely on URB
> sizes rather than on state atoms.  This also makes BLORP correct because
> it just asks for a new URB config whenever the vsize is too small and so
> any change to the total URB size will trigger blorp to re-emit as well
> because 0 < vs_entry_size.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102289
> Cc: Kenneth Graunke 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/mesa/drivers/dri/i965/gen7_l3_state.c   | 9 +
>  src/mesa/drivers/dri/i965/gen7_urb.c| 4 +---
>  src/mesa/drivers/dri/i965/genX_blorp_exec.c | 3 +--
>  3 files changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c 
> b/src/mesa/drivers/dri/i965/gen7_l3_state.c
> index 536c00c..53638eb 100644
> --- a/src/mesa/drivers/dri/i965/gen7_l3_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_l3_state.c
> @@ -204,6 +204,15 @@ update_urb_size(struct brw_context *brw, const struct 
> gen_l3_config *cfg)
> if (brw->urb.size != sz) {
>brw->urb.size = sz;
>brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE;
> +
> +  /* If we change the total URB size, reset the individual stage sizes to
> +   * zero so that, even if there is no URB size change, gen7_upload_urb
> +   * still re-emits 3DSTATE_URB_*.
> +   */
> +  brw->urb.vsize = 0;
> +  brw->urb.gsize = 0;
> +  brw->urb.hsize = 0;
> +  brw->urb.dsize = 0;
> }
>  }
>  
> diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c 
> b/src/mesa/drivers/dri/i965/gen7_urb.c
> index d5b03ef..06113fa 100644
> --- a/src/mesa/drivers/dri/i965/gen7_urb.c
> +++ b/src/mesa/drivers/dri/i965/gen7_urb.c
> @@ -201,9 +201,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
> /* If we're just switching between programs with the same URB 
> requirements,
>  * skip the rest of the logic.
>  */
> -   if (!(brw->ctx.NewDriverState & BRW_NEW_CONTEXT) &&
> -   !(brw->ctx.NewDriverState & BRW_NEW_URB_SIZE) &&
> -   brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] &&
> +   if (brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] &&
> brw->urb.gs_present == gs_present &&
> brw->urb.gsize == entry_size[MESA_SHADER_GEOMETRY] &&
> brw->urb.tess_present == tess_present &&
> diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c 
> b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> index c6eee4c..62d5c4a 100644
> --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> @@ -179,8 +179,7 @@ blorp_emit_urb_config(struct blorp_batch *batch,
> struct brw_context *brw = batch->driver_batch;
>  
>  #if GEN_GEN >= 7
> -   if (!(brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE)) &&
> -   brw->urb.vsize >= vs_entry_size)
> +   if (brw->urb.vsize >= vs_entry_size)
>return;
>  
> gen7_upload_urb(brw, vs_entry_size, false, false);
> 

Reviewed-by: Kenneth Graunke 

signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Stop looking at NewDriverState when emitting 3DSTATE_URB

[Jason Ekstrand]

Looking at NewDriverState is not safe in general.  The state atom system
is set up to ensure that new bits that get added to NewDriverState get
accumulated into the set of bits used when emitting atoms but it doesn't
go the other way.  If we read NewDriverState, we may not get the full
picture because the per-pipeline state (3D or compute) does not get
added to NewDriverState before state emit is done.  It's especially
dangerous to do this from BLORP (either explicitly or implicitly when
BLORP calls gen7_upload_urb) because that does not happen during one of
the normal state upload paths.

This commit solves the problem by whacking all of the per-shader-stage
URB sizes to zero whenever we change the total URB size.  We still have
to flag BRW_NEW_URB_SIZE to ensure that the gen7_urb atom triggers but
the actual decision in gen7_upload_urb can now be based entirely on URB
sizes rather than on state atoms.  This also makes BLORP correct because
it just asks for a new URB config whenever the vsize is too small and so
any change to the total URB size will trigger blorp to re-emit as well
because 0 < vs_entry_size.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102289
Cc: Kenneth Graunke 
Cc: mesa-sta...@lists.freedesktop.org
---
 src/mesa/drivers/dri/i965/gen7_l3_state.c   | 9 +
 src/mesa/drivers/dri/i965/gen7_urb.c| 4 +---
 src/mesa/drivers/dri/i965/genX_blorp_exec.c | 3 +--
 3 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c 
b/src/mesa/drivers/dri/i965/gen7_l3_state.c
index 536c00c..53638eb 100644
--- a/src/mesa/drivers/dri/i965/gen7_l3_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_l3_state.c
@@ -204,6 +204,15 @@ update_urb_size(struct brw_context *brw, const struct 
gen_l3_config *cfg)
if (brw->urb.size != sz) {
   brw->urb.size = sz;
   brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE;
+
+  /* If we change the total URB size, reset the individual stage sizes to
+   * zero so that, even if there is no URB size change, gen7_upload_urb
+   * still re-emits 3DSTATE_URB_*.
+   */
+  brw->urb.vsize = 0;
+  brw->urb.gsize = 0;
+  brw->urb.hsize = 0;
+  brw->urb.dsize = 0;
}
 }
 
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c 
b/src/mesa/drivers/dri/i965/gen7_urb.c
index d5b03ef..06113fa 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -201,9 +201,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
/* If we're just switching between programs with the same URB requirements,
 * skip the rest of the logic.
 */
-   if (!(brw->ctx.NewDriverState & BRW_NEW_CONTEXT) &&
-   !(brw->ctx.NewDriverState & BRW_NEW_URB_SIZE) &&
-   brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] &&
+   if (brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] &&
brw->urb.gs_present == gs_present &&
brw->urb.gsize == entry_size[MESA_SHADER_GEOMETRY] &&
brw->urb.tess_present == tess_present &&
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c 
b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index c6eee4c..62d5c4a 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -179,8 +179,7 @@ blorp_emit_urb_config(struct blorp_batch *batch,
struct brw_context *brw = batch->driver_batch;
 
 #if GEN_GEN >= 7
-   if (!(brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE)) &&
-   brw->urb.vsize >= vs_entry_size)
+   if (brw->urb.vsize >= vs_entry_size)
   return;
 
gen7_upload_urb(brw, vs_entry_size, false, false);
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3 1/1] clover: Wait for requested operation if blocking flag is set

[Francisco Jerez]

Jan Vesely  writes:

> On Fri, 2017-08-18 at 14:19 -0700, Francisco Jerez wrote:
>> Jan Vesely  writes:
>> 
>> > v2: wait in map_buffer and map_image as well
>> > v3: use event::wait instead of wait (skips fence wait for hard_event)
>> > 
>> 
>> Unfortunately this won't wait for the event action to be executed, only
>> for all dependencies of the event to become signalled, so there's a
>> possibility for a race condition in a multi-threaded environment.  Using
>> wait_signalled as I suggested earlier would address this issue.
>
> There's no wait_signalled() function.

It's in the patch I sent to you in the mail where I suggested doing
that.

> event::signalled() returns !wait_count.
>
> event::wait()
> {
> --- This should wait for dependencies
>for (event  : deps)
>   ev.wait();
>
> --- This should wait for signalled, no? at least the condition is
> identical

wait_count == deps.size() during most of the lifespan of a hard_event,
so the code below may return immediately even if the action hasn't been
executed yet (e.g. in a different thread).

>std::unique_lock lock(mutex);
>cv.wait(lock, [=]{ return !wait_count; });
> }
> am I missing something?
>
> Jan
>
>> 
>> > Signed-off-by: Jan Vesely 
>> > ---
>> >  src/gallium/state_trackers/clover/api/transfer.cpp | 30 
>> > --
>> >  1 file changed, 28 insertions(+), 2 deletions(-)
>> > 
>> > diff --git a/src/gallium/state_trackers/clover/api/transfer.cpp 
>> > b/src/gallium/state_trackers/clover/api/transfer.cpp
>> > index f7046253be..6f1ac4b931 100644
>> > --- a/src/gallium/state_trackers/clover/api/transfer.cpp
>> > +++ b/src/gallium/state_trackers/clover/api/transfer.cpp
>> > @@ -295,6 +295,9 @@ clEnqueueReadBuffer(cl_command_queue d_q, cl_mem 
>> > d_mem, cl_bool blocking,
>> > , obj_origin, obj_pitch,
>> > region));
>> >  
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > ret_object(rd_ev, hev);
>> > return CL_SUCCESS;
>> >  
>> > @@ -325,6 +328,9 @@ clEnqueueWriteBuffer(cl_command_queue d_q, cl_mem 
>> > d_mem, cl_bool blocking,
>> > ptr, {}, obj_pitch,
>> > region));
>> >  
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > ret_object(rd_ev, hev);
>> > return CL_SUCCESS;
>> >  
>> > @@ -362,6 +368,9 @@ clEnqueueReadBufferRect(cl_command_queue d_q, cl_mem 
>> > d_mem, cl_bool blocking,
>> > , obj_origin, obj_pitch,
>> > region));
>> >  
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > ret_object(rd_ev, hev);
>> > return CL_SUCCESS;
>> >  
>> > @@ -399,6 +408,9 @@ clEnqueueWriteBufferRect(cl_command_queue d_q, cl_mem 
>> > d_mem, cl_bool blocking,
>> > ptr, host_origin, host_pitch,
>> > region));
>> >  
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > ret_object(rd_ev, hev);
>> > return CL_SUCCESS;
>> >  
>> > @@ -504,6 +516,9 @@ clEnqueueReadImage(cl_command_queue d_q, cl_mem d_mem, 
>> > cl_bool blocking,
>> > , src_origin, src_pitch,
>> > region));
>> >  
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > ret_object(rd_ev, hev);
>> > return CL_SUCCESS;
>> >  
>> > @@ -538,6 +553,9 @@ clEnqueueWriteImage(cl_command_queue d_q, cl_mem 
>> > d_mem, cl_bool blocking,
>> > ptr, {}, src_pitch,
>> > region));
>> >  
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > ret_object(rd_ev, hev);
>> > return CL_SUCCESS;
>> >  
>> > @@ -667,7 +685,11 @@ clEnqueueMapBuffer(cl_command_queue d_q, cl_mem 
>> > d_mem, cl_bool blocking,
>> >  
>> > void *map = mem.resource(q).add_map(q, flags, blocking, obj_origin, 
>> > region);
>> >  
>> > -   ret_object(rd_ev, create(q, CL_COMMAND_MAP_BUFFER, deps));
>> > +   auto hev = create(q, CL_COMMAND_MAP_BUFFER, deps);
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > +   ret_object(rd_ev, hev);
>> > ret_error(r_errcode, CL_SUCCESS);
>> > return map;
>> >  
>> > @@ -695,7 +717,11 @@ clEnqueueMapImage(cl_command_queue d_q, cl_mem d_mem, 
>> > cl_bool blocking,
>> >  
>> > void *map = img.resource(q).add_map(q, flags, blocking, origin, 
>> > region);
>> >  
>> > -   ret_object(rd_ev, create(q, CL_COMMAND_MAP_IMAGE, deps));
>> > +   auto hev = create(q, CL_COMMAND_MAP_IMAGE, deps);
>> > +   if (blocking)
>> > +   hev().event::wait();
>> > +
>> > +   ret_object(rd_ev, hev);
>> > ret_error(r_errcode, CL_SUCCESS);
>> > return map;
>> >  
>> > -- 
>> > 2.13.5
>> 
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev


signature.asc
Description: PGP signature

Re: [Mesa-dev] [PATCH v3 1/1] clover: Wait for requested operation if blocking flag is set

[Jan Vesely]

On Fri, 2017-08-18 at 14:19 -0700, Francisco Jerez wrote:
> Jan Vesely  writes:
> 
> > v2: wait in map_buffer and map_image as well
> > v3: use event::wait instead of wait (skips fence wait for hard_event)
> > 
> 
> Unfortunately this won't wait for the event action to be executed, only
> for all dependencies of the event to become signalled, so there's a
> possibility for a race condition in a multi-threaded environment.  Using
> wait_signalled as I suggested earlier would address this issue.

There's no wait_signalled() function.
event::signalled() returns !wait_count.

event::wait()
{
--- This should wait for dependencies
   for (event  : deps)
  ev.wait();

--- This should wait for signalled, no? at least the condition is
identical
   std::unique_lock lock(mutex);
   cv.wait(lock, [=]{ return !wait_count; });
}
am I missing something?

Jan

> 
> > Signed-off-by: Jan Vesely 
> > ---
> >  src/gallium/state_trackers/clover/api/transfer.cpp | 30 
> > --
> >  1 file changed, 28 insertions(+), 2 deletions(-)
> > 
> > diff --git a/src/gallium/state_trackers/clover/api/transfer.cpp 
> > b/src/gallium/state_trackers/clover/api/transfer.cpp
> > index f7046253be..6f1ac4b931 100644
> > --- a/src/gallium/state_trackers/clover/api/transfer.cpp
> > +++ b/src/gallium/state_trackers/clover/api/transfer.cpp
> > @@ -295,6 +295,9 @@ clEnqueueReadBuffer(cl_command_queue d_q, cl_mem d_mem, 
> > cl_bool blocking,
> > , obj_origin, obj_pitch,
> > region));
> >  
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > ret_object(rd_ev, hev);
> > return CL_SUCCESS;
> >  
> > @@ -325,6 +328,9 @@ clEnqueueWriteBuffer(cl_command_queue d_q, cl_mem 
> > d_mem, cl_bool blocking,
> > ptr, {}, obj_pitch,
> > region));
> >  
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > ret_object(rd_ev, hev);
> > return CL_SUCCESS;
> >  
> > @@ -362,6 +368,9 @@ clEnqueueReadBufferRect(cl_command_queue d_q, cl_mem 
> > d_mem, cl_bool blocking,
> > , obj_origin, obj_pitch,
> > region));
> >  
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > ret_object(rd_ev, hev);
> > return CL_SUCCESS;
> >  
> > @@ -399,6 +408,9 @@ clEnqueueWriteBufferRect(cl_command_queue d_q, cl_mem 
> > d_mem, cl_bool blocking,
> > ptr, host_origin, host_pitch,
> > region));
> >  
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > ret_object(rd_ev, hev);
> > return CL_SUCCESS;
> >  
> > @@ -504,6 +516,9 @@ clEnqueueReadImage(cl_command_queue d_q, cl_mem d_mem, 
> > cl_bool blocking,
> > , src_origin, src_pitch,
> > region));
> >  
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > ret_object(rd_ev, hev);
> > return CL_SUCCESS;
> >  
> > @@ -538,6 +553,9 @@ clEnqueueWriteImage(cl_command_queue d_q, cl_mem d_mem, 
> > cl_bool blocking,
> > ptr, {}, src_pitch,
> > region));
> >  
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > ret_object(rd_ev, hev);
> > return CL_SUCCESS;
> >  
> > @@ -667,7 +685,11 @@ clEnqueueMapBuffer(cl_command_queue d_q, cl_mem d_mem, 
> > cl_bool blocking,
> >  
> > void *map = mem.resource(q).add_map(q, flags, blocking, obj_origin, 
> > region);
> >  
> > -   ret_object(rd_ev, create(q, CL_COMMAND_MAP_BUFFER, deps));
> > +   auto hev = create(q, CL_COMMAND_MAP_BUFFER, deps);
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > +   ret_object(rd_ev, hev);
> > ret_error(r_errcode, CL_SUCCESS);
> > return map;
> >  
> > @@ -695,7 +717,11 @@ clEnqueueMapImage(cl_command_queue d_q, cl_mem d_mem, 
> > cl_bool blocking,
> >  
> > void *map = img.resource(q).add_map(q, flags, blocking, origin, region);
> >  
> > -   ret_object(rd_ev, create(q, CL_COMMAND_MAP_IMAGE, deps));
> > +   auto hev = create(q, CL_COMMAND_MAP_IMAGE, deps);
> > +   if (blocking)
> > +   hev().event::wait();
> > +
> > +   ret_object(rd_ev, hev);
> > ret_error(r_errcode, CL_SUCCESS);
> > return map;
> >  
> > -- 
> > 2.13.5
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev


signature.asc
Description: This is a digitally signed message part
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] mistake in "mesa/vbo: move some Draw checks out of validation"?

[Brian Paul]

Hi Timothy,

I happened to be looking at the VBO vertex array code and I think I 
spotted a mistake in this commit:


commit 4df2931a87fe082f90871564a89a09c826641f5b
Author: Timothy Arceri 
Date:   Mon Apr 3 16:38:18 2017 +1000

mesa/vbo: move some Draw checks out of validation

These checks do not generate any errors. Move them so we can add
KHR_no_error support and still make sure we do these checks.

Reviewed-by: Nicolai Hähnle 


Specifically, the old code in check_valid_to_render() to check whether 
vertex attribute array 0 is enabled for API_OPENGLES was:


   /* For OpenGL ES, only draw if we have vertex positions
*/
   if (!ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled)
  return false;  //BP: don't draw

your patch moved this into skip_validated_draw() where the return value 
is basically inverted from the old code.


  /* For OpenGL ES, only draw if we have vertex positions
   */
  if (ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled)
 return false;
  break;

if we don't return false there, we'll unconditionally return false at 
the end of the function (i.e. we can never return true).


I think the above condition should read:

  if (!ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled)
 return true;  //BP: skip draw

The //BP: comments are added by me.

I guess we don't have any piglit tests for ES that check that drawing is 
skipped when the vertex position array is disabled.


-Brian
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3 1/1] clover: Wait for requested operation if blocking flag is set

[Francisco Jerez]

Jan Vesely  writes:

> v2: wait in map_buffer and map_image as well
> v3: use event::wait instead of wait (skips fence wait for hard_event)
>

Unfortunately this won't wait for the event action to be executed, only
for all dependencies of the event to become signalled, so there's a
possibility for a race condition in a multi-threaded environment.  Using
wait_signalled as I suggested earlier would address this issue.

> Signed-off-by: Jan Vesely 
> ---
>  src/gallium/state_trackers/clover/api/transfer.cpp | 30 
> --
>  1 file changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/state_trackers/clover/api/transfer.cpp 
> b/src/gallium/state_trackers/clover/api/transfer.cpp
> index f7046253be..6f1ac4b931 100644
> --- a/src/gallium/state_trackers/clover/api/transfer.cpp
> +++ b/src/gallium/state_trackers/clover/api/transfer.cpp
> @@ -295,6 +295,9 @@ clEnqueueReadBuffer(cl_command_queue d_q, cl_mem d_mem, 
> cl_bool blocking,
> , obj_origin, obj_pitch,
> region));
>  
> +   if (blocking)
> +   hev().event::wait();
> +
> ret_object(rd_ev, hev);
> return CL_SUCCESS;
>  
> @@ -325,6 +328,9 @@ clEnqueueWriteBuffer(cl_command_queue d_q, cl_mem d_mem, 
> cl_bool blocking,
> ptr, {}, obj_pitch,
> region));
>  
> +   if (blocking)
> +   hev().event::wait();
> +
> ret_object(rd_ev, hev);
> return CL_SUCCESS;
>  
> @@ -362,6 +368,9 @@ clEnqueueReadBufferRect(cl_command_queue d_q, cl_mem 
> d_mem, cl_bool blocking,
> , obj_origin, obj_pitch,
> region));
>  
> +   if (blocking)
> +   hev().event::wait();
> +
> ret_object(rd_ev, hev);
> return CL_SUCCESS;
>  
> @@ -399,6 +408,9 @@ clEnqueueWriteBufferRect(cl_command_queue d_q, cl_mem 
> d_mem, cl_bool blocking,
> ptr, host_origin, host_pitch,
> region));
>  
> +   if (blocking)
> +   hev().event::wait();
> +
> ret_object(rd_ev, hev);
> return CL_SUCCESS;
>  
> @@ -504,6 +516,9 @@ clEnqueueReadImage(cl_command_queue d_q, cl_mem d_mem, 
> cl_bool blocking,
> , src_origin, src_pitch,
> region));
>  
> +   if (blocking)
> +   hev().event::wait();
> +
> ret_object(rd_ev, hev);
> return CL_SUCCESS;
>  
> @@ -538,6 +553,9 @@ clEnqueueWriteImage(cl_command_queue d_q, cl_mem d_mem, 
> cl_bool blocking,
> ptr, {}, src_pitch,
> region));
>  
> +   if (blocking)
> +   hev().event::wait();
> +
> ret_object(rd_ev, hev);
> return CL_SUCCESS;
>  
> @@ -667,7 +685,11 @@ clEnqueueMapBuffer(cl_command_queue d_q, cl_mem d_mem, 
> cl_bool blocking,
>  
> void *map = mem.resource(q).add_map(q, flags, blocking, obj_origin, 
> region);
>  
> -   ret_object(rd_ev, create(q, CL_COMMAND_MAP_BUFFER, deps));
> +   auto hev = create(q, CL_COMMAND_MAP_BUFFER, deps);
> +   if (blocking)
> +   hev().event::wait();
> +
> +   ret_object(rd_ev, hev);
> ret_error(r_errcode, CL_SUCCESS);
> return map;
>  
> @@ -695,7 +717,11 @@ clEnqueueMapImage(cl_command_queue d_q, cl_mem d_mem, 
> cl_bool blocking,
>  
> void *map = img.resource(q).add_map(q, flags, blocking, origin, region);
>  
> -   ret_object(rd_ev, create(q, CL_COMMAND_MAP_IMAGE, deps));
> +   auto hev = create(q, CL_COMMAND_MAP_IMAGE, deps);
> +   if (blocking)
> +   hev().event::wait();
> +
> +   ret_object(rd_ev, hev);
> ret_error(r_errcode, CL_SUCCESS);
> return map;
>  
> -- 
> 2.13.5


signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: Mark all EGLimages as non-coherent.

[Chris Wilson]

Quoting Kenneth Graunke (2017-08-16 20:30:21)
> EGLimages are shared with external users, and we don't know what they're
> going to do with them.  They might scan them out.  They might access
> them in a way that doesn't work with our explicit clflushing.
> 
> It's safest to simply mark them non-coherent.
> 
> Chris Wilson caught this problem and wrote a similar (though less
> aggressive) patch to solve it; the miptree code has since undergone
> a lot of refactoring so I had to rewrite it.

I checked that this does fixup the glamor framebuffer to be marked as
!cache-coherent so with this we stop trying to write into it using the
WB mapping. With the always use LLC for reads patch applied, there isn't
a noticeable penalty for glamor on llc from a brief 2 minutes of looking.
If there are, those will need to be fixed for !llc platforms anyway, so
the more the merrier?
 
> Cc: Chris Wilson 
> Cc: Jason Ekstrand 
Reviewed-by: Chris Wilson 
-Chris
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] anv: Add error handling to setup_empty_execbuf().

[Francisco Jerez]

The anv_execbuf_add_bo() call can actually fail in practice, which
should cause the QueueSubmit operation to fail.  Reported by Coverity.

CID: 1416606: Unchecked return value (CHECKED_RETURN)
---
 src/intel/vulkan/anv_batch_chain.c | 22 +-
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index 0078cc5..26b5375 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1424,11 +1424,13 @@ setup_execbuf_for_cmd_buffer(struct anv_execbuf 
*execbuf,
return VK_SUCCESS;
 }
 
-static void
+static VkResult
 setup_empty_execbuf(struct anv_execbuf *execbuf, struct anv_device *device)
 {
-   anv_execbuf_add_bo(execbuf, >trivial_batch_bo, NULL, 0,
-  >alloc);
+   VkResult result = anv_execbuf_add_bo(execbuf, >trivial_batch_bo,
+NULL, 0, >alloc);
+   if (result != VK_SUCCESS)
+  return result;
 
execbuf->execbuf = (struct drm_i915_gem_execbuffer2) {
   .buffers_ptr = (uintptr_t) execbuf->objects,
@@ -1439,6 +1441,8 @@ setup_empty_execbuf(struct anv_execbuf *execbuf, struct 
anv_device *device)
   .rsvd1 = device->context_id,
   .rsvd2 = 0,
};
+
+   return VK_SUCCESS;
 }
 
 VkResult
@@ -1541,13 +1545,13 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
   }
}
 
-   if (cmd_buffer) {
+   if (cmd_buffer)
   result = setup_execbuf_for_cmd_buffer(, cmd_buffer);
-  if (result != VK_SUCCESS)
- return result;
-   } else {
-  setup_empty_execbuf(, device);
-   }
+   else
+  result = setup_empty_execbuf(, device);
+
+   if (result != VK_SUCCESS)
+  return result;
 
if (execbuf.fence_count > 0) {
   assert(device->instance->physicalDevice.has_syncobj);
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] anv: Check that in_fence fd is valid before closing it.

[Francisco Jerez]

Probably harmless, but will overwrite errno with a failure status
code.  Reported by coverity.

CID 1416600: Argument cannot be negative (NEGATIVE_RETURNS)
---
 src/intel/vulkan/anv_batch_chain.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index 26b5375..1e7455f 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1571,7 +1571,8 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
result = anv_device_execbuf(device, , execbuf.bos);
 
/* Execbuf does not consume the in_fence.  It's our job to close it. */
-   close(in_fence);
+   if (in_fence != -1)
+  close(in_fence);
 
for (uint32_t i = 0; i < num_in_semaphores; i++) {
   ANV_FROM_HANDLE(anv_semaphore, semaphore, in_semaphores[i]);
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH v3 1/1] clover: Wait for requested operation if blocking flag is set

[Jan Vesely]

v2: wait in map_buffer and map_image as well
v3: use event::wait instead of wait (skips fence wait for hard_event)

Signed-off-by: Jan Vesely 
---
 src/gallium/state_trackers/clover/api/transfer.cpp | 30 --
 1 file changed, 28 insertions(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/transfer.cpp 
b/src/gallium/state_trackers/clover/api/transfer.cpp
index f7046253be..6f1ac4b931 100644
--- a/src/gallium/state_trackers/clover/api/transfer.cpp
+++ b/src/gallium/state_trackers/clover/api/transfer.cpp
@@ -295,6 +295,9 @@ clEnqueueReadBuffer(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
, obj_origin, obj_pitch,
region));
 
+   if (blocking)
+   hev().event::wait();
+
ret_object(rd_ev, hev);
return CL_SUCCESS;
 
@@ -325,6 +328,9 @@ clEnqueueWriteBuffer(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
ptr, {}, obj_pitch,
region));
 
+   if (blocking)
+   hev().event::wait();
+
ret_object(rd_ev, hev);
return CL_SUCCESS;
 
@@ -362,6 +368,9 @@ clEnqueueReadBufferRect(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
, obj_origin, obj_pitch,
region));
 
+   if (blocking)
+   hev().event::wait();
+
ret_object(rd_ev, hev);
return CL_SUCCESS;
 
@@ -399,6 +408,9 @@ clEnqueueWriteBufferRect(cl_command_queue d_q, cl_mem 
d_mem, cl_bool blocking,
ptr, host_origin, host_pitch,
region));
 
+   if (blocking)
+   hev().event::wait();
+
ret_object(rd_ev, hev);
return CL_SUCCESS;
 
@@ -504,6 +516,9 @@ clEnqueueReadImage(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
, src_origin, src_pitch,
region));
 
+   if (blocking)
+   hev().event::wait();
+
ret_object(rd_ev, hev);
return CL_SUCCESS;
 
@@ -538,6 +553,9 @@ clEnqueueWriteImage(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
ptr, {}, src_pitch,
region));
 
+   if (blocking)
+   hev().event::wait();
+
ret_object(rd_ev, hev);
return CL_SUCCESS;
 
@@ -667,7 +685,11 @@ clEnqueueMapBuffer(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
 
void *map = mem.resource(q).add_map(q, flags, blocking, obj_origin, region);
 
-   ret_object(rd_ev, create(q, CL_COMMAND_MAP_BUFFER, deps));
+   auto hev = create(q, CL_COMMAND_MAP_BUFFER, deps);
+   if (blocking)
+   hev().event::wait();
+
+   ret_object(rd_ev, hev);
ret_error(r_errcode, CL_SUCCESS);
return map;
 
@@ -695,7 +717,11 @@ clEnqueueMapImage(cl_command_queue d_q, cl_mem d_mem, 
cl_bool blocking,
 
void *map = img.resource(q).add_map(q, flags, blocking, origin, region);
 
-   ret_object(rd_ev, create(q, CL_COMMAND_MAP_IMAGE, deps));
+   auto hev = create(q, CL_COMMAND_MAP_IMAGE, deps);
+   if (blocking)
+   hev().event::wait();
+
+   ret_object(rd_ev, hev);
ret_error(r_errcode, CL_SUCCESS);
return map;
 
-- 
2.13.5

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] egl: Add dma_buf_import_modifiers for glvnd

[Eric Anholt]

Daniel Stone  writes:

> On 31 July 2017 at 15:15, Daniel Stone  wrote:
>> Make sure we advertise the new entrypoints to libglvnd's EGL dispatch.
>
> Anyone?

Reviewed-by: Eric Anholt 


signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] Android: Fix LLVM duplicated symbols linking for N and M

[Rob Herring]

Both statically linking libLLVMCore and dynamically linking libLLVM causes
duplicated symbols in gallium_dri.so and it fails to dlopen. We don't
really need to link libLLVMCore, but just need generated headers to be
built first. Dynamically linking to libLLVM instead is enough to do
that. Thanks to Qiang Yu for finding the root cause.

With this change, we can align all versions and just have libLLVM as a
shared lib dependency.

This also requires changes in the M and N versions of LLVM to export the
include paths for libLLVM. AOSP master is okay.

Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
Reported-by: Mauro Rossi 
Cc: Emil Velikov 
Cc: 17.2 
Signed-off-by: Qiang Yu 
Signed-off-by: Rob Herring 
---
 Android.mk  | 12 
 src/amd/Android.common.mk   |  4 +---
 src/gallium/drivers/radeon/Android.mk   |  2 +-
 src/gallium/drivers/radeonsi/Android.mk |  2 +-
 4 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/Android.mk b/Android.mk
index 6571161c8783..dc4041364551 100644
--- a/Android.mk
+++ b/Android.mk
@@ -92,16 +92,12 @@ define mesa-build-with-llvm
   $(if $(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5), \
 $(warning Unsupported LLVM version in Android 
$(MESA_ANDROID_MAJOR_VERSION)),) \
   $(if $(filter 6,$(MESA_ANDROID_MAJOR_VERSION)), \
-$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0) \
-$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
-$(eval LOCAL_C_INCLUDES += external/llvm/include 
external/llvm/device/include),) \
+$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0),) \
   $(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
-$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
-$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
-$(eval LOCAL_C_INCLUDES += external/llvm/include 
external/llvm/device/include),) \
+$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0),) \
   $(if $(filter O,$(MESA_ANDROID_MAJOR_VERSION)), \
-$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0) \
-$(eval LOCAL_HEADER_LIBRARIES += llvm-headers),)
+$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0),) \
+  $(eval LOCAL_SHARED_LIBRARIES += libLLVM)
 endef
 
 # add subdirectories
diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index 7d08bfd31d79..4e2d0f9c2ffa 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -55,9 +55,7 @@ LOCAL_C_INCLUDES := \
$(call generated-sources-dir-for,STATIC_LIBRARIES,libmesa_nir,,)/nir \
$(MESA_TOP)/src/gallium/include \
$(MESA_TOP)/src/gallium/auxiliary \
-   $(intermediates)/common \
-   external/llvm/include \
-   external/llvm/device/include
+   $(intermediates)/common
 
 LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(LOCAL_PATH)/common
diff --git a/src/gallium/drivers/radeon/Android.mk 
b/src/gallium/drivers/radeon/Android.mk
index eb1a32182bb0..c2d3a1cbce60 100644
--- a/src/gallium/drivers/radeon/Android.mk
+++ b/src/gallium/drivers/radeon/Android.mk
@@ -30,7 +30,7 @@ include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := $(C_SOURCES)
 
-LOCAL_SHARED_LIBRARIES := libdrm_radeon libLLVM
+LOCAL_SHARED_LIBRARIES := libdrm_radeon
 LOCAL_MODULE := libmesa_pipe_radeon
 
 ifeq ($(MESA_ENABLE_LLVM),true)
diff --git a/src/gallium/drivers/radeonsi/Android.mk 
b/src/gallium/drivers/radeonsi/Android.mk
index 65661a5ea7a5..e72b80c4e807 100644
--- a/src/gallium/drivers/radeonsi/Android.mk
+++ b/src/gallium/drivers/radeonsi/Android.mk
@@ -41,7 +41,7 @@ LOCAL_C_INCLUDES := \
 
 LOCAL_STATIC_LIBRARIES := libmesa_amd_common
 
-LOCAL_SHARED_LIBRARIES := libdrm_radeon libLLVM
+LOCAL_SHARED_LIBRARIES := libdrm_radeon
 LOCAL_MODULE := libmesa_pipe_radeonsi
 
 intermediates := $(call local-generated-sources-dir)
-- 
2.11.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 101941] Getting different output depending on attribute declaration order

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101941

--- Comment #1 from Brian Paul  ---
Just for reference, I think this is related to bug 44217.

-- 
You are receiving this mail because:
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] gallium: Weaken assertion about u_mm's align2 field.

[Eric Anholt]

vc5 MMU mappings are access-controlled at a 128kb boundary, so the 4kb
here was too small for that purpose.  Allowing any valid align2 value that
u_mm's 32-bit addressing can represent will still catch most cases of
people passing in a byte alignment.
---
 src/gallium/auxiliary/util/u_mm.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_mm.c 
b/src/gallium/auxiliary/util/u_mm.c
index bd4c4e1b1060..7a45e291920e 100644
--- a/src/gallium/auxiliary/util/u_mm.c
+++ b/src/gallium/auxiliary/util/u_mm.c
@@ -183,7 +183,10 @@ u_mmAllocMem(struct mem_block *heap, int size, int align2, 
int startSearch)
 
assert(size >= 0);
assert(align2 >= 0);
-   assert(align2 <= 12); /* sanity check, 2^12 (4KB) enough? */
+   /* Make sure that a byte alignment isn't getting passed for our
+* power-of-two alignment arg.
+*/
+   assert(align2 < 32);
 
if (!heap || align2 < 0 || size <= 0)
   return NULL;
-- 
2.14.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 102038] assertion failure in update_framebuffer_size

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102038

--- Comment #7 from Bruce Cherniak  ---
I understand that this isn't a solution, but it points to where things go
wrong.  I'll keep digging for the correct fix.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 07/45] nir: Populate conversion opcodes to/from 16-bit types

[Jason Ekstrand]

On Fri, Aug 18, 2017 at 4:28 AM, Eduardo Lima Mitev 
wrote:

> On 08/17/2017 08:48 PM, Jason Ekstrand wrote:
> > On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro  > > wrote:
> >
> > From: Eduardo Lima Mitev  >>
> >
> > This will include the following NIR ALU opcodes:
> >  * nir_op_i2i16
> >  * nir_op_i2f16
> >  * nir_op_u2u16
> >  * nir_op_u2f16
> >  * nir_op_f2i16
> >  * nir_op_f2u16
> >  * nir_op_f2f16
> > ---
> >  src/compiler/nir/nir_opcodes_c.py | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/src/compiler/nir/nir_opcodes_c.py
> > b/src/compiler/nir/nir_opcodes_c.py
> > index a7721d3..01776be 100644
> > --- a/src/compiler/nir/nir_opcodes_c.py
> > +++ b/src/compiler/nir/nir_opcodes_c.py
> > @@ -62,7 +62,7 @@ nir_type_conversion_op(nir_alu_type src,
> > nir_alu_type dst, nir_rounding_mode rnd
> >  % endif
> >  %  endif
> > switch (dst_bit_size) {
> > -% for dst_bits in [32, 64]:
> > +% for dst_bits in [16, 32, 64]:
> >
> >
> > You also need to update nir_type_conversion_op in nir_opcodes_c.py.
> >
>
> What do you mean? This hunk is for nir_type_conversion_op in
> nir_opcodes_c.py.
>

drp... I misread it as being for nir_opcodes.py but I guess we have all of
those.  In that case,

Reviewed-by: Jason Ekstrand 


> > Also, shouldn't this go before patch 6?
> >
>
> Yes, indeed. We have shuffled the patches in the series a few times
> already :). Fixed for v2.
>
> >
> >case ${dst_bits}:
> >  %   if src_t == 'float' and dst_t == 'float'  and
> > dst_bits == 16:
> >   switch(rnd) {
> > --
> > 2.9.3
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org  freedesktop.org>
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> > 
> >
> >
> >
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> >
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 06/45] nir: Handle fp16 rounding modes at nir_type_conversion_op

[Jason Ekstrand]

On Fri, Aug 18, 2017 at 4:31 AM, Eduardo Lima Mitev 
wrote:

> On 08/17/2017 09:08 PM, Jason Ekstrand wrote:
> > On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro  > > wrote:
> >
> > From: Jose Maria Casanova Crespo  > >
> >
> > nir_type_conversion enables new operations to handle rounding modes
> to
> > convert to fp16 values. Two new opcodes are enabled nir_op_f2f16_rtne
> > and nir_op_f2f16_rtz.
> >
> > The undefined behaviour doesn't has any effect and uses the original
> > nir_op_f2f16 operation.
> > ---
> >  src/compiler/glsl/glsl_to_nir.cpp |  3 ++-
> >  src/compiler/nir/nir.h|  3 ++-
> >  src/compiler/nir/nir_opcodes.py   | 10 --
> >  src/compiler/nir/nir_opcodes_c.py | 15 ++-
> >  src/compiler/spirv/vtn_alu.c  |  2 +-
> >  5 files changed, 27 insertions(+), 6 deletions(-)
> >
> > diff --git a/src/compiler/glsl/glsl_to_nir.cpp
> > b/src/compiler/glsl/glsl_to_nir.cpp
> > index 2153004..23e6121 100644
> > --- a/src/compiler/glsl/glsl_to_nir.cpp
> > +++ b/src/compiler/glsl/glsl_to_nir.cpp
> > @@ -1509,7 +1509,8 @@ nir_visitor::visit(ir_expression *ir)
> > case ir_unop_u642i64: {
> >nir_alu_type src_type =
> > nir_get_nir_type_for_glsl_base_type(types[0]);
> >nir_alu_type dst_type =
> > nir_get_nir_type_for_glsl_base_type(out_type);
> > -  result = nir_build_alu(, nir_type_conversion_op(src_type,
> > dst_type),
> > +  result = nir_build_alu(, nir_type_conversion_op(src_type,
> > dst_type,
> > + nir_rounding_mode_undef),
> >   srcs[0], NULL, NULL, NULL);
> >/* b2i and b2f don't have fixed bit-size versions so the
> > builder will
> > * just assume 32 and we have to fix it up here.
> > diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> > index 115ec1b..7e48e18 100644
> > --- a/src/compiler/nir/nir.h
> > +++ b/src/compiler/nir/nir.h
> > @@ -741,7 +741,8 @@ nir_get_nir_type_for_glsl_type(const struct
> > glsl_type *type)
> > return
> > nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
> >  }
> >
> > -nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst);
> > +nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
> > +  nir_rounding_mode rnd);
> >
> >  typedef enum {
> > NIR_OP_IS_COMMUTATIVE = (1 << 0),
> > diff --git a/src/compiler/nir/nir_opcodes.py
> > b/src/compiler/nir/nir_opcodes.py
> > index 39c01a7..bd342de 100644
> > --- a/src/compiler/nir/nir_opcodes.py
> > +++ b/src/compiler/nir/nir_opcodes.py
> > @@ -179,8 +179,14 @@ for src_t in [tint, tuint, tfloat]:
> >else:
> >   bit_sizes = [8, 16, 32, 64]
> >for bit_size in bit_sizes:
> > - unop_convert("{0}2{1}{2}".format(src_t[0], dst_t[0],
> > bit_size),
> > -  dst_t + str(bit_size), src_t, "src0")
> > +  if bit_size == 16 and dst_t == tfloat and src_t == tfloat:
> > +  rnd_modes = ['rtne', 'rtz']
> > +  for rnd_mode in rnd_modes:
> > +  unop_convert("{0}2{1}{2}_{3}".format(src_t[0],
> > dst_t[0],
> > +   bit_size,
> > rnd_mode),
> > +   dst_t + str(bit_size), src_t, "src0")
> > +  unop_convert("{0}2{1}{2}".format(src_t[0], dst_t[0],
> > bit_size),
> > +   dst_t + str(bit_size), src_t, "src0")
> >
> >
> > You could do this a bit shorter if you make rnd_modes = ['', '_rtne',
> > 'rtz'] and then just loop over them.
> >
>
> Hmm, I don't think we can reduce it that way. Notice that the loop over
> rnd_modes is only for bit_size==16, but the last unop_convert call,
> outside the loop, applies to all bit sizes.
>

Right.  Sorry for the noise.


> >
> >
> >  # We'll hand-code the to/from bool conversion opcodes.  Because
> > bool doesn't
> >  # have multiple bit-sizes, we can always infer the size from the
> > other type.
> > diff --git a/src/compiler/nir/nir_opcodes_c.py
> > b/src/compiler/nir/nir_opcodes_c.py
> > index a1db54f..a7721d3 100644
> > --- a/src/compiler/nir/nir_opcodes_c.py
> > +++ b/src/compiler/nir/nir_opcodes_c.py
> > @@ -30,7 +30,7 @@ template = Template("""
> >  #include "nir.h"
> >
> >  nir_op
> > -nir_type_conversion_op(nir_alu_type src, nir_alu_type dst)
> > +nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
> > nir_rounding_mode rnd)
> >  {
> > nir_alu_type src_base = (nir_alu_type)
> > nir_alu_type_get_base_type(src);
> 

Re: [Mesa-dev] [PATCH] radeon/uvd: get the target buffer pitch correct for different format

[Christian König]

Am 18.08.2017 um 18:31 schrieb Leo Liu:

Signed-off-by: Leo Liu 


Reviewed-by: Christian König 


---
  src/gallium/drivers/radeon/radeon_uvd.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index d5352d9de6..dd8c0e0eb0 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1397,7 +1397,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
switch (type) {
default:
case RUVD_SURFACE_TYPE_LEGACY:
-   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x;
+   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * 
luma->blk_w;
switch (luma->u.legacy.level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
@@ -1435,7 +1435,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
msg->body.decode.dt_surf_tile_config |= 
RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
break;
case RUVD_SURFACE_TYPE_GFX9:
-   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->bpe;
+   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * 
luma->blk_w;
/* SWIZZLE LINEAR MODE */
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 17/20] radeon/uvd: add YUYV format support for target buffer

[Christian König]

Am 18.08.2017 um 18:31 schrieb Leo Liu:

YUYV is a packed YUV format, and there is no chorma plane


At better description would be something like: "Make chroma plane 
optional for YUYV support."


Signed-off-by: Leo Liu 


Anyway patch is Reviewed-by: Christian König 

Regards,
Christian.


---
  src/gallium/drivers/radeon/radeon_uvd.c | 6 --
  src/gallium/drivers/radeonsi/si_uvd.c   | 2 +-
  2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index 9ebc31c170..648a493b59 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1566,10 +1566,12 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
}
  
  		msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type);

-   msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 
0, type);
+   if (chroma)
+   msg->body.decode.dt_chroma_top_offset = 
texture_offset(chroma, 0, type);
if (msg->body.decode.dt_field_mode) {
msg->body.decode.dt_luma_bottom_offset = 
texture_offset(luma, 1, type);
-   msg->body.decode.dt_chroma_bottom_offset = 
texture_offset(chroma, 1, type);
+   if (chroma)
+   msg->body.decode.dt_chroma_bottom_offset = 
texture_offset(chroma, 1, type);
} else {
msg->body.decode.dt_luma_bottom_offset = 
msg->body.decode.dt_luma_top_offset;
msg->body.decode.dt_chroma_bottom_offset = 
msg->body.decode.dt_chroma_top_offset;
diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
b/src/gallium/drivers/radeonsi/si_uvd.c
index d17a6656a4..2441ad248c 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -131,7 +131,7 @@ static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg 
*msg, struct vl_video_bu
  
  	msg->body.decode.dt_field_mode = buf->base.interlaced;
  
-	ruvd_set_dt_surfaces(msg, >surface, >surface, type);

+   ruvd_set_dt_surfaces(msg, >surface, (chroma) ? >surface : 
NULL, type);
  
  	return luma->resource.buf;

  }



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 102038] assertion failure in update_framebuffer_size

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102038

--- Comment #6 from Roland Scheidegger  ---
(In reply to Bruce Cherniak from comment #5)
> Looks like a problem in llvmpipe_is_format_supported.  If should be
> returning false for all "sample_count > 0", not 1.
No, not really. In gallium there's no distinction between sample count 0 and 1
- there are no surfaces with no samples, after all. (Ordinary surfaces should
actually always have 1 sample, that 0 is allowed to is more of a historical
accident.)

Maybe VTK is trying to use msaa surfaces with just one sample, despite that the
max sample count supported we announce is 0.
Albeit I'm thinking we should have refused that configuration earlier
somewhere, if the sample_count gets upgraded later...

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/9] loader_dri3/glx/egl: Optionally use a blit context for blitting operations

[Thomas Hellstrom]

On 08/18/2017 07:02 PM, Emil Velikov wrote:

Hi Thomas,

On 15 August 2017 at 19:31, Thomas Hellstrom  wrote:


+/**
+ * A cached blit context.
+ */
+struct loader_dri3_blit_context {
+   mtx_t mtx;
+   __DRIcontext *ctx;
+   __DRIscreen *cur_screen;
+   const __DRIcoreExtension *core;
+};
+
+/* For simplicity we maintain the cache only for a single screen at a time */
+static struct loader_dri3_blit_context blit_context = {
+   _MTX_INITIALIZER_NP, NULL

Use a C99 designated initializer?


+};
+/**
+ * Blit (parts of) the contents of a DRI image to another dri image
+ *
+ * \param draw[in]  The drawable which owns the images.
+ * \param dst[in]  The destination image.
+ * \param src[in]  The source image.
+ * \param dstx0[in]  Start destination coordinate.
+ * \param dsty0[in]  Start destination coordinate.
+ * \param width[in]  Blit width.
+ * \param height[in] Blit height.
+ * \param srcx0[in]  Start source coordinate.
+ * \param srcy0[in]  Start source coordinate.
+ * \param flush_flag[in]  Image blit flush flag.
+ * \return true iff successful.

s/iff/if/

With the above
Reviewed-by: Emil Velikov 

Please don't bother re-sending the patch. Squash locally before pushing.

Thanks
Emil


Hi, Emil!

The patch is already pushed, If you want to, I can fix up the 
initializer in a follow-up. iff is a common abbreviation for if and only if.


Thomas


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/9] loader_dri3/glx/egl: Optionally use a blit context for blitting operations

[Emil Velikov]

On 18 August 2017 at 18:14, Thomas Hellstrom  wrote:
> On 08/18/2017 07:02 PM, Emil Velikov wrote:
>>
>> Hi Thomas,
>>
>> On 15 August 2017 at 19:31, Thomas Hellstrom 
>> wrote:
>>
>>> +/**
>>> + * A cached blit context.
>>> + */
>>> +struct loader_dri3_blit_context {
>>> +   mtx_t mtx;
>>> +   __DRIcontext *ctx;
>>> +   __DRIscreen *cur_screen;
>>> +   const __DRIcoreExtension *core;
>>> +};
>>> +
>>> +/* For simplicity we maintain the cache only for a single screen at a
>>> time */
>>> +static struct loader_dri3_blit_context blit_context = {
>>> +   _MTX_INITIALIZER_NP, NULL
>>
>> Use a C99 designated initializer?
>>
>>> +};
>>> +/**
>>> + * Blit (parts of) the contents of a DRI image to another dri image
>>> + *
>>> + * \param draw[in]  The drawable which owns the images.
>>> + * \param dst[in]  The destination image.
>>> + * \param src[in]  The source image.
>>> + * \param dstx0[in]  Start destination coordinate.
>>> + * \param dsty0[in]  Start destination coordinate.
>>> + * \param width[in]  Blit width.
>>> + * \param height[in] Blit height.
>>> + * \param srcx0[in]  Start source coordinate.
>>> + * \param srcy0[in]  Start source coordinate.
>>> + * \param flush_flag[in]  Image blit flush flag.
>>> + * \return true iff successful.
>>
>> s/iff/if/
>>
>> With the above
>> Reviewed-by: Emil Velikov 
>>
>> Please don't bother re-sending the patch. Squash locally before pushing.
>>
>> Thanks
>> Emil
>
>
> Hi, Emil!
>
> The patch is already pushed, If you want to, I can fix up the initializer in
> a follow-up. iff is a common abbreviation for if and only if.
>
Oops could swear I checked before hitting send.
Pardon for the noise and thanks for the educational reply.

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] radeonsi/gfx9: add a temporary workaround for a tessellation driver bug

[Marek Olšák]

Ping.

On Wed, Aug 16, 2017 at 12:57 AM, Marek Olšák  wrote:
> From: Marek Olšák 
>
> The workaround will do for now. The root cause is still unknown.
>
> This fixes new piglit: 16in-1out
>
> Cc: 17.1 17.2 
> ---
>  src/gallium/drivers/radeonsi/si_state_draw.c | 6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c 
> b/src/gallium/drivers/radeonsi/si_state_draw.c
> index f17f570..a26e38d 100644
> --- a/src/gallium/drivers/radeonsi/si_state_draw.c
> +++ b/src/gallium/drivers/radeonsi/si_state_draw.c
> @@ -187,21 +187,25 @@ static void si_emit_derived_tess_state(struct 
> si_context *sctx,
> /* Make sure the output data fits in the offchip buffer */
> *num_patches = MIN2(*num_patches,
> (sctx->screen->tess_offchip_block_dw_size * 4) /
> output_patch_size);
>
> /* Not necessary for correctness, but improves performance. The
>  * specific value is taken from the proprietary driver.
>  */
> *num_patches = MIN2(*num_patches, 40);
>
> -   if (sctx->b.chip_class == SI) {
> +   if (sctx->b.chip_class == SI ||
> +   /* TODO: fix GFX9 where a threadgroup contains more than 1 wave 
> and
> +* LS vertices per patch > HS vertices per patch. Piglit: 
> 16in-1out */
> +   (sctx->b.chip_class == GFX9 &&
> +num_tcs_input_cp > num_tcs_output_cp)) {
> /* SI bug workaround, related to power management. Limit LS-HS
>  * threadgroups to only one wave.
>  */
> unsigned one_wave = 64 / MAX2(num_tcs_input_cp, 
> num_tcs_output_cp);
> *num_patches = MIN2(*num_patches, one_wave);
> }
>
> /* The VGT HS block increments the patch ID unconditionally
>  * within a single threadgroup. This results in incorrect
>  * patch IDs when instanced draws are used.
> --
> 2.7.4
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/9] loader_dri3/glx/egl: Optionally use a blit context for blitting operations

[Emil Velikov]

Hi Thomas,

On 15 August 2017 at 19:31, Thomas Hellstrom  wrote:

> +/**
> + * A cached blit context.
> + */
> +struct loader_dri3_blit_context {
> +   mtx_t mtx;
> +   __DRIcontext *ctx;
> +   __DRIscreen *cur_screen;
> +   const __DRIcoreExtension *core;
> +};
> +
> +/* For simplicity we maintain the cache only for a single screen at a time */
> +static struct loader_dri3_blit_context blit_context = {
> +   _MTX_INITIALIZER_NP, NULL
Use a C99 designated initializer?

> +};

> +/**
> + * Blit (parts of) the contents of a DRI image to another dri image
> + *
> + * \param draw[in]  The drawable which owns the images.
> + * \param dst[in]  The destination image.
> + * \param src[in]  The source image.
> + * \param dstx0[in]  Start destination coordinate.
> + * \param dsty0[in]  Start destination coordinate.
> + * \param width[in]  Blit width.
> + * \param height[in] Blit height.
> + * \param srcx0[in]  Start source coordinate.
> + * \param srcy0[in]  Start source coordinate.
> + * \param flush_flag[in]  Image blit flush flag.
> + * \return true iff successful.
s/iff/if/

With the above
Reviewed-by: Emil Velikov 

Please don't bother re-sending the patch. Squash locally before pushing.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 102038] assertion failure in update_framebuffer_size

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102038

--- Comment #5 from Bruce Cherniak  ---
Looks like a problem in llvmpipe_is_format_supported.  If should be returning
false for all "sample_count > 0", not 1.

That works for me, at least.  I'm running all VTK tests against it right now.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 01/12] egl/x11/dri3: adding missing __DRI_BACKGROUND_CALLABLE extension

[Emil Velikov]

On 3 August 2017 at 19:29, Emil Velikov  wrote:
> From: Emil Velikov 
>
> Fixes: 3b7b6adf3ac ("egl: Implement __DRI_BACKGROUND_CALLABLE")
> Cc: Timothy Arceri 
> Signed-off-by: Emil Velikov 
> ---
>  src/egl/drivers/dri2/platform_x11.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/egl/drivers/dri2/platform_x11.c 
> b/src/egl/drivers/dri2/platform_x11.c
> index 35c62a4975a..f21cd5f619f 100644
> --- a/src/egl/drivers/dri2/platform_x11.c
> +++ b/src/egl/drivers/dri2/platform_x11.c
> @@ -1311,6 +1311,7 @@ static const __DRIextension 
> *dri3_image_loader_extensions[] = {
> _image_loader_extension.base,
> _lookup_extension.base,
> _invalidate.base,
> +   _callable_extension.base,

Tim, humble poke?

AFAICT without this one cannot use glthread with egl/x11+dri3.

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] configure: Trust LLVM >= 4.0 llvm-config --libs for shared libraries

[Jan Vesely]

On Mon, 2017-08-14 at 17:11 +0900, Michel Dänzer wrote:
> On 11/08/17 02:13 AM, Jan Vesely wrote:
> > On Thu, 2017-08-10 at 17:45 +0100, Emil Velikov wrote:
> > > 
> > > Topic for another thread:
> > > There's been a handful of issues reported with BUILD_SHARED_LIBS=ON.
> > > Should we consider that unsupported setup and error out?
> 
> I don't really see the point / gain in that.
> 
> 
> > please no.
> > BUILD_SHARED_LIBS=ON is a must for development setup
> > debug build of clang + llvm takes 1.4GB, each. Having a ~2.8GB library,
> > is a really bad idea for testing,
> 
> Not sure what testing you're referring to exactly, but IME application
> startup takes on the order of hundreds of ms longer when linking against
> the individual shared libraries than when linking against the single
> one. It's one reason why distros building with BUILD_SHARED_LIBS=ON is
> just silly.
> 
> 
> > not to mention linking time that goes well into minutes for even a
> > minor change in LLVM.
> 
> It can certainly take a long time, but I don't remember it taking
> minutes. Are you counting the time for linking other libraries / tools
> against libLLVM-*.0*.so as well? You can avoid that by explicitly
> building only the library, e.g.:
> 
>  ninja [...] lib/libLLVM-6.0svn.so
> 
> Also, using the gold or lld linker might help.

The problem is that setting both
BUILD_SHARED_LIBS=ON
LLVM_BUILD_LLVM_DYLIB=ON
Does not work.

BUILD_SHARED_LIBS=OFF results in every component creating its own
static library. These are used be default when linking LLVM tools. This
configuration results in 15G build/lib and another 15G build/bin.

simple test:
touch lib/Target/AMDGPU/R600ISelLowering.cpp
make -j3 (using more jobs exhausts available memory since a linking
process easily takes 7-9GB).
takes ~15mins to complete, and that's without the install step.

using LLVM_LINK_LLVM_DYLIB=ON improves the test time to ~7m (and
reduces build/bin to ~4GB)

but it still does not compare to ~40s that it takes BUILD_SHARED_LIBS
to finish the same test.

Jan




signature.asc
Description: This is a digitally signed message part
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 17/20] radeon/uvd: add YUYV format support for target buffer

[Leo Liu]

YUYV is a packed YUV format, and there is no chorma plane

Signed-off-by: Leo Liu 
---
 src/gallium/drivers/radeon/radeon_uvd.c | 6 --
 src/gallium/drivers/radeonsi/si_uvd.c   | 2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index 9ebc31c170..648a493b59 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1566,10 +1566,12 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
}
 
msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, 
type);
-   msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 
0, type);
+   if (chroma)
+   msg->body.decode.dt_chroma_top_offset = 
texture_offset(chroma, 0, type);
if (msg->body.decode.dt_field_mode) {
msg->body.decode.dt_luma_bottom_offset = 
texture_offset(luma, 1, type);
-   msg->body.decode.dt_chroma_bottom_offset = 
texture_offset(chroma, 1, type);
+   if (chroma)
+   msg->body.decode.dt_chroma_bottom_offset = 
texture_offset(chroma, 1, type);
} else {
msg->body.decode.dt_luma_bottom_offset = 
msg->body.decode.dt_luma_top_offset;
msg->body.decode.dt_chroma_bottom_offset = 
msg->body.decode.dt_chroma_top_offset;
diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
b/src/gallium/drivers/radeonsi/si_uvd.c
index d17a6656a4..2441ad248c 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -131,7 +131,7 @@ static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg 
*msg, struct vl_video_bu
 
msg->body.decode.dt_field_mode = buf->base.interlaced;
 
-   ruvd_set_dt_surfaces(msg, >surface, >surface, type);
+   ruvd_set_dt_surfaces(msg, >surface, (chroma) ? >surface : 
NULL, type);
 
return luma->resource.buf;
 }
-- 
2.11.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] radeon/uvd: get the target buffer pitch correct for different format

[Leo Liu]

Signed-off-by: Leo Liu 
---
 src/gallium/drivers/radeon/radeon_uvd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index d5352d9de6..dd8c0e0eb0 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1397,7 +1397,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
switch (type) {
default:
case RUVD_SURFACE_TYPE_LEGACY:
-   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x;
+   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * 
luma->blk_w;
switch (luma->u.legacy.level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
@@ -1435,7 +1435,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
msg->body.decode.dt_surf_tile_config |= 
RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
break;
case RUVD_SURFACE_TYPE_GFX9:
-   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->bpe;
+   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * 
luma->blk_w;
/* SWIZZLE LINEAR MODE */
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
-- 
2.11.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [android-x86-devel] [PATCH] android: fix gallium_dri.so can't be loaded by drm_gralloc

[Rob Herring]

On Fri, Aug 18, 2017 at 11:03 AM, Emil Velikov  wrote:
> Hi Qiang Yu,
>
> On 18 August 2017 at 01:30, Qiang Yu  wrote:
>> The problem is in gallium/winsys/amdgpu/drm/Android.mk
>> which will have duplacated symbols when linking
>> gallium_dri.so for libLLVMCore and libLLVM.
>>
> Skimming through the commit message and the change inspires some confusion.
>
> How about something like the following:
> "Android:  rework LLVM linking to avoid multiple symbol definitions
>
> Currently we static against libLLVMCore alongside the shared link
> against libLLVM.
> This leads to duplicate symbols and run/build (please correct me) time.
>
> Fix that by consistently dropping the libLLVMCore + llvm-headers bits
> and consistently using a shared libLLVM link.
> "
>
>> Signed-off-by: Qiang Yu 
>> Signed-off-by: Mauro Rossi 
>> Signed-off-by: Rob Herring 
> I don't recall seeing patches from Mauro/RobH about this. I think you
> meant - Reviewed-by/Acked-by/other?
>
> Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
> Fixes: d31a2b4d492 ("Android: Add LLVM support for Android O")

Only the first one is correct. The latter one was just to get a clean revert.

>> ---
>>  Android.mk  | 7 ---
>>  src/amd/Android.common.mk   | 4 +---
>>  src/gallium/drivers/radeon/Android.mk   | 2 +-
>>  src/gallium/drivers/radeonsi/Android.mk | 2 +-
>>  4 files changed, 7 insertions(+), 8 deletions(-)
>>
>> diff --git a/Android.mk b/Android.mk
>> index 6571161..5154a56 100644
>> --- a/Android.mk
>> +++ b/Android.mk
>> @@ -93,15 +93,16 @@ define mesa-build-with-llvm
>>  $(warning Unsupported LLVM version in Android 
>> $(MESA_ANDROID_MAJOR_VERSION)),) \
>>$(if $(filter 6,$(MESA_ANDROID_MAJOR_VERSION)), \
>>  $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0) \
>> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
>> +$(eval LOCAL_SHARED_LIBRARIES += libLLVM) \
>>  $(eval LOCAL_C_INCLUDES += external/llvm/include 
>> external/llvm/device/include),) \
>>$(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
>>  $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
>> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
>> +$(eval LOCAL_SHARED_LIBRARIES += libLLVM) \
>>  $(eval LOCAL_C_INCLUDES += external/llvm/include 
>> external/llvm/device/include),) \
>>$(if $(filter O,$(MESA_ANDROID_MAJOR_VERSION)), \
>>  $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0) \
>> -$(eval LOCAL_HEADER_LIBRARIES += llvm-headers),)
>> +$(eval LOCAL_SHARED_LIBRARIES += libLLVM) \
>> +$(eval LOCAL_C_INCLUDES += external/llvm/include 
>> external/llvm/device/include),)

The Android O lines are wrong and should be dropped. They were just
for my testing purposes.

> With these two lines being identical across the board, we can have
> them only once.
> At a later stage one can export the includes from the LLVM module.

That didn't work for some reason for Mauro.

I already have the correct patch in my tree. I'll polish it up and
send it out, then commit it.

Rob
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] configure: Check llvm-config --shared-mode

[Emil Velikov]

On 16 August 2017 at 07:40, Michel Dänzer  wrote:
> From: Michel Dänzer 
>
> https://bugs.llvm.org/show_bug.cgi?id=6823 still affects current LLVM.
> llvm-config --libs only reports the single shared library if LLVM was
> built with -DLLVM_LINK_LLVM_DYLIB=ON. llvm-config --shared-mode reports
> "shared" in that case, "static" otherwise (even if LLVM was built with
> -DLLVM_BUILD_LLVM_DYLIB=ON).
>
I think your summary nicely covers why I am so hesitant about changing
anything around LLVM detection :-(

Regardless, thanks for making things more robust!

> v2: Keep the LLVM < 4.0 test. (llvm-config --shared-mode is actually
> available since LLVM 3.8, but that would make the test too
> complicated :)
>
> Fixes: 3d8da1f678e1 ("configure: Trust LLVM >= 4.0 llvm-config --libs
>   for shared libraries")
> Tested-by: Dieter Nützel  # v1
> Signed-off-by: Michel Dänzer 

Patch works on my end and seems correct.
Reviewed-by: Emil Velikov 

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 00/18] Gallium blitter optimizations

[Marek Olšák]

On Fri, Aug 18, 2017 at 5:56 PM, Brian Paul  wrote:
> On 08/17/2017 12:31 PM, Marek Olšák wrote:
>>
>> Hi,
>>
>> Major u_blitter changes:
>>
>> - All draw calls except cubemap blits will now use the draw_rectangle
>>callback. (cubemap blits are not used if the driver supports texture
>>views)
>>
>> - The VS POSITION output always covers the whole 2D clip space,
>>(-1,-1) -> (1,1). The final vertex positions and Z are determined by
>>the viewport transformation.
>>
>> - If VertexID is supported, the VS POSITION output is derived from
>>VertexID, and the vertex input with POSITION data is not present.
>>
>> - If the VS GENERIC output is not needed, it's not present.
>>(previously it was always there)
>>
>> - If there are no VS inputs, the blitter doesn't change vertex buffer
>>and vertex element states, leading to lower CPU overhead.
>>(measurable with trivial apps like glxgears)
>>
>>
>> RadeonSI changes:
>>
>> - We only used the draw_rectangle callback for decompress and resolve
>>passes, and depth and color clears. Now we will always use it when
>>the blitter invokes it.
>>
>> The overall impact on RadeonSI is that only slow color clears and
>> texture blits use a vertex shader that has 1 vertex input. Moving that
>> input into user SGPRs would be possible, but that's not done here.
>>
>> Please review.
>
>
> If you can wait a bit, I'd like to apply your patches to my tree and do some
> testing to make sure our driver can handle these changes.

Sure. The changes are here:
https://cgit.freedesktop.org/~mareko/mesa/log/?h=blitter-optz

If somebody wants to test it on r600g, that would be appreciated too.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] configure: Check llvm-config --shared-mode

[Emil Velikov]

On 15 August 2017 at 15:04, Aaron Watry  wrote:

> glxinfo works fine afterwords, but I get the following error when I
> try to run opencl programs:
> CommandLine Error: Option 'help-list' registered more than once!
> LLVM ERROR: inconsistency in registered CommandLine options
>
> I can go back to one of my other build configurations, but it's
> looking like something in that is causing multiple
> registrations/initializations of some llvm components.
>
I think the patch merely exposes another existing bug.

But first things first - is the message fatal?

I think the problem was "introduced" with
7372e3cf5f2df9dd2ec0423a4425baad098bf326 in order to workaround a LLVM
bug.
While later mesa commit 18b12bf53351e1a902dc1f2e527a94ec8d8f3eff aimed
to silence the message.

Can someone check which LLVM version has the the original issue
resolved so we call LLVMParseCommandLineOptions() only as needed.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 03/18] gallium/radeon: add a workaround when viewport state is used to force Z

[Marek Olšák]

On Fri, Aug 18, 2017 at 3:55 PM, Nicolai Hähnle  wrote:
> On 17.08.2017 20:31, Marek Olšák wrote:
>>
>> From: Marek Olšák 
>>
>> This will be needed by u_blitter.
>> ---
>>   src/gallium/drivers/radeon/r600_viewport.c | 23 +--
>>   1 file changed, 21 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/gallium/drivers/radeon/r600_viewport.c
>> b/src/gallium/drivers/radeon/r600_viewport.c
>> index 2de1382..f7fc536 100644
>> --- a/src/gallium/drivers/radeon/r600_viewport.c
>> +++ b/src/gallium/drivers/radeon/r600_viewport.c
>> @@ -316,50 +316,69 @@ static void r600_emit_viewports(struct
>> r600_common_context *rctx)
>> u_bit_scan_consecutive_range(, , );
>> radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE
>> +
>>start * 4 * 6, count * 6);
>> for (i = start; i < start+count; i++)
>> r600_emit_one_viewport(rctx, [i]);
>> }
>> rctx->viewports.dirty_mask = 0;
>>   }
>>   +static void r600_get_zmin_zmax(const struct pipe_viewport_state *vp,
>> +  bool clip_halfz, float *zmin, float *zmax)
>> +{
>> +   /* For some reason, setting zmin == zmax breaks things.
>> +* Setting zmin = 0 && zmin = 1 works around it.
>> +* u_blitter sets scale = 0 && translate = Z to force a certain Z
>> +* value. The clamp would have no effect anyway, but it would be
>> nice
>> +* to know what the problem is with zmin == zmax.
>
>
> Weird rounding/floating point issues? Could the blitter just set scale = 1
> for the same effect? Seems like that would be less hacky...

Yes, scale = 1 works too and doesn't need the workaround.

Marek

>
> Cheers,
> Nicolai
>
>
>
>> +*/
>> +   if (vp->scale[2] == 0) {
>> +   assert(vp->translate[2] >= 0 && vp->translate[2] <= 1);
>> +   *zmin = 0;
>> +   *zmax = 1;
>> +   return;
>> +   }
>> +
>> +   util_viewport_zmin_zmax(vp, clip_halfz, zmin, zmax);
>> +}
>> +
>>   static void r600_emit_depth_ranges(struct r600_common_context *rctx)
>>   {
>> struct radeon_winsys_cs *cs = rctx->gfx.cs;
>> struct pipe_viewport_state *states = rctx->viewports.states;
>> unsigned mask = rctx->viewports.depth_range_dirty_mask;
>> float zmin, zmax;
>> /* The simple case: Only 1 viewport is active. */
>> if (!rctx->vs_writes_viewport_index) {
>> if (!(mask & 1))
>> return;
>>   - util_viewport_zmin_zmax([0], rctx->clip_halfz,
>> , );
>> +   r600_get_zmin_zmax([0], rctx->clip_halfz, ,
>> );
>> radeon_set_context_reg_seq(cs,
>> R_0282D0_PA_SC_VPORT_ZMIN_0, 2);
>> radeon_emit(cs, fui(zmin));
>> radeon_emit(cs, fui(zmax));
>> rctx->viewports.depth_range_dirty_mask &= ~1; /* clear one
>> bit */
>> return;
>> }
>> while (mask) {
>> int start, count, i;
>> u_bit_scan_consecutive_range(, , );
>> radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0
>> +
>>start * 4 * 2, count * 2);
>> for (i = start; i < start+count; i++) {
>> -   util_viewport_zmin_zmax([i],
>> rctx->clip_halfz, , );
>> +   r600_get_zmin_zmax([i], rctx->clip_halfz,
>> , );
>> radeon_emit(cs, fui(zmin));
>> radeon_emit(cs, fui(zmax));
>> }
>> }
>> rctx->viewports.depth_range_dirty_mask = 0;
>>   }
>> static void r600_emit_viewport_states(struct r600_common_context
>> *rctx,
>>   struct r600_atom *atom)
>>   {
>>
>
>
> --
> Lerne, wie die Welt wirklich ist,
> Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [android-x86-devel] [PATCH] android: fix gallium_dri.so can't be loaded by drm_gralloc

[Emil Velikov]

Hi Qiang Yu,

On 18 August 2017 at 01:30, Qiang Yu  wrote:
> The problem is in gallium/winsys/amdgpu/drm/Android.mk
> which will have duplacated symbols when linking
> gallium_dri.so for libLLVMCore and libLLVM.
>
Skimming through the commit message and the change inspires some confusion.

How about something like the following:
"Android:  rework LLVM linking to avoid multiple symbol definitions

Currently we static against libLLVMCore alongside the shared link
against libLLVM.
This leads to duplicate symbols and run/build (please correct me) time.

Fix that by consistently dropping the libLLVMCore + llvm-headers bits
and consistently using a shared libLLVM link.
"

> Signed-off-by: Qiang Yu 
> Signed-off-by: Mauro Rossi 
> Signed-off-by: Rob Herring 
I don't recall seeing patches from Mauro/RobH about this. I think you
meant - Reviewed-by/Acked-by/other?

Fixes: 26aee6f4d5a ("Android: rework LLVM build support")
Fixes: d31a2b4d492 ("Android: Add LLVM support for Android O")

> ---
>  Android.mk  | 7 ---
>  src/amd/Android.common.mk   | 4 +---
>  src/gallium/drivers/radeon/Android.mk   | 2 +-
>  src/gallium/drivers/radeonsi/Android.mk | 2 +-
>  4 files changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/Android.mk b/Android.mk
> index 6571161..5154a56 100644
> --- a/Android.mk
> +++ b/Android.mk
> @@ -93,15 +93,16 @@ define mesa-build-with-llvm
>  $(warning Unsupported LLVM version in Android 
> $(MESA_ANDROID_MAJOR_VERSION)),) \
>$(if $(filter 6,$(MESA_ANDROID_MAJOR_VERSION)), \
>  $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0) \
> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
> +$(eval LOCAL_SHARED_LIBRARIES += libLLVM) \
>  $(eval LOCAL_C_INCLUDES += external/llvm/include 
> external/llvm/device/include),) \
>$(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
>  $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
> -$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
> +$(eval LOCAL_SHARED_LIBRARIES += libLLVM) \
>  $(eval LOCAL_C_INCLUDES += external/llvm/include 
> external/llvm/device/include),) \
>$(if $(filter O,$(MESA_ANDROID_MAJOR_VERSION)), \
>  $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0) \
> -$(eval LOCAL_HEADER_LIBRARIES += llvm-headers),)
> +$(eval LOCAL_SHARED_LIBRARIES += libLLVM) \
> +$(eval LOCAL_C_INCLUDES += external/llvm/include 
> external/llvm/device/include),)

With these two lines being identical across the board, we can have
them only once.
At a later stage one can export the includes from the LLVM module.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 00/18] Gallium blitter optimizations

[Brian Paul]

On 08/17/2017 12:31 PM, Marek Olšák wrote:

Hi,

Major u_blitter changes:

- All draw calls except cubemap blits will now use the draw_rectangle
   callback. (cubemap blits are not used if the driver supports texture
   views)

- The VS POSITION output always covers the whole 2D clip space,
   (-1,-1) -> (1,1). The final vertex positions and Z are determined by
   the viewport transformation.

- If VertexID is supported, the VS POSITION output is derived from
   VertexID, and the vertex input with POSITION data is not present.

- If the VS GENERIC output is not needed, it's not present.
   (previously it was always there)

- If there are no VS inputs, the blitter doesn't change vertex buffer
   and vertex element states, leading to lower CPU overhead.
   (measurable with trivial apps like glxgears)


RadeonSI changes:

- We only used the draw_rectangle callback for decompress and resolve
   passes, and depth and color clears. Now we will always use it when
   the blitter invokes it.

The overall impact on RadeonSI is that only slow color clears and
texture blits use a vertex shader that has 1 vertex input. Moving that
input into user SGPRs would be possible, but that's not done here.

Please review.


If you can wait a bit, I'd like to apply your patches to my tree and do 
some testing to make sure our driver can handle these changes.


-Brian

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] util/disk_cache: rename mesa cache dir and introduce cache versioning

[Emil Velikov]

Hi Tim,

A couple of small suggestions which should be applicable, regardless
of the current discussion.

On 15 August 2017 at 00:26, Timothy Arceri  wrote:
> Steam is already analysing cache items, unfortunatly we did not
s/unfortunatly/unfortunately/


> -   check_directories_created(CACHE_TEST_TMP "/xdg-cache-home/mesa");
> +   check_directories_created(CACHE_TEST_TMP
> + "/xdg-cache-home/mesa_shader_cache");
>
Replace "mesa_shader_cache" instances with the define?

At some misc later stage:
 - introduce defines for xdg-cache-home and mesa-glsl-cache-dir


> +#define CACHE_DIR_NAME "mesa_shader_cache"
> +
> +/* The cache version should be bumped whenever a change is made to the
> + * structure of cache entries or the index. This will give any 3rd party
> + * applications reading the cache entries a chance to adjust to the changes.
> + */
I don't have strong opinion on each of the following, although I think
it's important to have them documented:
 - is the version checked in internally
 - is forward/backward compatibility expected

> +#define CACHE_VERSION 1
> +


> -   memcpy(cache->driver_keys_blob, timestamp, ts_size);
> -   memcpy(cache->driver_keys_blob + ts_size, gpu_name, gpu_name_size);
> -   memcpy(cache->driver_keys_blob + ts_size + gpu_name_size, _size,
> -  ptr_size_size);
> -   memcpy(cache->driver_keys_blob + ts_size + gpu_name_size + ptr_size_size,
> +   memcpy(cache->driver_keys_blob, _version, cv_size);
> +   memcpy(cache->driver_keys_blob + cv_size, timestamp, ts_size);
> +   memcpy(cache->driver_keys_blob + cv_size + ts_size, gpu_name,
> +  gpu_name_size);
> +   memcpy(cache->driver_keys_blob + cv_size + ts_size + gpu_name_size,
> +  _size, ptr_size_size);
> +   memcpy(cache->driver_keys_blob + cv_size + ts_size +
> +  gpu_name_size + ptr_size_size,
>_flags, driver_flags_size);
>
In case you're not a huge fan of the memcpy(ptr + a + b + ... + z,
...) bits something like the following should help.

// One could also kill off _src_size
#define FOO_CPY(_dst, _src, _src_size) { \
   memcpy(_dst, _src, _src_size); \
   _dst += _src_size; \
} while (0)


-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 00/18] Gallium blitter optimizations

[Nicolai Hähnle]

On 17.08.2017 20:31, Marek Olšák wrote:

Hi,

Major u_blitter changes:

- All draw calls except cubemap blits will now use the draw_rectangle
   callback. (cubemap blits are not used if the driver supports texture
   views)

- The VS POSITION output always covers the whole 2D clip space,
   (-1,-1) -> (1,1). The final vertex positions and Z are determined by
   the viewport transformation.

- If VertexID is supported, the VS POSITION output is derived from
   VertexID, and the vertex input with POSITION data is not present.

- If the VS GENERIC output is not needed, it's not present.
   (previously it was always there)

- If there are no VS inputs, the blitter doesn't change vertex buffer
   and vertex element states, leading to lower CPU overhead.
   (measurable with trivial apps like glxgears)


RadeonSI changes:

- We only used the draw_rectangle callback for decompress and resolve
   passes, and depth and color clears. Now we will always use it when
   the blitter invokes it.

The overall impact on RadeonSI is that only slow color clears and
texture blits use a vertex shader that has 1 vertex input. Moving that
input into user SGPRs would be possible, but that's not done here.


With the comment on patch #8 addressed, everything but patch #3 is

Reviewed-by: Nicolai Hähnle 

If setting the scale differently for patch #3 works as well, I think 
that should be preferred.


Cheers,
Nicolai



Please review.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev




--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] radeonsi/gfx9: add shader binary overallocation back

[Marek Olšák]

On Fri, Aug 18, 2017 at 1:17 PM, Nicolai Hähnle  wrote:
> So... do we really need this? I thought the summary of the internal
> discussion was that gfx9 prefetch was not supposed to cross page boundaries?

Yes, it looks like we don't need it.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] gallium/radeon: pass LLVM processor to the disk shader cache

[Marek Olšák]

On Fri, Aug 18, 2017 at 12:49 PM, Nicolai Hähnle  wrote:
> On 11.08.2017 20:37, Marek Olšák wrote:
>>
>> On Fri, Aug 11, 2017 at 6:00 PM, Nicolai Hähnle 
>> wrote:
>>>
>>> On 10.08.2017 21:57, Marek Olšák wrote:


 From: Marek Olšák 

 ---
src/gallium/drivers/radeon/r600_pipe_common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
 b/src/gallium/drivers/radeon/r600_pipe_common.c
 index 95458d2e..0038c9a 100644
 --- a/src/gallium/drivers/radeon/r600_pipe_common.c
 +++ b/src/gallium/drivers/radeon/r600_pipe_common.c
 @@ -878,21 +878,21 @@ static void r600_disk_cache_create(struct
 r600_common_screen *rscreen)
#endif
  if (res != -1) {
  /* These flags affect shader compilation. */
  uint64_t shader_debug_flags =
  rscreen->debug_flags &
  (DBG_FS_CORRECT_DERIVS_AFTER_KILL |
   DBG_SI_SCHED |
   DBG_UNSAFE_MATH);
  rscreen->disk_shader_cache =
 -
 disk_cache_create(r600_get_family_name(rscreen),
 +
 disk_cache_create(r600_get_llvm_processor_name(rscreen->family),
>>>
>>>
>>>
>>> What's the advantage of this?
>>
>>
>> It's added to the shader cache key. It allows shaders cached for
>> Vega10 to be used by Raven and vice versa. Same for Polaris11 and
>> Polaris12. It makes things nicer for some multi-GPU setups or when
>> swapping GPUs.
>
>
> I'm not a huge fan of this since the shader code does have access to the
> family, and there might be a need for family-specific workarounds. I'm
> actually not a huge fan of this overall, because the debug_flags thing seems
> flaky as well.
>
> There's currently some corruption in Unigine demos which seems related to
> the shader cache, which just goes to show how difficult it is to really get
> this stuff right. I'd rather be on the safe side.

I've dropped this patch.

What corruption in Unigine?

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] radeonsi/gfx9: use the VI codepath for clamping Z

[Marek Olšák]

On Fri, Aug 18, 2017 at 11:01 AM, Andres Gomez  wrote:
> Hi Marek,
>
> This patch landed tagged for 17.2 stable and has been collected for
> 17.2.0-rc4.
>
> However, it seems like it could be also interesting for 17.1.x (?)
>
> WDYT?

It was only nominated for 17.2. Let's keep it that way.

Thanks,
Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 03/18] gallium/radeon: add a workaround when viewport state is used to force Z

[Nicolai Hähnle]

On 17.08.2017 20:31, Marek Olšák wrote:

From: Marek Olšák 

This will be needed by u_blitter.
---
  src/gallium/drivers/radeon/r600_viewport.c | 23 +--
  1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_viewport.c 
b/src/gallium/drivers/radeon/r600_viewport.c
index 2de1382..f7fc536 100644
--- a/src/gallium/drivers/radeon/r600_viewport.c
+++ b/src/gallium/drivers/radeon/r600_viewport.c
@@ -316,50 +316,69 @@ static void r600_emit_viewports(struct 
r600_common_context *rctx)
u_bit_scan_consecutive_range(, , );
  
  		radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE +

   start * 4 * 6, count * 6);
for (i = start; i < start+count; i++)
r600_emit_one_viewport(rctx, [i]);
}
rctx->viewports.dirty_mask = 0;
  }
  
+static void r600_get_zmin_zmax(const struct pipe_viewport_state *vp,

+  bool clip_halfz, float *zmin, float *zmax)
+{
+   /* For some reason, setting zmin == zmax breaks things.
+* Setting zmin = 0 && zmin = 1 works around it.
+* u_blitter sets scale = 0 && translate = Z to force a certain Z
+* value. The clamp would have no effect anyway, but it would be nice
+* to know what the problem is with zmin == zmax.


Weird rounding/floating point issues? Could the blitter just set scale = 
1 for the same effect? Seems like that would be less hacky...


Cheers,
Nicolai



+*/
+   if (vp->scale[2] == 0) {
+   assert(vp->translate[2] >= 0 && vp->translate[2] <= 1);
+   *zmin = 0;
+   *zmax = 1;
+   return;
+   }
+
+   util_viewport_zmin_zmax(vp, clip_halfz, zmin, zmax);
+}
+
  static void r600_emit_depth_ranges(struct r600_common_context *rctx)
  {
struct radeon_winsys_cs *cs = rctx->gfx.cs;
struct pipe_viewport_state *states = rctx->viewports.states;
unsigned mask = rctx->viewports.depth_range_dirty_mask;
float zmin, zmax;
  
  	/* The simple case: Only 1 viewport is active. */

if (!rctx->vs_writes_viewport_index) {
if (!(mask & 1))
return;
  
-		util_viewport_zmin_zmax([0], rctx->clip_halfz, , );

+   r600_get_zmin_zmax([0], rctx->clip_halfz, , );
  
  		radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2);

radeon_emit(cs, fui(zmin));
radeon_emit(cs, fui(zmax));
rctx->viewports.depth_range_dirty_mask &= ~1; /* clear one bit 
*/
return;
}
  
  	while (mask) {

int start, count, i;
  
  		u_bit_scan_consecutive_range(, , );
  
  		radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 +

   start * 4 * 2, count * 2);
for (i = start; i < start+count; i++) {
-   util_viewport_zmin_zmax([i], rctx->clip_halfz, 
, );
+   r600_get_zmin_zmax([i], rctx->clip_halfz, , 
);
radeon_emit(cs, fui(zmin));
radeon_emit(cs, fui(zmax));
}
}
rctx->viewports.depth_range_dirty_mask = 0;
  }
  
  static void r600_emit_viewport_states(struct r600_common_context *rctx,

  struct r600_atom *atom)
  {




--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 02/45] glsl: Add 16-bit types

[Alejandro Piñeiro]

On 17/08/17 10:35, Eduardo Lima Mitev wrote:
> On 08/15/2017 10:56 PM, Jason Ekstrand wrote:
>> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro > > wrote:
>>
>> From: Eduardo Lima Mitev >
>>
>> Adds new INT16, UINT16 and HALF FLOAT base types.
>>
>> The corresponding GL types for half floats were reused from the
>> AMD_gpu_shader_half_float extension. The int16 and uint16 types come
>> from
>> NV_gpu_shader_5 extension.
>>
>> This adds the builtins and the lexer support.
>>
>> To avoid a bunch of warnings due to cases not handled in switch, the
>> new types have been added to quite a few places using same behavior as
>> their 32-bit counterparts, except for a few trivial cases where they are
>> already handled properly. Subsequent patches in this set will provide
>> correct 16-bit implementations when needed.
>>
>> Signed-off-by: Jose Maria Casanova Crespo > >
>> Signed-off-by: Eduardo Lima >
>> Signed-off-by: Alejandro Piñeiro > >
>> ---
>>  src/compiler/builtin_type_macros.h  | 26 +++
>>  src/compiler/glsl/ast_to_hir.cpp|  3 +
>>  src/compiler/glsl/builtin_types.cpp |  1 +
>>  src/compiler/glsl/ir_clone.cpp  |  3 +
>>  src/compiler/glsl/link_uniform_initializers.cpp |  3 +
>>  src/compiler/glsl/lower_buffer_access.cpp   | 16 -
>>  src/compiler/glsl_types.cpp | 93
>> -
>>  src/compiler/glsl_types.h   | 10 ++-
>>  src/mesa/program/ir_to_mesa.cpp |  6 ++
>>  9 files changed, 155 insertions(+), 6 deletions(-)
>>
>> diff --git a/src/compiler/builtin_type_macros.h
>> b/src/compiler/builtin_type_macros.h
>> index a275617..52bae13 100644
>> --- a/src/compiler/builtin_type_macros.h
>> +++ b/src/compiler/builtin_type_macros.h
>> @@ -62,6 +62,22 @@ DECL_TYPE(mat3x4, GL_FLOAT_MAT3x4,
>> GLSL_TYPE_FLOAT, 4, 3)
>>  DECL_TYPE(mat4x2, GL_FLOAT_MAT4x2, GLSL_TYPE_FLOAT, 2, 4)
>>  DECL_TYPE(mat4x3, GL_FLOAT_MAT4x3, GLSL_TYPE_FLOAT, 3, 4)
>>
>> +DECL_TYPE(float16_t, GL_HALF_FLOAT, GLSL_TYPE_HALF_FLOAT, 1, 1)
>> +DECL_TYPE(f16vec2,   GL_FLOAT16_VEC2_NV,   GLSL_TYPE_HALF_FLOAT, 2, 1)
>> +DECL_TYPE(f16vec3,   GL_FLOAT16_VEC3_NV,   GLSL_TYPE_HALF_FLOAT, 3, 1)
>> +DECL_TYPE(f16vec4,   GL_FLOAT16_VEC4_NV,   GLSL_TYPE_HALF_FLOAT, 4, 1)
>> +
>> +DECL_TYPE(f16mat2,   GL_FLOAT16_MAT2_AMD,   GLSL_TYPE_HALF_FLOAT, 2, 2)
>> +DECL_TYPE(f16mat3,   GL_FLOAT16_MAT3_AMD,   GLSL_TYPE_HALF_FLOAT, 3, 3)
>> +DECL_TYPE(f16mat4,   GL_FLOAT16_MAT4_AMD,   GLSL_TYPE_HALF_FLOAT, 4, 4)
>> +
>> +DECL_TYPE(f16mat2x3, GL_FLOAT16_MAT2x3_AMD, GLSL_TYPE_HALF_FLOAT, 3, 2)
>> +DECL_TYPE(f16mat2x4, GL_FLOAT16_MAT2x4_AMD, GLSL_TYPE_HALF_FLOAT, 4, 2)
>> +DECL_TYPE(f16mat3x2, GL_FLOAT16_MAT3x2_AMD, GLSL_TYPE_HALF_FLOAT, 2, 3)
>> +DECL_TYPE(f16mat3x4, GL_FLOAT16_MAT3x4_AMD, GLSL_TYPE_HALF_FLOAT, 4, 3)
>> +DECL_TYPE(f16mat4x2, GL_FLOAT16_MAT4x2_AMD, GLSL_TYPE_HALF_FLOAT, 2, 4)
>> +DECL_TYPE(f16mat4x3, GL_FLOAT16_MAT4x3_AMD, GLSL_TYPE_HALF_FLOAT, 3, 4)
>> +
>>  DECL_TYPE(double,  GL_DOUBLE,GLSL_TYPE_DOUBLE, 1, 1)
>>  DECL_TYPE(dvec2,   GL_DOUBLE_VEC2,   GLSL_TYPE_DOUBLE, 2, 1)
>>  DECL_TYPE(dvec3,   GL_DOUBLE_VEC3,   GLSL_TYPE_DOUBLE, 3, 1)
>> @@ -88,6 +104,16 @@ DECL_TYPE(u64vec2,  GL_UNSIGNED_INT64_VEC2_ARB,
>> GLSL_TYPE_UINT64, 2, 1)
>>  DECL_TYPE(u64vec3,  GL_UNSIGNED_INT64_VEC3_ARB, GLSL_TYPE_UINT64, 3, 1)
>>  DECL_TYPE(u64vec4,  GL_UNSIGNED_INT64_VEC4_ARB, GLSL_TYPE_UINT64, 4, 1)
>>
>> +DECL_TYPE(int16_t,  GL_INT16_NV,  GLSL_TYPE_INT16, 1, 1)
>> +DECL_TYPE(i16vec2,  GL_INT16_VEC2_NV, GLSL_TYPE_INT16, 2, 1)
>> +DECL_TYPE(i16vec3,  GL_INT16_VEC3_NV, GLSL_TYPE_INT16, 3, 1)
>> +DECL_TYPE(i16vec4,  GL_INT16_VEC4_NV, GLSL_TYPE_INT16, 4, 1)
>> +
>> +DECL_TYPE(uint16_t, GL_UNSIGNED_INT16_NV,  GLSL_TYPE_UINT16, 1, 1)
>> +DECL_TYPE(u16vec2,  GL_UNSIGNED_INT16_VEC2_NV, GLSL_TYPE_UINT16, 2, 1)
>> +DECL_TYPE(u16vec3,  GL_UNSIGNED_INT16_VEC3_NV, GLSL_TYPE_UINT16, 3, 1)
>> +DECL_TYPE(u16vec4,  GL_UNSIGNED_INT16_VEC4_NV, GLSL_TYPE_UINT16, 4, 1)
>> +
>>  DECL_TYPE(sampler,   GL_SAMPLER_1D, 
>>  GLSL_TYPE_SAMPLER, GLSL_SAMPLER_DIM_1D,   0, 0, GLSL_TYPE_VOID)
>>  DECL_TYPE(sampler1D, GL_SAMPLER_1D, 
>>  GLSL_TYPE_SAMPLER, GLSL_SAMPLER_DIM_1D,   0, 0, GLSL_TYPE_FLOAT)
>>  DECL_TYPE(sampler2D, GL_SAMPLER_2D, 
>>  GLSL_TYPE_SAMPLER, GLSL_SAMPLER_DIM_2D,   0, 0, GLSL_TYPE_FLOAT)
>> diff --git 

Re: [Mesa-dev] [PATCH 08/18] gallium/u_blitter: add new union blitter_attrib to replace pipe_color_union

[Nicolai Hähnle]

On 17.08.2017 20:31, Marek Olšák wrote:

From: Marek Olšák 

---
  src/gallium/auxiliary/util/u_blitter.c| 93 +--
  src/gallium/auxiliary/util/u_blitter.h| 12 +++-
  src/gallium/drivers/r300/r300_context.h   |  2 +-
  src/gallium/drivers/r300/r300_render.c| 14 ++--
  src/gallium/drivers/radeon/r600_pipe_common.c | 20 +++---
  src/gallium/drivers/radeon/r600_pipe_common.h |  2 +-
  6 files changed, 72 insertions(+), 71 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_blitter.c 
b/src/gallium/auxiliary/util/u_blitter.c
index 6b666b2..37a92d2 100644
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -725,105 +725,96 @@ static void blitter_set_rectangle(struct 
blitter_context_priv *ctx,
 viewport.scale[0] = width / 2.0;
 viewport.scale[1] = height / 2.0;
 viewport.scale[2] = 0;
 viewport.translate[0] = width / 2.0 + x1;
 viewport.translate[1] = height / 2.0 + y1;
 viewport.translate[2] = depth;
 ctx->base.pipe->set_viewport_states(ctx->base.pipe, 0, 1, );
  }
  
  static void blitter_set_clear_color(struct blitter_context_priv *ctx,

-const union pipe_color_union *color)
+const uint32_t color[4])


This should be float instead of uint32_t, so one caller below can use 
attrib->color directly, without an additional cast.


Cheers,
Nicolai



  {
 int i;
  
 if (color) {

-  for (i = 0; i < 4; i++) {
- uint32_t *uiverts = (uint32_t *)ctx->vertices[i][1];
- uiverts[0] = color->ui[0];
- uiverts[1] = color->ui[1];
- uiverts[2] = color->ui[2];
- uiverts[3] = color->ui[3];
-  }
+  for (i = 0; i < 4; i++)
+ memcpy(>vertices[i][1][0], color, sizeof(uint32_t) * 4);
 } else {
-  for (i = 0; i < 4; i++) {
- ctx->vertices[i][1][0] = 0;
- ctx->vertices[i][1][1] = 0;
- ctx->vertices[i][1][2] = 0;
- ctx->vertices[i][1][3] = 0;
-  }
+  for (i = 0; i < 4; i++)
+ memset(>vertices[i][1][0], 0, sizeof(uint32_t) * 4);
 }
  }
  
  static void get_texcoords(struct pipe_sampler_view *src,

unsigned src_width0, unsigned src_height0,
int x1, int y1, int x2, int y2, bool uses_txf,
-  float out[4])
+  union blitter_attrib *out)
  {
 unsigned level = src->u.tex.first_level;
 boolean normalized = !uses_txf &&
  src->target != PIPE_TEXTURE_RECT &&
  src->texture->nr_samples <= 1;
  
 if (normalized) {

-  out[0] = x1 / (float)u_minify(src_width0,  level);
-  out[1] = y1 / (float)u_minify(src_height0, level);
-  out[2] = x2 / (float)u_minify(src_width0,  level);
-  out[3] = y2 / (float)u_minify(src_height0, level);
+  out->texcoord.x1 = x1 / (float)u_minify(src_width0,  level);
+  out->texcoord.y1 = y1 / (float)u_minify(src_height0, level);
+  out->texcoord.x2 = x2 / (float)u_minify(src_width0,  level);
+  out->texcoord.y2 = y2 / (float)u_minify(src_height0, level);
 } else {
-  out[0] = (float) x1;
-  out[1] = (float) y1;
-  out[2] = (float) x2;
-  out[3] = (float) y2;
+  out->texcoord.x1 = x1;
+  out->texcoord.y1 = y1;
+  out->texcoord.x2 = x2;
+  out->texcoord.y2 = y2;
 }
  }
  
-static void set_texcoords_in_vertices(const float coord[4],

+static void set_texcoords_in_vertices(const union blitter_attrib *attrib,
float *out, unsigned stride)
  {
-   out[0] = coord[0]; /*t0.s*/
-   out[1] = coord[1]; /*t0.t*/
+   out[0] = attrib->texcoord.x1;
+   out[1] = attrib->texcoord.y1;
 out += stride;
-   out[0] = coord[2]; /*t1.s*/
-   out[1] = coord[1]; /*t1.t*/
+   out[0] = attrib->texcoord.x2;
+   out[1] = attrib->texcoord.y1;
 out += stride;
-   out[0] = coord[2]; /*t2.s*/
-   out[1] = coord[3]; /*t2.t*/
+   out[0] = attrib->texcoord.x2;
+   out[1] = attrib->texcoord.y2;
 out += stride;
-   out[0] = coord[0]; /*t3.s*/
-   out[1] = coord[3]; /*t3.t*/
+   out[0] = attrib->texcoord.x1;
+   out[1] = attrib->texcoord.y2;
  }
  
  static void blitter_set_texcoords(struct blitter_context_priv *ctx,

struct pipe_sampler_view *src,
unsigned src_width0, unsigned src_height0,
float layer, unsigned sample,
int x1, int y1, int x2, int y2,
bool uses_txf)
  {
 unsigned i;
-   float coord[4];
+   union blitter_attrib coord;
 float face_coord[4][2];
  
 get_texcoords(src, src_width0, src_height0, x1, y1, x2, y2, uses_txf,

- coord);
+ );
  
 if (src->target == PIPE_TEXTURE_CUBE ||

 src->target == 

Re: [Mesa-dev] [PATCH] gles2: Support for GL_EXT_occlusion_query_boolean

[Ilia Mirkin]

Why the static data changes? Also, I haven't double checked the code, but
I'm almost certain this is incomplete. You have to add code disallowing the
other enums from being used on es2.

On Aug 18, 2017 6:42 AM, "Harish Krupo"  wrote:

> It passes dEQP-GLES2.capability.extensions.other.GL_EXT_
> occlusion_query_boolean
> test. I think the test is just a check for the existence of the extension.
> On
> gles3 and above, occlusion queries are part of the spec.
>
> Signed-off-by: Harish Krupo 
> ---
>
> There is a piglit test for this extension in the piglit mailing list.
>
>  src/mapi/glapi/gen/es_EXT.xml | 60 ++
> +
>  src/mapi/glapi/gen/static_data.py |  7 +
>  src/mesa/main/extensions_table.h  |  1 +
>  3 files changed, 68 insertions(+)
>
> diff --git a/src/mapi/glapi/gen/es_EXT.xml b/src/mapi/glapi/gen/es_EXT.xml
> index 3a2bdb2fdc..1730a92e93 100644
> --- a/src/mapi/glapi/gen/es_EXT.xml
> +++ b/src/mapi/glapi/gen/es_EXT.xml
> @@ -751,6 +751,66 @@
>  
>  
>
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +  value="0x8C2F"/>
> + value="0x8D6A"/>
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
>  
>  
>  
> diff --git a/src/mapi/glapi/gen/static_data.py
> b/src/mapi/glapi/gen/static_data.py
> index 7a8933b8d7..f5709604cc 100644
> --- a/src/mapi/glapi/gen/static_data.py
> +++ b/src/mapi/glapi/gen/static_data.py
> @@ -452,6 +452,7 @@ functions = [
>  "BeginConditionalRenderNV",
>  "BeginQuery",
>  "BeginQueryARB",
> +"BeginQueryEXT",
>  "BeginQueryIndexed",
>  "BeginTransformFeedback",
>  "BindAttribLocation",
> @@ -640,6 +641,7 @@ functions = [
>  "DeleteProgramsARB",
>  "DeleteQueries",
>  "DeleteQueriesARB",
> +"DeleteQueriesEXT",
>  "DeleteRenderbuffers",
>  "DeleteRenderbuffersEXT",
>  "DeleteSamplers",
> @@ -710,6 +712,7 @@ functions = [
>  "EndList",
>  "EndQuery",
>  "EndQueryARB",
> +"EndQueryEXT",
>  "EndQueryIndexed",
>  "EndTransformFeedback",
>  "EvalCoord1d",
> @@ -774,6 +777,7 @@ functions = [
>  "GenProgramsARB",
>  "GenQueries",
>  "GenQueriesARB",
> +"GenQueriesEXT",
>  "GenRenderbuffers",
>  "GenRenderbuffersEXT",
>  "GenSamplers",
> @@ -904,10 +908,12 @@ functions = [
>  "GetQueryIndexediv",
>  "GetQueryiv",
>  "GetQueryivARB",
> +"GetQueryivEXT",
>  "GetQueryObjectiv",
>  "GetQueryObjectivARB",
>  "GetQueryObjectuiv",
>  "GetQueryObjectuivARB",
> +"GetQueryObjectuivEXT",
>  "GetRenderbufferParameteriv",
>  "GetRenderbufferParameterivEXT",
>  "GetSamplerParameterfv",
> @@ -998,6 +1004,7 @@ functions = [
>  "IsProgramPipeline",
>  "IsQuery",
>  "IsQueryARB",
> +"IsQueryEXT",
>  "IsRenderbuffer",
>  "IsRenderbufferEXT",
>  "IsSampler",
> diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_
> table.h
> index 347a6197ed..2e660ebae8 100644
> --- a/src/mesa/main/extensions_table.h
> +++ b/src/mesa/main/extensions_table.h
> @@ -229,6 +229,7 @@ EXT(EXT_map_buffer_range,
> ARB_map_buffer_range
>  EXT(EXT_memory_object   , EXT_memory_object
> , GLL, GLC,  x , ES2, 2017)
>  EXT(EXT_memory_object_fd, EXT_memory_object_fd
>, GLL, GLC,  x , ES2, 2017)
>  EXT(EXT_multi_draw_arrays   , dummy_true
>, GLL,  x , ES1, ES2, 1999)
> +EXT(EXT_occlusion_query_boolean , ARB_occlusion_query2
>  ,  x ,  x ,  x , ES2, 2001)
>  EXT(EXT_packed_depth_stencil, dummy_true
>, GLL, GLC,  x ,  x , 2005)
>  EXT(EXT_packed_float, EXT_packed_float
>, GLL, GLC,  x ,  x , 2004)
>  EXT(EXT_packed_pixels   , dummy_true
>, GLL,  x ,  x ,  x , 1997)
> --
> 2.12.2
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] util/disk_cache: rename mesa cache dir and introduce cache versioning

[Timothy Arceri]

On 18/08/17 23:05, Nicolai Hähnle wrote:

On 18.08.2017 13:45, Timothy Arceri wrote:



On 18/08/17 21:02, Nicolai Hähnle wrote:

On 15.08.2017 01:26, Timothy Arceri wrote:

Steam is already analysing cache items, unfortunatly we did not
introduce a versioning mechanism for identifying structural changes
to cache entries earlier so the only way to do so is to rename the
cache directory.

Since we are renaming it we take the opportunity to give the directory
a more meaningful name.

Adding a version field to the header of cache entries will help us to
avoid having to rename the directory in future. Please note this is
versioning for the internal structure of the entries as defined in
disk_cache.{c,h} as opposed to the structure of the data provided to
the disk cache by the GLSL compiler and the various driver backends.


If the version is intended to reflect the disk cache-internal 
structure of files, shouldn't you check the version when loading a file?


Not really we have been relying on cache collisions being improbable 
up to this point. We can check but it doesn't add a great deal of 
value, the version is also unlikely to change very often.


Okay, so the version is basically intended as a version of the header. 
That's fine.


Still, consider what happens in a theoretical update where the header 
format is changed. Then loading files of the old version will likely 
fail mysteriously either during inflating the payload or during the CRC 
check, because Mesa will calculate the header size incorrectly. That's 
not ideal.


But that can only happen if there is a collision, I did mention in the 
commit messages that this extra info can indeed be used to help 
safeguard against collisions if we want to go down that road. Crashing 
loading the header is probably better than the alternative which could 
include system lockups if and invalid program is passed to the gpu. The 
cache entries should be safe enough because the build time is part of 
the sha.


Anyway it can easily be added as an improvement, I don't think it should 
block this series.




BTW, it may be useful to put the total header size in the file as well, 
so we can just skip it quickly at load, since Mesa doesn't use it. (And 
probably won't use it -- checking those GLSL source hashes shouldn't be 
necessary.)


If we are going to bother with collision avoidance i.e checking the 
header version as you are suggesting above, then it would actually be 
much more useful to check those shas as well.






Also, what about the index file? Shouldn't it get the version as well?


The index can be rebuilt from the from the cache entries once this 
series lands. I don't think we need to bother with it.


I suppose a corrupt index doesn't really hurt (other than perhaps 
forcing a delayed shader compile), so I guess it's fine.


Cheers,
Nicolai






Cheers,
Nicolai



---
  src/compiler/glsl/tests/cache_test.c |  6 --
  src/util/disk_cache.c| 37 
+---

  2 files changed, 30 insertions(+), 13 deletions(-)

diff --git a/src/compiler/glsl/tests/cache_test.c 
b/src/compiler/glsl/tests/cache_test.c

index af1b66fb3d..aa779e3985 100644
--- a/src/compiler/glsl/tests/cache_test.c
+++ b/src/compiler/glsl/tests/cache_test.c
@@ -178,38 +178,40 @@ test_disk_cache_create(void)
 /* Test with XDG_CACHE_HOME set */
 setenv("XDG_CACHE_HOME", CACHE_TEST_TMP "/xdg-cache-home", 1);
 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with XDG_CACHE_HOME set 
with"

 "a non-existing parent directory");
 mkdir(CACHE_TEST_TMP, 0755);
 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with XDG_CACHE_HOME 
set");

-   check_directories_created(CACHE_TEST_TMP "/xdg-cache-home/mesa");
+   check_directories_created(CACHE_TEST_TMP
+ "/xdg-cache-home/mesa_shader_cache");
 disk_cache_destroy(cache);
 /* Test with MESA_GLSL_CACHE_DIR set */
 err = rmrf_local(CACHE_TEST_TMP);
 expect_equal(err, 0, "Removing " CACHE_TEST_TMP);
 setenv("MESA_GLSL_CACHE_DIR", CACHE_TEST_TMP 
"/mesa-glsl-cache-dir", 1);

 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR 
set with"

 "a non-existing parent directory");
 mkdir(CACHE_TEST_TMP, 0755);
 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with 
MESA_GLSL_CACHE_DIR set");
-   check_directories_created(CACHE_TEST_TMP 
"/mesa-glsl-cache-dir/mesa");

+   check_directories_created(CACHE_TEST_TMP
+ 
"/mesa-glsl-cache-dir/mesa_shader_cache");

 disk_cache_destroy(cache);
  }
  static bool
  does_cache_contain(struct disk_cache *cache, const cache_key key)
  {
 void *result;
 result = disk_cache_get(cache, key, NULL);
diff --git 

Re: [Mesa-dev] [PATCH 13/16] st/dri: implement v2 of DRI_ConfigOptions

[Nicolai Hähnle]

On 18.08.2017 14:48, Jon Turney wrote:

On 30/06/2017 13:45, Nicolai Hähnle wrote:

From: Nicolai Hähnle 

---
  src/gallium/auxiliary/pipe-loader/pipe_loader.c| 13 
  src/gallium/auxiliary/pipe-loader/pipe_loader.h| 16 +++
  .../auxiliary/pipe-loader/pipe_loader_drm.c| 23 
++

  src/gallium/state_trackers/dri/dri_screen.c|  5 +++--
  4 files changed, 55 insertions(+), 2 deletions(-) 


This change uses pipe_loader_get_driinfo_xml() unconditionally in 
pipe_loader.c, but it's definition in pipe_loader_get_driinfo_xml() is 
only built if HAVE_LIBDRM is defined.


I guess something like the attached is needed?


Thanks! Patch is R-b and pushed.

Cheers,
Nicolai
--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] util/disk_cache: rename mesa cache dir and introduce cache versioning

[Nicolai Hähnle]

On 18.08.2017 13:45, Timothy Arceri wrote:



On 18/08/17 21:02, Nicolai Hähnle wrote:

On 15.08.2017 01:26, Timothy Arceri wrote:

Steam is already analysing cache items, unfortunatly we did not
introduce a versioning mechanism for identifying structural changes
to cache entries earlier so the only way to do so is to rename the
cache directory.

Since we are renaming it we take the opportunity to give the directory
a more meaningful name.

Adding a version field to the header of cache entries will help us to
avoid having to rename the directory in future. Please note this is
versioning for the internal structure of the entries as defined in
disk_cache.{c,h} as opposed to the structure of the data provided to
the disk cache by the GLSL compiler and the various driver backends.


If the version is intended to reflect the disk cache-internal 
structure of files, shouldn't you check the version when loading a file?


Not really we have been relying on cache collisions being improbable up 
to this point. We can check but it doesn't add a great deal of value, 
the version is also unlikely to change very often.


Okay, so the version is basically intended as a version of the header. 
That's fine.


Still, consider what happens in a theoretical update where the header 
format is changed. Then loading files of the old version will likely 
fail mysteriously either during inflating the payload or during the CRC 
check, because Mesa will calculate the header size incorrectly. That's 
not ideal.


BTW, it may be useful to put the total header size in the file as well, 
so we can just skip it quickly at load, since Mesa doesn't use it. (And 
probably won't use it -- checking those GLSL source hashes shouldn't be 
necessary.)




Also, what about the index file? Shouldn't it get the version as well?


The index can be rebuilt from the from the cache entries once this 
series lands. I don't think we need to bother with it.


I suppose a corrupt index doesn't really hurt (other than perhaps 
forcing a delayed shader compile), so I guess it's fine.


Cheers,
Nicolai






Cheers,
Nicolai



---
  src/compiler/glsl/tests/cache_test.c |  6 --
  src/util/disk_cache.c| 37 
+---

  2 files changed, 30 insertions(+), 13 deletions(-)

diff --git a/src/compiler/glsl/tests/cache_test.c 
b/src/compiler/glsl/tests/cache_test.c

index af1b66fb3d..aa779e3985 100644
--- a/src/compiler/glsl/tests/cache_test.c
+++ b/src/compiler/glsl/tests/cache_test.c
@@ -178,38 +178,40 @@ test_disk_cache_create(void)
 /* Test with XDG_CACHE_HOME set */
 setenv("XDG_CACHE_HOME", CACHE_TEST_TMP "/xdg-cache-home", 1);
 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with XDG_CACHE_HOME set with"
 "a non-existing parent directory");
 mkdir(CACHE_TEST_TMP, 0755);
 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with XDG_CACHE_HOME 
set");

-   check_directories_created(CACHE_TEST_TMP "/xdg-cache-home/mesa");
+   check_directories_created(CACHE_TEST_TMP
+ "/xdg-cache-home/mesa_shader_cache");
 disk_cache_destroy(cache);
 /* Test with MESA_GLSL_CACHE_DIR set */
 err = rmrf_local(CACHE_TEST_TMP);
 expect_equal(err, 0, "Removing " CACHE_TEST_TMP);
 setenv("MESA_GLSL_CACHE_DIR", CACHE_TEST_TMP 
"/mesa-glsl-cache-dir", 1);

 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR 
set with"

 "a non-existing parent directory");
 mkdir(CACHE_TEST_TMP, 0755);
 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with 
MESA_GLSL_CACHE_DIR set");
-   check_directories_created(CACHE_TEST_TMP 
"/mesa-glsl-cache-dir/mesa");

+   check_directories_created(CACHE_TEST_TMP
+ "/mesa-glsl-cache-dir/mesa_shader_cache");
 disk_cache_destroy(cache);
  }
  static bool
  does_cache_contain(struct disk_cache *cache, const cache_key key)
  {
 void *result;
 result = disk_cache_get(cache, key, NULL);
diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index b2229874e0..283856b15c 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -51,20 +51,28 @@
  /* Number of bits to mask off from a cache key to get an index. */
  #define CACHE_INDEX_KEY_BITS 16
  /* Mask for computing an index from a key. */
  #define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
  /* The number of keys that can be stored in the index. */
  #define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS)
+#define CACHE_DIR_NAME "mesa_shader_cache"
+
+/* The cache version should be bumped whenever a change is made to the
+ * structure of cache entries or the index. This will give any 3rd 
party
+ * applications reading the cache entries a chance to adjust to the 
changes.

+ */
+#define 

Re: [Mesa-dev] [PATCH 13/16] st/dri: implement v2 of DRI_ConfigOptions

[Jon Turney]

On 30/06/2017 13:45, Nicolai Hähnle wrote:

From: Nicolai Hähnle 

---
  src/gallium/auxiliary/pipe-loader/pipe_loader.c| 13 
  src/gallium/auxiliary/pipe-loader/pipe_loader.h| 16 +++
  .../auxiliary/pipe-loader/pipe_loader_drm.c| 23 ++
  src/gallium/state_trackers/dri/dri_screen.c|  5 +++--
  4 files changed, 55 insertions(+), 2 deletions(-) 


This change uses pipe_loader_get_driinfo_xml() unconditionally in 
pipe_loader.c, but it's definition in pipe_loader_get_driinfo_xml() is 
only built if HAVE_LIBDRM is defined.


I guess something like the attached is needed?

From b9286109b7037af043ba5d6ebb37f620f530e578 Mon Sep 17 00:00:00 2001
From: Jon Turney 
Date: Thu, 17 Aug 2017 22:10:52 +0100
Subject: [PATCH] Fix build when HAVE_LIBDRM isn't defined

make[4]: Entering directory '/wip/mesa/build/src/gallium/targets/dri'
  CXXLDgallium_dri.la
../../../../src/gallium/auxiliary/pipe-loader/.libs/libpipe_loader_static.a(libpipe_loader_static_la-pipe_loader.o):
 In function `pipe_loader_get_driinfo_xml':
/mesa/build/src/gallium/auxiliary/pipe-loader/../../../../../src/gallium/auxiliary/pipe-loader/pipe_loader.c:117:
 undefined reference to `pipe_loader_drm_get_driinfo_xml'

b4ff5e90 uses pipe_loader_get_driinfo_xml() unconditionally in
pipe_loader.c, but it's definition in pipe_loader_get_driinfo_xml() is only
built if HAVE_LIBDRM.

Arrange to always use the default XML if HAVE_LIBDRM isn't defined.

Signed-off-by: Jon Turney 
---
 src/gallium/auxiliary/pipe-loader/pipe_loader.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/auxiliary/pipe-loader/pipe_loader.c 
b/src/gallium/auxiliary/pipe-loader/pipe_loader.c
index 926db49fd24..e7cf9f86d99 100644
--- a/src/gallium/auxiliary/pipe-loader/pipe_loader.c
+++ b/src/gallium/auxiliary/pipe-loader/pipe_loader.c
@@ -114,7 +114,11 @@ pipe_loader_load_options(struct pipe_loader_device *dev)
 char *
 pipe_loader_get_driinfo_xml(const char *driver_name)
 {
+#ifdef HAVE_LIBDRM
char *xml = pipe_loader_drm_get_driinfo_xml(driver_name);
+#else
+   char *xml = NULL;
+#endif
 
if (!xml)
   xml = strdup(gallium_driinfo_xml);
-- 
2.14.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/4] util/disk_cache: add struct cache_item_metadata

[Timothy Arceri]

On 18/08/17 21:02, Nicolai Hähnle wrote:

On 15.08.2017 01:26, Timothy Arceri wrote:

This will be used to store more information about the cache item
in it's header. This information is intended for 3rd party and
cache analysis use but can also be used for detecting the unlikely
scenario of cache collisions.
---
  src/util/disk_cache.h | 22 ++
  1 file changed, 22 insertions(+)

diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index 9aade16a9e..d6d7609ffb 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -34,20 +34,42 @@
  #ifdef __cplusplus
  extern "C" {
  #endif
  /* Size of cache keys in bytes. */
  #define CACHE_KEY_SIZE 20
  typedef uint8_t cache_key[CACHE_KEY_SIZE];
+/* WARNING: 3rd party applications might be reading the cache item 
metadata.

+ * Do not change these values without making the change widely known.
+ * Please contact Valve developers and make them aware of this change.
+ */
+#define CACHE_ITEM_TYPE_UNKNOWN  0x0
+#define CACHE_ITEM_TYPE_GLSL 0x1
+
+typedef uint32_t cache_item_metadata_type;


Please don't do typedefs like that, they just obfuscate. If you don't 
want to just use uint32_t, I'd suggest to use an enum.


I'll just use uint32_t



At a higher level, what is this actually good for? So I get Valve wants 
to parse something in the shader cache, but why / what for?


Cheers,
Nicolai



+
+struct cache_item_metadata {
+   /**
+* The cache item type. This could be used to identify a GLSL 
cache item,
+* a certain type of IR (tgsi, nir, etc), or signal that it is the 
final

+* binary form of the shader.
+*/
+   cache_item_metadata_type type;
+
+   /** GLSL cache item metadata */
+   cache_key *keys;   /* sha1 list of shaders that make up the cache 
item */

+   uint32_t num_keys;
+};
+
  struct disk_cache;
  static inline bool
  disk_cache_get_function_timestamp(void *ptr, uint32_t* timestamp)
  {
  #ifdef ENABLE_SHADER_CACHE
 Dl_info info;
 struct stat st;
 if (!dladdr(ptr, ) || !info.dli_fname) {
return false;





___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] util/disk_cache: rename mesa cache dir and introduce cache versioning

[Timothy Arceri]

On 18/08/17 21:02, Nicolai Hähnle wrote:

On 15.08.2017 01:26, Timothy Arceri wrote:

Steam is already analysing cache items, unfortunatly we did not
introduce a versioning mechanism for identifying structural changes
to cache entries earlier so the only way to do so is to rename the
cache directory.

Since we are renaming it we take the opportunity to give the directory
a more meaningful name.

Adding a version field to the header of cache entries will help us to
avoid having to rename the directory in future. Please note this is
versioning for the internal structure of the entries as defined in
disk_cache.{c,h} as opposed to the structure of the data provided to
the disk cache by the GLSL compiler and the various driver backends.


If the version is intended to reflect the disk cache-internal structure 
of files, shouldn't you check the version when loading a file?


Not really we have been relying on cache collisions being improbable up 
to this point. We can check but it doesn't add a great deal of value, 
the version is also unlikely to change very often.




Also, what about the index file? Shouldn't it get the version as well?


The index can be rebuilt from the from the cache entries once this 
series lands. I don't think we need to bother with it.




Cheers,
Nicolai



---
  src/compiler/glsl/tests/cache_test.c |  6 --
  src/util/disk_cache.c| 37 
+---

  2 files changed, 30 insertions(+), 13 deletions(-)

diff --git a/src/compiler/glsl/tests/cache_test.c 
b/src/compiler/glsl/tests/cache_test.c

index af1b66fb3d..aa779e3985 100644
--- a/src/compiler/glsl/tests/cache_test.c
+++ b/src/compiler/glsl/tests/cache_test.c
@@ -178,38 +178,40 @@ test_disk_cache_create(void)
 /* Test with XDG_CACHE_HOME set */
 setenv("XDG_CACHE_HOME", CACHE_TEST_TMP "/xdg-cache-home", 1);
 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with XDG_CACHE_HOME set with"
 "a non-existing parent directory");
 mkdir(CACHE_TEST_TMP, 0755);
 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with XDG_CACHE_HOME set");
-   check_directories_created(CACHE_TEST_TMP "/xdg-cache-home/mesa");
+   check_directories_created(CACHE_TEST_TMP
+ "/xdg-cache-home/mesa_shader_cache");
 disk_cache_destroy(cache);
 /* Test with MESA_GLSL_CACHE_DIR set */
 err = rmrf_local(CACHE_TEST_TMP);
 expect_equal(err, 0, "Removing " CACHE_TEST_TMP);
 setenv("MESA_GLSL_CACHE_DIR", CACHE_TEST_TMP 
"/mesa-glsl-cache-dir", 1);

 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR 
set with"

 "a non-existing parent directory");
 mkdir(CACHE_TEST_TMP, 0755);
 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with 
MESA_GLSL_CACHE_DIR set");
-   check_directories_created(CACHE_TEST_TMP 
"/mesa-glsl-cache-dir/mesa");

+   check_directories_created(CACHE_TEST_TMP
+ "/mesa-glsl-cache-dir/mesa_shader_cache");
 disk_cache_destroy(cache);
  }
  static bool
  does_cache_contain(struct disk_cache *cache, const cache_key key)
  {
 void *result;
 result = disk_cache_get(cache, key, NULL);
diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index b2229874e0..283856b15c 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -51,20 +51,28 @@
  /* Number of bits to mask off from a cache key to get an index. */
  #define CACHE_INDEX_KEY_BITS 16
  /* Mask for computing an index from a key. */
  #define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
  /* The number of keys that can be stored in the index. */
  #define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS)
+#define CACHE_DIR_NAME "mesa_shader_cache"
+
+/* The cache version should be bumped whenever a change is made to the
+ * structure of cache entries or the index. This will give any 3rd party
+ * applications reading the cache entries a chance to adjust to the 
changes.

+ */
+#define CACHE_VERSION 1
+
  struct disk_cache {
 /* The path to the cache directory. */
 char *path;
 /* Thread queue for compressing and writing cache entries to disk */
 struct util_queue cache_queue;
 /* Seed for rand, which is used to pick a random directory */
 uint64_t seed_xorshift128plus[2];
@@ -181,41 +189,41 @@ disk_cache_create(const char *gpu_name, const 
char *timestamp,

 if (local == NULL)
goto fail;
 /* At user request, disable shader cache entirely. */
 if (getenv("MESA_GLSL_CACHE_DISABLE"))
goto fail;
 /* Determine path for cache based on the first defined name as 
follows:

  *
  *   $MESA_GLSL_CACHE_DIR
-*   $XDG_CACHE_HOME/mesa
-*   /.cache/mesa
+*   $XDG_CACHE_HOME/mesa_shader_cache
+*   

Re: [Mesa-dev] [PATCH 08/45] spirv/nir: Add support for SPV_KHR_16bit_storage

[Eduardo Lima Mitev]

On 08/17/2017 09:09 PM, Jason Ekstrand wrote:
> This should come after 10
> 

Right, fixed locally for v2.

> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro  > wrote:
> 
> From: Eduardo Lima Mitev >
> 
> ---
>  src/compiler/spirv/nir_spirv.h| 1 +
>  src/compiler/spirv/spirv_to_nir.c | 7 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/src/compiler/spirv/nir_spirv.h
> b/src/compiler/spirv/nir_spirv.h
> index 7f16866..89e6672 100644
> --- a/src/compiler/spirv/nir_spirv.h
> +++ b/src/compiler/spirv/nir_spirv.h
> @@ -51,6 +51,7 @@ struct nir_spirv_supported_extensions {
> bool image_write_without_format;
> bool int64;
> bool multiview;
> +   bool storage_16bit;
>  };
> 
>  nir_function *spirv_to_nir(const uint32_t *words, size_t word_count,
> diff --git a/src/compiler/spirv/spirv_to_nir.c
> b/src/compiler/spirv/spirv_to_nir.c
> index 763dbf4..c66bf34 100644
> --- a/src/compiler/spirv/spirv_to_nir.c
> +++ b/src/compiler/spirv/spirv_to_nir.c
> @@ -2763,6 +2763,13 @@ vtn_handle_preamble_instruction(struct
> vtn_builder *b, SpvOp opcode,
>   spv_check_supported(multiview, cap);
>   break;
> 
> +  case SpvCapabilityStorageUniformBufferBlock16:
> +  case SpvCapabilityStorageUniform16:
> +  case SpvCapabilityStoragePushConstant16:
> +  case SpvCapabilityStorageInputOutput16:
> + spv_check_supported(storage_16bit, cap);
> + break;
> +
>default:
>   unreachable("Unhandled capability");
>}
> --
> 2.9.3
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org 
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 
> 
> 
> 
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 06/45] nir: Handle fp16 rounding modes at nir_type_conversion_op

[Eduardo Lima Mitev]

On 08/17/2017 09:08 PM, Jason Ekstrand wrote:
> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro  > wrote:
> 
> From: Jose Maria Casanova Crespo  >
> 
> nir_type_conversion enables new operations to handle rounding modes to
> convert to fp16 values. Two new opcodes are enabled nir_op_f2f16_rtne
> and nir_op_f2f16_rtz.
> 
> The undefined behaviour doesn't has any effect and uses the original
> nir_op_f2f16 operation.
> ---
>  src/compiler/glsl/glsl_to_nir.cpp |  3 ++-
>  src/compiler/nir/nir.h|  3 ++-
>  src/compiler/nir/nir_opcodes.py   | 10 --
>  src/compiler/nir/nir_opcodes_c.py | 15 ++-
>  src/compiler/spirv/vtn_alu.c  |  2 +-
>  5 files changed, 27 insertions(+), 6 deletions(-)
> 
> diff --git a/src/compiler/glsl/glsl_to_nir.cpp
> b/src/compiler/glsl/glsl_to_nir.cpp
> index 2153004..23e6121 100644
> --- a/src/compiler/glsl/glsl_to_nir.cpp
> +++ b/src/compiler/glsl/glsl_to_nir.cpp
> @@ -1509,7 +1509,8 @@ nir_visitor::visit(ir_expression *ir)
> case ir_unop_u642i64: {
>nir_alu_type src_type =
> nir_get_nir_type_for_glsl_base_type(types[0]);
>nir_alu_type dst_type =
> nir_get_nir_type_for_glsl_base_type(out_type);
> -  result = nir_build_alu(, nir_type_conversion_op(src_type,
> dst_type),
> +  result = nir_build_alu(, nir_type_conversion_op(src_type,
> dst_type,
> + nir_rounding_mode_undef),
>   srcs[0], NULL, NULL, NULL);
>/* b2i and b2f don't have fixed bit-size versions so the
> builder will
> * just assume 32 and we have to fix it up here.
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index 115ec1b..7e48e18 100644
> --- a/src/compiler/nir/nir.h
> +++ b/src/compiler/nir/nir.h
> @@ -741,7 +741,8 @@ nir_get_nir_type_for_glsl_type(const struct
> glsl_type *type)
> return
> nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
>  }
> 
> -nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst);
> +nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
> +  nir_rounding_mode rnd);
> 
>  typedef enum {
> NIR_OP_IS_COMMUTATIVE = (1 << 0),
> diff --git a/src/compiler/nir/nir_opcodes.py
> b/src/compiler/nir/nir_opcodes.py
> index 39c01a7..bd342de 100644
> --- a/src/compiler/nir/nir_opcodes.py
> +++ b/src/compiler/nir/nir_opcodes.py
> @@ -179,8 +179,14 @@ for src_t in [tint, tuint, tfloat]:
>else:
>   bit_sizes = [8, 16, 32, 64]
>for bit_size in bit_sizes:
> - unop_convert("{0}2{1}{2}".format(src_t[0], dst_t[0],
> bit_size),
> -  dst_t + str(bit_size), src_t, "src0")
> +  if bit_size == 16 and dst_t == tfloat and src_t == tfloat:
> +  rnd_modes = ['rtne', 'rtz']
> +  for rnd_mode in rnd_modes:
> +  unop_convert("{0}2{1}{2}_{3}".format(src_t[0],
> dst_t[0],
> +   bit_size,
> rnd_mode),
> +   dst_t + str(bit_size), src_t, "src0")
> +  unop_convert("{0}2{1}{2}".format(src_t[0], dst_t[0],
> bit_size),
> +   dst_t + str(bit_size), src_t, "src0")
> 
> 
> You could do this a bit shorter if you make rnd_modes = ['', '_rtne',
> 'rtz'] and then just loop over them.
> 

Hmm, I don't think we can reduce it that way. Notice that the loop over
rnd_modes is only for bit_size==16, but the last unop_convert call,
outside the loop, applies to all bit sizes.

> 
> 
>  # We'll hand-code the to/from bool conversion opcodes.  Because
> bool doesn't
>  # have multiple bit-sizes, we can always infer the size from the
> other type.
> diff --git a/src/compiler/nir/nir_opcodes_c.py
> b/src/compiler/nir/nir_opcodes_c.py
> index a1db54f..a7721d3 100644
> --- a/src/compiler/nir/nir_opcodes_c.py
> +++ b/src/compiler/nir/nir_opcodes_c.py
> @@ -30,7 +30,7 @@ template = Template("""
>  #include "nir.h"
> 
>  nir_op
> -nir_type_conversion_op(nir_alu_type src, nir_alu_type dst)
> +nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
> nir_rounding_mode rnd)
>  {
> nir_alu_type src_base = (nir_alu_type)
> nir_alu_type_get_base_type(src);
> nir_alu_type dst_base = (nir_alu_type)
> nir_alu_type_get_base_type(dst);
> @@ -64,7 +64,20 @@ nir_type_conversion_op(nir_alu_type src,
> nir_alu_type dst)
> switch (dst_bit_size) {
>  % for dst_bits in [32, 64]:
>case ${dst_bits}:
> 

Re: [Mesa-dev] [PATCH 07/45] nir: Populate conversion opcodes to/from 16-bit types

[Eduardo Lima Mitev]

On 08/17/2017 08:48 PM, Jason Ekstrand wrote:
> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro  > wrote:
> 
> From: Eduardo Lima Mitev >
> 
> This will include the following NIR ALU opcodes:
>  * nir_op_i2i16
>  * nir_op_i2f16
>  * nir_op_u2u16
>  * nir_op_u2f16
>  * nir_op_f2i16
>  * nir_op_f2u16
>  * nir_op_f2f16
> ---
>  src/compiler/nir/nir_opcodes_c.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/compiler/nir/nir_opcodes_c.py
> b/src/compiler/nir/nir_opcodes_c.py
> index a7721d3..01776be 100644
> --- a/src/compiler/nir/nir_opcodes_c.py
> +++ b/src/compiler/nir/nir_opcodes_c.py
> @@ -62,7 +62,7 @@ nir_type_conversion_op(nir_alu_type src,
> nir_alu_type dst, nir_rounding_mode rnd
>  % endif
>  %  endif
> switch (dst_bit_size) {
> -% for dst_bits in [32, 64]:
> +% for dst_bits in [16, 32, 64]:
> 
> 
> You also need to update nir_type_conversion_op in nir_opcodes_c.py. 
>

What do you mean? This hunk is for nir_type_conversion_op in
nir_opcodes_c.py.

> Also, shouldn't this go before patch 6?
>  

Yes, indeed. We have shuffled the patches in the series a few times
already :). Fixed for v2.

> 
>case ${dst_bits}:
>  %   if src_t == 'float' and dst_t == 'float'  and
> dst_bits == 16:
>   switch(rnd) {
> --
> 2.9.3
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org 
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 
> 
> 
> 
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] gallium/radeon: remove old_fence parameter from r600_gfx_write_event_eop

[Nicolai Hähnle]

For both:

Reviewed-by: Nicolai Hähnle 


On 17.08.2017 19:58, Marek Olšák wrote:

From: Marek Olšák 

just use the new scratch buffer.
---
  src/gallium/drivers/radeon/r600_pipe_common.c | 15 +++
  src/gallium/drivers/radeon/r600_pipe_common.h |  3 +--
  src/gallium/drivers/radeon/r600_query.c   |  6 +++---
  src/gallium/drivers/radeonsi/si_perfcounter.c |  2 +-
  src/gallium/drivers/radeonsi/si_state_draw.c  |  3 +--
  5 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c 
b/src/gallium/drivers/radeon/r600_pipe_common.c
index b28f385..dc54b5e 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -96,22 +96,21 @@ void radeon_shader_binary_clean(struct ac_shader_binary *b)
   * \param data_sel1 = fence, 3 = timestamp
   * \param buf Buffer
   * \param va  GPU address
   * \param old_value   Previous fence value (for a bug workaround)
   * \param new_value   Fence value to write for this event.
   */
  void r600_gfx_write_event_eop(struct r600_common_context *ctx,
  unsigned event, unsigned event_flags,
  unsigned data_sel,
  struct r600_resource *buf, uint64_t va,
- uint32_t old_fence, uint32_t new_fence,
- unsigned query_type)
+ uint32_t new_fence, unsigned query_type)
  {
struct radeon_winsys_cs *cs = ctx->gfx.cs;
unsigned op = EVENT_TYPE(event) |
  EVENT_INDEX(5) |
  event_flags;
  
  	if (ctx->chip_class >= GFX9) {

/* A ZPASS_DONE or PIXEL_STAT_DUMP_EVENT (of the DB occlusion
 * counters) must immediately precede every timestamp event to
 * prevent a GPU hang on GFX9.
@@ -139,30 +138,36 @@ void r600_gfx_write_event_eop(struct r600_common_context 
*ctx,
radeon_emit(cs, op);
radeon_emit(cs, EOP_DATA_SEL(data_sel));
radeon_emit(cs, va);/* address lo */
radeon_emit(cs, va >> 32);/* address hi */
radeon_emit(cs, new_fence); /* immediate data lo */
radeon_emit(cs, 0); /* immediate data hi */
radeon_emit(cs, 0); /* unused */
} else {
if (ctx->chip_class == CIK ||
ctx->chip_class == VI) {
+   struct r600_resource *scratch = ctx->eop_bug_scratch;
+   uint64_t va = scratch->gpu_address;
+
/* Two EOP events are required to make all engines go 
idle
 * (and optional cache flushes executed) before the 
timestamp
 * is written.
 */
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
radeon_emit(cs, op);
radeon_emit(cs, va);
radeon_emit(cs, ((va >> 32) & 0x) | 
EOP_DATA_SEL(data_sel));
-   radeon_emit(cs, old_fence); /* immediate data */
+   radeon_emit(cs, 0); /* immediate data */
radeon_emit(cs, 0); /* unused */
+
+   radeon_add_to_buffer_list(ctx, >gfx, scratch,
+ RADEON_USAGE_WRITE, 
RADEON_PRIO_QUERY);
}
  
  		radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));

radeon_emit(cs, op);
radeon_emit(cs, va);
radeon_emit(cs, ((va >> 32) & 0x) | EOP_DATA_SEL(data_sel));
radeon_emit(cs, new_fence); /* immediate data */
radeon_emit(cs, 0); /* unused */
}
  
@@ -672,21 +677,23 @@ bool r600_common_context_init(struct r600_common_context *rctx,

}
  
  	rctx->b.set_device_reset_callback = r600_set_device_reset_callback;
  
  	r600_init_context_texture_functions(rctx);

r600_init_viewport_functions(rctx);
r600_streamout_init(rctx);
r600_query_init(rctx);
cayman_init_msaa(>b);
  
-	if (rctx->chip_class == GFX9) {

+   if (rctx->chip_class == CIK ||
+   rctx->chip_class == VI ||
+   rctx->chip_class == GFX9) {
rctx->eop_bug_scratch = (struct r600_resource*)
pipe_buffer_create(>b, 0, PIPE_USAGE_DEFAULT,
   16 * 
rscreen->info.num_render_backends);
if (!rctx->eop_bug_scratch)
return false;
}
  
  	rctx->allocator_zeroed_memory =

u_suballocator_create(>b, rscreen->info.gart_page_size,
  0, PIPE_USAGE_DEFAULT, 0, true);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h 

Re: [Mesa-dev] [PATCH] radeonsi/gfx9: add shader binary overallocation back

[Nicolai Hähnle]

So... do we really need this? I thought the summary of the internal 
discussion was that gfx9 prefetch was not supposed to cross page boundaries?


Cheers,
Nicolai


On 17.08.2017 00:49, Marek Olšák wrote:

From: Marek Olšák 

Cc: 17.2 
---
  src/gallium/drivers/radeonsi/si_shader.c | 10 ++
  1 file changed, 10 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 3f4d847..6976537 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4913,20 +4913,30 @@ int si_shader_binary_upload(struct si_screen *sscreen, 
struct si_shader *shader)
   (!epilog ? mainb->rodata_size : 0);
unsigned char *ptr;
  
  	assert(!prolog || !prolog->rodata_size);

assert(!previous_stage || !previous_stage->rodata_size);
assert(!prolog2 || !prolog2->rodata_size);
assert((!prolog && !previous_stage && !prolog2 && !epilog) ||
   !mainb->rodata_size);
assert(!epilog || !epilog->rodata_size);
  
+	/* GFX9 can fetch two cache lines after the end of the shader.

+* Prevent VM faults by overallocating the shader binary.
+*/
+   if (sscreen->b.chip_class >= GFX9) {
+   const unsigned icache_line_size = 64;
+
+   bo_size = align(bo_size, icache_line_size) +
+ icache_line_size * 2;
+   }
+
r600_resource_reference(>bo, NULL);
shader->bo = (struct r600_resource*)
 pipe_buffer_create(>b.b, 0,
PIPE_USAGE_IMMUTABLE,
align(bo_size, SI_CPDMA_ALIGNMENT));
if (!shader->bo)
return -ENOMEM;
  
  	/* Upload. */

ptr = sscreen->b.ws->buffer_map(shader->bo->buf, NULL,




--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] radv: Implement bc optimize.

[Nicolai Hähnle]

On 15.08.2017 18:32, Bas Nieuwenhuizen wrote:

Seems like we actually enabled it already, but did not implement
the shader part. With this patch we do.
---
  src/amd/common/ac_nir_to_llvm.c | 30 ++
  src/amd/common/ac_nir_to_llvm.h |  1 +
  src/amd/vulkan/radv_pipeline.c  |  3 +++
  3 files changed, 34 insertions(+)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index bf3baf28672..137da30e947 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5009,10 +5009,40 @@ handle_vs_inputs(struct nir_to_llvm_context *ctx,
handle_vs_input_decl(ctx, variable);
  }
  
+static void

+prepare_interp_optimize(struct nir_to_llvm_context *ctx,
+struct nir_shader *nir)
+{
+   if (!ctx->options->key.fs.multisample) {
+   return;
+   }


Excessive braces.

Apart from that, both patches:

Reviewed-by: Nicolai Hähnle 



+
+   bool uses_center = false;
+   bool uses_centroid = false;
+   nir_foreach_variable(variable, >inputs) {
+   if (glsl_get_base_type(glsl_without_array(variable->type)) != 
GLSL_TYPE_FLOAT ||
+   variable->data.sample)
+   continue;
+
+   if (variable->data.centroid)
+   uses_centroid = true;
+   else
+   uses_center = true;
+   }
+
+   if (uses_center && uses_centroid) {
+   LLVMValueRef sel = LLVMBuildICmp(ctx->builder, LLVMIntSLT, ctx->prim_mask, 
ctx->ac.i32_0, "");
+   ctx->persp_centroid = LLVMBuildSelect(ctx->builder, sel, ctx->persp_center, 
ctx->persp_centroid, "");
+   ctx->linear_centroid = LLVMBuildSelect(ctx->builder, sel, 
ctx->linear_center, ctx->linear_centroid, "");
+   }
+}
+
  static void
  handle_fs_inputs(struct nir_to_llvm_context *ctx,
   struct nir_shader *nir)
  {
+   prepare_interp_optimize(ctx, nir);
+
nir_foreach_variable(variable, >inputs)
handle_fs_input_decl(ctx, variable);
  
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h

index 376db1387a4..53ea238c3c9 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -60,6 +60,7 @@ struct ac_fs_variant_key {
uint32_t col_format;
uint32_t is_int8;
uint32_t is_int10;
+   uint32_t multisample : 1;
  };
  
  union ac_shader_variant_key {

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index bd5eeb776c4..75371a0be5a 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2069,6 +2069,9 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
if (modules[MESA_SHADER_FRAGMENT]) {
union ac_shader_variant_key key = {0};
key.fs.col_format = 
pipeline->graphics.blend.spi_shader_col_format;
+   if (pCreateInfo->pMultisampleState &&
+   pCreateInfo->pMultisampleState->rasterizationSamples > 1)
+   key.fs.multisample = true;
  
  		if (pipeline->device->physical_device->rad_info.chip_class < VI)

radv_pipeline_compute_get_int_clamp(pCreateInfo, 
_int8, _int10);




--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] radeonsi: don't use CLEAR_STATE on SI

[Nicolai Hähnle]

On 15.08.2017 18:21, Marek Olšák wrote:

From: Marek Olšák 

This fixes random hangs with Unigine Valley.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102201


One comment below. With that addressed:

Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some 
registers")

Reviewed-by: Nicolai Hähnle 



---
  src/gallium/drivers/radeonsi/si_hw_context.c | 20 -
  src/gallium/drivers/radeonsi/si_pipe.c   |  4 +++
  src/gallium/drivers/radeonsi/si_pipe.h   |  1 +
  src/gallium/drivers/radeonsi/si_state.c  | 45 ++--
  4 files changed, 60 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c 
b/src/gallium/drivers/radeonsi/si_hw_context.c
index 3582cd7..46e6073 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -225,41 +225,47 @@ void si_begin_new_cs(struct si_context *ctx)
if (ctx->queued.named.gs)
ctx->prefetch_L2_mask |= SI_PREFETCH_GS;
if (ctx->queued.named.vs)
ctx->prefetch_L2_mask |= SI_PREFETCH_VS;
if (ctx->queued.named.ps)
ctx->prefetch_L2_mask |= SI_PREFETCH_PS;
if (ctx->vertex_buffers.buffer)
ctx->prefetch_L2_mask |= SI_PREFETCH_VBO_DESCRIPTORS;
  
  	/* CLEAR_STATE disables all colorbuffers, so only enable bound ones. */

-   ctx->framebuffer.dirty_cbufs =
-   u_bit_consecutive(0, ctx->framebuffer.state.nr_cbufs);
-   /* CLEAR_STATE disables the zbuffer, so only enable it if it's bound. */
-   ctx->framebuffer.dirty_zsbuf = ctx->framebuffer.state.zsbuf != NULL;
+   bool has_clear_state = ctx->screen->has_clear_state;
+   if (has_clear_state) {
+   ctx->framebuffer.dirty_cbufs =
+u_bit_consecutive(0, ctx->framebuffer.state.nr_cbufs);
+   /* CLEAR_STATE disables the zbuffer, so only enable it if it's 
bound. */
+   ctx->framebuffer.dirty_zsbuf = ctx->framebuffer.state.zsbuf != 
NULL;
+   } else {
+   ctx->framebuffer.dirty_cbufs = u_bit_consecutive(0, 8);
+   ctx->framebuffer.dirty_zsbuf = true;
+   }
/* This should always be marked as dirty to set the framebuffer scissor
 * at least. */
si_mark_atom_dirty(ctx, >framebuffer.atom);
  
  	si_mark_atom_dirty(ctx, >clip_regs);

/* CLEAR_STATE sets zeros. */
-   if (ctx->clip_state.any_nonzeros)
+   if (!has_clear_state || ctx->clip_state.any_nonzeros)
si_mark_atom_dirty(ctx, >clip_state.atom);
ctx->msaa_sample_locs.nr_samples = 0;
si_mark_atom_dirty(ctx, >msaa_sample_locs.atom);
si_mark_atom_dirty(ctx, >msaa_config);
/* CLEAR_STATE sets 0x. */
-   if (ctx->sample_mask.sample_mask != 0x)
+   if (!has_clear_state || ctx->sample_mask.sample_mask != 0x)
si_mark_atom_dirty(ctx, >sample_mask.atom);
si_mark_atom_dirty(ctx, >cb_render_state);
/* CLEAR_STATE sets zeros. */
-   if (ctx->blend_color.any_nonzeros)
+   if (!has_clear_state || ctx->blend_color.any_nonzeros)
si_mark_atom_dirty(ctx, >blend_color.atom);
si_mark_atom_dirty(ctx, >db_render_state);
si_mark_atom_dirty(ctx, >stencil_ref.atom);
si_mark_atom_dirty(ctx, >spi_map);
si_mark_atom_dirty(ctx, >b.streamout.enable_atom);
si_mark_atom_dirty(ctx, >b.render_cond_atom);
si_all_descriptors_begin_new_cs(ctx);
si_all_resident_buffers_begin_new_cs(ctx);
  
  	ctx->b.scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1;

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index cac1d01..80a77a8 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1060,20 +1060,24 @@ struct pipe_screen *radeonsi_screen_create(struct 
radeon_winsys *ws,
  
  	if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false))

si_init_perfcounters(sscreen);
  
  	/* Hawaii has a bug with offchip buffers > 256 that can be worked

 * around by setting 4K granularity.
 */
sscreen->tess_offchip_block_dw_size =
sscreen->b.family == CHIP_HAWAII ? 4096 : 8192;
  
+	/* The mere presense of CLEAR_STATE in the IB causes random GPU hangs

+* on SI. */
+   sscreen->has_clear_state = sscreen->b.chip_class >= CIK;
+
sscreen->has_distributed_tess =
sscreen->b.chip_class >= VI &&
sscreen->b.info.max_se >= 2;
  
  	sscreen->has_draw_indirect_multi =

(sscreen->b.family >= CHIP_POLARIS10) ||
(sscreen->b.chip_class == VI &&
 sscreen->b.info.pfp_fw_version >= 121 &&
 sscreen->b.info.me_fw_version >= 87) ||
(sscreen->b.chip_class == CIK &&

Re: [Mesa-dev] [PATCH 2/4] util/disk_cache: add struct cache_item_metadata

[Nicolai Hähnle]

On 15.08.2017 01:26, Timothy Arceri wrote:

This will be used to store more information about the cache item
in it's header. This information is intended for 3rd party and
cache analysis use but can also be used for detecting the unlikely
scenario of cache collisions.
---
  src/util/disk_cache.h | 22 ++
  1 file changed, 22 insertions(+)

diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index 9aade16a9e..d6d7609ffb 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -34,20 +34,42 @@
  
  #ifdef __cplusplus

  extern "C" {
  #endif
  
  /* Size of cache keys in bytes. */

  #define CACHE_KEY_SIZE 20
  
  typedef uint8_t cache_key[CACHE_KEY_SIZE];
  
+/* WARNING: 3rd party applications might be reading the cache item metadata.

+ * Do not change these values without making the change widely known.
+ * Please contact Valve developers and make them aware of this change.
+ */
+#define CACHE_ITEM_TYPE_UNKNOWN  0x0
+#define CACHE_ITEM_TYPE_GLSL 0x1
+
+typedef uint32_t cache_item_metadata_type;


Please don't do typedefs like that, they just obfuscate. If you don't 
want to just use uint32_t, I'd suggest to use an enum.


At a higher level, what is this actually good for? So I get Valve wants 
to parse something in the shader cache, but why / what for?


Cheers,
Nicolai



+
+struct cache_item_metadata {
+   /**
+* The cache item type. This could be used to identify a GLSL cache item,
+* a certain type of IR (tgsi, nir, etc), or signal that it is the final
+* binary form of the shader.
+*/
+   cache_item_metadata_type type;
+
+   /** GLSL cache item metadata */
+   cache_key *keys;   /* sha1 list of shaders that make up the cache item */
+   uint32_t num_keys;
+};
+
  struct disk_cache;
  
  static inline bool

  disk_cache_get_function_timestamp(void *ptr, uint32_t* timestamp)
  {
  #ifdef ENABLE_SHADER_CACHE
 Dl_info info;
 struct stat st;
 if (!dladdr(ptr, ) || !info.dli_fname) {
return false;




--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] util/disk_cache: rename mesa cache dir and introduce cache versioning

[Nicolai Hähnle]

On 15.08.2017 01:26, Timothy Arceri wrote:

Steam is already analysing cache items, unfortunatly we did not
introduce a versioning mechanism for identifying structural changes
to cache entries earlier so the only way to do so is to rename the
cache directory.

Since we are renaming it we take the opportunity to give the directory
a more meaningful name.

Adding a version field to the header of cache entries will help us to
avoid having to rename the directory in future. Please note this is
versioning for the internal structure of the entries as defined in
disk_cache.{c,h} as opposed to the structure of the data provided to
the disk cache by the GLSL compiler and the various driver backends.


If the version is intended to reflect the disk cache-internal structure 
of files, shouldn't you check the version when loading a file?


Also, what about the index file? Shouldn't it get the version as well?

Cheers,
Nicolai



---
  src/compiler/glsl/tests/cache_test.c |  6 --
  src/util/disk_cache.c| 37 +---
  2 files changed, 30 insertions(+), 13 deletions(-)

diff --git a/src/compiler/glsl/tests/cache_test.c 
b/src/compiler/glsl/tests/cache_test.c
index af1b66fb3d..aa779e3985 100644
--- a/src/compiler/glsl/tests/cache_test.c
+++ b/src/compiler/glsl/tests/cache_test.c
@@ -178,38 +178,40 @@ test_disk_cache_create(void)
 /* Test with XDG_CACHE_HOME set */
 setenv("XDG_CACHE_HOME", CACHE_TEST_TMP "/xdg-cache-home", 1);
 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with XDG_CACHE_HOME set with"
 "a non-existing parent directory");
  
 mkdir(CACHE_TEST_TMP, 0755);

 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with XDG_CACHE_HOME set");
  
-   check_directories_created(CACHE_TEST_TMP "/xdg-cache-home/mesa");

+   check_directories_created(CACHE_TEST_TMP
+ "/xdg-cache-home/mesa_shader_cache");
  
 disk_cache_destroy(cache);
  
 /* Test with MESA_GLSL_CACHE_DIR set */

 err = rmrf_local(CACHE_TEST_TMP);
 expect_equal(err, 0, "Removing " CACHE_TEST_TMP);
  
 setenv("MESA_GLSL_CACHE_DIR", CACHE_TEST_TMP "/mesa-glsl-cache-dir", 1);

 cache = disk_cache_create("test", "make_check", 0);
 expect_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR set with"
 "a non-existing parent directory");
  
 mkdir(CACHE_TEST_TMP, 0755);

 cache = disk_cache_create("test", "make_check", 0);
 expect_non_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR set");
  
-   check_directories_created(CACHE_TEST_TMP "/mesa-glsl-cache-dir/mesa");

+   check_directories_created(CACHE_TEST_TMP
+ "/mesa-glsl-cache-dir/mesa_shader_cache");
  
 disk_cache_destroy(cache);

  }
  
  static bool

  does_cache_contain(struct disk_cache *cache, const cache_key key)
  {
 void *result;
  
 result = disk_cache_get(cache, key, NULL);

diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index b2229874e0..283856b15c 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -51,20 +51,28 @@
  
  /* Number of bits to mask off from a cache key to get an index. */

  #define CACHE_INDEX_KEY_BITS 16
  
  /* Mask for computing an index from a key. */

  #define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
  
  /* The number of keys that can be stored in the index. */

  #define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS)
  
+#define CACHE_DIR_NAME "mesa_shader_cache"

+
+/* The cache version should be bumped whenever a change is made to the
+ * structure of cache entries or the index. This will give any 3rd party
+ * applications reading the cache entries a chance to adjust to the changes.
+ */
+#define CACHE_VERSION 1
+
  struct disk_cache {
 /* The path to the cache directory. */
 char *path;
  
 /* Thread queue for compressing and writing cache entries to disk */

 struct util_queue cache_queue;
  
 /* Seed for rand, which is used to pick a random directory */

 uint64_t seed_xorshift128plus[2];
  
@@ -181,41 +189,41 @@ disk_cache_create(const char *gpu_name, const char *timestamp,

 if (local == NULL)
goto fail;
  
 /* At user request, disable shader cache entirely. */

 if (getenv("MESA_GLSL_CACHE_DISABLE"))
goto fail;
  
 /* Determine path for cache based on the first defined name as follows:

  *
  *   $MESA_GLSL_CACHE_DIR
-*   $XDG_CACHE_HOME/mesa
-*   /.cache/mesa
+*   $XDG_CACHE_HOME/mesa_shader_cache
+*   /.cache/mesa_shader_cache
  */
 path = getenv("MESA_GLSL_CACHE_DIR");
 if (path) {
if (mkdir_if_needed(path) == -1)
   goto fail;
  
-  path = concatenate_and_mkdir(local, path, "mesa");

+  path = concatenate_and_mkdir(local, path, CACHE_DIR_NAME);
if (path == NULL)
   goto fail;

Re: [Mesa-dev] [PATCH 3/3] gallium/radeon: pass LLVM processor to the disk shader cache

[Nicolai Hähnle]

On 11.08.2017 20:37, Marek Olšák wrote:

On Fri, Aug 11, 2017 at 6:00 PM, Nicolai Hähnle  wrote:

On 10.08.2017 21:57, Marek Olšák wrote:


From: Marek Olšák 

---
   src/gallium/drivers/radeon/r600_pipe_common.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 95458d2e..0038c9a 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -878,21 +878,21 @@ static void r600_disk_cache_create(struct
r600_common_screen *rscreen)
   #endif
 if (res != -1) {
 /* These flags affect shader compilation. */
 uint64_t shader_debug_flags =
 rscreen->debug_flags &
 (DBG_FS_CORRECT_DERIVS_AFTER_KILL |
  DBG_SI_SCHED |
  DBG_UNSAFE_MATH);
 rscreen->disk_shader_cache =
-
disk_cache_create(r600_get_family_name(rscreen),
+
disk_cache_create(r600_get_llvm_processor_name(rscreen->family),



What's the advantage of this?


It's added to the shader cache key. It allows shaders cached for
Vega10 to be used by Raven and vice versa. Same for Polaris11 and
Polaris12. It makes things nicer for some multi-GPU setups or when
swapping GPUs.


I'm not a huge fan of this since the shader code does have access to the 
family, and there might be a need for family-specific workarounds. I'm 
actually not a huge fan of this overall, because the debug_flags thing 
seems flaky as well.


There's currently some corruption in Unigine demos which seems related 
to the shader cache, which just goes to show how difficult it is to 
really get this stuff right. I'd rather be on the safe side.


Cheers,
Nicolai



Marek




--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] gallium/os: fix os_time_get_nano() to roll over less

[Jose Fonseca]

On 18/08/17 08:23, Frank Richter wrote:

Hi,
On 17.08.2017 02:34, Brian Paul wrote:

BTW, I wonder if we would win by using lldiv().  Because this is often
use for performance measurements, so these extra division might add some
impact.


Frank, do you want to look into that?  In the mean time, I'll push the 
patches as-is.


AFAICS, the lldiv implementation in the MSVC runtime (also used by 
MinGW) simply does “a = num / denom; b = num % denom;” as well, so it 
seems unlikely that lldiv() would give a benefit here.


I see.  I thought they would try do something smarter to leverage the 
ISA ability to compute both at the same time, but I suppose that's left 
to the compiler to figure out.  Thanks for checking.


Jose
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] gles2: Support for GL_EXT_occlusion_query_boolean

[Harish Krupo]

It passes dEQP-GLES2.capability.extensions.other.GL_EXT_occlusion_query_boolean
test. I think the test is just a check for the existence of the extension. On
gles3 and above, occlusion queries are part of the spec.

Signed-off-by: Harish Krupo 
---

There is a piglit test for this extension in the piglit mailing list.

 src/mapi/glapi/gen/es_EXT.xml | 60 +++
 src/mapi/glapi/gen/static_data.py |  7 +
 src/mesa/main/extensions_table.h  |  1 +
 3 files changed, 68 insertions(+)

diff --git a/src/mapi/glapi/gen/es_EXT.xml b/src/mapi/glapi/gen/es_EXT.xml
index 3a2bdb2fdc..1730a92e93 100644
--- a/src/mapi/glapi/gen/es_EXT.xml
+++ b/src/mapi/glapi/gen/es_EXT.xml
@@ -751,6 +751,66 @@
 
 
 
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
 
 
 
diff --git a/src/mapi/glapi/gen/static_data.py 
b/src/mapi/glapi/gen/static_data.py
index 7a8933b8d7..f5709604cc 100644
--- a/src/mapi/glapi/gen/static_data.py
+++ b/src/mapi/glapi/gen/static_data.py
@@ -452,6 +452,7 @@ functions = [
 "BeginConditionalRenderNV",
 "BeginQuery",
 "BeginQueryARB",
+"BeginQueryEXT",
 "BeginQueryIndexed",
 "BeginTransformFeedback",
 "BindAttribLocation",
@@ -640,6 +641,7 @@ functions = [
 "DeleteProgramsARB",
 "DeleteQueries",
 "DeleteQueriesARB",
+"DeleteQueriesEXT",
 "DeleteRenderbuffers",
 "DeleteRenderbuffersEXT",
 "DeleteSamplers",
@@ -710,6 +712,7 @@ functions = [
 "EndList",
 "EndQuery",
 "EndQueryARB",
+"EndQueryEXT",
 "EndQueryIndexed",
 "EndTransformFeedback",
 "EvalCoord1d",
@@ -774,6 +777,7 @@ functions = [
 "GenProgramsARB",
 "GenQueries",
 "GenQueriesARB",
+"GenQueriesEXT",
 "GenRenderbuffers",
 "GenRenderbuffersEXT",
 "GenSamplers",
@@ -904,10 +908,12 @@ functions = [
 "GetQueryIndexediv",
 "GetQueryiv",
 "GetQueryivARB",
+"GetQueryivEXT",
 "GetQueryObjectiv",
 "GetQueryObjectivARB",
 "GetQueryObjectuiv",
 "GetQueryObjectuivARB",
+"GetQueryObjectuivEXT",
 "GetRenderbufferParameteriv",
 "GetRenderbufferParameterivEXT",
 "GetSamplerParameterfv",
@@ -998,6 +1004,7 @@ functions = [
 "IsProgramPipeline",
 "IsQuery",
 "IsQueryARB",
+"IsQueryEXT",
 "IsRenderbuffer",
 "IsRenderbufferEXT",
 "IsSampler",
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 347a6197ed..2e660ebae8 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -229,6 +229,7 @@ EXT(EXT_map_buffer_range, 
ARB_map_buffer_range
 EXT(EXT_memory_object   , EXT_memory_object
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_memory_object_fd, EXT_memory_object_fd 
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_multi_draw_arrays   , dummy_true   
  , GLL,  x , ES1, ES2, 1999)
+EXT(EXT_occlusion_query_boolean , ARB_occlusion_query2 
  ,  x ,  x ,  x , ES2, 2001)
 EXT(EXT_packed_depth_stencil, dummy_true   
  , GLL, GLC,  x ,  x , 2005)
 EXT(EXT_packed_float, EXT_packed_float 
  , GLL, GLC,  x ,  x , 2004)
 EXT(EXT_packed_pixels   , dummy_true   
  , GLL,  x ,  x ,  x , 1997)
-- 
2.12.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH v6.1] egl: Allow creation of per surface out fence

[yogesh . marathe]

From: Zhongmin Wu 

Add plumbing to allow creation of per display surface out fence.

Currently enabled only on android, since the system expects a valid
fd in ANativeWindow::{queue,cancel}Buffer. We pass a fd of -1 with
which native applications such as flatland fail. The patch enables
explicit sync on android and fixes one of the functional issue for
apps or buffer consumers which depend upon fence and its timestamp.

v2: a) Also implement the fence in cancelBuffer.
b) The last sync fence is stored in drawable object
   rather than brw context.
c) format clear.

v3: a) Save the last fence fd in DRI Context object.
b) Return the last fence if the batch buffer is empty and
   nothing to be flushed when _intel_batchbuffer_flush_fence
c) Add the new interface in vbtl to set the retrieve fence

v3.1 a) close fd in the new vbtl interface on none Android platform

v4: a) The last fence is saved in brw context.
b) The retrieve fd is for all the platform but not just Android
c) Add a uniform dri2 interface to initialize the surface.

v4.1: a) make some changes of variable name.
  b) the patch is broken into two patches.

v4.2: a) Add a deinit interface for surface to clear the out fence

v5: a) Add enable_out_fence to init, platform sets it true or
   false
b) Change get fd to update fd and check for fence
c) Commit description updated

v6: a) Heading and commit description updated
b) enable_out_fence is set only if fence is supported
c) Review comments on function names
d) Test with standalone patch, resolves the bug

v6.1 a) Check for old display fence reverted back

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101655

Signed-off-by: Zhongmin Wu 
Signed-off-by: Yogesh Marathe 
---
 src/egl/drivers/dri2/egl_dri2.c | 69 +
 src/egl/drivers/dri2/egl_dri2.h |  9 
 src/egl/drivers/dri2/platform_android.c | 29 ++--
 src/egl/drivers/dri2/platform_drm.c |  3 +-
 src/egl/drivers/dri2/platform_surfaceless.c |  3 +-
 src/egl/drivers/dri2/platform_wayland.c |  3 +-
 src/egl/drivers/dri2/platform_x11.c |  3 +-
 src/egl/drivers/dri2/platform_x11_dri3.c|  3 +-
 8 files changed, 104 insertions(+), 18 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index ed79e0d..04d0332 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -1354,6 +1354,44 @@ dri2_destroy_context(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLContext *ctx)
return EGL_TRUE;
 }
 
+EGLBoolean
+dri2_init_surface(_EGLSurface *surf, _EGLDisplay *dpy, EGLint type,
+_EGLConfig *conf, const EGLint *attrib_list, EGLBoolean 
enable_out_fence)
+{
+   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
+   struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy);
+
+   dri2_surf->out_fence_fd = -1;
+   if (dri2_dpy->fence && dri2_dpy->fence->base.version >= 2 &&
+   dri2_dpy->fence->get_capabilities &&
+   (dri2_dpy->fence->get_capabilities(dri2_dpy->dri_screen) &
+__DRI_FENCE_CAP_NATIVE_FD)) {
+  dri2_surf->enable_out_fence = enable_out_fence;
+   }
+
+   return _eglInitSurface(surf, dpy, type, conf, attrib_list);
+}
+
+static void
+dri2_surface_set_out_fence_fd( _EGLSurface *surf, int fence_fd)
+{
+   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
+
+   if (dri2_surf->out_fence_fd >=0)
+  close(dri2_surf->out_fence_fd);
+
+   dri2_surf->out_fence_fd = fence_fd;
+}
+
+void
+dri2_deinit_surface(_EGLSurface *surf)
+{
+   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
+
+   dri2_surface_set_out_fence_fd(surf, -1);
+   dri2_surf->enable_out_fence = false;
+}
+
 static EGLBoolean
 dri2_destroy_surface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf)
 {
@@ -1365,6 +1403,27 @@ dri2_destroy_surface(_EGLDriver *drv, _EGLDisplay *dpy, 
_EGLSurface *surf)
return dri2_dpy->vtbl->destroy_surface(drv, dpy, surf);
 }
 
+static void
+dri2_surf_update_fence_fd(_EGLContext *ctx,
+  _EGLDisplay *dpy, _EGLSurface *surf)
+{
+   __DRIcontext *dri_ctx = dri2_egl_context(ctx)->dri_context;
+   struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy);
+   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
+   int fence_fd = -1;
+   void *fence;
+
+   if (dri2_surf->enable_out_fence) {
+  fence = dri2_dpy->fence->create_fence_fd(dri_ctx, -1);
+  if (fence) {
+ fence_fd = dri2_dpy->fence->get_fence_fd(dri2_dpy->dri_screen,
+  fence);
+ dri2_dpy->fence->destroy_fence(dri2_dpy->dri_screen, fence);
+  }
+   }
+   dri2_surface_set_out_fence_fd(surf, fence_fd);
+}
+
 /**
  * Called via eglMakeCurrent(), drv->API.MakeCurrent().
  */
@@ -1401,6 +1460,8 @@ dri2_make_current(_EGLDriver *drv, _EGLDisplay *disp, 

Re: [Mesa-dev] [PATCH] radeonsi/gfx9: use the VI codepath for clamping Z

[Andres Gomez]

Hi Marek,

This patch landed tagged for 17.2 stable and has been collected for
17.2.0-rc4.

However, it seems like it could be also interesting for 17.1.x (?)

WDYT?

Br.

On Thu, 2017-08-10 at 22:33 +0200, Marek Olšák wrote:
> From: Marek Olšák 
> 
> This fixes corrupted shadows in Unigine Valley.
> The corruption disappeared when I stopped setting IMG_DATA_FORMAT_24_8
> for depth.
> 
> Cc: 17.2 
> ---
>  src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c |  2 +-
>  src/gallium/drivers/radeonsi/si_state.c   | 12 +---
>  2 files changed, 2 insertions(+), 12 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c 
> b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
> index 42f977d..f8c99ff 100644
> --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
> +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
> @@ -1385,21 +1385,21 @@ static void tex_fetch_args(
>   z = coords[ref_pos];
>   }
>  
>   /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
>* so the depth comparison value isn't clamped for Z16 and
>* Z24 anymore. Do it manually here.
>*
>* It's unnecessary if the original texture format was
>* Z32_FLOAT, but we don't know that here.
>*/
> - if (ctx->screen->b.chip_class == VI)
> + if (ctx->screen->b.chip_class >= VI)
>   z = ac_build_clamp(>ac, z);
>  
>   address[count++] = z;
>   }
>  
>   /* Pack user derivatives */
>   if (opcode == TGSI_OPCODE_TXD) {
>   int param, num_src_deriv_channels, num_dst_deriv_channels;
>  
>   switch (target) {
> diff --git a/src/gallium/drivers/radeonsi/si_state.c 
> b/src/gallium/drivers/radeonsi/si_state.c
> index 11dee49..2c413a4 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -3170,28 +3170,27 @@ si_make_texture_descriptor(struct si_screen *screen,
>  enum pipe_texture_target target,
>  enum pipe_format pipe_format,
>  const unsigned char state_swizzle[4],
>  unsigned first_level, unsigned last_level,
>  unsigned first_layer, unsigned last_layer,
>  unsigned width, unsigned height, unsigned depth,
>  uint32_t *state,
>  uint32_t *fmask_state)
>  {
>   struct pipe_resource *res = >resource.b.b;
> - const struct util_format_description *base_desc, *desc;
> + const struct util_format_description *desc;
>   unsigned char swizzle[4];
>   int first_non_void;
>   unsigned num_format, data_format, type;
>   uint64_t va;
>  
>   desc = util_format_description(pipe_format);
> - base_desc = util_format_description(res->format);
>  
>   if (desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) {
>   const unsigned char swizzle_[4] = {0, 0, 0, 0};
>   const unsigned char swizzle_[4] = {1, 1, 1, 1};
>   const unsigned char swizzle_[4] = {3, 3, 3, 3};
>  
>   switch (pipe_format) {
>   case PIPE_FORMAT_S8_UINT_Z24_UNORM:
>   case PIPE_FORMAT_X32_S8X24_UINT:
>   case PIPE_FORMAT_X8Z24_UNORM:
> @@ -3278,29 +3277,20 @@ si_make_texture_descriptor(struct si_screen *screen,
>   num_format = 
> V_008F14_IMG_NUM_FORMAT_USCALED;
>   }
>   }
>   }
>  
>   data_format = si_translate_texformat(>b.b, pipe_format, desc, 
> first_non_void);
>   if (data_format == ~0) {
>   data_format = 0;
>   }
>  
> - /* Enable clamping for UNORM depth formats promoted to Z32F. */
> - if (screen->b.chip_class >= GFX9 &&
> - util_format_has_depth(desc) &&
> - num_format == V_008F14_IMG_NUM_FORMAT_FLOAT &&
> - util_get_depth_format_type(base_desc) != UTIL_FORMAT_TYPE_FLOAT) {
> - /* NUM_FORMAT=FLOAT and DATA_FORMAT=24_8 means "clamp to 
> [0,1]". */
> - data_format = V_008F14_IMG_DATA_FORMAT_24_8;
> - }
> -
>   /* S8 with Z32 HTILE needs a special format. */
>   if (screen->b.chip_class >= GFX9 &&
>   pipe_format == PIPE_FORMAT_S8_UINT &&
>   tex->tc_compatible_htile)
>   data_format = V_008F14_IMG_DATA_FORMAT_S8_32;
>  
>   if (!sampler &&
>   (res->target == PIPE_TEXTURE_CUBE ||
>res->target == PIPE_TEXTURE_CUBE_ARRAY ||
>(screen->b.chip_class <= VI &&
-- 
Br,

Andres
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 04/45] nir: Add support for 16-bit types (half float, int16 and uint16)

[Eduardo Lima Mitev]

On 08/17/2017 08:23 PM, Jason Ekstrand wrote:
> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro  > wrote:
> 
> From: Eduardo Lima Mitev >
> 
> Signed-off-by: Jose Maria Casanova Crespo  >
> Signed-off-by: Eduardo Lima >
> ---
>  src/compiler/nir/nir.c  |  6 ++
>  src/compiler/nir/nir.h  |  9 +
>  src/compiler/nir/nir_split_var_copies.c |  6 ++
>  src/compiler/nir_types.cpp  | 18 ++
>  src/compiler/nir_types.h|  8 
>  5 files changed, 47 insertions(+)
> 
> diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
> index 491b908..9f8eefd 100644
> --- a/src/compiler/nir/nir.c
> +++ b/src/compiler/nir/nir.c
> @@ -700,10 +700,13 @@ deref_foreach_leaf_build_recur(nir_deref_var
> *deref, nir_deref *tail,
> assert(tail->child == NULL);
> switch (glsl_get_base_type(tail->type)) {
> case GLSL_TYPE_UINT:
> +   case GLSL_TYPE_UINT16:
> case GLSL_TYPE_UINT64:
> case GLSL_TYPE_INT:
> +   case GLSL_TYPE_INT16:
> case GLSL_TYPE_INT64:
> case GLSL_TYPE_FLOAT:
> +   case GLSL_TYPE_HALF_FLOAT:
> case GLSL_TYPE_DOUBLE:
> case GLSL_TYPE_BOOL:
>if (glsl_type_is_vector_or_scalar(tail->type))
> @@ -848,7 +851,10 @@ nir_deref_get_const_initializer_load(nir_shader
> *shader, nir_deref_var *deref)
> case GLSL_TYPE_FLOAT:
> case GLSL_TYPE_INT:
> case GLSL_TYPE_UINT:
> +   case GLSL_TYPE_HALF_FLOAT:
> case GLSL_TYPE_DOUBLE:
> +   case GLSL_TYPE_INT16:
> +   case GLSL_TYPE_UINT16:
> case GLSL_TYPE_UINT64:
> case GLSL_TYPE_INT64:
> case GLSL_TYPE_BOOL:
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index c41b0dc..2ac5b1e 100644
> --- a/src/compiler/nir/nir.h
> +++ b/src/compiler/nir/nir.h
> @@ -701,6 +701,12 @@ nir_get_nir_type_for_glsl_base_type(enum
> glsl_base_type base_type)
> case GLSL_TYPE_INT:
>return nir_type_int32;
>break;
> +   case GLSL_TYPE_UINT16:
> +  return nir_type_uint16;
> +  break;
> +   case GLSL_TYPE_INT16:
> +  return nir_type_int16;
> +  break;
> case GLSL_TYPE_UINT64:
>return nir_type_uint64;
>break;
> @@ -710,6 +716,9 @@ nir_get_nir_type_for_glsl_base_type(enum
> glsl_base_type base_type)
> case GLSL_TYPE_FLOAT:
>return nir_type_float32;
>break;
> +   case GLSL_TYPE_HALF_FLOAT:
> +  return nir_type_float16;
> +  break;
> case GLSL_TYPE_DOUBLE:
>return nir_type_float64;
>break;
> diff --git a/src/compiler/nir/nir_split_var_copies.c
> b/src/compiler/nir/nir_split_var_copies.c
> index 15a185e..1ed9e81 100644
> --- a/src/compiler/nir/nir_split_var_copies.c
> +++ b/src/compiler/nir/nir_split_var_copies.c
> @@ -147,10 +147,13 @@ split_var_copy_instr(nir_intrinsic_instr
> *old_copy,
>break;
> 
> case GLSL_TYPE_UINT:
> +   case GLSL_TYPE_UINT16:
> case GLSL_TYPE_UINT64:
> case GLSL_TYPE_INT:
> +   case GLSL_TYPE_INT16:
> case GLSL_TYPE_INT64:
> case GLSL_TYPE_FLOAT:
> +   case GLSL_TYPE_HALF_FLOAT:
> case GLSL_TYPE_DOUBLE:
> case GLSL_TYPE_BOOL:
>if (glsl_type_is_matrix(src_tail->type)) {
> @@ -229,6 +232,7 @@ split_var_copies_block(nir_block *block, struct
> split_var_copies_state *state)
>   ralloc_steal(state->dead_ctx, instr);
>   break;
>case GLSL_TYPE_FLOAT:
> +  case GLSL_TYPE_HALF_FLOAT:
>case GLSL_TYPE_DOUBLE:
>   if (glsl_type_is_matrix(src_tail->type)) {
>  split_var_copy_instr(intrinsic, dest_head, src_head,
> @@ -239,6 +243,8 @@ split_var_copies_block(nir_block *block, struct
> split_var_copies_state *state)
>   break;
>case GLSL_TYPE_INT:
>case GLSL_TYPE_UINT:
> +  case GLSL_TYPE_INT16:
> +  case GLSL_TYPE_UINT16:
>case GLSL_TYPE_INT64:
>case GLSL_TYPE_UINT64:
>case GLSL_TYPE_BOOL:
> diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
> index 25980b9..11524c2 100644
> --- a/src/compiler/nir_types.cpp
> +++ b/src/compiler/nir_types.cpp
> @@ -259,6 +259,12 @@ glsl_double_type(void)
>  }
> 
>  const glsl_type *
> +glsl_half_float_type(void)
> 
> 
> This should be glsl_float16_t_type() to match glsl_type::float16_t_type.
> 
> Also, one could argue that these belong in the patch which adds 16-bit
> 

Re: [Mesa-dev] [PATCH 2/2] gallium/os: fix os_time_get_nano() to roll over less

[Frank Richter]

Hi,
On 17.08.2017 02:34, Brian Paul wrote:

BTW, I wonder if we would win by using lldiv().  Because this is often
use for performance measurements, so these extra division might add some
impact.


Frank, do you want to look into that?  In the mean time, I'll push the 
patches as-is.


AFAICS, the lldiv implementation in the MSVC runtime (also used by 
MinGW) simply does “a = num / denom; b = num % denom;” as well, so it 
seems unlikely that lldiv() would give a benefit here.


-f.r.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev