On Sat, May 26, 2018 at 11:13 AM, Jason Ekstrand
wrote:
> On May 25, 2018 23:43:33 Marek Olšák wrote:
>
>> On Thu, May 24, 2018 at 6:46 AM, Daniel Stone
>> wrote:
>>
>>> Hi all,
>>> I'm going to attempt to interleave a bunch of
Jason Ekstrand writes:
> On Sat, May 26, 2018 at 3:36 PM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > On Sat, May 26, 2018 at 2:03 PM, Francisco Jerez
>> > wrote:
>> >
>> >> Jason
On Sat, May 26, 2018 at 3:36 PM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > On Sat, May 26, 2018 at 2:03 PM, Francisco Jerez
> > wrote:
> >
> >> Jason Ekstrand writes:
> >>
> >> > On Sat, May
On Saturday, May 26, 2018 2:18:52 AM PDT Mauro Rossi wrote:
> Add building rules for libmesa_intel_tiled_memcpy for Android
> and related whole static dependency in i965_dri
>
> Fixes: d21c086d81 ("i965/tiled_memcpy: inline movntdqa loads in
> tiled_to_linear")
> Signed-off-by: Mauro Rossi
Jason Ekstrand writes:
> On Sat, May 26, 2018 at 2:03 PM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > On Sat, May 26, 2018 at 12:21 PM, Francisco Jerez > >
>> > wrote:
>> >
>> >> Jason
On Sat, May 26, 2018 at 2:03 PM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > On Sat, May 26, 2018 at 12:21 PM, Francisco Jerez >
> > wrote:
> >
> >> Jason Ekstrand writes:
> >>
> >> > On Sat,
Francisco Jerez writes:
> Jason Ekstrand writes:
>
>> On Sat, May 26, 2018 at 12:15 PM, Francisco Jerez
>> wrote:
>>
>>> Jason Ekstrand writes:
>>>
>>> > On Sat, May 26, 2018 at 11:27 AM, Francisco Jerez
Jason Ekstrand writes:
> On Sat, May 26, 2018 at 12:15 PM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > On Sat, May 26, 2018 at 11:27 AM, Francisco Jerez > >
>> > wrote:
>> >
>> >> Jason
One must not assume that compiling swr on non-Windows platforms is always
done for 64 bit archs. For instance in an Gentoo multiarch installation if
swr is enabled, it will be build for all archs.
Fixes: fa4ab7910e3492b09b40e00c0b82a7bb1bae03d0
swr/rast: Add some SIMD_T utility functors
Jason Ekstrand writes:
> On Sat, May 26, 2018 at 12:21 PM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > On Sat, May 26, 2018 at 11:10 AM, Francisco Jerez > >
>> > wrote:
>> >
>> >> Jason
Literally the same as the AMD ext.
Passes *indirect_draw_count* CTS tests.
---
src/amd/vulkan/radv_cmd_buffer.c | 49 +++
src/amd/vulkan/radv_extensions.py | 1 +
2 files changed, 50 insertions(+)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c
https://bugs.freedesktop.org/show_bug.cgi?id=106670
Ernst Sjöstrand changed:
What|Removed |Added
Product|Mesa|DRI
On Sat, May 26, 2018 at 12:15 PM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > On Sat, May 26, 2018 at 11:27 AM, Francisco Jerez >
> > wrote:
> >
> >> Jason Ekstrand writes:
> >>
> >> > Doing
On Sat, May 26, 2018 at 12:21 PM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > On Sat, May 26, 2018 at 11:10 AM, Francisco Jerez >
> > wrote:
> >
> >> Jason Ekstrand writes:
> >>
> >> > From:
Jason Ekstrand writes:
> On Sat, May 26, 2018 at 11:10 AM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > From: Francisco Jerez
>> >
>> > When we don't have PLN (gen4 and gen11+), we
Jason Ekstrand writes:
> On Sat, May 26, 2018 at 11:27 AM, Francisco Jerez
> wrote:
>
>> Jason Ekstrand writes:
>>
>> > Doing instruction header setup in the generator is aweful for a number
>> > of reasons. For one, we can't
On Sat, May 26, 2018 at 11:27 AM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > Doing instruction header setup in the generator is aweful for a number
> > of reasons. For one, we can't schedule the header setup at all. For
> > another, it
On Sat, May 26, 2018 at 11:10 AM, Francisco Jerez
wrote:
> Jason Ekstrand writes:
>
> > From: Francisco Jerez
> >
> > When we don't have PLN (gen4 and gen11+), we implement LINTERP as either
> > LINE+MAC or a pair of MADs. In
Jason Ekstrand writes:
> Doing instruction header setup in the generator is aweful for a number
> of reasons. For one, we can't schedule the header setup at all. For
> another, it means lots of implied writes which the instruction scheduler
> and other passes can't
Jason Ekstrand writes:
> From: Francisco Jerez
>
> When we don't have PLN (gen4 and gen11+), we implement LINTERP as either
> LINE+MAC or a pair of MADs. In both cases, the accumulator is written
> by the first of the two instructions and read by
https://bugs.freedesktop.org/show_bug.cgi?id=106670
Bug ID: 106670
Summary: AMD GPU Error, random lockup, Ryzen 2500U Vega 8 GPU
Product: Mesa
Version: 18.0
Hardware: Other
OS: All
Status: NEW
Severity:
In cases like
IDIV TEMP[0].xy TEMP[0].xx TEMP[1].yy
the result will be written to the same register that is also a source register.
Since the components are evaluated one by one, this may result in overwriting
the source value for a later operation. Work around this by adding another
Make sure only those components are written to that are specified in the
write mask.
Fixes:
dEQP-GLES2.functional.shaders.operator.common_functions.sign.lowp_float_vertex
dEQP-GLES2.functional.shaders.operator.common_functions.sign.lowp_float_fragment
The limit to the working set of a single batch is the amount we can fit
into the GTT. The GTT is a per-context address space, so query the
context rather than use an estimate based on the legacy global aperture.
Futhermore, we can fine tune our soft-limit based on the knowledge of
whether we are
On May 25, 2018 23:43:33 Marek Olšák wrote:
On Thu, May 24, 2018 at 6:46 AM, Daniel Stone wrote:
Hi all,
I'm going to attempt to interleave a bunch of replies here.
On 23 May 2018 at 20:34, Jason Ekstrand wrote:
The
On 2018-05-23 — 15:51, Dylan Baker wrote:
> Quoting Pierre Moreau (2018-05-23 14:43:10)
> > Signed-off-by: Pierre Moreau
> > ---
> > Changes in:
> > - v7: Replace the llvm-spirv repository by the new official
> > SPIRV-LLVM-Translator
> >
> > configure.ac | 18
Add building rules for libmesa_intel_tiled_memcpy for Android
and related whole static dependency in i965_dri
Fixes: d21c086d81 ("i965/tiled_memcpy: inline movntdqa loads in
tiled_to_linear")
Signed-off-by: Mauro Rossi
---
src/mesa/drivers/dri/i965/Android.mk | 25
https://bugs.freedesktop.org/show_bug.cgi?id=106665
--- Comment #1 from Mauro Rossi ---
Created attachment 139788
--> https://bugs.freedesktop.org/attachment.cgi?id=139788=edit
GPG key
--
You are receiving this mail because:
You are the assignee for the bug.
You are
https://bugs.freedesktop.org/show_bug.cgi?id=106665
Bug ID: 106665
Summary: Account request for Mauro Rossi
Product: Mesa
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severity: normal
On Thu, May 24, 2018 at 6:46 AM, Daniel Stone wrote:
> Hi all,
> I'm going to attempt to interleave a bunch of replies here.
>
> On 23 May 2018 at 20:34, Jason Ekstrand wrote:
> > The freedesktop.org admins are trying to move as many projects and
>
30 matches
Mail list logo