[Mesa-dev] [Bug 108544] logic error in file configure.ac

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108544

Bug ID: 108544
   Summary: logic error in file configure.ac
   Product: Mesa
   Version: 18.1
  Hardware: ARM
OS: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: Other
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: zhaowei.y...@samsung.com
QA Contact: mesa-dev@lists.freedesktop.org

Hi,

Following codes can be found from file configure.ac:

drm)
test "x$enable_gbm" = "xno" &&
AC_MSG_ERROR([EGL platform drm needs gbm])
DEFINES="$DEFINES -DHAVE_DRM_PLATFORM"
;;

It doesn't make sense, if enable_gbm is "no", then should output the error
message and stop auto-configuring

So, it seems it should be modified as:
drm)
if test "x$enable_gbm" = "xno"; then
AC_MSG_ERROR([EGL platform drm needs gbm])
fi
DEFINES="$DEFINES -DHAVE_DRM_PLATFORM"
;;

If I'm right, I'd like to commit a patch to fix it

Thanks

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[Mesa-dev] [PATCH] intel/compiler: Print message descriptor as immediate source

2018-10-24 Thread Sagar Ghuge 
While disassembling send(c) instruction print message descriptor as
immediate source operand along with message descriptor. This allows
assembler to read immediate source operand and set bits accordingly.

Signed-off-by: Sagar Ghuge 
---
 src/intel/compiler/brw_disasm.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 6a7e988641..9c6df9e645 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1606,7 +1606,12 @@ brw_disassemble_inst(FILE *file, const struct 
gen_device_info *devinfo,
  /* show the indirect descriptor source */
  pad(file, 48);
  err |= src1(file, devinfo, inst);
-  }
+ pad(file, 64);
+  } else
+ pad(file, 48);
+
+  /* Print message descriptor as immediate source */
+  fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32);
 
   newline(file);
   pad(file, 16);
@@ -1615,7 +1620,7 @@ brw_disassemble_inst(FILE *file, const struct 
gen_device_info *devinfo,
   fprintf(file, "");
   err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
  sfid, );
-
+  string(file, " MsgDesc:");
 
   if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
  format(file, " indirect");
-- 
2.17.1

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[Mesa-dev] [PATCH 2/3] blorp/clear: Take a devinfo and isl_surf in can_hiz_clear_depth

2018-10-24 Thread Jason Ekstrand 
We're going to need more information from the surface.  May as well
future-proof the function while we're at it.
---
 src/intel/blorp/blorp.h|  4 ++--
 src/intel/blorp/blorp_clear.c  | 10 +-
 src/intel/vulkan/genX_cmd_buffer.c |  5 ++---
 3 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 81d2cb7b280..9bf62aaa8ae 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -185,8 +185,8 @@ blorp_clear_depth_stencil(struct blorp_batch *batch,
   bool clear_depth, float depth_value,
   uint8_t stencil_mask, uint8_t stencil_value);
 bool
-blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format,
-  uint32_t num_samples,
+blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo,
+  const struct isl_surf *surf, uint32_t level,
   uint32_t x0, uint32_t y0,
   uint32_t x1, uint32_t y1);
 void
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 03badf83ada..7f0d3b70993 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -661,14 +661,14 @@ is_full_surface_clear(const struct isl_surf *surf, 
uint32_t level,
 }
 
 bool
-blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format,
-  uint32_t num_samples,
+blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo,
+  const struct isl_surf *surf, uint32_t level,
   uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1)
 {
/* This function currently doesn't support any gen prior to gen8 */
-   assert(gen >= 8);
+   assert(devinfo->gen >= 8);
 
-   if (gen == 8 && format == ISL_FORMAT_R16_UNORM) {
+   if (devinfo->gen == 8 && surf->format == ISL_FORMAT_R16_UNORM) {
   /* Apply the D16 alignment restrictions. On BDW, HiZ has an 8x4 sample
* block with the following property: as the number of samples increases,
* the number of pixels representable by this block decreases by a factor
@@ -687,7 +687,7 @@ blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format 
format,
* Table: Pixel Dimensions in a HiZ Sample Block Pre-SKL
*/
   const struct isl_extent2d sa_block_dim =
- isl_get_interleaved_msaa_px_size_sa(num_samples);
+ isl_get_interleaved_msaa_px_size_sa(surf->samples);
   const uint8_t align_px_w = 8 / sa_block_dim.w;
   const uint8_t align_px_h = 4 / sa_block_dim.h;
 
diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index 8457ccf0882..12bf7d3bd35 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -406,9 +406,8 @@ depth_stencil_attachment_compute_aux_usage(struct 
anv_device *device,
if (first_subpass_aux_usage != ISL_AUX_USAGE_HIZ)
   return;
 
-   if (!blorp_can_hiz_clear_depth(GEN_GEN,
-  iview->planes[0].isl.format,
-  iview->image->samples,
+   if (!blorp_can_hiz_clear_depth(>info,
+  >image->planes[0].surface.isl, 0,
   render_area.offset.x,
   render_area.offset.y,
   render_area.offset.x +
-- 
2.19.1

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[Mesa-dev] [PATCH 3/3] intel/blorp: Work around HiZ clear bugs on Sky Lake

2018-10-24 Thread Jason Ekstrand 
---
 src/intel/blorp/blorp_clear.c | 49 +++
 1 file changed, 49 insertions(+)

diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 7f0d3b70993..82672dd2282 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -708,6 +708,55 @@ blorp_can_hiz_clear_depth(const struct gen_device_info 
*devinfo,
   x1 % align_px_w || y1 % align_px_h)
  return false;
}
+
+   if (devinfo->gen >= 9) {
+  /* We can always do full-surface clears */
+  if (is_full_surface_clear(surf, level, x0, y0, x1, y1))
+ return true;
+
+  /* The Bspec says the following about fast depth clears on Sky Lake:
+   *
+   *"The minimum granularity of clear is one pixel, but all samples of
+   *the pixel must be cleared. Clearing partial samples of a pixel is
+   *not supported. If a newly allocated depth buffer is not padded to
+   *an integer multiple of 8x4 pixels, and if the first operation on
+   *the depth buffer does not clear the entire width and height of the
+   *surface, then first a HiZ ambiguate must be done on the portions
+   *of the depth buffer that are not cleared. If the depth buffer
+   *clear operation does clear the entire width and height of the
+   *surface, then the “full surface clear” bit in 3DSTATE_WM_OP must
+   *be set to 1."
+   *
+   * This seems to imply that HiZ clears should "just work" on Sky Lake.
+   * Unfortunately, that is not true in all cases.  It works for the most
+   * part but if the clear encounters a block in the pass-through state
+   * (i.e. one that has been touched by an ambiguate/hiz resolve) it falls
+   * over and just does nothing.
+   *
+   * The following table of alignments was determined experimentally using
+   * the crucible test group func.renderpass.depth-partial-clear.*
+   *
+   * TODO: Test on future hardware
+   */
+  unsigned x_align_px, y_align_px;
+  if (surf->format == ISL_FORMAT_R16_UNORM && surf->samples == 1) {
+ x_align_px = 8;
+ y_align_px = 4;
+  } else if (surf->samples <= 2) {
+ x_align_px = 4;
+ y_align_px = 4;
+  } else if (surf->format == ISL_FORMAT_R16_UNORM && surf->samples == 4) {
+ x_align_px = 4;
+ y_align_px = 2;
+  } else {
+ x_align_px = 2;
+ y_align_px = 2;
+  }
+  if (x0 % x_align_px || y0 % y_align_px ||
+  x1 % x_align_px || y1 % y_align_px)
+ return false;
+   }
+
return true;
 }
 
-- 
2.19.1

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[Mesa-dev] [Bug 107369] "volatile" in OpenCL code not recognized when compiling with -fstack-protector

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=107369

--- Comment #16 from Stuart Young  ---
There's a fix for this in the Debian experimental package for libclc. If you
haven't already done so and this bug affects you, please test and give feedback
on the Debian bug.

Related links:
 Tracker: https://tracker.debian.org/pkg/libclc
 Pkg change detail:
https://tracker.debian.org/news/994503/accepted-libclc-020git20180917-2-source-into-experimental/
 Debian bug report: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=904718

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Re: [Mesa-dev] [PATCH] mesa: allow EXT_texture_compression_s3tc on ES2

2018-10-24 Thread Marek Olšák 
On Wed, Oct 24, 2018 at 12:34 PM Erik Faye-Lund <
erik.faye-l...@collabora.com> wrote:

> On Thu, 2018-10-18 at 15:42 -0400, Marek Olšák wrote:
> > I think you need something like this:
> >
>
> https://cgit.freedesktop.org/~mareko/mesa/commit/?h=amd-extension-pack=ad774f9db1d735811a8d830ad90a2f8208aa0a7b
> >
>
> Thanks, this looks correct to me.
>
> I've ported some of the piglit s3tc tests to gles2, and they all seem
> to pass with your patch:
>
> https://patchwork.freedesktop.org/series/51467/
>
> Do you mind if I add a "Tested-by"-tag and submit a v2 with your patch
> instead?
>

Feel free to do it.

Marek
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[Mesa-dev] [PATCH v2] st/nine: Reduce MaxSimultaneousTextures to 8

2018-10-24 Thread Axel Davy 
Windows drivers don't set this flag (which affects ff) to more than 8.

Do the same in case some games check for 8.

v2: Remove any dependence on MaxSimultaneousTextures. For non-ff
the number of textures is 16 when the device is able of vs/ps3.
Add this requirement of 16 textures to the driver requirements.

Signed-off-by: Axel Davy 
---
Thanks to our tester iive who spotted the issue.
 src/gallium/state_trackers/nine/adapter9.c | 9 -
 src/gallium/state_trackers/nine/device9.c  | 8 
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/src/gallium/state_trackers/nine/adapter9.c 
b/src/gallium/state_trackers/nine/adapter9.c
index 2fa92e4207b..0634d5918ce 100644
--- a/src/gallium/state_trackers/nine/adapter9.c
+++ b/src/gallium/state_trackers/nine/adapter9.c
@@ -77,7 +77,9 @@ NineAdapter9_ctor( struct NineAdapter9 *This,
 hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
   PIPE_SHADER_CAP_MAX_INPUTS) < 16 ||
 hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
-  PIPE_SHADER_CAP_MAX_INPUTS) < 10) {
+  PIPE_SHADER_CAP_MAX_INPUTS) < 10 ||
+hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
+  PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS) < 16) {
 ERR("Your card is not supported by Gallium Nine. Minimum requirement "
 "is >= r500, >= nv50, >= i965\n");
 return D3DERR_DRIVERINTERNALERROR;
@@ -789,10 +791,7 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
 
 pCaps->MaxTextureBlendStages = 8; /* XXX wine */
 (DWORD)screen->get_param(screen, PIPE_CAP_BLEND_EQUATION_SEPARATE);
-pCaps->MaxSimultaneousTextures = screen->get_shader_param(screen,
-PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
-if (pCaps->MaxSimultaneousTextures > NINE_MAX_SAMPLERS_PS)
-pCaps->MaxSimultaneousTextures = NINE_MAX_SAMPLERS_PS;
+pCaps->MaxSimultaneousTextures = 8;
 
 pCaps->VertexProcessingCaps = D3DVTXPCAPS_TEXGEN |
   D3DVTXPCAPS_TEXGEN_SPHEREMAP |
diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index ae8733027e8..24c8ce062b3 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -2451,7 +2451,7 @@ NineDevice9_GetTexture( struct NineDevice9 *This,
 DWORD Stage,
 IDirect3DBaseTexture9 **ppTexture )
 {
-user_assert(Stage < This->caps.MaxSimultaneousTextures ||
+user_assert(Stage < NINE_MAX_SAMPLERS_PS ||
 Stage == D3DDMAPSAMPLER ||
 (Stage >= D3DVERTEXTEXTURESAMPLER0 &&
  Stage <= D3DVERTEXTEXTURESAMPLER3), D3DERR_INVALIDCALL);
@@ -2478,7 +2478,7 @@ NineDevice9_SetTexture( struct NineDevice9 *This,
 
 DBG("This=%p Stage=%u pTexture=%p\n", This, Stage, pTexture);
 
-user_assert(Stage < This->caps.MaxSimultaneousTextures ||
+user_assert(Stage < NINE_MAX_SAMPLERS_PS ||
 Stage == D3DDMAPSAMPLER ||
 (Stage >= D3DVERTEXTEXTURESAMPLER0 &&
  Stage <= D3DVERTEXTEXTURESAMPLER3), D3DERR_INVALIDCALL);
@@ -2552,7 +2552,7 @@ NineDevice9_GetSamplerState( struct NineDevice9 *This,
  D3DSAMPLERSTATETYPE Type,
  DWORD *pValue )
 {
-user_assert(Sampler < This->caps.MaxSimultaneousTextures ||
+user_assert(Sampler < NINE_MAX_SAMPLERS_PS ||
 Sampler == D3DDMAPSAMPLER ||
 (Sampler >= D3DVERTEXTEXTURESAMPLER0 &&
  Sampler <= D3DVERTEXTEXTURESAMPLER3), D3DERR_INVALIDCALL);
@@ -2575,7 +2575,7 @@ NineDevice9_SetSamplerState( struct NineDevice9 *This,
 DBG("This=%p Sampler=%u Type=%s Value=%08x\n", This,
 Sampler, nine_D3DSAMP_to_str(Type), Value);
 
-user_assert(Sampler < This->caps.MaxSimultaneousTextures ||
+user_assert(Sampler < NINE_MAX_SAMPLERS_PS ||
 Sampler == D3DDMAPSAMPLER ||
 (Sampler >= D3DVERTEXTEXTURESAMPLER0 &&
  Sampler <= D3DVERTEXTEXTURESAMPLER3), D3DERR_INVALIDCALL);
-- 
2.19.1

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Re: [Mesa-dev] [PATCH mesa] util: remove unnecessary random whitespaces

2018-10-24 Thread Ian Romanick 
On 10/23/2018 04:15 AM, Eric Engestrom wrote:
> Suggested-by: Timothy Arceri 
> Signed-off-by: Eric Engestrom 
> ---
> Timothy, I opted to remove them all instead of adding even more, as it
> would break again next time something changes (the set_foreach() one was
> already broken before my patch for instance) and result in lots of
> unnecessary churn for seemingly no gain, and I don't like hiding the
> backslash away (it hinders readability).

NAK... we use this formatting everywhere in Mesa.  The point is to move
the \ characters out of the way.  When you're trying to read a
multi-line macro, they are distracting, so it is nice to move them over.

> ---
>  src/util/hash_table.h | 6 +++---
>  src/util/set.h| 6 +++---
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/src/util/hash_table.h b/src/util/hash_table.h
> index b96cd6146960a6a6f8a1..b9c9dfa01aeaa5e9cac1 100644
> --- a/src/util/hash_table.h
> +++ b/src/util/hash_table.h
> @@ -139,9 +139,9 @@ _mesa_fnv32_1a_accumulate_block(uint32_t hash, const void 
> *data, size_t size)
>   * an entry's data with the deleted marker), but not against insertion
>   * (which may rehash the table, making entry a dangling pointer).
>   */
> -#define hash_table_foreach(ht, entry)   \
> -   for (struct hash_entry *entry = _mesa_hash_table_next_entry(ht, NULL);  \
> -entry != NULL;  \
> +#define hash_table_foreach(ht, entry) \
> +   for (struct hash_entry *entry = _mesa_hash_table_next_entry(ht, NULL); \
> +entry != NULL; \
>  entry = _mesa_hash_table_next_entry(ht, entry))
>  
>  static inline void
> diff --git a/src/util/set.h b/src/util/set.h
> index 3c9abfe77128292557ec..4307f4732fd4fde132a0 100644
> --- a/src/util/set.h
> +++ b/src/util/set.h
> @@ -96,9 +96,9 @@ _mesa_set_random_entry(struct set *set,
>   * insertion (which may rehash the set, making entry a dangling
>   * pointer).
>   */
> -#define set_foreach(set, entry)  \
> -   for (struct set_entry *entry = _mesa_set_next_entry(set, NULL);  \
> -entry != NULL;   \
> +#define set_foreach(set, entry) \
> +   for (struct set_entry *entry = _mesa_set_next_entry(set, NULL); \
> +entry != NULL; \
>  entry = _mesa_set_next_entry(set, entry))
>  
>  #ifdef __cplusplus
> 

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[Mesa-dev] [Bug 107765] [regression] Batman Arkham City crashes with DXVK under wine

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=107765

--- Comment #17 from farmboy0+freedesk...@googlemail.com ---
I didnt notice any.

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[Mesa-dev] [PATCH] intel/compiler: Print hex representation along with floating point value

2018-10-24 Thread Sagar Ghuge 
While encoding the immediate floating point values in instruction we use
values upto precision 9, but while disassembling, we print precision to
6 places, which round up the value and gives wrong interpretation for
encoded immediate constant.

To avoid misinterpretation of encoded immediate values in instruction
and disassembled output, print hex representation along with floating
point value which can be used by assembler in future.

Signed-off-by: Sagar Ghuge 
---
 src/intel/compiler/brw_disasm.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 322f4544df..6a7e988641 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1283,7 +1283,9 @@ imm(FILE *file, const struct gen_device_info *devinfo, 
enum brw_reg_type type,
   format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
   break;
case BRW_REGISTER_TYPE_VF:
-  format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
+  format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96));
+  pad(file, 48);
+  format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
  brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
  brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
  brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
@@ -1293,10 +1295,14 @@ imm(FILE *file, const struct gen_device_info *devinfo, 
enum brw_reg_type type,
   format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
   break;
case BRW_REGISTER_TYPE_F:
-  format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
+  format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96));
+  pad(file, 48);
+  format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst));
   break;
case BRW_REGISTER_TYPE_DF:
-  format(file, "%-gDF", brw_inst_imm_df(devinfo, inst));
+  format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64));
+  pad(file, 48);
+  format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst));
   break;
case BRW_REGISTER_TYPE_HF:
   string(file, "Half Float IMM");
-- 
2.17.1

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[Mesa-dev] [Bug 107765] [regression] Batman Arkham City crashes with DXVK under wine

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=107765

--- Comment #16 from Samuel Pitoiset  ---
Cool, do you have any rendering issues with that branch?

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[Mesa-dev] [Bug 107765] [regression] Batman Arkham City crashes with DXVK under wine

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=107765

--- Comment #15 from farmboy0+freedesk...@googlemail.com ---
With this branch I ma successfully able to run Batman: Arkham City on my
system.

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[Mesa-dev] [PATCH 04/12] st/nine: Mark transform matrices dirty for D3DSBT_ALL

2018-10-24 Thread Axel Davy 
D3DSBT_ALL stateblocks capture the transform matrices.

Fixes some d3d test programs not displaying properly.

Signed-off-by: Axel Davy 
---
Notice without the previous patch, D3DSBT_ALL stateblocks
would send hundreds of identity matrices to the context
every apply.
 src/gallium/state_trackers/nine/device9.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index 3b174587a44..25a8172b3fd 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -2376,13 +2376,24 @@ NineDevice9_CreateStateBlock( struct NineDevice9 *This,
   NINE_STATE_IDXBUF |
   NINE_STATE_FF_MATERIAL |
   NINE_STATE_BLEND_COLOR |
-  NINE_STATE_SAMPLE_MASK;
+  NINE_STATE_SAMPLE_MASK |
+  NINE_STATE_FF_VSTRANSF;
memset(dst->changed.rs, ~0, (D3DRS_COUNT / 32) * sizeof(uint32_t));
dst->changed.rs[D3DRS_LAST / 32] |= (1 << (D3DRS_COUNT % 32)) - 1;
dst->changed.vtxbuf = (1ULL << This->caps.MaxStreams) - 1;
dst->changed.stream_freq = dst->changed.vtxbuf;
dst->changed.ucp = (1 << PIPE_MAX_CLIP_PLANES) - 1;
dst->changed.texture = (1 << NINE_MAX_SAMPLERS) - 1;
+   /* The doc says the projection, world, view and texture matrices
+* are saved, which would translate to:
+* dst->ff.changed.transform[0] = 0x00FF000C;
+* dst->ff.changed.transform[D3DTS_WORLD / 32] |= 1 << (D3DTS_WORLD % 
32);
+* However we assume they meant save everything (which is basically 
just the
+* above plus the other world matrices).
+*/
+   dst->ff.changed.transform[0] = 0x00FF000C;
+   for (s = 0; s < 8; s++)
+   dst->ff.changed.transform[8+s] = ~0;
 }
 NineStateBlock9_Capture(NineStateBlock9(*ppSB));
 
-- 
2.19.1

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[Mesa-dev] [PATCH 12/12] st/nine: Handle window resize when a presentation buffer is used

2018-10-24 Thread Axel Davy 
Usually when a window is resized, the app calls d3d to resize the back
buffer to the window size. In some cases, it is not done,
and it expects the output resizes to the window size, even if
the back buffer size is unchanged.

This patch introduces the behaviour when a presentation buffer
is used.

ID3DPresent_GetWindowInfo is a function available with
D3DPresent v1.0, and thus we don't need to check if the
function is available.
The function had been introduced to implement this very
feature.

Signed-off-by: Axel Davy 
---
A presentation buffer is used when multisampling is used
or when thread_submit=true is used (this is useful for prime).
I have another patch that switches to presentation buffer when this
resizing behaviour is needed, however it is not ready for merge.
Having the behaviour for this subset of cases is already better than
nothing.
 src/gallium/state_trackers/nine/swapchain9.c | 31 +++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/swapchain9.c 
b/src/gallium/state_trackers/nine/swapchain9.c
index aa485a6268b..cd77081e915 100644
--- a/src/gallium/state_trackers/nine/swapchain9.c
+++ b/src/gallium/state_trackers/nine/swapchain9.c
@@ -662,6 +662,7 @@ present( struct NineSwapChain9 *This,
 struct pipe_fence_handle *fence;
 HRESULT hr;
 struct pipe_blit_info blit;
+int target_width, target_height, target_depth;
 
 DBG("present: This=%p pSourceRect=%p pDestRect=%p "
 "pDirtyRegion=%p hDestWindowOverride=%p"
@@ -696,6 +697,9 @@ present( struct NineSwapChain9 *This,
 if (This->params.SwapEffect == D3DSWAPEFFECT_DISCARD)
 handle_draw_cursor_and_hud(This, resource);
 
+ID3DPresent_GetWindowInfo(This->present, hDestWindowOverride, 
_width, _height, _depth);
+(void)target_depth;
+
 pipe = NineDevice9_GetPipe(This->base.device);
 
 if (This->present_buffers[0]) {
@@ -710,6 +714,29 @@ present( struct NineSwapChain9 *This,
 blit.src.box.width = resource->width0;
 blit.src.box.height = resource->height0;
 
+/* Reallocate a new presentation buffer if the target window
+ * size has changed */
+if (target_width != This->present_buffers[0]->width0 ||
+target_height != This->present_buffers[0]->height0) {
+struct pipe_resource *new_resource;
+D3DWindowBuffer *new_handle;
+
+create_present_buffer(This, target_width, target_height, 
_resource, _handle);
+/* Switch to the new buffer */
+if (new_handle) {
+/* WaitBufferReleased also waits the presentation feedback,
+ * while IsBufferReleased doesn't. DestroyD3DWindowBuffer 
unfortunately
+ * checks it to release immediately all data, else the release
+ * is postponed for This->present release. To avoid leaks (we 
may handle
+ * a lot of resize), call WaitBufferReleased. */
+ID3DPresent_WaitBufferReleased(This->present, 
This->present_handles[0]);
+ID3DPresent_DestroyD3DWindowBuffer(This->present, 
This->present_handles[0]);
+This->present_handles[0] = new_handle;
+pipe_resource_reference(>present_buffers[0], 
new_resource);
+pipe_resource_reference(_resource, NULL);
+}
+}
+
 resource = This->present_buffers[0];
 
 blit.dst.resource = resource;
@@ -723,7 +750,9 @@ present( struct NineSwapChain9 *This,
 blit.dst.box.height = resource->height0;
 
 blit.mask = PIPE_MASK_RGBA;
-blit.filter = PIPE_TEX_FILTER_NEAREST;
+blit.filter = (blit.dst.box.width == blit.src.box.width &&
+   blit.dst.box.height == blit.src.box.height) ?
+  PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR;
 blit.scissor_enable = FALSE;
 blit.alpha_blend = FALSE;
 
-- 
2.19.1

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[Mesa-dev] [PATCH 11/12] d3dadapter: Fix wrong naming in header file

2018-10-24 Thread Axel Davy 
GetWindowInfo used to be GetWindowSize before gallium
nine was merged. A left-over remained...

Signed-off-by: Axel Davy 
---
 include/d3dadapter/present.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/d3dadapter/present.h b/include/d3dadapter/present.h
index 95e8d679e35..0325ebc511f 100644
--- a/include/d3dadapter/present.h
+++ b/include/d3dadapter/present.h
@@ -125,7 +125,7 @@ struct ID3DPresent
 #define ID3DPresent_SetCursorPos(p,a) (p)->lpVtbl->SetCursorPos(p,a)
 #define ID3DPresent_SetCursor(p,a,b,c) (p)->lpVtbl->SetCursor(p,a,b,c)
 #define ID3DPresent_SetGammaRamp(p,a,b) (p)->lpVtbl->SetGammaRamp(p,a,b)
-#define ID3DPresent_GetWindowInfo(p,a,b,c,d) 
(p)->lpVtbl->GetWindowSize(p,a,b,c,d)
+#define ID3DPresent_GetWindowInfo(p,a,b,c,d) 
(p)->lpVtbl->GetWindowInfo(p,a,b,c,d)
 #define ID3DPresent_GetWindowOccluded(p) (p)->lpVtbl->GetWindowOccluded(p)
 #define ID3DPresent_ResolutionMismatch(p) (p)->lpVtbl->ResolutionMismatch(p)
 #define ID3DPresent_CreateThread(p,a,b) (p)->lpVtbl->CreateThread(p,a,b)
-- 
2.19.1

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[Mesa-dev] [PATCH 07/12] st/nine: Fix aliasing states for stateblocks

2018-10-24 Thread Axel Davy 
If NINE_STATE_FF_MATERIAL is set, the stateblock will upload
its recorded materials matrix.
If NINE_STATE_FF_LIGHTING is set, the lighting set is uploaded.

These flags could be set by a NineDevice9_SetTransform call
or by setting some states related to ff, but that shouldn't trigger
these stateblock behaviours.

We don't need to follow the context states dirtied by render states.
NINE_STATE_FF_VSTRANSF is exactly the state controlling stateblock
updates of transformation matrices, NINE_STATE_FF is too broad.

These two changes avoid setting the two mentionned states when we
shouldn't.

Fixes: https://github.com/iXit/Mesa-3D/issues/320

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/device9.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index 461b212995b..1a3f2c3285b 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -2014,7 +2014,7 @@ NineDevice9_SetTransform( struct NineDevice9 *This,
 *M = *pMatrix;
 if (unlikely(This->is_recording)) {
 state->ff.changed.transform[State / 32] |= 1 << (State % 32);
-state->changed.group |= NINE_STATE_FF;
+state->changed.group |= NINE_STATE_FF_VSTRANSF;
 } else
 nine_context_set_transform(This, State, pMatrix);
 
@@ -2261,7 +2261,6 @@ NineDevice9_SetRenderState( struct NineDevice9 *This,
 state->rs_advertised[State] = Value;
 /* only need to record changed render states for stateblocks */
 state->changed.rs[State / 32] |= 1 << (State % 32);
-state->changed.group |= nine_render_state_group[State];
 return D3D_OK;
 }
 
-- 
2.19.1

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[Mesa-dev] [PATCH 08/12] st/nine: Do not set unused states for stateblocks

2018-10-24 Thread Axel Davy 
A lot of these states are used only for the context,
and are unused for stateblocks (which just uses the
changed.* fields instead for a lot of them).

Signed-off-by: Axel Davy 
---
Before we implemented csmt, which separated the 'context' states and the
application visible states + the stateblocks, setting these states
was required to have the context states update properly.
Now they live in a different world.
A valid complaint for this patchset would be that it would be less
confusing to rename all NINE_STATE_* flags, such that the context
would use states of different names than stateblocks to reduce confusion.
I'm open for discussion, and may do this renaming in a future patch if
convinced.
 src/gallium/state_trackers/nine/device9.c | 24 +++
 1 file changed, 3 insertions(+), 21 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index 1a3f2c3285b..ae8733027e8 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -2315,9 +2315,7 @@ NineDevice9_CreateStateBlock( struct NineDevice9 *This,
 *ppSB = (IDirect3DStateBlock9 *)nsb;
 dst = >state;
 
-dst->changed.group =
-   NINE_STATE_TEXTURE |
-   NINE_STATE_SAMPLER;
+dst->changed.group = NINE_STATE_SAMPLER;
 
 if (Type == D3DSBT_ALL || Type == D3DSBT_VERTEXSTATE) {
dst->changed.group |=
@@ -2350,10 +2348,7 @@ NineDevice9_CreateStateBlock( struct NineDevice9 *This,
 }
 if (Type == D3DSBT_ALL || Type == D3DSBT_PIXELSTATE) {
dst->changed.group |=
-  NINE_STATE_PS | NINE_STATE_PS_CONST | NINE_STATE_BLEND |
-  NINE_STATE_FF_VS_OTHER | NINE_STATE_FF_PS_CONSTS | 
NINE_STATE_PS_CONST |
-  NINE_STATE_FB | NINE_STATE_DSA | NINE_STATE_MULTISAMPLE |
-  NINE_STATE_RASTERIZER | NINE_STATE_STENCIL_REF;
+  NINE_STATE_PS | NINE_STATE_PS_CONST | NINE_STATE_FF_PS_CONSTS;
memcpy(dst->changed.rs,
   nine_render_states_pixel, sizeof(dst->changed.rs));
nine_ranges_insert(>changed.ps_const_f, 0, This->max_ps_const_f,
@@ -2371,13 +2366,8 @@ NineDevice9_CreateStateBlock( struct NineDevice9 *This,
dst->changed.group |=
   NINE_STATE_VIEWPORT |
   NINE_STATE_SCISSOR |
-  NINE_STATE_RASTERIZER |
-  NINE_STATE_BLEND |
-  NINE_STATE_DSA |
   NINE_STATE_IDXBUF |
   NINE_STATE_FF_MATERIAL |
-  NINE_STATE_BLEND_COLOR |
-  NINE_STATE_SAMPLE_MASK |
   NINE_STATE_FF_VSTRANSF;
memset(dst->changed.rs, ~0, (D3DRS_COUNT / 32) * sizeof(uint32_t));
dst->changed.rs[D3DRS_LAST / 32] |= (1 << (D3DRS_COUNT % 32)) - 1;
@@ -2500,7 +2490,6 @@ NineDevice9_SetTexture( struct NineDevice9 *This,
 
 if (This->is_recording) {
 state->changed.texture |= 1 << Stage;
-state->changed.group |= NINE_STATE_TEXTURE;
 nine_bind(>texture[Stage], pTexture);
 return D3D_OK;
 }
@@ -2549,8 +2538,6 @@ NineDevice9_SetTextureStageState( struct NineDevice9 
*This,
 state->ff.tex_stage[Stage][Type] = Value;
 
 if (unlikely(This->is_recording)) {
-if (Type == D3DTSS_TEXTURETRANSFORMFLAGS)
-state->changed.group |= NINE_STATE_PS_PARAMS_MISC;
 state->changed.group |= NINE_STATE_FF_PS_CONSTS;
 state->ff.changed.tex_stage[Stage][Type / 32] |= 1 << (Type % 32);
 } else
@@ -3544,8 +3531,6 @@ NineDevice9_SetStreamSourceFreq( struct NineDevice9 *This,
 if (unlikely(This->is_recording)) {
 state->stream_freq[StreamNumber] = Setting;
 state->changed.stream_freq |= 1 << StreamNumber;
-if (StreamNumber != 0)
-state->changed.group |= NINE_STATE_STREAMFREQ;
 return D3D_OK;
 }
 
@@ -3634,11 +3619,8 @@ NineDevice9_SetPixelShader( struct NineDevice9 *This,
 DBG("This=%p pShader=%p\n", This, pShader);
 
 if (unlikely(This->is_recording)) {
-/* Technically we need NINE_STATE_FB only
- * if the ps mask changes, but put it always
- * to be safe */
 nine_bind(>ps, pShader);
-state->changed.group |= NINE_STATE_PS | NINE_STATE_FB;
+state->changed.group |= NINE_STATE_PS;
 return D3D_OK;
 }
 
-- 
2.19.1

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[Mesa-dev] [PATCH 10/12] st/nine: Reduce MaxSimultaneousTextures to 8

2018-10-24 Thread Axel Davy 
Windows drivers don't set this flag (which affects ff) to more than 8.

Do the same in case some games check for 8.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/adapter9.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/nine/adapter9.c 
b/src/gallium/state_trackers/nine/adapter9.c
index 2fa92e4207b..ec18d21a94d 100644
--- a/src/gallium/state_trackers/nine/adapter9.c
+++ b/src/gallium/state_trackers/nine/adapter9.c
@@ -791,8 +791,8 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
 (DWORD)screen->get_param(screen, PIPE_CAP_BLEND_EQUATION_SEPARATE);
 pCaps->MaxSimultaneousTextures = screen->get_shader_param(screen,
 PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
-if (pCaps->MaxSimultaneousTextures > NINE_MAX_SAMPLERS_PS)
-pCaps->MaxSimultaneousTextures = NINE_MAX_SAMPLERS_PS;
+if (pCaps->MaxSimultaneousTextures > 8)
+pCaps->MaxSimultaneousTextures = 8;
 
 pCaps->VertexProcessingCaps = D3DVTXPCAPS_TEXGEN |
   D3DVTXPCAPS_TEXGEN_SPHEREMAP |
-- 
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[Mesa-dev] [PATCH 09/12] st/nine: Enable shadow mapping for ps 1.X

2018-10-24 Thread Axel Davy 
We didn't implement shadow textures for ps 1.X,
assuming the case couldn't happen...
Well it does.

Fixes: https://github.com/iXit/Mesa-3D/issues/261

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/nine_shader.c  |  8 +---
 src/gallium/state_trackers/nine/pixelshader9.c |  2 +-
 src/gallium/state_trackers/nine/pixelshader9.h | 14 --
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/nine/nine_shader.c 
b/src/gallium/state_trackers/nine/nine_shader.c
index 2b11958b261..145647bc3f8 100644
--- a/src/gallium/state_trackers/nine/nine_shader.c
+++ b/src/gallium/state_trackers/nine/nine_shader.c
@@ -771,12 +771,13 @@ TEX_with_ps1x_projection(struct shader_translator *tx, 
struct ureg_dst dst,
 {
 unsigned dim = 1 + ((tx->info->projected >> (2 * idx)) & 3);
 struct ureg_dst tmp;
+boolean shadow = !!(tx->info->sampler_mask_shadow & (1 << idx));
 
 /* dim == 1: no projection
  * Looks like must be disabled when it makes no
  * sense according the texture dimensions
  */
-if (dim == 1 || dim <= target) {
+if (dim == 1 || (dim <= target && !shadow)) {
 ureg_TEX(tx->ureg, dst, target, src0, src1);
 } else if (dim == 4) {
 ureg_TXP(tx->ureg, dst, target, src0, src1);
@@ -2107,9 +2108,10 @@ d3dstt_to_tgsi_tex_shadow(BYTE sampler_type)
 static inline unsigned
 ps1x_sampler_type(const struct nine_shader_info *info, unsigned stage)
 {
+boolean shadow = !!(info->sampler_mask_shadow & (1 << stage));
 switch ((info->sampler_ps1xtypes >> (stage * 2)) & 0x3) {
-case 1: return TGSI_TEXTURE_1D;
-case 0: return TGSI_TEXTURE_2D;
+case 1: return shadow ? TGSI_TEXTURE_SHADOW1D : TGSI_TEXTURE_1D;
+case 0: return shadow ? TGSI_TEXTURE_SHADOW2D : TGSI_TEXTURE_2D;
 case 3: return TGSI_TEXTURE_3D;
 default:
 return TGSI_TEXTURE_CUBE;
diff --git a/src/gallium/state_trackers/nine/pixelshader9.c 
b/src/gallium/state_trackers/nine/pixelshader9.c
index 6f053f709bf..5d79019a1bc 100644
--- a/src/gallium/state_trackers/nine/pixelshader9.c
+++ b/src/gallium/state_trackers/nine/pixelshader9.c
@@ -164,7 +164,7 @@ NinePixelShader9_GetVariant( struct NinePixelShader9 *This )
 info.const_b_base = NINE_CONST_B_BASE(device->max_ps_const_f) / 16;
 info.byte_code = This->byte_code.tokens;
 info.sampler_mask_shadow = key & 0x;
-info.sampler_ps1xtypes = key;
+info.sampler_ps1xtypes = (key >> 16) & 0x;
 info.fog_enable = device->context.rs[D3DRS_FOGENABLE];
 info.fog_mode = device->context.rs[D3DRS_FOGTABLEMODE];
 info.force_color_in_centroid = key >> 34 & 1;
diff --git a/src/gallium/state_trackers/nine/pixelshader9.h 
b/src/gallium/state_trackers/nine/pixelshader9.h
index accd00a6a8c..bcbadd71057 100644
--- a/src/gallium/state_trackers/nine/pixelshader9.h
+++ b/src/gallium/state_trackers/nine/pixelshader9.h
@@ -68,13 +68,16 @@ NinePixelShader9_UpdateKey( struct NinePixelShader9 *ps,
 struct nine_context *context )
 {
 uint16_t samplers_shadow;
-uint32_t samplers_ps1_types;
+uint16_t samplers_ps1_types;
 uint16_t projected;
 uint64_t key;
 BOOL res;
 
+samplers_shadow = (uint16_t)((context->samplers_shadow & 
NINE_PS_SAMPLERS_MASK) >> NINE_SAMPLER_PS(0));
+key = samplers_shadow & ps->sampler_mask;
+
 if (unlikely(ps->byte_code.version < 0x20)) {
-/* no depth textures, but variable targets */
+/* variable targets */
 uint32_t m = ps->sampler_mask;
 samplers_ps1_types = 0;
 while (m) {
@@ -82,10 +85,9 @@ NinePixelShader9_UpdateKey( struct NinePixelShader9 *ps,
 m &= ~(1 << s);
 samplers_ps1_types |= (context->texture[s].enabled ? 
context->texture[s].pstype : 1) << (s * 2);
 }
-key = samplers_ps1_types;
-} else {
-samplers_shadow = (uint16_t)((context->samplers_shadow & 
NINE_PS_SAMPLERS_MASK) >> NINE_SAMPLER_PS(0));
-key = samplers_shadow & ps->sampler_mask;
+/* Note: For ps 1.X, only samplers 0 1 2 and 3 are available (except 
1.4 where 4 and 5 are available).
+ * Thus there is no overflow of samplers_ps1_types. */
+key |= samplers_ps1_types << 16;
 }
 
 if (ps->byte_code.version < 0x30) {
-- 
2.19.1

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[Mesa-dev] [PATCH 05/12] st/nine: Capture also default matrices for D3DSBT_ALL

2018-10-24 Thread Axel Davy 
We avoid allocating space for never unused matrices.
However we must do as if we had captured them.
Thus when a D3DSBT_ALL stateblock apply has fewer matrices
than device state, allocate the default matrices for the stateblock
before applying.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/nine_state.c  | 37 ---
 src/gallium/state_trackers/nine/nine_state.h  |  3 ++
 src/gallium/state_trackers/nine/stateblock9.c | 25 -
 3 files changed, 41 insertions(+), 24 deletions(-)

diff --git a/src/gallium/state_trackers/nine/nine_state.c 
b/src/gallium/state_trackers/nine/nine_state.c
index f4d9b423510..569a1b47292 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -3398,14 +3398,31 @@ const uint32_t nine_render_state_group[NINED3DRS_LAST + 
1] =
 
 /* Misc */
 
+static D3DMATRIX nine_state_identity = { .m[0] = { 1, 0, 0, 0 },
+ .m[1] = { 0, 1, 0, 0 },
+ .m[2] = { 0, 0, 1, 0 },
+ .m[3] = { 0, 0, 0, 1 } };
+
+void
+nine_state_resize_transform(struct nine_ff_state *ff_state, unsigned N)
+{
+unsigned n = ff_state->num_transforms;
+
+if (N <= n)
+return;
+
+ff_state->transform = REALLOC(ff_state->transform,
+  n * sizeof(D3DMATRIX),
+  N * sizeof(D3DMATRIX));
+for (; n < N; ++n)
+ff_state->transform[n] = nine_state_identity;
+ff_state->num_transforms = N;
+}
+
 D3DMATRIX *
 nine_state_access_transform(struct nine_ff_state *ff_state, 
D3DTRANSFORMSTATETYPE t,
 boolean alloc)
 {
-static D3DMATRIX Identity = { .m[0] = { 1, 0, 0, 0 },
-  .m[1] = { 0, 1, 0, 0 },
-  .m[2] = { 0, 0, 1, 0 },
-  .m[3] = { 0, 0, 0, 1 } };
 unsigned index;
 
 switch (t) {
@@ -3427,17 +3444,9 @@ nine_state_access_transform(struct nine_ff_state 
*ff_state, D3DTRANSFORMSTATETYP
 }
 
 if (index >= ff_state->num_transforms) {
-unsigned N = index + 1;
-unsigned n = ff_state->num_transforms;
-
 if (!alloc)
-return 
-ff_state->transform = REALLOC(ff_state->transform,
-  n * sizeof(D3DMATRIX),
-  N * sizeof(D3DMATRIX));
-for (; n < N; ++n)
-ff_state->transform[n] = Identity;
-ff_state->num_transforms = N;
+return _state_identity;
+nine_state_resize_transform(ff_state, index + 1);
 }
 return _state->transform[index];
 }
diff --git a/src/gallium/state_trackers/nine/nine_state.h 
b/src/gallium/state_trackers/nine/nine_state.h
index 7c4517b3fef..55ccfd0f519 100644
--- a/src/gallium/state_trackers/nine/nine_state.h
+++ b/src/gallium/state_trackers/nine/nine_state.h
@@ -609,6 +609,9 @@ void nine_state_prepare_draw_sw(struct NineDevice9 *device,
 void nine_state_after_draw_sw(struct NineDevice9 *device);
 void nine_state_destroy_sw(struct NineDevice9 *device);
 
+void
+nine_state_resize_transform(struct nine_ff_state *ff_state, unsigned N);
+
 /* If @alloc is FALSE, the return value may be a const identity matrix.
  * Therefore, do not modify if you set alloc to FALSE !
  */
diff --git a/src/gallium/state_trackers/nine/stateblock9.c 
b/src/gallium/state_trackers/nine/stateblock9.c
index ebfd622ff91..7b2deae7f9b 100644
--- a/src/gallium/state_trackers/nine/stateblock9.c
+++ b/src/gallium/state_trackers/nine/stateblock9.c
@@ -357,8 +357,7 @@ nine_state_copy_common(struct NineDevice9 *device,
 if (!(mask->ff.changed.transform[i] & (1 << (s % 32
 continue;
 *nine_state_access_transform(>ff, s, TRUE) =
-*nine_state_access_transform( /* const because !alloc */
-(struct nine_ff_state *)>ff, s, FALSE);
+*nine_state_access_transform(>ff, s, FALSE);
 }
 if (apply)
 dst->ff.changed.transform[i] |= mask->ff.changed.transform[i];
@@ -369,7 +368,7 @@ nine_state_copy_common(struct NineDevice9 *device,
 static void
 nine_state_copy_common_all(struct NineDevice9 *device,
struct nine_state *dst,
-   const struct nine_state *src,
+   struct nine_state *src,
struct nine_state *help,
const boolean apply,
struct nine_range_pool *pool,
@@ -488,15 +487,21 @@ nine_state_copy_common_all(struct NineDevice9 *device,
 
 /* Transforms. */
 if (1) {
-if (dst->ff.num_transforms < src->ff.num_transforms) {
-dst->ff.transform = REALLOC(dst->ff.transform,
-dst->ff.num_transforms * sizeof(dst->ff.transform[0]),

[Mesa-dev] [PATCH 06/12] st/nine: Never update device changed.* fields

2018-10-24 Thread Axel Davy 
The device state changed.* field are never used.
These fields are used only for stateblocks.

Avoid setting them at all for clarity.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/device9.c |  4 +-
 src/gallium/state_trackers/nine/nine_state.c  |  7 +-
 src/gallium/state_trackers/nine/nine_state.h  |  2 +-
 src/gallium/state_trackers/nine/stateblock9.c | 94 ++-
 4 files changed, 59 insertions(+), 48 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index 25a8172b3fd..461b212995b 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -2178,9 +2178,11 @@ NineDevice9_LightEnable( struct NineDevice9 *This,
 NineDevice9_SetLight(This, Index, );
 }
 
-nine_state_light_enable(>ff, >changed.group, Index, Enable);
+nine_state_light_enable(>ff, Index, Enable);
 if (likely(!This->is_recording))
 nine_context_light_enable(This, Index, Enable);
+else
+state->changed.group |= NINE_STATE_FF_LIGHTING;
 
 return D3D_OK;
 }
diff --git a/src/gallium/state_trackers/nine/nine_state.c 
b/src/gallium/state_trackers/nine/nine_state.c
index 569a1b47292..74aaf57a549 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -1827,7 +1827,8 @@ CSMT_ITEM_NO_WAIT(nine_context_light_enable,
 {
 struct nine_context *context = >context;
 
-nine_state_light_enable(>ff, >changed.group, Index, 
Enable);
+nine_state_light_enable(>ff, Index, Enable);
+context->changed.group |= NINE_STATE_FF_LIGHTING;
 }
 
 CSMT_ITEM_NO_WAIT(nine_context_set_texture_stage_state,
@@ -3480,7 +3481,7 @@ nine_state_set_light(struct nine_ff_state *ff_state, 
DWORD Index,
 }
 
 HRESULT
-nine_state_light_enable(struct nine_ff_state *ff_state, uint32_t *change_group,
+nine_state_light_enable(struct nine_ff_state *ff_state,
 DWORD Index, BOOL Enable)
 {
 unsigned i;
@@ -3509,8 +3510,6 @@ nine_state_light_enable(struct nine_ff_state *ff_state, 
uint32_t *change_group,
 ff_state->active_light[i] = ff_state->active_light[i + 1];
 }
 
-*change_group |= NINE_STATE_FF_LIGHTING;
-
 return D3D_OK;
 }
 
diff --git a/src/gallium/state_trackers/nine/nine_state.h 
b/src/gallium/state_trackers/nine/nine_state.h
index 55ccfd0f519..51e5e326527 100644
--- a/src/gallium/state_trackers/nine/nine_state.h
+++ b/src/gallium/state_trackers/nine/nine_state.h
@@ -623,7 +623,7 @@ HRESULT
 nine_state_set_light(struct nine_ff_state *, DWORD, const D3DLIGHT9 *);
 
 HRESULT
-nine_state_light_enable(struct nine_ff_state *, uint32_t *,
+nine_state_light_enable(struct nine_ff_state *,
 DWORD, BOOL);
 
 const char *nine_d3drs_to_string(DWORD State);
diff --git a/src/gallium/state_trackers/nine/stateblock9.c 
b/src/gallium/state_trackers/nine/stateblock9.c
index 7b2deae7f9b..50ed70aec3a 100644
--- a/src/gallium/state_trackers/nine/stateblock9.c
+++ b/src/gallium/state_trackers/nine/stateblock9.c
@@ -134,8 +134,15 @@ nine_state_copy_common(struct NineDevice9 *device,
 unsigned i, s;
 
 DBG("apply:%d changed.group: %x\n", (int)apply, (int)mask->changed.group );
-if (apply)
-   dst->changed.group |= mask->changed.group;
+
+/* device changed.* are unused.
+ * Instead nine_context_apply_stateblock is used and will
+ * internally set the right context->changed fields.
+ * Uncomment these only if we want to apply a stateblock onto a stateblock.
+ *
+ * if (apply)
+ * dst->changed.group |= mask->changed.group;
+ */
 
 if (mask->changed.group & NINE_STATE_VIEWPORT)
 dst->viewport = src->viewport;
@@ -202,10 +209,10 @@ nine_state_copy_common(struct NineDevice9 *device,
 /* Render states.
  * TODO: Maybe build a list ?
  */
-for (i = 0; i < ARRAY_SIZE(dst->changed.rs); ++i) {
+for (i = 0; i < ARRAY_SIZE(mask->changed.rs); ++i) {
 uint32_t m = mask->changed.rs[i];
-if (apply)
-dst->changed.rs[i] |= m;
+/* if (apply)
+ * dst->changed.rs[i] |= m; */
 while (m) {
 const int r = ffs(m) - 1;
 m &= ~(1 << r);
@@ -222,8 +229,8 @@ nine_state_copy_common(struct NineDevice9 *device,
 if (mask->changed.ucp & (1 << i))
 memcpy(dst->clip.ucp[i],
src->clip.ucp[i], sizeof(src->clip.ucp[0]));
-if (apply)
-   dst->changed.ucp |= mask->changed.ucp;
+/* if (apply)
+ *dst->changed.ucp |= mask->changed.ucp;*/
 }
 
 /* Sampler state. */
@@ -240,8 +247,8 @@ nine_state_copy_common(struct NineDevice9 *device,
 dst->samp_advertised[s][i] = src->samp_advertised[s][i];
 }
 }
-if (apply)
-dst->changed.sampler[s] |= mask->changed.sampler[s];
+/* if (apply)
+

[Mesa-dev] [PATCH 03/12] st/nine: Don't update unused world matrices

2018-10-24 Thread Axel Davy 
While to the application we have to track
accurately all 256 world matrices (including
in stateblocks), hw vertex processing enables
to set a limit to the number of world matrices
the hardware can access to in the advertised caps,
which is 8 for nine.

Thus don't bother in the stateblock code to send
the updated values for the unreachable matrices.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/nine_state.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/gallium/state_trackers/nine/nine_state.c 
b/src/gallium/state_trackers/nine/nine_state.c
index c9901209189..f4d9b423510 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -2059,6 +2059,12 @@ nine_context_apply_stateblock(struct NineDevice9 *device,
 for (s = i * 32; s < (i * 32 + 32); ++s) {
 if (!(src->ff.changed.transform[i] & (1 << (s % 32
 continue;
+/* MaxVertexBlendMatrixIndex is 8, which means
+ * we don't read past index D3DTS_WORLDMATRIX(8).
+ * swvp is supposed to allow all 256, but we don't
+ * implement it for now. */
+if (s > D3DTS_WORLDMATRIX(8))
+break;
 nine_context_set_transform(device, s,
nine_state_access_transform(
(struct nine_ff_state 
*)>ff,
-- 
2.19.1

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[Mesa-dev] [PATCH 02/12] st/nine: Remove two unused states.

2018-10-24 Thread Axel Davy 
NINE_STATE_MATERIAL was used incorrectly at one location.
Replace it with the correct state.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/device9.c| 2 +-
 src/gallium/state_trackers/nine/nine_state.h | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index 51e49ac4303..3b174587a44 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -2374,7 +2374,7 @@ NineDevice9_CreateStateBlock( struct NineDevice9 *This,
   NINE_STATE_BLEND |
   NINE_STATE_DSA |
   NINE_STATE_IDXBUF |
-  NINE_STATE_MATERIAL |
+  NINE_STATE_FF_MATERIAL |
   NINE_STATE_BLEND_COLOR |
   NINE_STATE_SAMPLE_MASK;
memset(dst->changed.rs, ~0, (D3DRS_COUNT / 32) * sizeof(uint32_t));
diff --git a/src/gallium/state_trackers/nine/nine_state.h 
b/src/gallium/state_trackers/nine/nine_state.h
index a3cc66ef8b5..7c4517b3fef 100644
--- a/src/gallium/state_trackers/nine/nine_state.h
+++ b/src/gallium/state_trackers/nine/nine_state.h
@@ -70,8 +70,6 @@
 #define NINE_STATE_VDECL   (1 << 12)
 #define NINE_STATE_IDXBUF  (1 << 13)
 #define NINE_STATE_STREAMFREQ  (1 << 14)
-#define NINE_STATE_PRIM(1 << 15)
-#define NINE_STATE_MATERIAL(1 << 16)
 #define NINE_STATE_BLEND_COLOR (1 << 17)
 #define NINE_STATE_STENCIL_REF (1 << 18)
 #define NINE_STATE_SAMPLE_MASK (1 << 19)
-- 
2.19.1

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[Mesa-dev] [PATCH 01/12] st/nine: Remove commented nine_context_apply_stateblock

2018-10-24 Thread Axel Davy 
At some point the project was to adapt the
commented version to csmt.

The csmt rework enabled to fix some state aliasing
issues between stateblocks and internal state updates.
The commented version needs a lot of work to work with that.
Just drop it.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/nine_state.c | 230 ---
 1 file changed, 230 deletions(-)

diff --git a/src/gallium/state_trackers/nine/nine_state.c 
b/src/gallium/state_trackers/nine/nine_state.c
index 3db9a07fbf4..c9901209189 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -1893,236 +1893,6 @@ CSMT_ITEM_NO_WAIT(nine_context_set_swvp,
 context->changed.group |= NINE_STATE_SWVP;
 }
 
-#if 0
-
-void
-nine_context_apply_stateblock(struct NineDevice9 *device,
-  const struct nine_state *src)
-{
-struct nine_context *context = >context;
-int i;
-
-context->changed.group |= src->changed.group;
-
-for (i = 0; i < ARRAY_SIZE(src->changed.rs); ++i) {
-uint32_t m = src->changed.rs[i];
-while (m) {
-const int r = ffs(m) - 1;
-m &= ~(1 << r);
-context->rs[i * 32 + r] = nine_fix_render_state_value(i * 32 + r, 
src->rs_advertised[i * 32 + r]);
-}
-}
-
-/* Textures */
-if (src->changed.texture) {
-uint32_t m = src->changed.texture;
-unsigned s;
-
-for (s = 0; m; ++s, m >>= 1) {
-struct NineBaseTexture9 *tex = src->texture[s];
-if (!(m & 1))
-continue;
-nine_context_set_texture(device, s, tex);
-}
-}
-
-/* Sampler state */
-if (src->changed.group & NINE_STATE_SAMPLER) {
-unsigned s;
-
-for (s = 0; s < NINE_MAX_SAMPLERS; ++s) {
-uint32_t m = src->changed.sampler[s];
-while (m) {
-const int i = ffs(m) - 1;
-m &= ~(1 << i);
-if (nine_check_sampler_state_value(i, 
src->samp_advertised[s][i]))
-context->samp[s][i] = src->samp_advertised[s][i];
-}
-context->changed.sampler[s] |= src->changed.sampler[s];
-}
-}
-
-/* Vertex buffers */
-if (src->changed.vtxbuf | src->changed.stream_freq) {
-uint32_t m = src->changed.vtxbuf | src->changed.stream_freq;
-for (i = 0; m; ++i, m >>= 1) {
-if (src->changed.vtxbuf & (1 << i)) {
-if (src->stream[i]) {
-unsigned offset = 0;
-pipe_resource_reference(>vtxbuf[i].buffer,
-src->stream[i] ? 
NineVertexBuffer9_GetResource(src->stream[i], ) : NULL);
-context->vtxbuf[i].buffer_offset = 
src->vtxbuf[i].buffer_offset + offset;
-context->vtxbuf[i].stride = src->vtxbuf[i].stride;
-}
-}
-if (src->changed.stream_freq & (1 << i)) {
-context->stream_freq[i] = src->stream_freq[i];
-if (src->stream_freq[i] & D3DSTREAMSOURCE_INSTANCEDATA)
-context->stream_instancedata_mask |= 1 << i;
-else
-context->stream_instancedata_mask &= ~(1 << i);
-}
-}
-context->changed.vtxbuf |= src->changed.vtxbuf;
-}
-
-/* Index buffer */
-if (src->changed.group & NINE_STATE_IDXBUF)
-nine_context_set_indices(device, src->idxbuf);
-
-/* Vertex declaration */
-if ((src->changed.group & NINE_STATE_VDECL) && src->vdecl)
-nine_context_set_vertex_declaration(device, src->vdecl);
-
-/* Vertex shader */
-if (src->changed.group & NINE_STATE_VS)
-nine_bind(>vs, src->vs);
-
-context->programmable_vs = context->vs && !(context->vdecl && 
context->vdecl->position_t);
-
-/* Pixel shader */
-if (src->changed.group & NINE_STATE_PS)
-nine_bind(>ps, src->ps);
-
-/* Vertex constants */
-if (src->changed.group & NINE_STATE_VS_CONST) {
-struct nine_range *r;
-if (device->may_swvp) {
-for (r = src->changed.vs_const_f; r; r = r->next) {
-int bgn = r->bgn;
-int end = r->end;
-memcpy(>vs_const_f_swvp[bgn * 4],
-   >vs_const_f[bgn * 4],
-   (end - bgn) * 4 * sizeof(float));
-if (bgn < device->max_vs_const_f) {
-end = MIN2(end, device->max_vs_const_f);
-memcpy(>vs_const_f[bgn * 4],
-   >vs_const_f[bgn * 4],
-   (end - bgn) * 4 * sizeof(float));
-}
-}
-} else {
-for (r = src->changed.vs_const_f; r; r = r->next) {
-memcpy(>vs_const_f[r->bgn * 4],
-   >vs_const_f[r->bgn * 4],
-   (r->end - r->bgn) * 4 * sizeof(float));
-}
-}
-

[Mesa-dev] [PATCH] i965/anv: Disable prefetching of sampler state entries

2018-10-24 Thread Anuj Phogat 
WA_1606682166:
Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time and
the feature must remain disabled permanently.

Signed-off-by: Anuj Phogat 
---
 src/intel/vulkan/genX_pipeline.c | 25 -
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 9595a7133ae..a7c5048eb37 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1163,7 +1163,12 @@ emit_3dstate_vs(struct anv_pipeline *pipeline)
   vs.SingleVertexDispatch   = false;
 #endif
   vs.VectorMaskEnable   = false;
-  vs.SamplerCount   = get_sampler_count(vs_bin);
+  /* WA_1606682166:
+   * Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
+   * Disable the Sampler state prefetch functionality in the SARB by
+   * programming 0xB000[30] to '1'.
+   */
+  vs.SamplerCount   = GEN_GEN == 11 ? 0 : 
get_sampler_count(vs_bin);
  /* Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to
   * disable prefetching of binding tables on A0 and B0 steppings.
   * TODO: Revisit this WA on newer steppings.
@@ -1238,8 +1243,8 @@ emit_3dstate_hs_te_ds(struct anv_pipeline *pipeline,
   hs.Enable = true;
   hs.StatisticsEnable = true;
   hs.KernelStartPointer = tcs_bin->kernel.offset;
-
-  hs.SamplerCount = get_sampler_count(tcs_bin);
+  /* WA_1606682166 */
+  hs.SamplerCount = GEN_GEN == 11 ? 0 : get_sampler_count(tcs_bin);
   /* Gen 11 workarounds table #2056 WABTPPrefetchDisable */
   hs.BindingTableEntryCount = GEN_GEN == 11 ? 0 : 
get_binding_table_entry_count(tcs_bin);
   hs.MaximumNumberofThreads = devinfo->max_tcs_threads - 1;
@@ -1289,8 +1294,8 @@ emit_3dstate_hs_te_ds(struct anv_pipeline *pipeline,
   ds.Enable = true;
   ds.StatisticsEnable = true;
   ds.KernelStartPointer = tes_bin->kernel.offset;
-
-  ds.SamplerCount = get_sampler_count(tes_bin);
+  /* WA_1606682166 */
+  ds.SamplerCount = GEN_GEN == 11 ? 0 : get_sampler_count(tes_bin);
   /* Gen 11 workarounds table #2056 WABTPPrefetchDisable */
   ds.BindingTableEntryCount = GEN_GEN == 11 ? 0 : 
get_binding_table_entry_count(tes_bin);
   ds.MaximumNumberofThreads = devinfo->max_tes_threads - 1;
@@ -1348,7 +1353,8 @@ emit_3dstate_gs(struct anv_pipeline *pipeline)
 
   gs.SingleProgramFlow   = false;
   gs.VectorMaskEnable= false;
-  gs.SamplerCount= get_sampler_count(gs_bin);
+  /* WA_1606682166 */
+  gs.SamplerCount= GEN_GEN == 11 ? 0 : 
get_sampler_count(gs_bin);
   /* Gen 11 workarounds table #2056 WABTPPrefetchDisable */
   gs.BindingTableEntryCount  = GEN_GEN == 11 ? 0 : 
get_binding_table_entry_count(gs_bin);
   gs.IncludeVertexHandles= gs_prog_data->base.include_vue_handles;
@@ -1590,7 +1596,8 @@ emit_3dstate_ps(struct anv_pipeline *pipeline,
 
   ps.SingleProgramFlow  = false;
   ps.VectorMaskEnable   = true;
-  ps.SamplerCount   = get_sampler_count(fs_bin);
+  /* WA_1606682166 */
+  ps.SamplerCount   = GEN_GEN == 11 ? 0 : 
get_sampler_count(fs_bin);
   /* Gen 11 workarounds table #2056 WABTPPrefetchDisable */
   ps.BindingTableEntryCount = GEN_GEN == 11 ? 0 : 
get_binding_table_entry_count(fs_bin);
   ps.PushConstantEnable = wm_prog_data->base.nr_params > 0 ||
@@ -1921,8 +1928,8 @@ compute_pipeline_create(
 
struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = {
   .KernelStartPointer = cs_bin->kernel.offset,
-
-  .SamplerCount   = get_sampler_count(cs_bin),
+  /* WA_1606682166 */
+  .SamplerCount   = GEN_GEN == 11 ? 0 : get_sampler_count(cs_bin),
   /* Gen 11 workarounds table #2056 WABTPPrefetchDisable */
   .BindingTableEntryCount = GEN_GEN == 11 ? 0 : 
get_binding_table_entry_count(cs_bin),
   .BarrierEnable  = cs_prog_data->uses_barrier,
-- 
2.17.1

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[Mesa-dev] [PATCH] i965/icl: Disable prefetching of sampler state entries

2018-10-24 Thread Anuj Phogat 
From: Topi Pohjolainen 

In the same spirit as commit a5889d70f2074201ceaeac4f96a9a0c0b1f68a31
"i965/icl: Disable binding table prefetching". Fixes some 110+
intermittent piglit failures with tex-miplevel-selection variants.

WA_1606682166:
Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time and
the feature must remain disabled permanently.

Anuj: Set SamplerCount = 0 for vs, gs, hs, ds and wm units as well.

Signed-off-by: Topi Pohjolainen 
Signed-off-by: Anuj Phogat 
Cc: Mark Janes 
---
Latest kernel from drm-tip  do have this workaround implemented
but we're seeing few deqp regressions with that kernel. I'm
adding this workaround to Mesa to make some progress in ICL
testing on CI. We can always revert the patch when we don't
need it anymore.
---
 src/mesa/drivers/dri/i965/genX_state_upload.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 740cb0c4d2e..319800934d5 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -2004,7 +2004,8 @@ genX(upload_wm)(struct brw_context *brw)
   if (wm_prog_data->base.use_alt_mode)
  wm.FloatingPointMode = FLOATING_POINT_MODE_Alternate;
 
-  wm.SamplerCount = GEN_GEN == 5 ?
+  /* WA_1606682166 */
+  wm.SamplerCount = (GEN_GEN == 5 || GEN_GEN == 11) ?
  0 : DIV_ROUND_UP(stage_state->sampler_count, 4);
 
   wm.BindingTableEntryCount =
@@ -2166,7 +2167,10 @@ static const struct brw_tracked_state genX(wm_state) = {
 
 #define INIT_THREAD_DISPATCH_FIELDS(pkt, prefix) \
pkt.KernelStartPointer = KSP(brw, stage_state->prog_offset);   \
+   /* WA_1606682166 */\
pkt.SamplerCount   =   \
+  GEN_GEN == 11 ? \
+  0 : \
   DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4);  \
/* Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to \
 * disable prefetching of binding tables in A0 and B0 steppings.   \
@@ -3977,8 +3981,13 @@ genX(upload_ps)(struct brw_context *brw)
*/
   ps.VectorMaskEnable = GEN_GEN >= 8;
 
-  ps.SamplerCount =
- DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4);
+   /* WA_1606682166:
+* "Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
+* Disable the Sampler state prefetch functionality in the SARB by
+* programming 0xB000[30] to '1'."
+*/
+  ps.SamplerCount = GEN_GEN == 11 ?
+ 0 : DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4);
 
   /* BRW_NEW_FS_PROG_DATA */
   /* Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to 
disable
-- 
2.17.1

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Re: [Mesa-dev] [PATCH] m4: add Werror when checking for compiler flags

2018-10-24 Thread Dylan Baker 
Quoting Emil Velikov (2018-10-24 10:57:00)
> Seemingly that at some point clang started accepting _any_ flags,
> whereas previously it would error out.
> 
> These days, you can give it -Whamsandwich and it will succeed, while
> at the same time throwing an annoying warning.
> 
> Add -Werror so that everything gets flagged and set accordingly.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108082
> Cc: Eric Engestrom 
> Cc: Dylan Baker 
> Cc: Vinson Lee 
> Repored-by: Vinson Lee 
> Signed-off-by: Emil Velikov 
> ---
>  m4/ax_check_compile_flag.m4 | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/m4/ax_check_compile_flag.m4 b/m4/ax_check_compile_flag.m4
> index 51df0c09a7a..0fdca907e8b 100644
> --- a/m4/ax_check_compile_flag.m4
> +++ b/m4/ax_check_compile_flag.m4
> @@ -55,6 +55,11 @@
>  #   modified version of the Autoconf Macro, you may extend this special
>  #   exception to the GPL to apply to your modified version as well.
>  
> +# Emil:
> +# Toggle Werror since at some point clang started treating unknown -W
> +# flags as warnings, succeeding with the build, yet issuing an annoying
> +# warning.
> +
>  #serial 3
>  
>  AC_DEFUN([AX_CHECK_COMPILE_FLAG],
> @@ -62,7 +67,7 @@ AC_DEFUN([AX_CHECK_COMPILE_FLAG],
>  AS_VAR_PUSHDEF([CACHEVAR],[ax_cv_check_[]_AC_LANG_ABBREV[]flags_$4_$1])dnl
>  AC_CACHE_CHECK([whether _AC_LANG compiler accepts $1], CACHEVAR, [
>ax_check_save_flags=$[]_AC_LANG_PREFIX[]FLAGS
> -  _AC_LANG_PREFIX[]FLAGS="$[]_AC_LANG_PREFIX[]FLAGS $4 $1"
> +  _AC_LANG_PREFIX[]FLAGS="$[]_AC_LANG_PREFIX[]FLAGS $4 $1 -Werror"
>AC_COMPILE_IFELSE([m4_default([$5],[AC_LANG_PROGRAM()])],
>  [AS_VAR_SET(CACHEVAR,[yes])],
>  [AS_VAR_SET(CACHEVAR,[no])])
> -- 
> 2.19.1
> 

This seems like the most straightforward way to solve the issue, since otherwise
you need to track which compiler you have.

Reviewed-by: Dylan Baker 


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Re: [Mesa-dev] [PATCH] docs/calendar: Add 18.3 plan and expand 18.2

2018-10-24 Thread Dylan Baker 
Quoting Emil Velikov (2018-10-24 10:21:24)
> On Tue, 23 Oct 2018 at 18:13, Dylan Baker  wrote:
> >
> > Quoting Juan A. Suarez Romero (2018-10-23 09:53:03)
> > > On Tue, 2018-10-23 at 09:30 -0700, Dylan Baker wrote:
> > > > CC: Emil Velikov 
> > > > CC: Juan A. Romero Suarez 
> > > > ---
> > > >  docs/release-calendar.html | 38 +-
> > > >  1 file changed, 37 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/docs/release-calendar.html b/docs/release-calendar.html
> > > > index a525c62..6bd4fc0c0e8 100644
> > > > --- a/docs/release-calendar.html
> > > > +++ b/docs/release-calendar.html
> > > > @@ -39,7 +39,7 @@ if you'd like to nominate a patch in the next stable 
> > > > release.
> > > >  Notes
> > > >  
> > > >  
> > > > -18.2
> > > > +18.2
> > > >  2018-10-31
> > > >  18.2.4
> > > >  Andres Gomez
> > > > @@ -49,8 +49,44 @@ if you'd like to nominate a patch in the next stable 
> > > > release.
> > > >  2018-11-14
> > > >  18.2.5
> > > >  Andres Gomez
> > > > +
> > > > +
> > > > +
> > > > +2018-11-28
> > > > +18.2.6
> > > > +Juan A. Suarez
> > > > +
> > > > +
> > > > +
> > > > +2018-12-12
> > > > +18.2.7
> > > > +Juan A. Suarez
> > > >  Last planned 18.2.x release
> > > >  
> > > > +18.3
> > > > +2018-10-31
> > > > +18.2.0-rc1
> > >
> > >^^^
> > > Should be 18.3.0 (same in the rest of the RCs)
> >
> > Oops :)
> >
> > >
> > > > +Dylan Baker
> > > > +
> > > > +
> > > > +
> > > > +2018-11-07
> > > > +18.2.0-rc2
> > > > +Dylan Baker
> > > > +
> > > > +
> > > > +
> > > > +2018-11-14
> > > > +18.2.0-rc3
> > > > +Dylan Baker
> > > > +
> > > > +
> > > > +
> > > > +2018-11-21
> > > > +18.2.0-rc4/
> > >
> > >
> > >extra slash
> > >
> > >
> > >
> > > With those fixes, this is:
> > >
> > > Reviewed-by: Juan A. Suarez 
> >
> > both fixed locally. I'll give Emil a bit to look at it before I push, 
> > thanks!
> >
> I will be around for the 18.3 so I can take care of it. This should
> free some time for Dylan to fix the python 3 issue Ilia Mirkin
> reported back in August.
> 
> Thanks
> Emil
> 
> https://lists.freedesktop.org/archives/mesa-dev/2018-August/203508.html

If you want to do the 18.3 release that's fine with me. There is still some
notion that meson will be ready for prime time by 19.0. Since that would be a
pretty big change in process I'd be happy to deal with that pain if other's
prefer :)

Dylan


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Re: [Mesa-dev] [PATCH] docs/calendar: Add 18.3 plan and expand 18.2

2018-10-24 Thread Dylan Baker 
Quoting Emil Velikov (2018-10-24 10:32:21)
> From: Dylan Baker 
> 
> Emil will be helping out with 18.3, while Juan finalises 18.2
> 
> v2: add Emil for 18.3, fix typos
> 
> CC: Emil Velikov 
> CC: Juan A. Romero Suarez 
> Cc: Dylan Baker 
> ---
>  docs/release-calendar.html | 38 +-
>  1 file changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/docs/release-calendar.html b/docs/release-calendar.html
> index 566b11623b7..1e071a97947 100644
> --- a/docs/release-calendar.html
> +++ b/docs/release-calendar.html
> @@ -39,7 +39,7 @@ if you'd like to nominate a patch in the next stable 
> release.
>  Notes
>  
>  
> -18.2
> +18.2
>  2018-10-31
>  18.2.4
>  Juan A. Suarez
> @@ -49,8 +49,44 @@ if you'd like to nominate a patch in the next stable 
> release.
>  2018-11-14
>  18.2.5
>  Juan A. Suarez
> +
> +
> +
> +2018-11-28
> +18.2.6
> +Juan A. Suarez
> +
> +
> +
> +2018-12-12
> +18.2.7
> +Juan A. Suarez
>  Last planned 18.2.x release
>  
> +18.3
> +2018-10-31
> +18.3.0-rc1
> +Emil Velikov
> +
> +
> +
> +2018-11-07
> +18.3.0-rc2
> +Emil Velikov
> +
> +
> +
> +2018-11-14
> +18.3.0-rc3
> +Emil Velikov
> +
> +
> +
> +2018-11-21
> +18.3.0-rc4
> +Emil Velikov
> +Last planned RC/final release
> +
>  
>  
>  
> -- 
> 2.19.1
> 

Reviewed-by: Dylan Baker 


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[Mesa-dev] [PATCH] m4: add Werror when checking for compiler flags

2018-10-24 Thread Emil Velikov 
Seemingly that at some point clang started accepting _any_ flags,
whereas previously it would error out.

These days, you can give it -Whamsandwich and it will succeed, while
at the same time throwing an annoying warning.

Add -Werror so that everything gets flagged and set accordingly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108082
Cc: Eric Engestrom 
Cc: Dylan Baker 
Cc: Vinson Lee 
Repored-by: Vinson Lee 
Signed-off-by: Emil Velikov 
---
 m4/ax_check_compile_flag.m4 | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/m4/ax_check_compile_flag.m4 b/m4/ax_check_compile_flag.m4
index 51df0c09a7a..0fdca907e8b 100644
--- a/m4/ax_check_compile_flag.m4
+++ b/m4/ax_check_compile_flag.m4
@@ -55,6 +55,11 @@
 #   modified version of the Autoconf Macro, you may extend this special
 #   exception to the GPL to apply to your modified version as well.
 
+# Emil:
+# Toggle Werror since at some point clang started treating unknown -W
+# flags as warnings, succeeding with the build, yet issuing an annoying
+# warning.
+
 #serial 3
 
 AC_DEFUN([AX_CHECK_COMPILE_FLAG],
@@ -62,7 +67,7 @@ AC_DEFUN([AX_CHECK_COMPILE_FLAG],
 AS_VAR_PUSHDEF([CACHEVAR],[ax_cv_check_[]_AC_LANG_ABBREV[]flags_$4_$1])dnl
 AC_CACHE_CHECK([whether _AC_LANG compiler accepts $1], CACHEVAR, [
   ax_check_save_flags=$[]_AC_LANG_PREFIX[]FLAGS
-  _AC_LANG_PREFIX[]FLAGS="$[]_AC_LANG_PREFIX[]FLAGS $4 $1"
+  _AC_LANG_PREFIX[]FLAGS="$[]_AC_LANG_PREFIX[]FLAGS $4 $1 -Werror"
   AC_COMPILE_IFELSE([m4_default([$5],[AC_LANG_PROGRAM()])],
 [AS_VAR_SET(CACHEVAR,[yes])],
 [AS_VAR_SET(CACHEVAR,[no])])
-- 
2.19.1

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[Mesa-dev] [Bug 108541] Convert x86 assembly stub to PIC to fix linking with lld

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108541

Bug ID: 108541
   Summary: Convert x86 assembly stub to PIC to fix linking with
lld
   Product: Mesa
   Version: unspecified
  Hardware: Other
OS: OpenBSD
Status: NEW
  Severity: normal
  Priority: medium
 Component: Mesa core
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: na...@mips.inka.de
QA Contact: mesa-dev@lists.freedesktop.org

Created attachment 142177
  --> https://bugs.freedesktop.org/attachment.cgi?id=142177=edit
Convert entry_x86_tsd.h to PIC

The x86 assembly language stub in src/mapi/entry_x86_tsd.h does not generate
PIC (position-independent code). This causes text relocations, which are by
default treated as an error by LLVM's lld linker (now used by FreeBSD and
OpenBSD) when building a shared library.

/usr/bin/ld: error: can't create dynamic relocation R_386_32 against symbol:
_glapi_Dispatch in readonly segment; recompile object files with -fPIC
>>> defined in .libs/shared_glapi_libglapi_la-u_current.o
>>> referenced by entry.c
>>>   .libs/shared_glapi_libglapi_la-entry.o:(.text+0x1)

The accompanying minimal diff remedies this by generating PIC code.  This is
mostly copied from the neighboring entry_x86_tls.h.

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[Mesa-dev] [PATCH] docs/calendar: Add 18.3 plan and expand 18.2

2018-10-24 Thread Emil Velikov 
From: Dylan Baker 

Emil will be helping out with 18.3, while Juan finalises 18.2

v2: add Emil for 18.3, fix typos

CC: Emil Velikov 
CC: Juan A. Romero Suarez 
Cc: Dylan Baker 
---
 docs/release-calendar.html | 38 +-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/docs/release-calendar.html b/docs/release-calendar.html
index 566b11623b7..1e071a97947 100644
--- a/docs/release-calendar.html
+++ b/docs/release-calendar.html
@@ -39,7 +39,7 @@ if you'd like to nominate a patch in the next stable release.
 Notes
 
 
-18.2
+18.2
 2018-10-31
 18.2.4
 Juan A. Suarez
@@ -49,8 +49,44 @@ if you'd like to nominate a patch in the next stable release.
 2018-11-14
 18.2.5
 Juan A. Suarez
+
+
+
+2018-11-28
+18.2.6
+Juan A. Suarez
+
+
+
+2018-12-12
+18.2.7
+Juan A. Suarez
 Last planned 18.2.x release
 
+18.3
+2018-10-31
+18.3.0-rc1
+Emil Velikov
+
+
+
+2018-11-07
+18.3.0-rc2
+Emil Velikov
+
+
+
+2018-11-14
+18.3.0-rc3
+Emil Velikov
+
+
+
+2018-11-21
+18.3.0-rc4
+Emil Velikov
+Last planned RC/final release
+
 
 
 
-- 
2.19.1

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Re: [Mesa-dev] [PATCH] vulkan/wsi: use the drmGetDevice2() API

2018-10-24 Thread Emil Velikov 
On Mon, 22 Oct 2018 at 18:13, Jason Ekstrand  wrote:
>
> On Mon, Oct 22, 2018 at 12:10 PM Emil Velikov  
> wrote:
>>
>> From: Emil Velikov 
>>
>> On older kernels, the drmGetDevice() call will wake up all the GPUs
>> on the system, while fetching the PCI revision.
>>
>> Use the 2 version of the API and pass flags == 0, so we don't fetch the
>> device PCI revision, since we don't need that information.
>
>
> As long as we still get all the PCI address information,
>
> Reviewed-by: Jason Ekstrand 
>
Indeed it does, thanks.

> I had no idea one of them work up the device and the other didn't...
>
Right, will add some documentation in a moment.

-Emil
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Re: [Mesa-dev] [PATCH] docs/calendar: Add 18.3 plan and expand 18.2

2018-10-24 Thread Emil Velikov 
On Tue, 23 Oct 2018 at 18:13, Dylan Baker  wrote:
>
> Quoting Juan A. Suarez Romero (2018-10-23 09:53:03)
> > On Tue, 2018-10-23 at 09:30 -0700, Dylan Baker wrote:
> > > CC: Emil Velikov 
> > > CC: Juan A. Romero Suarez 
> > > ---
> > >  docs/release-calendar.html | 38 +-
> > >  1 file changed, 37 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/docs/release-calendar.html b/docs/release-calendar.html
> > > index a525c62..6bd4fc0c0e8 100644
> > > --- a/docs/release-calendar.html
> > > +++ b/docs/release-calendar.html
> > > @@ -39,7 +39,7 @@ if you'd like to nominate a patch in the next stable 
> > > release.
> > >  Notes
> > >  
> > >  
> > > -18.2
> > > +18.2
> > >  2018-10-31
> > >  18.2.4
> > >  Andres Gomez
> > > @@ -49,8 +49,44 @@ if you'd like to nominate a patch in the next stable 
> > > release.
> > >  2018-11-14
> > >  18.2.5
> > >  Andres Gomez
> > > +
> > > +
> > > +
> > > +2018-11-28
> > > +18.2.6
> > > +Juan A. Suarez
> > > +
> > > +
> > > +
> > > +2018-12-12
> > > +18.2.7
> > > +Juan A. Suarez
> > >  Last planned 18.2.x release
> > >  
> > > +18.3
> > > +2018-10-31
> > > +18.2.0-rc1
> >
> >^^^
> > Should be 18.3.0 (same in the rest of the RCs)
>
> Oops :)
>
> >
> > > +Dylan Baker
> > > +
> > > +
> > > +
> > > +2018-11-07
> > > +18.2.0-rc2
> > > +Dylan Baker
> > > +
> > > +
> > > +
> > > +2018-11-14
> > > +18.2.0-rc3
> > > +Dylan Baker
> > > +
> > > +
> > > +
> > > +2018-11-21
> > > +18.2.0-rc4/
> >
> >
> >extra slash
> >
> >
> >
> > With those fixes, this is:
> >
> > Reviewed-by: Juan A. Suarez 
>
> both fixed locally. I'll give Emil a bit to look at it before I push, thanks!
>
I will be around for the 18.3 so I can take care of it. This should
free some time for Dylan to fix the python 3 issue Ilia Mirkin
reported back in August.

Thanks
Emil

https://lists.freedesktop.org/archives/mesa-dev/2018-August/203508.html
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Re: [Mesa-dev] [PATCH 4/4] autotools: include intel_tiled_memcopy.c

2018-10-24 Thread Dylan Baker 
Quoting Juan A. Suarez Romero (2018-10-24 09:32:07)
> On Wed, 2018-10-24 at 09:16 -0700, Dylan Baker wrote:
> > Quoting Juan A. Suarez Romero (2018-10-24 09:10:37)
> > > On Tue, 2018-10-23 at 15:56 -0700, Dylan Baker wrote:
> > > > There are two problems with the fixed patch. First, it fails to create a
> > > > dependency on the sourced .c file, so changes to intel_tiled_memcpy.c
> > > > won't trigger a rebuild. It also doesn't get included in the dist
> > > > tarball.
> > > > 
> > > > CC: Tapani Pälli 
> > > > Fixes: 11b1afdc92db98e93f2ca50beeb7fc481a11e708
> > > >("i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear")
> > > 
> > > Nice! This indeed fixes `make distcheck`
> > 
> > Yup! I'm trying to get things cleaned up for the 18.3 release next week. 
> > Learned
> > the hard way the last time around that I need to start on this early :)
> > 
> 
> That's nice. Then maybe you are interested that master does not build with 
> LLVM
> 7.0. There are some patches in the mailing list, but not sure if they fix
> completely the build.
> 
> I'm wondering if building Mesa 18.3 with LLVM 7.0 should be part of the
> "features" we want in the branchpoint.

Yeah, I think it should block the release. Otherwise we're going to have to add
logic to not allow LLVM 7.0 with SWR.

Dylan


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Re: [Mesa-dev] [PATCH 1/4] gen: Add EXT_vertex_attrib_64bit.xml to dependency lists

2018-10-24 Thread Juan A. Suarez Romero 
On Tue, 2018-10-23 at 15:56 -0700, Dylan Baker wrote:
> Which is also required to put it in the tarball, a requirement for
> building with meson from the tarball.
> 
> CC: Ian Romanick 
> CC: Marek Olšák 
> Fixes: 263c962cfdee6b43578ee5f28601309ea77d1434
>("mesa: expose EXT_vertex_attrib_64bit")
> ---
>  src/mapi/glapi/gen/Makefile.am | 1 +
>  src/mapi/glapi/gen/meson.build | 1 +
>  2 files changed, 2 insertions(+)
> 

For the series:

Reviewed-by: Juan A. Suarez 


> diff --git a/src/mapi/glapi/gen/Makefile.am b/src/mapi/glapi/gen/Makefile.am
> index ab369a0d333..e59e6cc90a3 100644
> --- a/src/mapi/glapi/gen/Makefile.am
> +++ b/src/mapi/glapi/gen/Makefile.am
> @@ -205,6 +205,7 @@ API_XML = \
>   EXT_texture_array.xml \
>   EXT_texture_integer.xml \
>   EXT_transform_feedback.xml \
> + EXT_vertex_attrib_64bit.xml \
>   EXT_window_rectangles.xml \
>   GREMEDY_string_marker.xml \
>   INTEL_performance_query.xml \
> diff --git a/src/mapi/glapi/gen/meson.build b/src/mapi/glapi/gen/meson.build
> index c638b1ece60..1cf3339e30e 100644
> --- a/src/mapi/glapi/gen/meson.build
> +++ b/src/mapi/glapi/gen/meson.build
> @@ -112,6 +112,7 @@ api_xml_files = files(
>'EXT_texture_array.xml',
>'EXT_texture_integer.xml',
>'EXT_transform_feedback.xml',
> +  'EXT_vertex_attrib_64bit.xml',
>'EXT_window_rectangles.xml',
>'GREMEDY_string_marker.xml',
>'INTEL_performance_query.xml',

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Re: [Mesa-dev] [PATCH v2 1/2] move u_math to src/util

2018-10-24 Thread Dylan Baker 
Yeah, there's a bug opened and it's blocking 18.3. I have a series that I think
is mostly there to get it fixed, and it's very high on my list to get finished.
If I can't get it ready in time for 18.3 I'll just revert this and try again
when the MacOS stuff is worked out.

Dylan

Quoting Juan A. Suarez Romero (2018-10-24 09:24:10)
> On Wed, 2018-09-05 at 14:55 -0700, Dylan Baker wrote:
> > Currently we have two sets of functions for bit counts, one in gallium
> > and one in core mesa. The ones in core mesa are header only in many
> > cases, since they reduce to "#define _mesa_bitcount popcount", but they
> > provide a fallback implementation. This is important because 32bit msvc
> > doesn't have popcountll, just popcount; so when nir (for example)
> > includes the core mesa header it doesn't (and shouldn't) link with core
> > mesa. To fix this we'll promote the version out of gallium util, then
> > replace the core mesa uses with the util version, since nir (and other
> > non-core mesa users) can and do link with mesautils.
> > ---
> 
> 
> I've noticed this patch has broken "macOs make" target in Travis CI:
> 
> https://travis-ci.org/mesa3d/mesa/builds/445588600
> 
> 
> Seems that now it can't find some symbols (_util_cpu_caps).
> 
> 
> J.A.
> 
> >  src/broadcom/cle/v3d_packet_helpers.h   | 2 +-
> >  src/gallium/auxiliary/Makefile.sources  | 2 --
> >  src/gallium/auxiliary/meson.build   | 2 --
> >  src/gallium/auxiliary/util/u_format.c   | 2 +-
> >  src/gallium/auxiliary/util/u_format_bptc.c  | 2 +-
> >  src/gallium/auxiliary/util/u_format_latc.c  | 2 +-
> >  src/gallium/auxiliary/util/u_format_other.c | 2 +-
> >  src/gallium/auxiliary/util/u_format_pack.py | 2 +-
> >  src/gallium/auxiliary/util/u_format_rgtc.c  | 2 +-
> >  src/gallium/auxiliary/util/u_format_s3tc.c  | 2 +-
> >  src/gallium/auxiliary/util/u_format_yuv.h   | 2 +-
> >  src/gallium/auxiliary/util/u_format_zs.c| 2 +-
> >  src/util/Makefile.sources   | 2 ++
> >  src/util/meson.build| 2 ++
> >  src/{gallium/auxiliary => }/util/u_math.c   | 0
> >  src/{gallium/auxiliary => }/util/u_math.h   | 2 +-
> >  16 files changed, 15 insertions(+), 15 deletions(-)
> >  rename src/{gallium/auxiliary => }/util/u_math.c (100%)
> >  rename src/{gallium/auxiliary => }/util/u_math.h (99%)
> > 
> > diff --git a/src/broadcom/cle/v3d_packet_helpers.h 
> > b/src/broadcom/cle/v3d_packet_helpers.h
> > index f340b790697..c46089a0e60 100644
> > --- a/src/broadcom/cle/v3d_packet_helpers.h
> > +++ b/src/broadcom/cle/v3d_packet_helpers.h
> > @@ -26,7 +26,7 @@
> >  #include 
> >  #include 
> >  #include 
> > -#include 
> > +#include "util/u_math.h"
> >  
> >  #ifdef HAVE_VALGRIND
> >  #include 
> > diff --git a/src/gallium/auxiliary/Makefile.sources 
> > b/src/gallium/auxiliary/Makefile.sources
> > index d66fa85f798..33d58dedf28 100644
> > --- a/src/gallium/auxiliary/Makefile.sources
> > +++ b/src/gallium/auxiliary/Makefile.sources
> > @@ -294,8 +294,6 @@ C_SOURCES := \
> >   util/u_linear.h \
> >   util/u_log.c \
> >   util/u_log.h \
> > - util/u_math.c \
> > - util/u_math.h \
> >   util/u_memory.h \
> >   util/u_mm.c \
> >   util/u_mm.h \
> > diff --git a/src/gallium/auxiliary/meson.build 
> > b/src/gallium/auxiliary/meson.build
> > index be558e07b27..9e3673a53c0 100644
> > --- a/src/gallium/auxiliary/meson.build
> > +++ b/src/gallium/auxiliary/meson.build
> > @@ -314,8 +314,6 @@ files_libgallium = files(
> >'util/u_linear.h',
> >'util/u_log.c',
> >'util/u_log.h',
> > -  'util/u_math.c',
> > -  'util/u_math.h',
> >'util/u_memory.h',
> >'util/u_mm.c',
> >'util/u_mm.h',
> > diff --git a/src/gallium/auxiliary/util/u_format.c 
> > b/src/gallium/auxiliary/util/u_format.c
> > index 1dd724d9b84..6445f2647cf 100644
> > --- a/src/gallium/auxiliary/util/u_format.c
> > +++ b/src/gallium/auxiliary/util/u_format.c
> > @@ -32,11 +32,11 @@
> >   * @author Jose Fonseca 
> >   */
> >  
> > -#include "u_math.h"
> >  #include "u_memory.h"
> >  #include "u_format.h"
> >  #include "u_format_s3tc.h"
> >  #include "u_surface.h"
> > +#include "util/u_math.h"
> >  
> >  #include "pipe/p_defines.h"
> >  
> > diff --git a/src/gallium/auxiliary/util/u_format_bptc.c 
> > b/src/gallium/auxiliary/util/u_format_bptc.c
> > index 87ec4139e09..519a541e380 100644
> > --- a/src/gallium/auxiliary/util/u_format_bptc.c
> > +++ b/src/gallium/auxiliary/util/u_format_bptc.c
> > @@ -23,10 +23,10 @@
> >   *
> >   
> > **/
> >  
> > -#include "u_math.h"
> >  #include "u_format.h"
> >  #include "u_format_bptc.h"
> >  #include "util/format_srgb.h"
> > +#include "util/u_math.h"
> >  
> >  #define BPTC_BLOCK_DECODE
> >  #include "../../../mesa/main/texcompress_bptc_tmp.h"
> > diff --git a/src/gallium/auxiliary/util/u_format_latc.c 
> > b/src/gallium/auxiliary/util/u_format_latc.c
> > index 7b2bb00693f..f145081d56d 100644
> >

Re: [Mesa-dev] [PATCH] mesa: allow EXT_texture_compression_s3tc on ES2

2018-10-24 Thread Erik Faye-Lund 
On Thu, 2018-10-18 at 15:42 -0400, Marek Olšák wrote:
> I think you need something like this:
> 
https://cgit.freedesktop.org/~mareko/mesa/commit/?h=amd-extension-pack=ad774f9db1d735811a8d830ad90a2f8208aa0a7b
> 

Thanks, this looks correct to me.

I've ported some of the piglit s3tc tests to gles2, and they all seem
to pass with your patch:

https://patchwork.freedesktop.org/series/51467/

Do you mind if I add a "Tested-by"-tag and submit a v2 with your patch
instead?

> I also have:
> rgtc: 
> https://cgit.freedesktop.org/~mareko/mesa/commit/?h=amd-extension-pack=c9c0ffc2d40f0119fb31bf0515f321cd877090dd
> bptc: 
> https://cgit.freedesktop.org/~mareko/mesa/commit/?h=amd-extension-pack=111255b6f8b85119da2c5d29dc19abc422fd7a12
> 
> and no time to test them.
> 
> Marek
> 
> On Thu, Oct 18, 2018 at 11:05 AM Erik Faye-Lund <
> erik.faye-l...@collabora.com> wrote:
> > The extension is written against both GL 1.2 and GLES 2.0, so let's
> > also enable it on GLES 2.0.
> > 
> > Signed-off-by: Erik Faye-Lund 
> > ---
> >  src/mesa/main/extensions_table.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/src/mesa/main/extensions_table.h
> > b/src/mesa/main/extensions_table.h
> > index 09bf923bd0e..47db1583135 100644
> > --- a/src/mesa/main/extensions_table.h
> > +++ b/src/mesa/main/extensions_table.h
> > @@ -278,7 +278,7 @@ EXT(EXT_texture_buffer  ,
> > OES_texture_buffer
> >  EXT(EXT_texture_compression_dxt1,
> > ANGLE_texture_compression_dxt  , GLL, GLC, ES1, ES2, 2004)
> >  EXT(EXT_texture_compression_latc,
> > EXT_texture_compression_latc   , GLL,  x ,  x ,  x , 2006)
> >  EXT(EXT_texture_compression_rgtc,
> > ARB_texture_compression_rgtc   , GLL, GLC,  x ,  x , 2004)
> > -EXT(EXT_texture_compression_s3tc,
> > EXT_texture_compression_s3tc   , GLL, GLC,  x ,  x , 2000)
> > +EXT(EXT_texture_compression_s3tc,
> > EXT_texture_compression_s3tc   , GLL, GLC,  x , ES2, 2000)
> >  EXT(EXT_texture_cube_map,
> > ARB_texture_cube_map   , GLL,  x ,  x ,  x , 2001)
> >  EXT(EXT_texture_cube_map_array  ,
> > OES_texture_cube_map_array ,  x ,  x ,  x ,  31, 2014)
> >  EXT(EXT_texture_edge_clamp  , dummy_true 
> >, GLL,  x ,  x ,  x , 1997)

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Re: [Mesa-dev] [PATCH 4/4] autotools: include intel_tiled_memcopy.c

2018-10-24 Thread Juan A. Suarez Romero 
On Wed, 2018-10-24 at 09:16 -0700, Dylan Baker wrote:
> Quoting Juan A. Suarez Romero (2018-10-24 09:10:37)
> > On Tue, 2018-10-23 at 15:56 -0700, Dylan Baker wrote:
> > > There are two problems with the fixed patch. First, it fails to create a
> > > dependency on the sourced .c file, so changes to intel_tiled_memcpy.c
> > > won't trigger a rebuild. It also doesn't get included in the dist
> > > tarball.
> > > 
> > > CC: Tapani Pälli 
> > > Fixes: 11b1afdc92db98e93f2ca50beeb7fc481a11e708
> > >("i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear")
> > 
> > Nice! This indeed fixes `make distcheck`
> 
> Yup! I'm trying to get things cleaned up for the 18.3 release next week. 
> Learned
> the hard way the last time around that I need to start on this early :)
> 

That's nice. Then maybe you are interested that master does not build with LLVM
7.0. There are some patches in the mailing list, but not sure if they fix
completely the build.

I'm wondering if building Mesa 18.3 with LLVM 7.0 should be part of the
"features" we want in the branchpoint.


> > 
> > Reviewed-by: Juan A. Suarez 
> 
> Thanks!
> 
> > 
> > 
> > > ---
> > >  src/mesa/drivers/dri/i965/Makefile.am  | 4 
> > >  src/mesa/drivers/dri/i965/Makefile.sources | 3 +++
> > >  2 files changed, 7 insertions(+)
> > > 
> > > diff --git a/src/mesa/drivers/dri/i965/Makefile.am 
> > > b/src/mesa/drivers/dri/i965/Makefile.am
> > > index dc19da2c4a6..fda17589cfb 100644
> > > --- a/src/mesa/drivers/dri/i965/Makefile.am
> > > +++ b/src/mesa/drivers/dri/i965/Makefile.am
> > > @@ -126,6 +126,7 @@ CLEANFILES = $(BUILT_SOURCES)
> > >  EXTRA_DIST = \
> > >   brw_oa.py \
> > >   $(i965_oa_xml_FILES) \
> > > + $(intel_tiled_memcpy_dep_FILES) \
> > >   meson.build
> > >  
> > >  brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES)
> > > @@ -135,3 +136,6 @@ brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES)
> > >   $(i965_oa_xml_FILES:%=$(srcdir)/%)
> > >  
> > >  brw_oa_metrics.h: brw_oa_metrics.c
> > > +
> > > +intel_tiled_memcpy_normal.c: $(intel_tiled_memcpy_dep_FILES)
> > > +intel_tiled_memcpy_sse41.c: $(intel_tiled_memcpy_dep_FILES)
> > > diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> > > b/src/mesa/drivers/dri/i965/Makefile.sources
> > > index 0ab0e42fb18..043a70029f2 100644
> > > --- a/src/mesa/drivers/dri/i965/Makefile.sources
> > > +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> > > @@ -121,6 +121,9 @@ intel_tiled_memcpy_sse41_FILES = \
> > >   intel_tiled_memcpy_sse41.c \
> > >   intel_tiled_memcpy_sse41.h
> > >  
> > > +intel_tiled_memcpy_dep_FILES = \
> > > + intel_tiled_memcpy.c
> > > +
> > >  i965_gen4_FILES = \
> > >   genX_blorp_exec.c \
> > >   genX_state_upload.c

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Re: [Mesa-dev] [PATCH v2 1/2] move u_math to src/util

2018-10-24 Thread Juan A. Suarez Romero 
On Wed, 2018-09-05 at 14:55 -0700, Dylan Baker wrote:
> Currently we have two sets of functions for bit counts, one in gallium
> and one in core mesa. The ones in core mesa are header only in many
> cases, since they reduce to "#define _mesa_bitcount popcount", but they
> provide a fallback implementation. This is important because 32bit msvc
> doesn't have popcountll, just popcount; so when nir (for example)
> includes the core mesa header it doesn't (and shouldn't) link with core
> mesa. To fix this we'll promote the version out of gallium util, then
> replace the core mesa uses with the util version, since nir (and other
> non-core mesa users) can and do link with mesautils.
> ---


I've noticed this patch has broken "macOs make" target in Travis CI:

https://travis-ci.org/mesa3d/mesa/builds/445588600


Seems that now it can't find some symbols (_util_cpu_caps).


J.A.

>  src/broadcom/cle/v3d_packet_helpers.h   | 2 +-
>  src/gallium/auxiliary/Makefile.sources  | 2 --
>  src/gallium/auxiliary/meson.build   | 2 --
>  src/gallium/auxiliary/util/u_format.c   | 2 +-
>  src/gallium/auxiliary/util/u_format_bptc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_latc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_other.c | 2 +-
>  src/gallium/auxiliary/util/u_format_pack.py | 2 +-
>  src/gallium/auxiliary/util/u_format_rgtc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_s3tc.c  | 2 +-
>  src/gallium/auxiliary/util/u_format_yuv.h   | 2 +-
>  src/gallium/auxiliary/util/u_format_zs.c| 2 +-
>  src/util/Makefile.sources   | 2 ++
>  src/util/meson.build| 2 ++
>  src/{gallium/auxiliary => }/util/u_math.c   | 0
>  src/{gallium/auxiliary => }/util/u_math.h   | 2 +-
>  16 files changed, 15 insertions(+), 15 deletions(-)
>  rename src/{gallium/auxiliary => }/util/u_math.c (100%)
>  rename src/{gallium/auxiliary => }/util/u_math.h (99%)
> 
> diff --git a/src/broadcom/cle/v3d_packet_helpers.h 
> b/src/broadcom/cle/v3d_packet_helpers.h
> index f340b790697..c46089a0e60 100644
> --- a/src/broadcom/cle/v3d_packet_helpers.h
> +++ b/src/broadcom/cle/v3d_packet_helpers.h
> @@ -26,7 +26,7 @@
>  #include 
>  #include 
>  #include 
> -#include 
> +#include "util/u_math.h"
>  
>  #ifdef HAVE_VALGRIND
>  #include 
> diff --git a/src/gallium/auxiliary/Makefile.sources 
> b/src/gallium/auxiliary/Makefile.sources
> index d66fa85f798..33d58dedf28 100644
> --- a/src/gallium/auxiliary/Makefile.sources
> +++ b/src/gallium/auxiliary/Makefile.sources
> @@ -294,8 +294,6 @@ C_SOURCES := \
>   util/u_linear.h \
>   util/u_log.c \
>   util/u_log.h \
> - util/u_math.c \
> - util/u_math.h \
>   util/u_memory.h \
>   util/u_mm.c \
>   util/u_mm.h \
> diff --git a/src/gallium/auxiliary/meson.build 
> b/src/gallium/auxiliary/meson.build
> index be558e07b27..9e3673a53c0 100644
> --- a/src/gallium/auxiliary/meson.build
> +++ b/src/gallium/auxiliary/meson.build
> @@ -314,8 +314,6 @@ files_libgallium = files(
>'util/u_linear.h',
>'util/u_log.c',
>'util/u_log.h',
> -  'util/u_math.c',
> -  'util/u_math.h',
>'util/u_memory.h',
>'util/u_mm.c',
>'util/u_mm.h',
> diff --git a/src/gallium/auxiliary/util/u_format.c 
> b/src/gallium/auxiliary/util/u_format.c
> index 1dd724d9b84..6445f2647cf 100644
> --- a/src/gallium/auxiliary/util/u_format.c
> +++ b/src/gallium/auxiliary/util/u_format.c
> @@ -32,11 +32,11 @@
>   * @author Jose Fonseca 
>   */
>  
> -#include "u_math.h"
>  #include "u_memory.h"
>  #include "u_format.h"
>  #include "u_format_s3tc.h"
>  #include "u_surface.h"
> +#include "util/u_math.h"
>  
>  #include "pipe/p_defines.h"
>  
> diff --git a/src/gallium/auxiliary/util/u_format_bptc.c 
> b/src/gallium/auxiliary/util/u_format_bptc.c
> index 87ec4139e09..519a541e380 100644
> --- a/src/gallium/auxiliary/util/u_format_bptc.c
> +++ b/src/gallium/auxiliary/util/u_format_bptc.c
> @@ -23,10 +23,10 @@
>   *
>   **/
>  
> -#include "u_math.h"
>  #include "u_format.h"
>  #include "u_format_bptc.h"
>  #include "util/format_srgb.h"
> +#include "util/u_math.h"
>  
>  #define BPTC_BLOCK_DECODE
>  #include "../../../mesa/main/texcompress_bptc_tmp.h"
> diff --git a/src/gallium/auxiliary/util/u_format_latc.c 
> b/src/gallium/auxiliary/util/u_format_latc.c
> index 7b2bb00693f..f145081d56d 100644
> --- a/src/gallium/auxiliary/util/u_format_latc.c
> +++ b/src/gallium/auxiliary/util/u_format_latc.c
> @@ -23,11 +23,11 @@
>   **/
>  
>  #include 
> -#include "u_math.h"
>  #include "u_format.h"
>  #include "u_format_rgtc.h"
>  #include "u_format_latc.h"
>  #include "util/rgtc.h"
> +#include "util/u_math.h"
>  
>  void
>  util_format_latc1_unorm_fetch_rgba_8unorm(uint8_t *dst, const uint8_t *src, 
> unsigned i, unsigned j)
> diff --git a/src/gallium/auxiliary/util/u_format_other.c 
>

Re: [Mesa-dev] [PATCH 4/4] autotools: include intel_tiled_memcopy.c

2018-10-24 Thread Dylan Baker 
Quoting Juan A. Suarez Romero (2018-10-24 09:10:37)
> On Tue, 2018-10-23 at 15:56 -0700, Dylan Baker wrote:
> > There are two problems with the fixed patch. First, it fails to create a
> > dependency on the sourced .c file, so changes to intel_tiled_memcpy.c
> > won't trigger a rebuild. It also doesn't get included in the dist
> > tarball.
> > 
> > CC: Tapani Pälli 
> > Fixes: 11b1afdc92db98e93f2ca50beeb7fc481a11e708
> >("i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear")
> 
> Nice! This indeed fixes `make distcheck`

Yup! I'm trying to get things cleaned up for the 18.3 release next week. Learned
the hard way the last time around that I need to start on this early :)

> 
> Reviewed-by: Juan A. Suarez 

Thanks!

> 
> 
> > ---
> >  src/mesa/drivers/dri/i965/Makefile.am  | 4 
> >  src/mesa/drivers/dri/i965/Makefile.sources | 3 +++
> >  2 files changed, 7 insertions(+)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/Makefile.am 
> > b/src/mesa/drivers/dri/i965/Makefile.am
> > index dc19da2c4a6..fda17589cfb 100644
> > --- a/src/mesa/drivers/dri/i965/Makefile.am
> > +++ b/src/mesa/drivers/dri/i965/Makefile.am
> > @@ -126,6 +126,7 @@ CLEANFILES = $(BUILT_SOURCES)
> >  EXTRA_DIST = \
> >   brw_oa.py \
> >   $(i965_oa_xml_FILES) \
> > + $(intel_tiled_memcpy_dep_FILES) \
> >   meson.build
> >  
> >  brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES)
> > @@ -135,3 +136,6 @@ brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES)
> >   $(i965_oa_xml_FILES:%=$(srcdir)/%)
> >  
> >  brw_oa_metrics.h: brw_oa_metrics.c
> > +
> > +intel_tiled_memcpy_normal.c: $(intel_tiled_memcpy_dep_FILES)
> > +intel_tiled_memcpy_sse41.c: $(intel_tiled_memcpy_dep_FILES)
> > diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> > b/src/mesa/drivers/dri/i965/Makefile.sources
> > index 0ab0e42fb18..043a70029f2 100644
> > --- a/src/mesa/drivers/dri/i965/Makefile.sources
> > +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> > @@ -121,6 +121,9 @@ intel_tiled_memcpy_sse41_FILES = \
> >   intel_tiled_memcpy_sse41.c \
> >   intel_tiled_memcpy_sse41.h
> >  
> > +intel_tiled_memcpy_dep_FILES = \
> > + intel_tiled_memcpy.c
> > +
> >  i965_gen4_FILES = \
> >   genX_blorp_exec.c \
> >   genX_state_upload.c
> 


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[Mesa-dev] [Bug 108082] warning: unknown warning option '-Wno-format-truncation' [-Wunknown-warning-option]

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108082

--- Comment #7 from Dylan Baker  ---
We're not going to track down every ICC unsupported argument warning, ICC is
very spammy about unsupported arguments, and getting compiler checks to work
with ICC is a huge pain. As long as they're just warnings lets not worry about
them.

As an aside, I'm trying to get ICC in shape for meson, and there are lots of
annoying "helpful" features in that compiler. Hopeuflly it'll be basically
working by meson 0.49.0.

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Re: [Mesa-dev] [PATCH 4/4] autotools: include intel_tiled_memcopy.c

2018-10-24 Thread Juan A. Suarez Romero 
On Tue, 2018-10-23 at 15:56 -0700, Dylan Baker wrote:
> There are two problems with the fixed patch. First, it fails to create a
> dependency on the sourced .c file, so changes to intel_tiled_memcpy.c
> won't trigger a rebuild. It also doesn't get included in the dist
> tarball.
> 
> CC: Tapani Pälli 
> Fixes: 11b1afdc92db98e93f2ca50beeb7fc481a11e708
>("i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear")

Nice! This indeed fixes `make distcheck`


Reviewed-by: Juan A. Suarez 


> ---
>  src/mesa/drivers/dri/i965/Makefile.am  | 4 
>  src/mesa/drivers/dri/i965/Makefile.sources | 3 +++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/Makefile.am 
> b/src/mesa/drivers/dri/i965/Makefile.am
> index dc19da2c4a6..fda17589cfb 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.am
> +++ b/src/mesa/drivers/dri/i965/Makefile.am
> @@ -126,6 +126,7 @@ CLEANFILES = $(BUILT_SOURCES)
>  EXTRA_DIST = \
>   brw_oa.py \
>   $(i965_oa_xml_FILES) \
> + $(intel_tiled_memcpy_dep_FILES) \
>   meson.build
>  
>  brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES)
> @@ -135,3 +136,6 @@ brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES)
>   $(i965_oa_xml_FILES:%=$(srcdir)/%)
>  
>  brw_oa_metrics.h: brw_oa_metrics.c
> +
> +intel_tiled_memcpy_normal.c: $(intel_tiled_memcpy_dep_FILES)
> +intel_tiled_memcpy_sse41.c: $(intel_tiled_memcpy_dep_FILES)
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index 0ab0e42fb18..043a70029f2 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -121,6 +121,9 @@ intel_tiled_memcpy_sse41_FILES = \
>   intel_tiled_memcpy_sse41.c \
>   intel_tiled_memcpy_sse41.h
>  
> +intel_tiled_memcpy_dep_FILES = \
> + intel_tiled_memcpy.c
> +
>  i965_gen4_FILES = \
>   genX_blorp_exec.c \
>   genX_state_upload.c

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Re: [Mesa-dev] [PATCH 3/4] meson: fix formatting and add extra_files to i965

2018-10-24 Thread Juan A. Suarez Romero 
On Tue, 2018-10-23 at 15:56 -0700, Dylan Baker wrote:
> extra_files is just a nice way to to tell certain IDE's (and those
> reading the file) that this file is also a dependency. Meson will use
> the .d file generated by the compiler to figure out what the target
> actually depends on.


Reviewed-by: Juan A. Suarez 

> ---
>  src/mesa/drivers/dri/i965/meson.build | 22 --
>  1 file changed, 12 insertions(+), 10 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/meson.build 
> b/src/mesa/drivers/dri/i965/meson.build
> index bf366a6c157..24172955e9b 100644
> --- a/src/mesa/drivers/dri/i965/meson.build
> +++ b/src/mesa/drivers/dri/i965/meson.build
> @@ -191,20 +191,22 @@ intel_tiled_memcpy = static_library(
>  inc_common, inc_intel, inc_dri_common, inc_drm_uapi,
>],
>c_args : [c_vis_args, no_override_init_args, '-msse2'],
> +  extra_files : ['intel_tiled_memcpy.c']
>  )
>  
>  if with_sse41
> -intel_tiled_memcpy_sse41 = static_library(
> -  'intel_tiled_memcpy_sse41',
> -  [files_intel_tiled_memcpy_sse41],
> -  include_directories : [
> -inc_common, inc_intel, inc_dri_common, inc_drm_uapi,
> -  ],
> -  link_args : [ '-Wl,--exclude-libs=ALL' ],
> -  c_args : [c_vis_args, no_override_init_args, '-Wl,--exclude-libs=ALL', 
> '-msse2', sse41_args],
> -)
> +  intel_tiled_memcpy_sse41 = static_library(
> +'intel_tiled_memcpy_sse41',
> +[files_intel_tiled_memcpy_sse41],
> +include_directories : [
> +  inc_common, inc_intel, inc_dri_common, inc_drm_uapi,
> +],
> +link_args : ['-Wl,--exclude-libs=ALL'],
> +c_args : [c_vis_args, no_override_init_args, '-Wl,--exclude-libs=ALL', 
> '-msse2', sse41_args],
> +extra_files : ['intel_tiled_memcpy.c']
> +  )
>  else
> -intel_tiled_memcpy_sse41 = []
> +  intel_tiled_memcpy_sse41 = []
>  endif
>  
>  

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Re: [Mesa-dev] [PATCH 2/2] freedreno: ir3: fix wrong return if reg is an array

2018-10-24 Thread Rob Clark 
On Tue, Oct 23, 2018 at 9:57 PM Hyunjun Ko  wrote:
>
> Since ir3_register struct has union, it could return true even
> if it's an array register accidentally when checking whether it
> is address/predicate register.
>
> Fixes: dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.6
> ---
>  src/gallium/drivers/freedreno/ir3/ir3.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h 
> b/src/gallium/drivers/freedreno/ir3/ir3.h
> index 3055c10f1d..db94603558 100644
> --- a/src/gallium/drivers/freedreno/ir3/ir3.h
> +++ b/src/gallium/drivers/freedreno/ir3/ir3.h
> @@ -739,7 +739,7 @@ static inline bool writes_addr(struct ir3_instruction 
> *instr)
>  {
> if (instr->regs_count > 0) {
> struct ir3_register *dst = instr->regs[0];
> -   return reg_num(dst) == REG_A0;
> +   return (reg_num(dst) == REG_A0) && !(dst->flags & 
> IR3_REG_ARRAY);

hmm, good catch.. although I wonder if writes_gpr() in ir3_ra.c has
the same issue.  Or anywhere else?  (Otoh, I guess checking for CONST
and IMMED in writes_gpr() is a bit silly)

From a quick look at the IR3_REG_* flags, I think IR3_REG_ARRAY is the
only problematic case.. but this is a bit more fragile than it should
be.  Maybe we should just move 'int num' out of the union?  Maybe that
was too much premature optimization?

BR,
-R

> }
> return false;
>  }
> @@ -748,7 +748,7 @@ static inline bool writes_pred(struct ir3_instruction 
> *instr)
>  {
> if (instr->regs_count > 0) {
> struct ir3_register *dst = instr->regs[0];
> -   return reg_num(dst) == REG_P0;
> +   return (reg_num(dst) == REG_P0) && !(dst->flags & 
> IR3_REG_ARRAY);
> }
> return false;
>  }
> --
> 2.17.1
>
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Re: [Mesa-dev] [PATCH 1/2] freedreno: use fd_bc_alloc_batch instead of fd_batch_create.

2018-10-24 Thread Rob Clark 
On Tue, Oct 23, 2018 at 9:57 PM Hyunjun Ko  wrote:
>
> Following the commit 2385d7b066 and 8e798e28f7, for resource dependancy
> tracking.
>
> Fixes: 
> dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth_fbo
> with FD_MESA_DEBUG=inorder

Reviewed-by: Rob Clark 

> ---
>  src/gallium/drivers/freedreno/a5xx/fd5_blitter.c | 2 +-
>  src/gallium/drivers/freedreno/freedreno_batch.c  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c 
> b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c
> index 6e8177d344..09ff2b71ec 100644
> --- a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c
> +++ b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c
> @@ -459,7 +459,7 @@ fd5_blitter_blit(struct fd_context *ctx, const struct 
> pipe_blit_info *info)
> return;
> }
>
> -   batch = fd_batch_create(ctx, true);
> +   batch = fd_bc_alloc_batch(>screen->batch_cache, ctx, true);
>
> fd5_emit_restore(batch, batch->draw);
> fd5_emit_lrz_flush(batch->draw);
> diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c 
> b/src/gallium/drivers/freedreno/freedreno_batch.c
> index 487176cc63..c83466d176 100644
> --- a/src/gallium/drivers/freedreno/freedreno_batch.c
> +++ b/src/gallium/drivers/freedreno/freedreno_batch.c
> @@ -360,7 +360,7 @@ fd_batch_flush(struct fd_batch *batch, bool sync, bool 
> force)
>  */
> new_batch = NULL;
> } else {
> -   new_batch = fd_batch_create(ctx, false);
> +   new_batch = 
> fd_bc_alloc_batch(>screen->batch_cache, ctx, false);
> util_copy_framebuffer_state(_batch->framebuffer, 
> >framebuffer);
> }
>
> --
> 2.17.1
>
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[Mesa-dev] [Bug 108508] Graphic glitches with stream output support on OLAND AMD GPU GCN 1.0

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108508

--- Comment #9 from Ahmed Elsayed  ---
(In reply to Samuel Pitoiset from comment #8)
> No, 18.2.X are bugfixes releases, we don't backport features. We might be
> able to merge it in time for 18.3.

So it will land on December or may be sooner than that?

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[Mesa-dev] [Bug 92552] piglit egl-create-context-valid-flag-forward-compatible-gl regression

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=92552

asimiklit  changed:

   What|Removed |Added

Summary|[softpipe] piglit   |piglit
   |egl-create-context-valid-fl |egl-create-context-valid-fl
   |ag-forward-compatible-gl|ag-forward-compatible-gl
   |regression  |regression

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[Mesa-dev] [Bug 108508] Graphic glitches with stream output support on OLAND AMD GPU GCN 1.0

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108508

--- Comment #8 from Samuel Pitoiset  ---
No, 18.2.X are bugfixes releases, we don't backport features. We might be able
to merge it in time for 18.3.

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[Mesa-dev] [Bug 108508] Graphic glitches with stream output support on OLAND AMD GPU GCN 1.0

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108508

--- Comment #7 from Ahmed Elsayed  ---
Does Mesa 18.2.4 secdueled to release at the end of Oct will have
VK_EXT_transform_feedback patches?

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[Mesa-dev] [Bug 105731] linker error "fragment shader input ... has no matching output in the previous stage" when previous stage's output declaration in a separate shader object

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=105731

--- Comment #8 from vadym  ---
(In reply to Marcel Heinz from comment #7)
> Reopened bug because bug was not completely resolved. See the second
> attachment with the updated reproducer code for another case to tirgger the
> issue.

Hi Marcel,

Thanks for the new test. I also able to reproduce this. Already found the
reason and pushed new patch: https://patchwork.freedesktop.org/patch/258176/

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Re: [Mesa-dev] [PATCH v3] i965: Fix calculation of layers array length for isl_view

2018-10-24 Thread Danylo Piliaiev 

I have made a Piglit test that exercises the issue:

https://patchwork.freedesktop.org/patch/258180/

- Danil

On 9/10/18 6:21 PM, Danylo Piliaiev wrote:

Handle all cases in calculation of layers count for isl_view
taking into account texture view and image unit.
st_convert_image was taken as a reference.

When u->Layered is true the whole level is taken with respect to
image view. In other case only one layer is taken.

v3: (Józef Kucia and Ilia Mirkin)
 - Rewrote patch by taking st_convert_image as a reference
 - Removed now unused get_image_num_layers function
 - Changed commit message

Fixes: 5a8c8903
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107856

Signed-off-by: Danylo Piliaiev 
---
  .../drivers/dri/i965/brw_wm_surface_state.c   | 32 ++-
  1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 944762ec46..9bfe6e2037 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1499,18 +1499,6 @@ update_buffer_image_param(struct brw_context *brw,
 param->stride[0] = _mesa_get_format_bytes(u->_ActualFormat);
  }
  
-static unsigned

-get_image_num_layers(const struct intel_mipmap_tree *mt, GLenum target,
- unsigned level)
-{
-   if (target == GL_TEXTURE_CUBE_MAP)
-  return 6;
-
-   return target == GL_TEXTURE_3D ?
-  minify(mt->surf.logical_level0_px.depth, level) :
-  mt->surf.logical_level0_px.array_len;
-}
-
  static void
  update_image_surface(struct brw_context *brw,
   struct gl_image_unit *u,
@@ -1541,14 +1529,28 @@ update_image_surface(struct brw_context *brw,
} else {
   struct intel_texture_object *intel_obj = intel_texture_object(obj);
   struct intel_mipmap_tree *mt = intel_obj->mt;
- const unsigned num_layers = u->Layered ?
-get_image_num_layers(mt, obj->Target, u->Level) : 1;
+
+ unsigned base_layer, num_layers;
+ if (u->Layered) {
+if (obj->Target == GL_TEXTURE_3D) {
+   base_layer = 0;
+   num_layers = minify(mt->surf.logical_level0_px.depth, u->Level);
+} else {
+   base_layer = obj->MinLayer;
+   num_layers = obj->Immutable ?
+obj->NumLayers :
+mt->surf.logical_level0_px.array_len;
+}
+ } else {
+base_layer = obj->MinLayer + u->_Layer;
+num_layers = 1;
+ }
  
   struct isl_view view = {

  .format = format,
  .base_level = obj->MinLevel + u->Level,
  .levels = 1,
-.base_array_layer = obj->MinLayer + u->_Layer,
+.base_array_layer = base_layer,
  .array_len = num_layers,
  .swizzle = ISL_SWIZZLE_IDENTITY,
  .usage = ISL_SURF_USAGE_STORAGE_BIT,


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[Mesa-dev] [AppVeyor] mesa master #9140 completed

2018-10-24 Thread AppVeyor 


Build mesa 9140 completed



Commit d9a04196d9 by Jose Fonseca on 10/24/2018 10:33 AM:

nir: Fix array initializer.\n\nEmpty initializer is not standard C.  This fixes MSVC build.\n\nTrivial.


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[Mesa-dev] [PATCH] glsl/linker: Fix out variables linking during single stage

2018-10-24 Thread Vadym Shovkoplias 
Since out variables are copied from shader objects instruction
streams to linked shader instruction steam it should be cloned
at first to keep source instruction steam unaltered.

Fixes: 966a797e433 glsl/linker: Link all out vars from a shader
objects on a single stage
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105731
Signed-off-by: Vadym Shovkoplias 
---
 src/compiler/glsl/linker.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 7db34ebf95..8b1b03322a 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -2269,10 +2269,11 @@ link_output_variables(struct gl_linked_shader 
*linked_shader,
  if (ir->ir_type != ir_type_variable)
 continue;
 
- ir_variable *const var = (ir_variable *) ir;
+ ir_variable *var = (ir_variable *) ir;
 
  if (var->data.mode == ir_var_shader_out &&
!symbols->get_variable(var->name)) {
+var = var->clone(linked_shader, NULL);
 symbols->add_variable(var);
 linked_shader->ir->push_head(var);
  }
-- 
2.18.0

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[Mesa-dev] [AppVeyor] mesa master #9139 failed

2018-10-24 Thread AppVeyor 



Build mesa 9139 failed


Commit d99fda17c8 by Liviu Prodea on 10/24/2018 10:08 AM:

scons: Put to rest zombie texture_float build option.\n\nI found a remnant of texture_float build option that wasn't removed in\ncommit 66673bef941af344314fe9c91cad8cd330b245eb\n\nThis patch removes it.\n\nCc: mesa-sta...@lists.freedesktop.org\nReviewed-by: Jose Fonseca 


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Re: [Mesa-dev] [Mesa-stable][PATCH] Scons: Put to rest zombie texture_float build option

2018-10-24 Thread Jose Fonseca 

I went ahead and committed this.  Thanks.

Jose

On 23/10/18 22:10, Liviu Prodea wrote:

I found a remnant of texture_float build option that wasn't removed in

https://gitlab.freedesktop.org/mesa/mesa/commit/66673bef941af344314fe9c91cad8cd330b245eb 



This patch removes it.

---

  common.py | 3 ---
  1 file changed, 3 deletions(-)


diff --git a/common.py b/common.py
index f4f2bb4..be3ccfc 100644
--- a/common.py
+++ b/common.py
@@ -105,9 +105,6 @@ def AddOptions(opts):
  opts.Add(BoolOption('debug', 'DEPRECATED: debug build', 'yes'))
  opts.Add(BoolOption('profile', 'DEPRECATED: profile build', 'no'))
  opts.Add(BoolOption('quiet', 'DEPRECATED: profile build', 'yes'))
-    opts.Add(BoolOption('texture_float',
-    'enable floating-point textures and renderbuffers',
-    'no'))
  opts.Add(BoolOption('swr', 'Build OpenSWR', 'no'))
  if host_platform == 'windows':
  opts.Add('MSVC_VERSION', 'Microsoft Visual C/C++ version')




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[Mesa-dev] [AppVeyor] mesa staging/18.2 #9138 completed

2018-10-24 Thread AppVeyor 


Build mesa 9138 completed



Commit d39924f601 by Eric Engestrom on 10/18/2018 2:51 PM:

radv: s/abs/fabsf/ for floats\n\nFixes: a4c4efad89eceb26cf82 "radv: Rework guard band calculation"\nSigned-off-by: Eric Engestrom \nReviewed-by: Bas Nieuwenhuizen \n(cherry picked from commit 17b03b532022d4042fb2170b38dc28f5ff22bb8a)


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[Mesa-dev] [PATCH] i965: Be resilient in the face of GPU hangs

2018-10-24 Thread Chris Wilson 
If we hang the GPU and end up banning our context, we will no longer be
able to submit and abort with an error (exit(1) no less). As we submit
minimal incremental batches that rely on the logical context state of
previous batches, we can not rely on the kernel's recovery mechanism
which tries to restore the context back to a "golden" renderstate (the
default HW setup) and replay the batches in flight. Instead, we must
create a new context and set it up, including all the lost register
settings that we only apply once during setup, before allow the user to
continue rendering. The batches already submitted are lost
(unrecoverable) so there will be a momentarily glitch and lost rendering
across frames, but the application should be able to recover and
continue on fairly oblivious.

To make wedging even more likely, we use a new "no recovery" context
parameter that tells the kernel to not even attempt to replay any
batches in flight against the default context image, as experience shows
the HW is not always robust enough to cope with the conflicting state.

Cc: Kenneth Graunke 
---
 src/mesa/drivers/dri/i965/brw_bufmgr.c| 25 +++
 src/mesa/drivers/dri/i965/brw_bufmgr.h|  2 ++
 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 19 ++
 3 files changed, 46 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c 
b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index f1675b191c1..328393e2ade 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1589,6 +1589,16 @@ init_cache_buckets(struct brw_bufmgr *bufmgr)
}
 }
 
+static void init_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id)
+{
+   struct drm_i915_gem_context_param p = {
+  .ctx_id = ctx_id,
+  .param = 0x7, // I915_CONTEXT_PARAM_RECOVERABLE,
+   };
+
+   drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, );
+}
+
 uint32_t
 brw_create_hw_context(struct brw_bufmgr *bufmgr)
 {
@@ -1599,6 +1609,8 @@ brw_create_hw_context(struct brw_bufmgr *bufmgr)
   return 0;
}
 
+   init_context(bufmgr, create.ctx_id);
+
return create.ctx_id;
 }
 
@@ -1621,6 +1633,19 @@ brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
return err;
 }
 
+int
+brw_hw_context_get_priority(struct brw_bufmgr *bufmgr, uint32_t ctx_id)
+{
+   struct drm_i915_gem_context_param p = {
+  .ctx_id = ctx_id,
+  .param = I915_CONTEXT_PARAM_PRIORITY,
+   };
+
+   drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, );
+
+   return p.value; /* on error, return 0 i.e. default priority */
+}
+
 void
 brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id)
 {
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h 
b/src/mesa/drivers/dri/i965/brw_bufmgr.h
index 32fc7a553c9..886b2e607ce 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
@@ -356,6 +356,8 @@ uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
 int brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
 uint32_t ctx_id,
 int priority);
+int
+brw_hw_context_get_priority(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 
 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c 
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 4363b146150..73c2bbab18e 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -735,6 +735,18 @@ execbuffer(int fd,
return ret;
 }
 
+static void recreate_context(struct brw_context *brw)
+{
+   struct brw_bufmgr *bufmgr = brw->bufmgr;
+   int prio;
+
+   prio = brw_hw_context_get_priority(bufmgr, brw->hw_ctx);
+   brw_destroy_hw_context(bufmgr, brw->hw_ctx);
+
+   brw->hw_ctx = brw_create_hw_context(bufmgr);
+   brw_hw_context_set_priority(bufmgr, brw->hw_ctx, prio);
+}
+
 static int
 submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
 {
@@ -821,6 +833,13 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int 
*out_fence_fd)
if (brw->ctx.Const.ResetStrategy == GL_LOSE_CONTEXT_ON_RESET_ARB)
   brw_check_for_reset(brw);
 
+   if (ret == -EIO) {
+  recreate_context(brw);
+  brw->ctx.NewDriverState |= BRW_NEW_CONTEXT;
+  brw_upload_invariant_state(brw);
+  ret = 0;
+   }
+
if (ret != 0) {
   fprintf(stderr, "i965: Failed to submit batchbuffer: %s\n",
   strerror(-ret));
-- 
2.19.1

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Re: [Mesa-dev] [PATCH] amd/common: check DRM version 3.27 for JPEG decode

2018-10-24 Thread Alex Smith 
Thanks, that's fixed it for me.

On Tue, 23 Oct 2018 at 18:05, Liu, Leo  wrote:

> JPEG was added after DRM version 3.26
>
> Signed-off-by: Leo Liu 
> Fixes: 4558758c51749(amd/common: add vcn jpeg ip info query)
> Cc: Boyuan Zhang 
> Cc: Alex Smith 
> ---
>  src/amd/common/ac_gpu_info.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
> index ed08b500c63..2c70fb2c721 100644
> --- a/src/amd/common/ac_gpu_info.c
> +++ b/src/amd/common/ac_gpu_info.c
> @@ -186,7 +186,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle
> dev,
> }
> }
>
> -   if (info->drm_major == 3 && info->drm_minor >= 17) {
> +   if (info->drm_major == 3 && info->drm_minor >= 27) {
> r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_VCN_JPEG, 0,
> _jpeg);
> if (r) {
> fprintf(stderr, "amdgpu:
> amdgpu_query_hw_ip_info(vcn_jpeg) failed.\n");
> --
> 2.17.1
>
>
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Re: [Mesa-dev] [PATCH] nir: Divergence Analysis

2018-10-24 Thread andrey simiklit 
Hello,

Please find my comment below:

On Mon, Oct 8, 2018 at 2:15 PM Daniel Schürmann <
daniel.schuerm...@campus.tu-berlin.de> wrote:

> ---
>  src/compiler/nir/meson.build   |   1 +
>  src/compiler/nir/nir.h |   2 +
>  src/compiler/nir/nir_divergence_analysis.c | 333 +
>  3 files changed, 336 insertions(+)
>  create mode 100644 src/compiler/nir/nir_divergence_analysis.c
>
> diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
> index 090aa7a628..aabfeee02c 100644
> --- a/src/compiler/nir/meson.build
> +++ b/src/compiler/nir/meson.build
> @@ -96,6 +96,7 @@ files_libnir = files(
>'nir_control_flow_private.h',
>'nir_deref.c',
>'nir_deref.h',
> +  'nir_divergence_analysis.c',
>'nir_dominance.c',
>'nir_format_convert.h',
>'nir_from_ssa.c',
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index e0df95c391..374280a1cc 100644
> --- a/src/compiler/nir/nir.h
> +++ b/src/compiler/nir/nir.h
> @@ -3010,6 +3010,8 @@ void nir_convert_loop_to_lcssa(nir_loop *loop);
>   */
>  bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
>
> +bool* nir_divergence_analysis(nir_shader *shader);
> +
>  bool nir_lower_phis_to_regs_block(nir_block *block);
>  bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
>  bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
> diff --git a/src/compiler/nir/nir_divergence_analysis.c
> b/src/compiler/nir/nir_divergence_analysis.c
> new file mode 100644
> index 00..d91f4e55e6
> --- /dev/null
> +++ b/src/compiler/nir/nir_divergence_analysis.c
> @@ -0,0 +1,333 @@
> +/*
> + * Copyright © 2018 Valve Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> "Software"),
> + * to deal in the Software without restriction, including without
> limitation
> + * the rights to use, copy, modify, merge, publish, distribute,
> sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> next
> + * paragraph) shall be included in all copies or substantial portions of
> the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT
> SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + *Daniel Schürmann (daniel.schuerm...@campus.tu-berlin.de)
> + *
> + */
> +
> +#include "nir.h"
> +#include "nir_worklist.h"
> +
> +/* This pass computes for each ssa definition if it is uniform.
> + * That is, the variable has the same value for all invocations
> + * of the group.
> + *
> + * This algorithm implements "The Simple Divergence Analysis" from
> + * Diogo Sampaio, Rafael De Souza, Sylvain Collange, Fernando Magno
> Quintão Pereira.
> + * Divergence Analysis.  ACM Transactions on Programming Languages and
> Systems (TOPLAS),
> + * ACM, 2013, 35 (4), pp.13:1-13:36. <10.1145/2523815>. 
> + */
> +
> +
> +static bool alu_src_is_divergent(bool *divergent, nir_alu_src src,
> unsigned num_input_components)
> +{
> +   /* If the alu src is swizzled and defined by a vec-instruction,
> +* we can check if the originating value is non-divergent. */
> +   if (num_input_components == 1 &&
> +   src.src.ssa->num_components != 1 &&
> +   src.src.parent_instr->type == nir_instr_type_alu) {
> +  nir_alu_instr *parent = nir_instr_as_alu(src.src.parent_instr);
> +  switch(parent->op) {
> + case nir_op_vec2:
> + case nir_op_vec3:
> + case nir_op_vec4: {
> +if (divergent[parent->src[src.swizzle[0]].src.ssa->index])
> +   return true;
> +return false;
>

Could it be better to just return a value from 'divergent' array here?
"return divergent[parent->src[src.swizzle[0]].src.ssa->index]"
I think it is not very matter but anyway just for case if you will make v2
patch for some reason :-)


> + }
> + default:
> +break;
> +  }
> +   }
> +   return divergent[src.src.ssa->index];
> +}
> +
> +static bool visit_alu(bool *divergent, nir_alu_instr *instr)
> +{
> +   if (divergent[instr->dest.dest.ssa.index])
> +  return false;
> +   unsigned num_src = nir_op_infos[instr->op].num_inputs;
> +   for (unsigned i = 0; i < num_src; i++) {
> +  if (alu_src_is_divergent(divergent, instr->src[i],
> nir_op_infos[instr->op].input_sizes[i])) {
> +

Re: [Mesa-dev] [PATCH 1/3] vl: get h264 profile idc

2018-10-24 Thread Christian König 

Am 23.10.18 um 17:43 schrieb boyuan.zh...@amd.com:

From: Boyuan Zhang 

Adding a function for converting h264 pipe video profile to profile idc

Signed-off-by: Boyuan Zhang 


Series is Acked-by: Christian König 


---
  src/gallium/auxiliary/util/u_video.h | 24 
  1 file changed, 24 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_video.h 
b/src/gallium/auxiliary/util/u_video.h
index 967ebc57489..f6e93dd0387 100644
--- a/src/gallium/auxiliary/util/u_video.h
+++ b/src/gallium/auxiliary/util/u_video.h
@@ -239,6 +239,30 @@ u_get_h264_level(uint32_t width, uint32_t height, uint32_t 
*max_reference)
return 52;
  }
  
+static inline uint32_t

+u_get_h264_profile_idc(enum pipe_video_profile profile)
+{
+   switch (profile) {
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE:
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
+ return 66;
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
+ return 77;
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_EXTENDED:
+ return 88;
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
+ return 100;
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH10:
+ return 110;
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH422:
+ return 122;
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH444:
+ return 244;
+  default:
+ return 66; //use baseline profile instead
+   }
+}
+
  #ifdef __cplusplus
  }
  #endif


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[Mesa-dev] [PATCH] intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar region

2018-10-24 Thread Sagar Ghuge 
For 3 source operand instruction with access mode align16, channel
select does not apply when RepCtrl is enabled, So setting it to
BRW_SWIZZLE_ seems more appropriate choice.

Signed-off-by: Sagar Ghuge 
---
 src/intel/compiler/brw_eu_emit.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 4630b83b1a..4550ff9a7c 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -833,7 +833,15 @@ brw_inst *brw_##OP(struct brw_codegen *p,  \
  struct brw_reg src0,  \
  struct brw_reg src1,  \
  struct brw_reg src2)  \
-{  \
+{   \
+   if (p->current->access_mode == BRW_ALIGN_16) {   \
+  if (has_scalar_region(src0))  \
+ src0.swizzle = BRW_SWIZZLE_;   \
+  if (has_scalar_region(src1))  \
+ src1.swizzle = BRW_SWIZZLE_;   \
+  if (has_scalar_region(src2))  \
+ src2.swizzle = BRW_SWIZZLE_;   \
+   }\
return brw_alu3(p, BRW_OPCODE_##OP, dest, src0, src1, src2);\
 }
 
@@ -854,6 +862,15 @@ brw_inst *brw_##OP(struct brw_codegen *p, \
   assert(src0.type == BRW_REGISTER_TYPE_DF);\
   assert(src1.type == BRW_REGISTER_TYPE_DF);\
   assert(src2.type == BRW_REGISTER_TYPE_DF);\
+   }\
+\
+   if (p->current->access_mode == BRW_ALIGN_16) {   \
+  if (has_scalar_region(src0))  \
+ src0.swizzle = BRW_SWIZZLE_;   \
+  if (has_scalar_region(src1))  \
+ src1.swizzle = BRW_SWIZZLE_;   \
+  if (has_scalar_region(src2))  \
+ src2.swizzle = BRW_SWIZZLE_;   \
}\
return brw_alu3(p, BRW_OPCODE_##OP, dest, src0, src1, src2); \
 }
-- 
2.17.1

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[Mesa-dev] [Bug 108532] make check nir_copy_prop_vars_test.store_store_load_different_components regression

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108532

Juan A. Suarez  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #2 from Juan A. Suarez  ---
Fixed with:

commit 3112da346bd006876d9ac23a781b0a3d0a366653 (HEAD -> master,
upstream/master, origin/master, origin/HEAD, jasuarez/fix-nir-test-v2)
Author: Juan A. Suarez Romero 
Date:   Tue Oct 23 15:55:11 2018 +0200

nir: fix nir_copy_propagation test

Use nir_src_comp_as_uint() to read the proper second component, as
nir_src_as_uint() returns the first one.

v2: Use nir_src_comp_as_uint() [Jason]

Fixes: 16870de8a0a ("nir: Use nir_src_is_const and nir_src_as_* in core
 code")
Signed-off-by: Juan A. Suarez Romero 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108532
Tested-by: Michel Dänzer 
Tested-by: Vinson Lee 
Reviewed-by: Jason Ekstrand 

 src/compiler/nir/tests/vars_tests.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

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[Mesa-dev] [Bug 108530] [Tracker] Mesa 18.3 Release Tracker

2018-10-24 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=108530
Bug 108530 depends on bug 108532, which changed state.

Bug 108532 Summary: make check 
nir_copy_prop_vars_test.store_store_load_different_components regression
https://bugs.freedesktop.org/show_bug.cgi?id=108532

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

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[Mesa-dev] [PATCH 5/5] radv: implement image to image operations for R32G32B32

2018-10-24 Thread Samuel Pitoiset 
This should address the remaining failures in Batman Arkhman City.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107765
Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_meta_bufimage.c | 320 
 src/amd/vulkan/radv_meta_copy.c |   8 +-
 src/amd/vulkan/radv_private.h   |   5 +
 3 files changed, 331 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index 56f1620db5..6f074a70b4 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -909,6 +909,216 @@ radv_device_finish_meta_itoi_state(struct radv_device 
*device)
 state->itoi.pipeline_3d, >alloc);
 }
 
+static nir_shader *
+build_nir_itoi_r32g32b32_compute_shader(struct radv_device *dev)
+{
+   nir_builder b;
+   const struct glsl_type *type = glsl_sampler_type(GLSL_SAMPLER_DIM_BUF,
+false,
+false,
+GLSL_TYPE_FLOAT);
+   nir_builder_init_simple_shader(, NULL, MESA_SHADER_COMPUTE, NULL);
+   b.shader->info.name = ralloc_strdup(b.shader, "meta_itoi_r32g32b32_cs");
+   b.shader->info.cs.local_size[0] = 16;
+   b.shader->info.cs.local_size[1] = 16;
+   b.shader->info.cs.local_size[2] = 1;
+   nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
+ type, "input_img");
+   input_img->data.descriptor_set = 0;
+   input_img->data.binding = 0;
+
+   nir_variable *output_img = nir_variable_create(b.shader, 
nir_var_uniform,
+ type, "output_img");
+   output_img->data.descriptor_set = 0;
+   output_img->data.binding = 1;
+
+   nir_ssa_def *invoc_id = nir_load_system_value(, 
nir_intrinsic_load_local_invocation_id, 0);
+   nir_ssa_def *wg_id = nir_load_system_value(, 
nir_intrinsic_load_work_group_id, 0);
+   nir_ssa_def *block_size = nir_imm_ivec4(,
+   b.shader->info.cs.local_size[0],
+   b.shader->info.cs.local_size[1],
+   
b.shader->info.cs.local_size[2], 0);
+
+   nir_ssa_def *global_id = nir_iadd(, nir_imul(, wg_id, block_size), 
invoc_id);
+
+   nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, 
nir_intrinsic_load_push_constant);
+   nir_intrinsic_set_base(src_offset, 0);
+   nir_intrinsic_set_range(src_offset, 24);
+   src_offset->src[0] = nir_src_for_ssa(nir_imm_int(, 0));
+   src_offset->num_components = 3;
+   nir_ssa_dest_init(_offset->instr, _offset->dest, 3, 32, 
"src_offset");
+   nir_builder_instr_insert(, _offset->instr);
+
+   nir_ssa_def *src_stride = nir_channel(, _offset->dest.ssa, 2);
+
+   nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, 
nir_intrinsic_load_push_constant);
+   nir_intrinsic_set_base(dst_offset, 0);
+   nir_intrinsic_set_range(dst_offset, 24);
+   dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(, 12));
+   dst_offset->num_components = 3;
+   nir_ssa_dest_init(_offset->instr, _offset->dest, 3, 32, 
"dst_offset");
+   nir_builder_instr_insert(, _offset->instr);
+
+   nir_ssa_def *dst_stride = nir_channel(, _offset->dest.ssa, 2);
+
+   nir_ssa_def *src_img_coord = nir_iadd(, global_id, 
_offset->dest.ssa);
+   nir_ssa_def *dst_img_coord = nir_iadd(, global_id, 
_offset->dest.ssa);
+
+   nir_ssa_def *src_global_pos =
+   nir_iadd(,
+nir_imul(, nir_channel(, src_img_coord, 1), 
src_stride),
+nir_imul(, nir_channel(, src_img_coord, 0), 
nir_imm_int(, 3)));
+
+   nir_ssa_def *dst_global_pos =
+   nir_iadd(,
+nir_imul(, nir_channel(, dst_img_coord, 1), 
dst_stride),
+nir_imul(, nir_channel(, dst_img_coord, 0), 
nir_imm_int(, 3)));
+
+   for (int chan = 0; chan < 3; chan++) {
+   /* src */
+   nir_ssa_def *src_local_pos =
+   nir_iadd(, src_global_pos, nir_imm_int(, chan));
+
+   nir_ssa_def *src_coord =
+   nir_vec4(, src_local_pos, src_local_pos,
+src_local_pos, src_local_pos);
+
+   nir_ssa_def *input_img_deref = _build_deref_var(, 
input_img)->dest.ssa;
+
+   nir_tex_instr *tex = nir_tex_instr_create(b.shader, 3);
+   tex->sampler_dim = GLSL_SAMPLER_DIM_BUF;
+   tex->op = nir_texop_txf;
+   tex->src[0].src_type = nir_tex_src_coord;
+   tex->src[0].src = nir_src_for_ssa(nir_channels(, src_coord, 
1));
+   tex->src[1].src_type =

[Mesa-dev] [PATCH 2/5] radv: add create_bview_for_r32g32b32() helper

2018-10-24 Thread Samuel Pitoiset 
For the special R32G32B32 paths.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_meta_bufimage.c | 71 +++--
 1 file changed, 38 insertions(+), 33 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index 1cfe50fc50..6a5058693f 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -1386,6 +1386,40 @@ create_buffer_from_image(struct radv_cmd_buffer 
*cmd_buffer,
   });
 }
 
+static void
+create_bview_for_r32g32b32(struct radv_cmd_buffer *cmd_buffer,
+  struct radv_buffer *buffer,
+  unsigned offset,
+  VkFormat src_format,
+  struct radv_buffer_view *bview)
+{
+   VkFormat format;
+
+   switch (src_format) {
+   case VK_FORMAT_R32G32B32_UINT:
+   format = VK_FORMAT_R32_UINT;
+   break;
+   case VK_FORMAT_R32G32B32_SINT:
+   format = VK_FORMAT_R32_SINT;
+   break;
+   case VK_FORMAT_R32G32B32_SFLOAT:
+   format = VK_FORMAT_R32_SFLOAT;
+   break;
+   default:
+   unreachable("invalid R32G32B32 format");
+   }
+
+   radv_buffer_view_init(bview, cmd_buffer->device,
+ &(VkBufferViewCreateInfo) {
+ .sType = 
VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO,
+ .flags = 0,
+ .buffer = radv_buffer_to_handle(buffer),
+ .format = format,
+ .offset = offset,
+ .range = VK_WHOLE_SIZE,
+ });
+}
+
 static void
 itob_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
  struct radv_image_view *src,
@@ -1507,23 +1541,8 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
struct radv_buffer_view src_view, dst_view;
unsigned dst_offset = 0;
unsigned stride;
-   VkFormat dst_format;
VkBuffer buffer;
 
-   switch (dst->format) {
-   case VK_FORMAT_R32G32B32_UINT:
-   dst_format = VK_FORMAT_R32_UINT;
-   break;
-   case VK_FORMAT_R32G32B32_SINT:
-   dst_format = VK_FORMAT_R32_SINT;
-   break;
-   case VK_FORMAT_R32G32B32_SFLOAT:
-   dst_format = VK_FORMAT_R32_SFLOAT;
-   break;
-   default:
-   unreachable("invalid R32G32B32 format");
-   }
-
/* This special btoi path for R32G32B32 formats will write the linear
 * image as a buffer with the same underlying memory. The compute
 * shader will clear all components separately using a R32 format.
@@ -1534,8 +1553,8 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
 
create_bview(cmd_buffer, src->buffer, src->offset,
 src->format, _view);
-   create_bview(cmd_buffer, radv_buffer_from_handle(buffer), dst_offset,
-dst_format, _view);
+   create_bview_for_r32g32b32(cmd_buffer, radv_buffer_from_handle(buffer),
+  dst_offset, dst->format, _view);
btoi_r32g32b32_bind_descriptors(cmd_buffer, _view, _view);
 
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
@@ -1766,23 +1785,8 @@ radv_meta_clear_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
struct radv_device *device = cmd_buffer->device;
struct radv_buffer_view dst_view;
unsigned stride;
-   VkFormat format;
VkBuffer buffer;
 
-   switch (dst->format) {
-   case VK_FORMAT_R32G32B32_UINT:
-   format = VK_FORMAT_R32_UINT;
-   break;
-   case VK_FORMAT_R32G32B32_SINT:
-   format = VK_FORMAT_R32_SINT;
-   break;
-   case VK_FORMAT_R32G32B32_SFLOAT:
-   format = VK_FORMAT_R32_SFLOAT;
-   break;
-   default:
-   unreachable("invalid R32G32B32 format");
-   }
-
/* This special clear path for R32G32B32 formats will write the linear
 * image as a buffer with the same underlying memory. The compute
 * shader will clear all components separately using a R32 format.
@@ -1791,7 +1795,8 @@ radv_meta_clear_image_cs_r32g32b32(struct radv_cmd_buffer 
*cmd_buffer,
 VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT,
 );
 
-   create_bview(cmd_buffer, radv_buffer_from_handle(buffer), 0, format, 
_view);
+   create_bview_for_r32g32b32(cmd_buffer, radv_buffer_from_handle(buffer),
+  0, dst->format, _view);
cleari_r32g32b32_bind_descriptors(cmd_buffer, _view);

[Mesa-dev] [PATCH 4/5] radv: fix a comment in radv_meta_buffer_to_image_cs_r32g32b32()

2018-10-24 Thread Samuel Pitoiset 
Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_meta_bufimage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index de7e0b1e3e..56f1620db5 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -1560,7 +1560,7 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
 
/* This special btoi path for R32G32B32 formats will write the linear
 * image as a buffer with the same underlying memory. The compute
-* shader will clear all components separately using a R32 format.
+* shader will copy all components separately using a R32 format.
 */
create_buffer_from_image(cmd_buffer, dst,
 VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT,
-- 
2.19.1

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[Mesa-dev] [PATCH 3/5] radv: add get_image_stride_for_r32g32b32() helper

2018-10-24 Thread Samuel Pitoiset 
For the special R32G32B32 paths.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_meta_bufimage.c | 27 +--
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index 6a5058693f..de7e0b1e3e 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -1420,6 +1420,21 @@ create_bview_for_r32g32b32(struct radv_cmd_buffer 
*cmd_buffer,
  });
 }
 
+static unsigned
+get_image_stride_for_r32g32b32(struct radv_cmd_buffer *cmd_buffer,
+  struct radv_meta_blit2d_surf *surf)
+{
+   unsigned stride;
+
+   if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
+   stride = surf->image->surface.u.gfx9.surf_pitch;
+   } else {
+   stride = surf->image->surface.u.legacy.level[0].nblk_x * 3;
+   }
+
+   return stride;
+}
+
 static void
 itob_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
  struct radv_image_view *src,
@@ -1560,11 +1575,7 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
 
-   if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
-   stride = dst->image->surface.u.gfx9.surf_pitch;
-   } else {
-   stride = dst->image->surface.u.legacy.level[0].nblk_x * 3;
-   }
+   stride = get_image_stride_for_r32g32b32(cmd_buffer, dst);
 
for (unsigned r = 0; r < num_rects; ++r) {
unsigned push_constants[4] = {
@@ -1802,11 +1813,7 @@ radv_meta_clear_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
 
-   if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
-   stride = dst->image->surface.u.gfx9.surf_pitch;
-   } else {
-   stride = dst->image->surface.u.legacy.level[0].nblk_x * 3;
-   }
+   stride = get_image_stride_for_r32g32b32(cmd_buffer, dst);
 
unsigned push_constants[4] = {
clear_color->uint32[0],
-- 
2.19.1

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[Mesa-dev] [PATCH 1/5] radv: add create_buffer_from_image() helper

2018-10-24 Thread Samuel Pitoiset 
For the special R32G32B32 paths.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_meta_bufimage.c | 73 ++---
 1 file changed, 35 insertions(+), 38 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_bufimage.c 
b/src/amd/vulkan/radv_meta_bufimage.c
index ec449c5bca..1cfe50fc50 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -1357,6 +1357,35 @@ create_bview(struct radv_cmd_buffer *cmd_buffer,
 
 }
 
+static void
+create_buffer_from_image(struct radv_cmd_buffer *cmd_buffer,
+struct radv_meta_blit2d_surf *surf,
+VkBufferUsageFlagBits usage,
+VkBuffer *buffer)
+{
+   struct radv_device *device = cmd_buffer->device;
+   struct radv_device_memory mem = { .bo = surf->image->bo };
+
+   radv_CreateBuffer(radv_device_to_handle(device),
+ &(VkBufferCreateInfo) {
+   .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
+   .flags = 0,
+   .size = surf->image->size,
+   .usage = usage,
+   .sharingMode = VK_SHARING_MODE_EXCLUSIVE,
+ }, NULL, buffer);
+
+   radv_BindBufferMemory2(radv_device_to_handle(device), 1,
+  (VkBindBufferMemoryInfoKHR[]) {
+   {
+   .sType = 
VK_STRUCTURE_TYPE_BIND_BUFFER_MEMORY_INFO,
+   .buffer = *buffer,
+   .memory = 
radv_device_memory_to_handle(),
+   .memoryOffset = surf->image->offset,
+   }
+  });
+}
+
 static void
 itob_bind_descriptors(struct radv_cmd_buffer *cmd_buffer,
  struct radv_image_view *src,
@@ -1474,7 +1503,6 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
   struct radv_meta_blit2d_rect *rects)
 {
VkPipeline pipeline = 
cmd_buffer->device->meta_state.btoi_r32g32b32.pipeline;
-   struct radv_device_memory mem = { .bo = dst->image->bo };
struct radv_device *device = cmd_buffer->device;
struct radv_buffer_view src_view, dst_view;
unsigned dst_offset = 0;
@@ -1500,24 +1528,9 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
 * image as a buffer with the same underlying memory. The compute
 * shader will clear all components separately using a R32 format.
 */
-   radv_CreateBuffer(radv_device_to_handle(device),
- &(VkBufferCreateInfo) {
-   .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
-   .flags = 0,
-   .size = dst->image->size,
-   .usage = 
VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT,
-   .sharingMode = VK_SHARING_MODE_EXCLUSIVE,
- }, NULL, );
-
-   radv_BindBufferMemory2(radv_device_to_handle(device), 1,
-  (VkBindBufferMemoryInfoKHR[]) {
-   {
-   .sType = 
VK_STRUCTURE_TYPE_BIND_BUFFER_MEMORY_INFO,
-   .buffer = buffer,
-   .memory = 
radv_device_memory_to_handle(),
-   .memoryOffset = dst->image->offset,
-   }
-  });
+   create_buffer_from_image(cmd_buffer, dst,
+VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT,
+);
 
create_bview(cmd_buffer, src->buffer, src->offset,
 src->format, _view);
@@ -1750,7 +1763,6 @@ radv_meta_clear_image_cs_r32g32b32(struct radv_cmd_buffer 
*cmd_buffer,
   const VkClearColorValue *clear_color)
 {
VkPipeline pipeline = 
cmd_buffer->device->meta_state.cleari_r32g32b32.pipeline;
-   struct radv_device_memory mem = { .bo = dst->image->bo };
struct radv_device *device = cmd_buffer->device;
struct radv_buffer_view dst_view;
unsigned stride;
@@ -1775,24 +1787,9 @@ radv_meta_clear_image_cs_r32g32b32(struct 
radv_cmd_buffer *cmd_buffer,
 * image as a buffer with the same underlying memory. The compute
 * shader will clear all components separately using a R32 format.
 */
-   radv_CreateBuffer(radv_device_to_handle(device),
- &(VkBufferCreateInfo) {
-   .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
-   .flags = 0,
-   .size =

Re: [Mesa-dev] [PATCH] glsl/linker: validate attribute aliasing before optimizations

2018-10-24 Thread Tapani Pälli 

ping

On 10/12/18 3:04 PM, Tapani Pälli wrote:

Patch does a 'dry run' of assign_attribute_or_color_locations before
optimizations to catch cases where we have aliasing of unused attributes
which is forbidden by the GLSL ES 3.x specifications.

We need to run this pass before unused attributes may be removed and with
attribute binding information from program, therefore we re-use existing
pass in linker rather than attempt to write another one.

This fixes WebGL2 test 'gl-bindAttribLocation-aliasing-inactive' and
Piglit test 'gles-3.0-attribute-aliasing'.

Signed-off-by: Tapani Pälli 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106833
---
  src/compiler/glsl/linker.cpp | 31 ---
  1 file changed, 28 insertions(+), 3 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 2f4c8860547..905d4b3cbed 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -2709,7 +2709,8 @@ static bool
  assign_attribute_or_color_locations(void *mem_ctx,
  gl_shader_program *prog,
  struct gl_constants *constants,
-unsigned target_index)
+unsigned target_index,
+bool do_assignment)
  {
 /* Maximum number of generic locations.  This corresponds to either the
  * maximum number of draw buffers or the maximum number of generic
@@ -3072,6 +3073,9 @@ assign_attribute_or_color_locations(void *mem_ctx,
num_attr++;
 }
  
+   if (!do_assignment)

+  return true;
+
 if (target_index == MESA_SHADER_VERTEX) {
unsigned total_attribs_size =
   util_bitcount(used_locations & SAFE_MASK_FROM_INDEX(max_index)) +
@@ -4780,12 +4784,12 @@ link_varyings_and_uniforms(unsigned first, unsigned 
last,
 }
  
 if (!assign_attribute_or_color_locations(mem_ctx, prog, >Const,

-MESA_SHADER_VERTEX)) {
+MESA_SHADER_VERTEX, true)) {
return false;
 }
  
 if (!assign_attribute_or_color_locations(mem_ctx, prog, >Const,

-MESA_SHADER_FRAGMENT)) {
+MESA_SHADER_FRAGMENT, true)) {
return false;
 }
  
@@ -5162,6 +5166,27 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)

   lower_tess_level(prog->_LinkedShaders[i]);
}
  
+  /* Section 13.46 (Vertex Attribute Aliasing) of the OpenGL ES 3.2

+   * specification says:
+   *
+   *"In general, the behavior of GLSL ES should not depend on compiler
+   *optimizations which might be implementation-dependent. Name 
matching
+   *rules in most languages, including C++ from which GLSL ES is 
derived,
+   *are based on declarations rather than use.
+   *
+   *RESOLUTION: The existence of aliasing is determined by declarations
+   *present after preprocessing."
+   *
+   * Because of this rule, we do a 'dry-run' of attribute assignment for
+   * vertex shader inputs here.
+   */
+  if (i == MESA_SHADER_VERTEX) {
+ if (!assign_attribute_or_color_locations(mem_ctx, prog, >Const,
+  MESA_SHADER_VERTEX, false)) {
+goto done;
+ }
+  }
+
/* Call opts before lowering const arrays to uniforms so we can const
 * propagate any elements accessed directly.
 */


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