Signed-off-by: Alyssa Rosenzweig
Cc: Rob Clark
---
.../drivers/freedreno/freedreno_resource.c| 20 ---
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c
b/src/gallium/drivers/freedreno/freedreno_resource.c
Signed-off-by: Alyssa Rosenzweig
Cc: Eric Anholt
---
src/gallium/drivers/v3d/v3d_resource.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/v3d/v3d_resource.c
b/src/gallium/drivers/v3d/v3d_resource.c
index ddecafe2ec9..71248e9ca1e
Signed-off-by: Alyssa Rosenzweig
Cc: Eric Anholt
---
src/gallium/drivers/vc4/vc4_resource.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_resource.c
b/src/gallium/drivers/vc4/vc4_resource.c
index c12187d7872..93688cde998
This function is replicated across vc4/v3d/freedreno and is needed in
Panfrost; let's make this shared code.
Signed-off-by: Alyssa Rosenzweig
---
src/util/u_drm.h | 46 ++
1 file changed, 46 insertions(+)
create mode 100644 src/util/u_drm.h
diff
shader-db results (VEGA64):
Totals from affected shaders:
SGPRS: 5328912 -> 5329680 (0.01 %)
VGPRS: 2969308 -> 2969164 (-0.00 %)
Spilled SGPRs: 37921 -> 37917 (-0.01 %)
Spilled VGPRs: 32882 -> 29024 (-11.73 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1400 -> 1200 (-14.29 %) dwords per
No change in my vkpipeline-db collection, but given the same change
in radeonsi resulted in all positive results it seems worth while.
---
src/amd/vulkan/radv_shader.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index
shader-db results (VEGA64):
Totals from affected shaders:
SGPRS: 4992920 -> 4992920 (0.00 %)
VGPRS: 2787092 -> 2786916 (-0.01 %)
Spilled SGPRs: 35987 -> 35987 (0.00 %)
Spilled VGPRs: 29024 -> 29024 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1200 -> 1200 (0.00 %) dwords per
On Wednesday, March 13, 2019 4:25:24 PM PDT Jason Ekstrand wrote:
> We don't set it on HSW and earlier in i965 and disabling it appears to
> make derivatives somewhat more reliable.
>
> Cc: Kenneth Graunke
> ---
> src/intel/vulkan/genX_pipeline.c | 2 +-
> 1 file changed, 1 insertion(+), 1
We don't set it on HSW and earlier in i965 and disabling it appears to
make derivatives somewhat more reliable.
Cc: Kenneth Graunke
---
src/intel/vulkan/genX_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/genX_pipeline.c
Thanks Alex. Adding evoc list.
And I'd also like to point out that the mentors (and xorg board
members, etc) are all volunteers who are also busy with their existing
work and flooded inboxes (and in general finding people with bandwidth
to be a mentor is the hardest thing). Students who show
On Wed, Mar 13, 2019 at 11:37 AM Roland Scheidegger wrote:
>
> Am 12.03.19 um 22:48 schrieb Rob Clark:
> > On Tue, Mar 12, 2019 at 1:59 PM Roland Scheidegger
> > wrote:
> >>
> >> Am 12.03.19 um 16:16 schrieb Rob Clark:
> >>> This previously was not called out clearly, but based on a survey of
Hi Jose,
On Wed, 21 Nov 2018 at 18:45, Jose Maria Casanova Crespo
wrote:
>
> Fixes:
> KHR-GLES*.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
>
This and the follow-up patch "glsl: fix recording of variables for XFB
in TCS shaders" are explicitly marked as 19.0 only.
As
On Wed, Mar 13, 2019 at 3:56 PM Nanley Chery wrote:
> On Tue, Mar 12, 2019 at 10:56:27PM -0500, Jason Ekstrand wrote:
> > Cc: mesa-sta...@lists.freedesktop.org
> > Cc: Nanley Chery
> > ---
> > src/intel/vulkan/anv_pass.c | 18 +-
> > 1 file changed, 17 insertions(+), 1
On Tue, Mar 12, 2019 at 10:56:27PM -0500, Jason Ekstrand wrote:
> Cc: mesa-sta...@lists.freedesktop.org
> Cc: Nanley Chery
> ---
> src/intel/vulkan/anv_pass.c | 18 +-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/vulkan/anv_pass.c
https://bugs.freedesktop.org/show_bug.cgi?id=99553
Jan Vesely changed:
What|Removed |Added
Depends on||110045
Referenced Bugs:
Hi List,
I'm pleased to announce the general availability of mesa 19.0.0. We've had a
slightly long rc process with 7 RCs (there should have been 6, but there was a
bug in the script for pulling patches resulting in two back to back RCs). In
general this release has shaped up rather nicely, and I
Iago Toral writes:
> On Tue, 2019-03-12 at 15:44 -0700, Francisco Jerez wrote:
>> Iago Toral writes:
>>
>> > On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
>> > > On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
>> > > > Iago Toral writes:
>> > > >
>> > > > > On Fri,
Use the raw version (ie. IDXEN=0) because vindex is unused.
v2: - use raw version
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 66 +
1 file changed, 42 insertions(+), 24 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
For consistency regarding other store operations.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 18297ed99b1..947dc359d49
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 127 +
src/amd/common/ac_llvm_build.h | 29
2 files changed, 156 insertions(+)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index
Trivial.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index c77547c319b..247bd20a7ea 100644
--- a/src/amd/common/ac_nir_to_llvm.c
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 949a7a74834..5aad5807bb5 100644
---
Similar to ac_build_buffer_load_format().
v2: - fix out of bounds access
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 100
src/amd/common/ac_llvm_build.h | 11
src/amd/common/ac_nir_to_llvm.c | 29 +++--
3 files changed, 119
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 35 ++---
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 7f63b506b93..949a7a74834 100644
---
New buffer intrinsics have a separate soffset parameter.
v3: - use ac_build_raw_tbuffer_store()
v2: - use the raw version as vindex is not used
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 66 ++
1 file changed, 26 insertions(+), 40
vindex is always 0.
v3: use the raw version
v2: do not force enable IDXEN when unecessary
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 20
src/amd/common/ac_llvm_build.h | 9 +
src/amd/common/ac_nir_to_llvm.c | 25 -
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 0cab4d4a9b5..d21cd7e0e28 100644
--- a/src/amd/common/ac_llvm_build.c
+++
v3: - always use the raw version as vindex is unused
v2: - do not force enable IDXEN when unecessary
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
Hi,
This small series makes use of new LLVM 8 buffer intrinsics.
No CTS regressions on GFX8 with LLVM 7, 8 and master.
v3: use different names (ie. struct vs raw) for IDXEN
V2: fix use of IDXEN for GFX9
Please review,
Thanks!
Samuel Pitoiset (11):
ac: make use of ac_get_store_intr_attribs()
Since the driver now uses typed buffer loads, we don't have to
account for the format.
This fixes few CTS regressions on SI.
Fixes: a66b186bebf ("radv: use typed buffer loads for vertex input fetches")
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 3 +--
I don't remember seeing your message, but you can find details about EVoC here:
https://www.x.org/wiki/XorgEVoC/
Basically, it's similar to GSoC. The prospective student picks a
project, gets involved in the project (to learn the code and make some
simple changes to show you understand it) and
Am 12.03.19 um 22:48 schrieb Rob Clark:
> On Tue, Mar 12, 2019 at 1:59 PM Roland Scheidegger wrote:
>>
>> Am 12.03.19 um 16:16 schrieb Rob Clark:
>>> This previously was not called out clearly, but based on a survey of the
>>> code, it seems the expected behavior is to release the reference to
https://bugs.freedesktop.org/show_bug.cgi?id=109599
--- Comment #14 from tempel.jul...@gmail.com ---
Sure, no problem. Upload is complete now.
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the
https://bugs.freedesktop.org/show_bug.cgi?id=109599
--- Comment #13 from tempel.jul...@gmail.com ---
Created attachment 143652
--> https://bugs.freedesktop.org/attachment.cgi?id=143652=edit
new renderdoc capture part 3
--
You are receiving this mail because:
You are the QA Contact for the
https://bugs.freedesktop.org/show_bug.cgi?id=109599
--- Comment #11 from tempel.jul...@gmail.com ---
Created attachment 143650
--> https://bugs.freedesktop.org/attachment.cgi?id=143650=edit
new renderdoc capture part 1
--
You are receiving this mail because:
You are the assignee for the bug.
https://bugs.freedesktop.org/show_bug.cgi?id=110035
Michel Dänzer changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop
On Wed, Mar 13, 2019 at 8:43 AM Eleni Maria Stea wrote:
> On Wed, 13 Mar 2019 08:16:10 -0500
> Jason Ekstrand wrote:
>
> > On Mon, Mar 11, 2019 at 10:05 AM Eleni Maria Stea
> > wrote:
> >
> > > Allowing the user to set custom sample locations non-dynamically, by
> > > filling the extension
On 3/12/19 11:12 AM, Zhu, James wrote:
> Use 2D_ARRARY instead of RECT to fetch texels for weave compute
> shader.
>
> Problem 2,3: Fixed interpolation issue with weave de-interlace
>
> Fixes: 9364d66cb7f7 (Add video compositor compute shader render)
> Bugzilla:
https://bugs.freedesktop.org/show_bug.cgi?id=110035
Bug ID: 110035
Summary: AMDGPU and AMDGPU-PRO driver installation fails on
Ubuntu 18.04.2 (Radeon VII)
Product: Mesa
Version: unspecified
Hardware: x86-64 (AMD64)
Hello. I sent a message regarding guidance that I needed for EVOC to some
mentors, but no one seems to care or respond. How is someone, who is new to
X.org, supposed to get started learn and contribute to the development of the
community?
Please guide me, if anyone is interested.
---
Adarsh
On Wed, Mar 13, 2019 at 02:29:28PM +0100, Marc-André Lureau wrote:
> Hi
>
> On Wed, Mar 13, 2019 at 8:53 AM Mathias Fröhlich
> wrote:
> >
> > Marek, Marc-Andre,
> >
> > On Wednesday, 13 March 2019 00:03:26 CET Marek Olšák wrote:
> > > The env var workaround is fine.
> > >
> > > Thread affinity
https://bugs.freedesktop.org/show_bug.cgi?id=109599
--- Comment #10 from Samuel Pitoiset ---
Can you record a fresh renderdoc capture please?
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/442
After adding varyings to nir_xfb_info, I added varyings as a pointer,
and replaced outputs[0] for also a pointer, so now both needed to be
allocated. But anv was copying such xfb info as: *xfb_info = *xfb_info_in
So after my
https://bugs.freedesktop.org/show_bug.cgi?id=109599
--- Comment #9 from tempel.jul...@gmail.com ---
Updated screenshots with the latest game update including its content change:
radv-git (some small shadows missing):
https://abload.de/img/screenshot_20190313_1esjw0.png
amdvlk (no shadows
On Wed, 13 Mar 2019 08:16:10 -0500
Jason Ekstrand wrote:
> On Mon, Mar 11, 2019 at 10:05 AM Eleni Maria Stea
> wrote:
>
> > Allowing the user to set custom sample locations non-dynamically, by
> > filling the extension structs and chaining them to the pipeline
> > structs according to the
Hi
On Wed, Mar 13, 2019 at 8:53 AM Mathias Fröhlich
wrote:
>
> Marek, Marc-Andre,
>
> On Wednesday, 13 March 2019 00:03:26 CET Marek Olšák wrote:
> > The env var workaround is fine.
> >
> > Thread affinity is used for cache topology related optimizations. I think
> > it's a mistake to treat it
On Mon, Mar 11, 2019 at 10:05 AM Eleni Maria Stea wrote:
> Allowing the user to set custom sample locations non-dynamically, by
> filling the extension structs and chaining them to the pipeline structs
> according to the Vulkan specification section [26.5. Custom Sample
> Locations]
> for the
On Mon, Mar 11, 2019 at 10:05 AM Eleni Maria Stea wrote:
> Allowing the user to set custom sample locations non-dynamically, by
> filling the extension structs and chaining them to the pipeline structs
> according to the Vulkan specification section [26.5. Custom Sample
> Locations]
> for the
vindex is always 0.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 6 +++---
src/amd/common/ac_llvm_build.h | 1 -
src/amd/common/ac_nir_to_llvm.c | 2 --
3 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c
The struct version sets IDXEN=1, while the raw version sets IDXEN=0.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c| 48 +++
src/amd/common/ac_llvm_build.h| 37
src/amd/vulkan/radv_nir_to_llvm.c | 13 +
3
On Tue, Mar 12, 2019 at 5:35 AM Eleni Maria Stea wrote:
> The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled with
> implementation dependent values and according to the table from the
> Vulkan Specification section [36.1. Limit Requirements]:
>
> pname | max | min
>
Hi,
On 12.3.2019 10.59, Marc-André Lureau wrote:
On Fri, Mar 1, 2019 at 12:13 PM Mathias Fröhlich
wrote:
On Friday, 1 March 2019 12:15:08 CET Eero Tamminen wrote:
On 1.3.2019 11.12, Michel Dänzer wrote:
On 2019-02-28 8:41 p.m., Marek Olšák wrote:
On Thu, Feb 28, 2019 at 1:37 PM Eero
This doesn't need to be in it's open file. Just put it in anv_device.c
after all the other physical device queries.
On March 13, 2019 06:01:33 Eleni Maria Stea wrote:
Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT according to
the Vulkan Specification section [36.2. Additional
Rb
On March 13, 2019 06:01:53 Eleni Maria Stea wrote:
In src/intel/vulkan/genX_blorp_exec.c we included the file:
common/gen_sample_positions.h but not use it. Removed.
Reviewed-by: Sagar Ghuge
---
src/intel/vulkan/genX_blorp_exec.c | 1 -
1 file changed, 1 deletion(-)
diff --git
Reviewed-by: Lionel Landwerlin
On 12/03/2019 20:24, Jason Ekstrand wrote:
We've been fairly inconsistent about this so we should really choose
whether we're going to use VK_TRUE/FALSE or the C boolean values. The
Vulkan #defines are set to 1 and 0 respectively so it's the same value
as C
Enabled the VK_EXT_sample_locations for Intel Gen >= 7.
v2: Replaced device.info->gen >= 7 with True, as Anv doesn't support
anything below Gen7. (Lionel Landwerlin)
Reviewed-by: Sagar Ghuge
---
src/intel/vulkan/anv_extensions.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
In src/intel/vulkan/genX_blorp_exec.c we included the file:
common/gen_sample_positions.h but not use it. Removed.
Reviewed-by: Sagar Ghuge
---
src/intel/vulkan/genX_blorp_exec.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/intel/vulkan/genX_blorp_exec.c
We only emit sample locations when the extension is enabled by the user.
In all other cases the default locations are emitted once when the device
is initialized to increase performance.
---
src/intel/vulkan/anv_genX.h| 3 ++-
src/intel/vulkan/genX_cmd_buffer.c | 2 +-
Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT according to
the Vulkan Specification section [36.2. Additional Multisampling
Capabilities].
---
src/intel/Makefile.sources | 1 +
src/intel/vulkan/anv_sample_locations.c | 60 +
Added the VK_EXT_sample_locations to the anv_extensions.py list to
generate the related entrypoints.
Reviewed-by: Sagar Ghuge
---
src/intel/vulkan/anv_extensions.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/vulkan/anv_extensions.py
b/src/intel/vulkan/anv_extensions.py
index
Allowing setting dynamic and non-dynamic sample locations on Gen7.
---
src/intel/vulkan/anv_genX.h| 13 ++---
src/intel/vulkan/genX_cmd_buffer.c | 9 ++--
src/intel/vulkan/genX_pipeline.c | 13 +
src/intel/vulkan/genX_state.c | 86 +-
4 files
Added support for setting the locations when the pipeline has been
created with the dynamic state bit enabled according to the Vulkan
Specification section [26.5. Custom Sample Locations] for the function:
'vkCmdSetSampleLocationsEXT'
The reason that we preferred to store the boolean valid
The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled with
implementation dependent values and according to the table from the
Vulkan Specification section [36.1. Limit Requirements]:
pname | max | min
pname:sampleLocationSampleCounts |-|ename:VK_SAMPLE_COUNT_4_BIT
Allowing the user to set custom sample locations non-dynamically, by
filling the extension structs and chaining them to the pipeline structs
according to the Vulkan specification section [26.5. Custom Sample Locations]
for the following structures:
'VkPipelineSampleLocationsStateCreateInfoEXT'
Implemented the requirements from the VK_EXT_sample_locations extension
specification to allow setting custom sample locations on Intel Gen >= 7.
Some decisions explained:
The grid size was set to 1x1 because the hardware only supports a single
set of sample locations for the whole framebuffer.
NAK. The entire thing about an index being used and possibly still
constant 0 (and hence the index being constant 0 is not a sign to use
the raw intrinsics) is why we now have both structurized and raw
intrinsics. Don't just introduce that mistake again
On Wed, Mar 13, 2019 at 11:47 AM
Use the raw version (ie. IDXEN=0) because vindex is unused.
v2: - use raw version
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 66 +
1 file changed, 42 insertions(+), 24 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
New buffer intrinsics have a separate soffset parameter.
v2: - use the raw version as vindex is not used
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 66 ++
1 file changed, 26 insertions(+), 40 deletions(-)
diff --git
ac_build_llvm8_tbuffer_load() expects a boolean for glc.
Fixes: 2cf5433b99f ("ac: use new LLVM 8 intrinsic when loading 16-bit values")
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 4 ++--
src/amd/common/ac_llvm_build.h | 2 +-
src/amd/common/ac_nir_to_llvm.c | 4 ++--
Similar to ac_build_buffer_load_format().
v2: - fix out of bounds access
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 100
src/amd/common/ac_llvm_build.h | 11
src/amd/common/ac_nir_to_llvm.c | 29 +++--
3 files changed, 119
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 75cebf427ad..2f535259f78 100644
--- a/src/amd/common/ac_llvm_build.c
+++
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index af0c3cc679d..f4d408cd587 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 35 ++---
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a25e5388bce..af0c3cc679d 100644
---
For consistency regarding other store operations.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a7b3fdf64aa..ff29345ffe5
v2: do not force enable IDXEN when unecessary
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 111
src/amd/common/ac_llvm_build.h | 26
src/amd/common/ac_nir_to_llvm.c | 26 ++--
3 files changed, 142 insertions(+), 21
Trivial.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index c10a0cce16f..55d3ce90ce4 100644
--- a/src/amd/common/ac_nir_to_llvm.c
v2: - do not force enable IDXEN when unecessary
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 5d52d93d25a..8d5682f6f7a 100644
---
Hi,
This small series makes use of new LLVM 8 buffer intrinsics.
No CTS regressions on GFX8 with LLVM 7, 8 and master.
V2: fix use of IDXEN for GFX9
Please review,
Thanks!
Samuel Pitoiset (12):
ac: do not force enable IDXEN for 16-bit SSBO loads
ac: fix glc parameter use for new LLVM 8
The struct version enables IDXEN, while the raw one disables it.
When vindex is unused, the raw version is enough.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_llvm_build.c
The struct version enables IDXEN, while the raw one disables it.
When vindex is unused, the raw version is enough.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_llvm_build.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_llvm_build.c
On Tue, 2019-03-12 at 15:46 -0700, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Wed, 2019-03-06 at 09:21 +0100, Iago Toral wrote:
> > > On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
> > > > On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
> > > > > Iago Toral writes:
> >
On Tue, 2019-03-12 at 15:44 -0700, Francisco Jerez wrote:
> Iago Toral writes:
>
> > On Tue, 2019-03-05 at 07:35 +0100, Iago Toral wrote:
> > > On Mon, 2019-03-04 at 15:36 -0800, Francisco Jerez wrote:
> > > > Iago Toral writes:
> > > >
> > > > > On Fri, 2019-03-01 at 19:04 -0800, Francisco
On 13/3/19 7:07 pm, Samuel Pitoiset wrote:
On 3/13/19 9:01 AM, Samuel Pitoiset wrote:
On 3/13/19 1:26 AM, Timothy Arceri wrote:
This one causes 2000+ piglit tests to fail on radeonsi. For example:
./bin/shader_runner
On 3/13/19 9:01 AM, Samuel Pitoiset wrote:
On 3/13/19 1:26 AM, Timothy Arceri wrote:
This one causes 2000+ piglit tests to fail on radeonsi. For example:
./bin/shader_runner
generated_tests/spec/arb_gpu_shader_fp64/execution/conversion/geom-conversion-explicit-bool-double.shader_test
-auto
On 3/13/19 1:26 AM, Timothy Arceri wrote:
This one causes 2000+ piglit tests to fail on radeonsi. For example:
./bin/shader_runner
generated_tests/spec/arb_gpu_shader_fp64/execution/conversion/geom-conversion-explicit-bool-double.shader_test
-auto -fbo
What chip? what LLVM?
On 13/3/19
https://bugs.freedesktop.org/show_bug.cgi?id=109898
Daniel Stone changed:
What|Removed |Added
Status|NEW |RESOLVED
Product|a big
Marek, Marc-Andre,
On Wednesday, 13 March 2019 00:03:26 CET Marek Olšák wrote:
> The env var workaround is fine.
>
> Thread affinity is used for cache topology related optimizations. I think
> it's a mistake to treat it only as a resource allocation tool.
For a shorter term solution to the
Hi,
On Tuesday, 12 March 2019 09:59:17 CET Marc-André Lureau wrote:
> Hi
>
> On Fri, Mar 1, 2019 at 12:13 PM Mathias Fröhlich
> wrote:
> >
> > On Friday, 1 March 2019 12:15:08 CET Eero Tamminen wrote:
> > > Hi,
> > >
> > > On 1.3.2019 11.12, Michel Dänzer wrote:
> > > > On 2019-02-28 8:41 p.m.,
https://bugs.freedesktop.org/show_bug.cgi?id=109939
Raja Massab changed:
What|Removed |Added
CC||massabnaeem...@gmail.com
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=109927
Raja Massab changed:
What|Removed |Added
CC||massabnaeem...@gmail.com
--
You are
Reviewed-by: Samuel Iglesias Gonsálvez
Sam
On Tue, 2019-03-12 at 15:24 -0500, Jason Ekstrand wrote:
> We've been fairly inconsistent about this so we should really choose
> whether we're going to use VK_TRUE/FALSE or the C boolean
> values. The
> Vulkan #defines are set to 1 and 0 respectively
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