On Mon, May 27, 2019 at 5:38 PM Samuel Pitoiset
wrote:
>
> Only supported with vkCreateRenderPass2().
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pass.c| 30 +-
> src/amd/vulkan/radv_private.h | 3 +++
> 2 files changed, 32 insertions(+), 1
r-b
On Wed, May 22, 2019 at 3:35 PM Samuel Pitoiset
wrote:
>
> This helper will be useful for clearing HTILE after some
> depth/stencil resolves.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 7 +--
> src/amd/vulkan/radv_meta.h | 3 +++
>
r-b
On Thu, May 23, 2019 at 2:53 PM Samuel Pitoiset
wrote:
>
> The old code was not wrong because the transitions performed
> after the resolves should re-emit the framebuffer if needed.
>
> This change is mostly a no-op but it improves consistency
> regarding other meta operations that need to
R-b
On Mon, May 27, 2019, 10:16 AM Samuel Pitoiset
wrote:
> Based on ANV.
>
> v2: - remove the if statement
> - update the comment
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 12 +++-
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff
r600g does not have a nir compiler, and radeonsi does not use the
option either.
---
src/gallium/drivers/r600/r600_pipe_common.c | 1 -
src/gallium/drivers/r600/r600_pipe_common.h | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_pipe_common.c
r-b
On Wed, May 22, 2019 at 5:43 PM Samuel Pitoiset
wrote:
>
> Just move the block that checks the availability bit into the
> switch like other query types.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_query.c | 12 +---
> 1 file changed, 5 insertions(+), 7
On Sun, May 26, 2019 at 2:50 PM Bas Nieuwenhuizen
wrote:
>
> On Wed, May 22, 2019 at 11:20 AM Samuel Pitoiset
> wrote:
> >
> > Based on ANV.
> >
> > Signed-off-by: Samuel Pitoiset
> > ---
> > src/amd/vulkan/radv_meta_resolve.c | 21 -
On Wed, May 22, 2019 at 11:20 AM Samuel Pitoiset
wrote:
>
> Based on ANV.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 21 -
> 1 file changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_resolve.c
>
So this does not seem to use the sample locations during layout transitions?
AFAIK those are needed for e.g. HTILE decompression as it is based on
equations somehow.
On Thu, May 16, 2019 at 11:51 AM Samuel Pitoiset
wrote:
>
> Basically, this extension allows applications to use custom
> sample
r-b
On Thu, May 16, 2019 at 11:50 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 2 +-
> src/amd/vulkan/radv_pipeline.c | 2 +-
> src/amd/vulkan/radv_private.h| 4 +-
> src/amd/vulkan/si_cmd_buffer.c | 166
r-b
On Tue, May 21, 2019 at 1:36 PM Samuel Pitoiset
wrote:
>
> From the Vulkan spec 1.1.108:
>"After query pool creation, each query must be reset before
> it is used."
>
> So, the driver doesn't need to do this at creation time.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
r-b
On Thu, May 16, 2019 at 11:50 AM Samuel Pitoiset
wrote:
>
> The driver only supports up to 8 samples.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_private.h | 1 -
> src/amd/vulkan/si_cmd_buffer.c | 50 --
> 2 files changed, 51
r-b
On Thu, May 16, 2019 at 11:51 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/si_cmd_buffer.c | 19 ---
> 1 file changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
>
r-b
On Thu, May 16, 2019 at 11:51 AM Samuel Pitoiset
wrote:
>
> It should be 7, not 8.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/si_cmd_buffer.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/si_cmd_buffer.c
r-b
On Thu, May 16, 2019 at 9:21 AM Samuel Pitoiset
wrote:
>
> This fixes some CTS failures related to VK_EXT_sample_locations.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 15 +--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git
r-b for the series.
On Mon, May 13, 2019 at 11:14 PM Nicolai Hähnle wrote:
>
> From: Nicolai Hähnle
>
> ---
> src/gallium/drivers/radeonsi/si_texture.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_texture.c
>
Reviewed-by: Bas Nieuwenhuizen
Fixes: 5010436e09f "radv: bail out when binding the same vertex buffers"
I'll push after running it through the testsuite.
Thanks!
On Fri, May 10, 2019 at 9:38 PM Józef Kucia wrote:
>
> Only vertex inputs accessed by vertex shader must have valid
Reviewed-by: Bas Nieuwenhuizen for then,
because the Mesa code indeed prevents AMDGPU_CHUNK_ID_FENCE in
submissions.
On Wed, May 8, 2019 at 3:24 PM Christian König
wrote:
>
> Am 08.05.19 um 15:23 schrieb Liu, Leo:
> > On 5/8/19 9:19 AM, Koenig, Christian wrote:
> >> Am 08.0
Nope, r-b
On Tue, May 7, 2019 at 8:36 AM Samuel Pitoiset
wrote:
>
> Seems fine to,
>
> Reviewed-by: Samuel Pitoiset
>
> Bas, any comments?
>
> On 5/7/19 7:14 AM, Timothy Arceri wrote:
> > ping!
> >
> > On 2/5/19 1:38 pm, Timothy Arceri wrote:
> >> The pattern of calling opt algebraic first
On Mon, May 6, 2019 at 5:43 PM Emil Velikov wrote:
>
> On Sun, 28 Apr 2019 at 19:38, Jean Hertel wrote:
> >
> > >Could not find my original notes, but the idea is roughly as follows:
> > >- introduce a separate (user only?) library - say libmesa-config.so
> > > - ^^ provides an API to query/set
a-b
On Mon, May 6, 2019 at 6:39 AM Timothy Arceri wrote:
>
> This fixes rendering issues with gun scopes which is rather
> important.
>
> Cc: "19.0" "19.1"
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100239
> ---
> src/util/00-mesa-defaults.conf | 3 +++
> 1 file changed, 3
On Sat, May 4, 2019 at 3:25 PM Nicolai Hähnle wrote:
>
> From: Nicolai Hähnle
>
> The main motivation for this change is API ergonomics: most operations
> on dynarrays are really on elements, not on bytes, so it's weird to have
> grow and resize as the odd operations out.
>
> The secondary
On Sat, May 4, 2019 at 3:25 PM Nicolai Hähnle wrote:
>
> From: Nicolai Hähnle
>
> We're not very good at handling out-of-memory conditions in general, but
> this change at least gives the caller the option of handling it.
>
> This happens to fix an error in out-of-memory handling in i965, which
On Fri, May 3, 2019 at 11:42 AM Samuel Pitoiset
wrote:
>
> Because the new raw/struct intrinsics are buggy with LLVM 8
> (they weren't marked as source of divergence), we fallback to the
> old instrinsics for atomic buffer operations. This means we need
> to apply the indexing workaround for
t; >
> > Author: Juan A. Suarez Romero
> > Date: Mon Apr 29 17:05:13 2019 +0200
> >
> > radv: enable descriptor indexing capabilities
> >
> > This enables the remaining capabilities in SPV_EXT_descriptor_indexing.
> >
> > Fixes: 0e10790558b &
d and used.
> >
> > Note this copies libdrm's drmIsMaster() to avoid depending on bleeding
> > edge version of the library.
> >
> > v2: set the fd to -1 if not master (Bas)
> >
> > Cc: Keith Packard
> > Cc: Jason Ekstrand
> > Cc: Bas Nieuwenh
E instead.
> >
> > Cc: Keith Packard
> > Cc: Jason Ekstrand
> > Cc: Bas Nieuwenhuizen
> > Fixes: da997ebec92 ("vulkan: Add KHR_display extension using DRM [v10]")
> > Signed-off-by: Emil Velikov
> > ---
> > src/vulkan/wsi/wsi_common_di
R-b
On Wed, Apr 24, 2019, 11:36 PM Marek Olšák wrote:
> From: Marek Olšák
>
> need_cs_space may clear the buffer list.
>
> Fixes: 951d60f8cdc88 "radeonsi: delay adding BOs at the beginning of IBs
> until the first draw"
> ---
> src/gallium/drivers/radeonsi/si_compute.c| 6 +++---
>
Reviewed-by: Bas Nieuwenhuizen
On Wed, Apr 24, 2019 at 2:40 PM Eleni Maria Stea wrote:
>
> Before setting the physical device API version, we should check if the
> MESA_VK_VERSION_OVERRIDE environment variable is set and take it into
> account.
> ---
> src/amd/vulkan/radv
On Tue, Apr 23, 2019 at 9:35 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_shader.c | 2 +-
> src/compiler/nir/nir.h | 3 ++-
> src/compiler/nir/nir_opt_if.c| 17 ++---
>
Reviewed-by: Bas Nieuwenhuizen
On Tue, Mar 19, 2019 at 9:42 AM Samuel Pitoiset
wrote:
>
> This patch requires the typed vertex fetches series.
>
> Totals from affected shaders:
> SGPRS: 445574 -> 452638 (1.59 %)
> VGPRS: 373392 -> 370436 (-0.79 %)
> Spilled SGPRs: 77
On Fri, Apr 19, 2019 at 12:37 PM Samuel Pitoiset
wrote:
>
> Only computeDerivativeGroupLinear is supported for now.
Reviewed-by: Bas Nieuwenhuizen
>
> All crucible tests pass.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 7 +
So I have trouble making sense of what did you change but on its own
the patch looks good to me. r-b
On Tue, Apr 16, 2019 at 5:26 PM Samuel Pitoiset
wrote:
>
> From: Bas Nieuwenhuizen
>
> Basically just reserve the memory in the descriptor sets.
>
> On the shader side we
hmm, should work by design if we keep the entry but make it False. Let
me look into it.
On Wed, Apr 17, 2019 at 9:59 PM Samuel Pitoiset
wrote:
>
>
> On 4/17/19 9:05 PM, Samuel Pitoiset wrote:
> >
> > On 4/17/19 8:52 PM, Bas Nieuwenhuizen wrote:
> >> On Tue, A
r-b for the series
On Tue, Mar 26, 2019 at 12:36 PM Samuel Pitoiset
wrote:
>
> LLVM 9+ now supports 8-bit and 16-bit types.
>
> This changes requires LLVM r356465.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 51 +++---
> 1 file
On Tue, Apr 16, 2019 at 10:35 AM Samuel Pitoiset
wrote:
>
> No support for 64-bit compare atomic operations.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 10 ++
> src/amd/vulkan/radv_extensions.py | 1 +
> src/amd/vulkan/radv_shader.c | 1 +
> 3
licating the check in each driver, keep it where it's
> needed and used.
>
> Note this copies libdrm's drmIsMaster() to avoid depending on bleeding
> edge version of the library.
>
> Cc: Keith Packard
> Cc: Jason Ekstrand
> Cc: Bas Nieuwenhuizen
> Cc: Andres Rodriguez
&
r-b
On Mon, Apr 15, 2019 at 5:42 PM Samuel Pitoiset
wrote:
>
> No CTS failures.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 5 ++---
> src/amd/vulkan/radv_extensions.py | 2 +-
> 2 files changed, 3 insertions(+), 4 deletions(-)
>
> diff --git
I don't see this cap defined anywhere?
If it depends on an earlier series that is not pushed yet, but your
are going to,
Reviewed-by: Bas Nieuwenhuizen
On Mon, Apr 15, 2019 at 7:19 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> no changes - the driver doesn't use the format
&
r-b
On Mon, Apr 15, 2019 at 6:38 PM Samuel Pitoiset
wrote:
>
> The compiler will emit GLC=1.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_buffer.c | 2 ++
> src/amd/vulkan/radv_meta_clear.c | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git
r-b
On Mon, Apr 15, 2019 at 2:17 AM Timothy Arceri wrote:
>
> Coverity: CID 1444664
>
> Fixes: d62d434fe920 ("ac/nir_to_llvm: add image bindless support")
> ---
> src/amd/common/ac_nir_to_llvm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
a-b now.
On Mon, Apr 8, 2019 at 9:31 AM Samuel Pitoiset
wrote:
>
>
> On 3/21/19 11:09 AM, Bas Nieuwenhuizen wrote:
> > Honestly the zero tests is worrying me. This is a pretty big extension
> > and I have questions like:
> >
> > to 16-bit loads + 16-bit ALU actua
r-b for both.
On Mon, Apr 8, 2019 at 9:22 AM Samuel Pitoiset
wrote:
>
> From: Rhys Perry
>
> Signed-off-by: Rhys Perry
> ---
> src/amd/common/ac_llvm_build.c | 22 +-
> 1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/src/amd/common/ac_llvm_build.c
r-b
On Mon, Apr 8, 2019 at 12:36 PM Samuel Pitoiset
wrote:
>
>
> On 4/8/19 12:32 PM, Erik Faye-Lund wrote:
> > On Mon, 2019-04-08 at 11:39 +0200, Samuel Pitoiset wrote:
> >> This fixes the following LLVM error when using RADV_DEBUG=checkir:
> >> Intrinsic name not mangled correctly for type
Reviewed-by: Bas Nieuwenhuizen
On Wed, Apr 3, 2019 at 11:17 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/amd/addrlib/src/gfx9/gfx9addrlib.cpp | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp
>
Reviewed-by: Bas Nieuwenhuizen
On Mon, Apr 1, 2019 at 5:58 PM Guido Günther wrote:
>
> The list has 19.0.2 twice.
>
> Signed-off-by: Guido Günther
> ---
> docs/release-calendar.html | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/d
hmm, okay, r-b then.
On Mon, Apr 1, 2019 at 5:24 PM Samuel Pitoiset
wrote:
>
>
> On 4/1/19 5:22 PM, Bas Nieuwenhuizen wrote:
> > On Mon, Apr 1, 2019 at 4:15 PM Samuel Pitoiset
> > wrote:
> >> Only 8-bit integers for now, float16 requires a bit more work.
> >&
Patches 1-5 are r-b me.
On Mon, Apr 1, 2019 at 4:15 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
>
On Mon, Apr 1, 2019 at 4:15 PM Samuel Pitoiset
wrote:
>
> Only 8-bit integers for now, float16 requires a bit more work.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 8
> src/amd/vulkan/radv_extensions.py | 1 +
> src/amd/vulkan/radv_shader.c | 1
This seems weird, do you know which tests are affected?
(I suspect what we really want to do is split into fmuladd and fma,
and only lower fmuladd. If that does not work, something else is
definitely going on)
On Mon, Mar 25, 2019 at 4:10 PM Samuel Pitoiset
wrote:
>
> The lowering needs to be
r-b for the series.
On Tue, Mar 26, 2019 at 11:31 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_nir_to_llvm.c | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c
r-b
On Thu, Mar 28, 2019 at 4:00 PM Samuel Pitoiset
wrote:
>
> Especially when performing a transtion from UNDEFINED->GENERAL,
> the driver shouldn't initialize HTILE metadata in compressed
> state because it doesn't decompress when the src layout is
> GENERAL.
>
> Bugzilla:
r-b, though technically you may want something older for the fixes tag.
On Thu, Mar 28, 2019 at 12:20 PM Samuel Pitoiset
wrote:
>
> I don't think we should update metadata when conditional rendering
> is enabled. For some reasons, some CTS breaks only on SI.
>
> This fixes the following CTS on
r-b
For series
On Fri, Mar 22, 2019, 2:49 PM Samuel Pitoiset
wrote:
> This extension allows 16-bit support to Frexp/FrexpStruct.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_extensions.py | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
r-b
On Tue, Mar 26, 2019, 10:13 AM Samuel Pitoiset
wrote:
> 27670 shaders in 14347 tests
> Totals:
> SGPRS: 1231173 -> 1236757 (0.45 %)
> VGPRS: 866056 -> 867488 (0.17 %)
> Spilled SGPRs: 24201 -> 24169 (-0.13 %)
> Code Size: 46134836 -> 46115944 (-0.04 %) bytes
> Max Waves: 232287 -> 232070
R-b
Though not sure it really helps given code size increase?
On Wed, Mar 27, 2019, 10:13 AM Samuel Pitoiset
wrote:
> This helps few compute shaders, mostly for F12017.
>
> 27670 shaders in 14347 tests
> Totals:
> SGPRS: 1231173 -> 1231173 (0.00 %)
> VGPRS: 866056 -> 865928 (-0.01 %)
> Spilled
r-b
On Mon, Mar 25, 2019 at 1:34 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 27 +++
> src/amd/common/ac_llvm_build.h | 4
> src/amd/common/ac_nir_to_llvm.c | 13 +
> 3 files changed, 36
r-b
On Thu, Mar 21, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> GLC/SLC are boolean.
>
> This fixes the following LLVM error when checkir is set:
> Intrinsic has incorrect argument type!
> void (i32, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32)*
> @llvm.amdgcn.tbuffer.store.i32
>
>
On Thu, Mar 21, 2019 at 11:59 AM Samuel Pitoiset
wrote:
>
> This fixes the following LLVM error when ckeckir is set:
> Type too small for ZExt
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_nir_to_llvm.c | 33 +
> 1 file changed, 21 insertions(+),
Honestly the zero tests is worrying me. This is a pretty big extension
and I have questions like:
to 16-bit loads + 16-bit ALU actually work together or have we been
silently relying on the fact there is always a ZExt cast after and
that did not care about input size?
On Thu, Mar 21, 2019 at
r-b for both.
On Thu, Mar 21, 2019 at 10:11 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 2 ++
> src/amd/common/ac_llvm_build.h | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/src/amd/common/ac_llvm_build.c
r-b
On Thu, Mar 21, 2019 at 9:16 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
> index
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Tue, Mar 19, 2019 at 9:28 AM Samuel Pitoiset
wrote:
>
> Hi,
>
> This series implements VK_KHR_8bit_storage for RADV. Original work
> is from Rhys Perry, I did rebase, update some patches and test.
>
> Please review,
> t
On Tue, Mar 19, 2019 at 9:28 AM Samuel Pitoiset
wrote:
>
> From: Rhys Perry
>
> Signed-off-by: Rhys Perry
> ---
> src/amd/common/ac_nir_to_llvm.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
r-b
On Tue, Mar 19, 2019 at 11:37 PM Samuel Pitoiset
wrote:
>
> Noticed with a Doom shader.
>
> 29077 shaders in 15096 tests
> Totals:
> SGPRS: 1282125 -> 1282133 (0.00 %)
> VGPRS: 908716 -> 908616 (-0.01 %)
> Spilled SGPRs: 24811 -> 24779 (-0.13 %)
> Code Size: 49048176 -> 48936488 (-0.23 %)
Reviewed-by: Bas Nieuwenhuizen
FYI since the new intrinsics don't merge voffset and soffset anymore,
you can remove the tbuffer variants for LLVM8+.
On Wed, Mar 13, 2019 at 5:38 PM Samuel Pitoiset
wrote:
>
> New buffer intrinsics have a separate soffset parameter.
>
&g
On Wed, Mar 13, 2019 at 5:38 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_nir_to_llvm.c | 35 ++---
> 1 file changed, 6 insertions(+), 29 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c
That it does not use it is exactly why we need to make sure the CB
data is not in the CB cache by flushing it?
On Tue, Mar 19, 2019 at 12:15 PM Samuel Pitoiset
wrote:
>
> The clear operation (ie. compute) doesn't use the CB caches.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
I think this needs to be modified to get the vulkan out of bounds behavior.
In particular whether a VS input is out of bounds or not can differ
between attributes from the same buffer with the same index, and that
is something not handled here.
I guess we could fix by only using the offset in
Reviewed-by: Bas Nieuwenhuizen
On Sun, Mar 17, 2019 at 11:04 AM Timothy Arceri wrote:
>
> nir to llvm assumes we have already split vectors to scalars via
> nir_lower_alu_to_scalar().
> ---
> src/amd/common/ac_nir_to_llvm.c | 2 ++
> 1 file changed, 2 insertions(+)
>
&
Should be fixed when
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/456
is merged.
On Sat, Mar 16, 2019 at 10:16 PM Mauro Rossi wrote:
>
> Hi Marek,
>
> I'm getting the following building error after commit [1]
> but I don't understand why.
>
> Mauro
>
>
r-b
On Thu, Mar 14, 2019 at 2:24 PM Samuel Pitoiset
wrote:
>
> HTILE should always be initialized when transitioning from
> VK_IMAGE_LAYOUT_UNDEFINED to other image layouts. Otherwise,
> if an app does a transition from UNDEFINED to GENERAL, the
> driver doesn't initialize HTILE and it tries to
NAK. The entire thing about an index being used and possibly still
constant 0 (and hence the index being constant 0 is not a sign to use
the raw intrinsics) is why we now have both structurized and raw
intrinsics. Don't just introduce that mistake again
On Wed, Mar 13, 2019 at 11:47 AM
On Tue, Mar 12, 2019 at 9:59 AM Marc-André Lureau
wrote:
>
> Hi
>
> On Fri, Mar 1, 2019 at 12:13 PM Mathias Fröhlich
> wrote:
> >
> > On Friday, 1 March 2019 12:15:08 CET Eero Tamminen wrote:
> > > Hi,
> > >
> > > On 1.3.2019 11.12, Michel Dänzer wrote:
> > > > On 2019-02-28 8:41 p.m., Marek
r-b for the series
On Tue, Feb 26, 2019 at 1:39 PM Samuel Pitoiset
wrote:
>
> This drastically reduces the number of SGPRs because the driver
> now uses descriptors per vertex binding, instead of per vertex
> attribute format.
>
> 29077 shaders in 15096 tests
> Totals:
> SGPRS: 1354285 ->
r-b
On Mon, Mar 11, 2019 at 10:23 AM Samuel Pitoiset
wrote:
>
> The values should match the ones that are emitted.
>
> This fixes new CTS dEQP-VK.rasterization.primitive_size.points.*.
>
> Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
> Signed-off-by: Samuel Pitoiset
hmm, nothing to disabled them again?
Reviewed-by: Bas Nieuwenhuizen
On Tue, Mar 5, 2019 at 6:06 PM Samuel Pitoiset
wrote:
>
> The mask should be accumulated if two calls are used for
> binding two buffers at different indexes. Otherwise, the
> driver only accounts for the last one.
oh, also add a Fixes tag please.
On Fri, Mar 8, 2019 at 2:50 PM Bas Nieuwenhuizen
wrote:
>
> I actually think it is partially right, but lets indeed revert for now
>
> Reviewed-by: Bas Nieuwenhuizen
>
> On Fri, Mar 8, 2019 at 2:48 PM Samuel Pitoiset
> wrote:
> >
&
I actually think it is partially right, but lets indeed revert for now
Reviewed-by: Bas Nieuwenhuizen
On Fri, Mar 8, 2019 at 2:48 PM Samuel Pitoiset
wrote:
>
> This changes is actually wrong because we have to sync
> before doing image layout transitions.
>
> This fixes r
pace (the internal clear draws allocate space), but
> keep that way for consistency.
Isn't this what check_space does?
Reviewed-by: Bas Nieuwenhuizen
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 2 +-
> 1 file changed, 1 insertion(+), 1 d
On Tue, Mar 5, 2019 at 10:30 AM Samuel Pitoiset
wrote:
>
> Fixes: 58bcebd987b ("spirv: Allow [i/u]mulExtended to use new nir opcode")
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_nir_to_llvm.c | 36 +
> 1 file changed, 36 insertions(+)
>
> diff
Reviewed-by: Bas Nieuwenhuizen
On Mon, Mar 4, 2019 at 2:22 PM Samuel Pitoiset
wrote:
>
> If alignement is 0, offets returned by
> radv_cmd_buffer_upload_alloc() are always 0. These two
> virtual addresses were pointing at the same location.
>
> v2: - add an asertion that c
Reviewed-by: Bas Nieuwenhuizen
On Fri, Mar 1, 2019 at 6:25 PM Samuel Pitoiset
wrote:
>
> This export format is faster. Seems to improve performance in
> Wreckfest.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pipeline.c | 2 +-
> 1 file changed, 1
Reviewed-by: Bas Nieuwenhuizen
On Sat, Feb 23, 2019 at 1:14 AM Ian Romanick wrote:
>
> Reviewed-by: Ian Romanick
>
> On 2/22/19 4:03 PM, Jason Ekstrand wrote:
> > The nir_swizzle helper is used some on it's own but it's also called by
> > nir_channel and nir_channels w
Fixes: 4bb6c49375e "radv: Allow ETC2 on RAVEN and VEGA10 instead of all GFX9."
---
src/amd/vulkan/radv_device.c | 3 +--
src/amd/vulkan/radv_formats.c | 12 +---
src/amd/vulkan/radv_private.h | 1 +
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git
Reviewed-by: Bas Nieuwenhuizen
for both.
On Thu, Feb 14, 2019 at 2:39 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 41 ++
> 1 file changed, 27 insertions(+), 14 deletions(-)
>
>
Reviewed-by: Bas Nieuwenhuizen
On Fri, Feb 15, 2019 at 6:00 PM Samuel Pitoiset
wrote:
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109597
> Cc: 18.3 19.0
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pipeline.c | 8
> 1 file
Reviewed-by: Bas Nieuwenhuizen
On Fri, Feb 15, 2019 at 3:57 PM Samuel Pitoiset
wrote:
>
> The elements added into a vector should have the same type as the
> first one, otherwise this hits an assertion in LLVM.
>
> Fixes: 4b3549c0846 ("radv: reduce the number of loaded
On Tue, Feb 12, 2019 at 3:07 PM Samuel Pitoiset
wrote:
>
> It's unnecessary to load more channels than the vertex attribute
> format. The remaining channels are filled with 0 for y and z,
> and 1 for w.
>
> 29077 shaders in 15096 tests
> Totals:
> SGPRS: 1321605 -> 1318869 (-0.21 %)
> VGPRS:
Reviewed-by: Bas Nieuwenhuizen
I'm assuming the real fix is for the shader to not write the sample
mask if we have 1 sample?
On Tue, Feb 12, 2019 at 6:52 PM Samuel Pitoiset
wrote:
>
> For some reasons, this breaks trees rendering in Project Cars.
>
> Fixes: 85010585cde ("
Reviewed-by: Bas Nieuwenhuizen
On Mon, Feb 11, 2019 at 1:16 PM Gustaw Smolarczyk wrote:
>
> FWIW,
>
> Reviewed-by: Gustaw Smolarczyk
>
> pon., 11 lut 2019 o 10:15 Samuel Pitoiset
> napisał(a):
> >
> > "The C standard says that compound literals which occu
The variable is not static? (initializing a static member in the
constructor would be nonsense ...)
With that word remove from the title:
Reviewed-by: Bas Nieuwenhuizen
On Fri, Feb 8, 2019 at 6:26 AM Dave Airlie wrote:
>
> From: Dave Airlie
>
> Fixes coverity warning
> ---
&g
On Tue, Feb 5, 2019 at 11:07 AM Samuel Pitoiset
wrote:
>
>
> On 2/5/19 10:58 AM, Bas Nieuwenhuizen wrote:
> > On Fri, Jan 25, 2019 at 5:27 PM Samuel Pitoiset
> > wrote:
> >> This removes some scalar loads from shaders, but it increases
> >> the number o
On Fri, Jan 25, 2019 at 5:27 PM Samuel Pitoiset
wrote:
>
> This removes some scalar loads from shaders, but it increases
> the number of SET_SH_REG packets. This is currently basic but
> it could be improved if needed. Inlining dynamic offsets might
> also help.
>
> Original idea from Dave
Reviewed-by: Bas Nieuwenhuizen
for the series except 09 where I had comments.
On Tue, Jan 29, 2019 at 10:17 PM Samuel Pitoiset
wrote:
>
> Original patch by Fredrik Höglund.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 16 +++-
Reviewed-by: Bas Nieuwenhuizen
On Fri, Feb 1, 2019 at 12:07 PM Timothy Arceri wrote:
>
> Ported from d205faeb6c96.
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 6 +++---
> src/amd/vulkan/radv_private.h | 3 +++
> src/amd/vulkan/radv_shader.c | 10 --
>
On Fri, Feb 1, 2019 at 8:52 AM Samuel Pitoiset
wrote:
>
>
> On 1/31/19 11:16 AM, Bas Nieuwenhuizen wrote:
> > On Tue, Jan 29, 2019 at 10:16 PM Samuel Pitoiset
> > wrote:
> >> That shouldn't change anything as we check if the last
> >> subpass id is
On Tue, Jan 29, 2019 at 10:16 PM Samuel Pitoiset
wrote:
>
> That shouldn't change anything as we check if the last
> subpass id is the final subpass.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 16 +---
> 1 file changed, 13 insertions(+), 3
On Fri, Jan 25, 2019 at 5:27 PM Samuel Pitoiset
wrote:
>
> This is needed in order to inline some push constants when possible.
> This also adds a new helper for initializing the pass.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 2 ++
>
Well, if it looks good to you and you could reproduce before
Reviewed-by: Bas Nieuwenhuizen
On Mon, Jan 28, 2019 at 5:38 PM Samuel Pitoiset
wrote:
>
> This has been disabled some months ago because it introduced
> rendering issues with Shadow Of Warrier II (DXVK). This game is
&g
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