[Mesa-dev] [PATCH] radv: Assert when setting 0 registers in a sequence.

To catch more of those hangs early. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cs.h | 4 1 file changed, 4 insertions(+) diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h index 2c8935f3065..8fcdad9dbbd 100644 --- a/src/amd/vulkan/rad

Re: [Mesa-dev] [PATCH 1/4] radv: don't emit no color formats.

On Mon, Mar 27, 2017 at 10:14 PM, Dave Airlie wrote: > From: Dave Airlie > > If we had no rasterization, we'd emit SPI color > format as all 0's the hw dislikes this, add the workaround > from radeonsi. > > Found while debugging tessellation > >

[Mesa-dev] [PATCH] radv: flush DB cache before and after HTILE decompress.

It reads @ writes the DB cache, and we haven't flushed dst caches yet, so DB cache may be stale. Also the user might be shader read (and probably is), so also flush after. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> CC: <mesa-sta...@lists.freedesktop.org> Fixes: f4e499ec791

Re: [Mesa-dev] [PATCH 1/2] radv: add ia_multi_vgt_param tessellation support.

v_pipeline_has_gs(cmd_buffer->state.pipeline)) > primgroup_size = 64; /* recommended with a GS */ > > multi_instances_smaller_than_primgroup = indirect_draw || > (instanced_draw && > num_prims > <

Re: [Mesa-dev] [PATCH] radv: always do tess ring size calculations.

x_se; I just realized we can alloc 16 KiB instead of 32 KiB for HAWAII (based on tess_offchip_block_dw_size). Either way: Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> > - hs_offchip_param = radv_get_hs_offchip_param(queue->device, > -

Re: [Mesa-dev] [PATCH] radv: fix primitive reset index emission

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Sun, Mar 19, 2017 at 5:18 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This was meant to be checking the index type to get the correct > index not the last e

Re: [Mesa-dev] [PATCH 4/4] radv: make sure gs copy shader is retrieved from the cache with the variant

patch 1-4 are Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> and should be in my opinion pushable before any of the discussed changes to the disk cache. On Wed, Mar 15, 2017 at 5:17 AM, Timothy Arceri <tarc...@itsqueeze.com> wrote: > Apps can limit the size o

Re: [Mesa-dev] [PATCH] radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer

Thanks. Pushed. On Tue, Mar 14, 2017 at 4:26 PM, Alex Smith wrote: > Need to flush before updating the buffer to ensure that the copy is > ordered after previous accesses (assuming the app has performed the > appropriate barriers). > > This fixes potential issues due

[Mesa-dev] [PATCH 2/2] radv: Set driver version to mesa version;

again. Looking at that site, the -pro driver also uses VK_MAKE_VERSION, so keeping consistency is probably best. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/s

[Mesa-dev] [PATCH 1/2] radv: Increase api version to 1.0.42.

I've skimmed to changes from 1.0.5 to 1.0.42 and I think we have all changes. We're still not conformant ofcourse, but this should not regress stuff, Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Mesa-dev] [PATCH] radv: Emit cache flushes before CP DMA.

The flushes could be due to TRANSFER barriers. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> Cc: 17.0 <mesa-sta...@lists.freedesktop.org> --- src/amd/vulkan/si_cmd_buffer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/sr

Re: [Mesa-dev] [PATCH] radv: fix logic for when to flush on multiple CS emission

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Mon, Mar 20, 2017 at 12:03 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > The current code evaluated to always true, we only want to flush > on the first submit. R

Re: [Mesa-dev] [PATCH] radv/meta: fix image clears for r4g4 format.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Fri, Mar 17, 2017 at 5:24 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This just uses an 8-bit clear and packs the values. > > Signed-off-by: Dave Airlie <

Re: [Mesa-dev] [PATCH] radv/ac: Fix shared memory offset calculation

Pushed. On Thu, Mar 16, 2017 at 5:40 PM, Alex Smith wrote: > The index passed to get_shared_memory_ptr is an attribute slot index, > i.e. the index of a vec4 within LDS. Therefore this must be scaled by > sizeof(vec4) to give the LDS byte offset. > > Signed-off-by:

Re: [Mesa-dev] [PATCH] radv/ac: canonicalize the output for 32-bit float min/max.

Where do you see that they are required to flush denormals to 0? I can't find it in the GLSL extensions for SPIR-V, and the vulkan spec has the following note: "Any denormalized value input into a shader or potentially generated by any instruction in a shader may be flushed to 0." Which very

[Mesa-dev] [PATCH] radv: Reduce number of max descriptor sets to 4.

We never supported more, as we can run out of user SGPRs on the VS. Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver") Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> CC: <mesa-sta...@lists.freedesktop.org> CC: James Legg <jl...@feralinte

Re: [Mesa-dev] [PATCH] radv: Fix using more than 4 bound descriptor sets

Pushed, but see my new patch for caveats. On Thu, Mar 16, 2017 at 6:48 PM, James Legg wrote: > Avoid a buffer overflow in ac_nir_to_llvm.c's create_function when > using more than 4 descriptor sets. radv claims support for 8. > > Cc: 17.0

Re: [Mesa-dev] [PATCH 2/2] radv: add external memory support.

On Wed, Mar 15, 2017 at 1:25 AM, Dave Airlie wrote: > From: Dave Airlie > > This adds support for exporting 2D images, to an > opaque fd. > > This implements the: > VK_KHX_external_memory_capabilities > VK_KHX_external_memory > VK_KHX_external_memory_fd > >

Re: [Mesa-dev] [PATCH 1/2] nir: add an isinf opcode, and an option to use it.

On Fri, Mar 17, 2017 at 1:04 AM, Dave Airlie wrote: > From: Dave Airlie > > In order to get isinf(NaN) correct, at least radv can't > use an unordered equals which feq has to be for us, this Why do we have to use an unordered equal normally? SPIR-V has

Re: [Mesa-dev] [PATCH] radv: Invalidate L2 for TRANSFER_WRITE barriers

t seems like a safer option for now. Yeah we should be able to. I'm more comfortable sending this patch to stable though, so this patch is Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> > --- > src/amd/vulkan/radv_cmd_buffer.c | 2 +- > 1 file changed, 1 insertion

[Mesa-dev] [PATCH] Revert "radv: Emit cache flushes before CP DMA."

This reverts commit cce43f6d8c40222099badaf52344d6a0eed993f3. Redundant, as the flush already happens at si_cp_dma_prepare. Cc: Dave Airlie --- src/amd/vulkan/si_cmd_buffer.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c

Re: [Mesa-dev] [PATCH 1/5] util/disk_cache: seed rand

I thought rand() was not thread safe anyway, and hence we can't use it in mesa as we don't know what application threads call it too? On Tue, Mar 14, 2017 at 3:08 AM, Timothy Arceri wrote: > Otherwise we will always remove old cache entries from the same dirs. > --- >

Re: [Mesa-dev] [PATCH] radv: Emit cache flushes before CP DMA.

On Wed, Mar 15, 2017 at 8:46 AM, Alex Smith <asm...@feralinteractive.com> wrote: > On 14 March 2017 at 20:56, Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> > wrote: >> >> The flushes could be due to TRANSFER barriers. >> >> Signed-off-by: Bas Nieuwenhuize

Re: [Mesa-dev] [PATCH 4/5] radv: implement VK_KHR_descriptor_update_template

ries is Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Did you have push access? On Tue, Apr 4, 2017 at 11:29 PM, Fredrik Höglund <fred...@kde.org> wrote: > All offsets and strides are precomputed by > radv_CreateDescriptorUpdateTemplateKHR and stored in the te

[Mesa-dev] [PATCH 1/4] radv: Use VK_WHOLE_SIZE for the query buffer bindings.

The buffer sizes are specified just a few lines earlier, so don't repeat ourselves. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_query.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_query.c b/src/amd/

Re: [Mesa-dev] [PATCH] radv: Disable primitive restart for non-indexed draws

So I think we need to reset both command buffer states (the enable and the index) when we call a secondary command buffer. With that fixed, this patch is Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Tue, Apr 11, 2017 at 3:30 PM, Alex Smith <asm...@feralinteractive.c

Re: [Mesa-dev] [PATCH] radv/winsys: only workout color/depth levels if we have color/depth

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Mon, Apr 3, 2017 at 7:17 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This fixes an old bug that seems to get triggered by > dEQP-VK.memory.requirements.imag

[Mesa-dev] [PATCH] radv: Increase descriptor limits.

We supported more generally. Decreased the dynamic buffers though, as we only support 16 for uniform+storage. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff

Re: [Mesa-dev] [PATCH] radv: fixup geometry clip emission since using the geom pass

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Fri, Mar 31, 2017 at 10:58 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > Fixes: 2b35b60d: radv: move to using nir clip/cull merge pass. > > Signed-off-by

Re: [Mesa-dev] [PATCH] radv: fix order of the guardband register emission.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Sun, Apr 2, 2017 at 6:47 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > y is vert, x is horiz. > > Noticed in visual inspection compared to radeonsi. >

Re: [Mesa-dev] [PATCH 02/25] radv: handle clip dist in es outputs.

On Thu, Mar 30, 2017 at 10:00 AM, Dave Airlie wrote: > From: Dave Airlie > > Signed-off-by: Dave Airlie > --- > src/amd/common/ac_nir_to_llvm.c | 4 > 1 file changed, 4 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH 08/25] radv: add tessellation ring allocation support.

On Thu, Mar 30, 2017 at 10:00 AM, Dave Airlie wrote: > From: Dave Airlie > > This patch adds support for the offchip rings for storing > tessellation factors and attribute data. > > It includes the register setup for the TF ring > > Signed-off-by: Dave

[Mesa-dev] [PATCH] radv: Rework guard band calculation.

viewport and takes the minimum. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/si_cmd_buffer.c | 52 ++ 1 file changed, 12 insertions(+), 40 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c

Re: [Mesa-dev] [PATCH 2/9] radv: simplify if statement

On Wed, Apr 12, 2017 at 12:48 AM, Dave Airlie <airl...@gmail.com> wrote: > On 12 April 2017 at 08:19, Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> wrote: >> On Wed, Apr 12, 2017 at 12:04 AM, Thomas Hindoe Paaboel Andersen >> <pho...@gmail.com> wrote: >>&

[Mesa-dev] [PATCH] radv: Stop shadowing the result in radv_GetQueryPoolResults.

The outer result was referred to, which meant bugs. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_query.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index bd293

Re: [Mesa-dev] [PATCH 2/9] radv: simplify if statement

On Wed, Apr 12, 2017 at 12:04 AM, Thomas Hindoe Paaboel Andersen wrote: > --- > src/amd/vulkan/radv_wsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/amd/vulkan/radv_wsi.c b/src/amd/vulkan/radv_wsi.c > index b8999f4..37cb322 100644 > ---

[Mesa-dev] [PATCH 1/2] radv: Use an offset instead of pointers for immutable samplers.

Makes more sense when we hash the layout for the pipeline cache. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/common/ac_nir_to_llvm.c | 12 ++- src/amd/vulkan/radv_descriptor_set.c | 42 src/amd/vulkan/radv_descriptor

[Mesa-dev] [PATCH 2/2] radv: Hash the immutable samplers.

Since the shader code can include them. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_descriptor_set.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c index ba5d5eb75e5..c048a

Re: [Mesa-dev] [PATCH 1/9] radv: remove redundant returns

Patches 1 & 6 are Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Wed, Apr 12, 2017 at 12:03 AM, Thomas Hindoe Paaboel Andersen <pho...@gmail.com> wrote: > From 1811ccf1 > --- > src/amd/vulkan/radv_device.c | 2 -- > 1 file changed, 2 deletions(-) >

[Mesa-dev] [PATCH 1/2] radv: Set query availability bit even if we don't wait.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> Fixes: 8475a14302e ("radv: Implement pipeline statistics queries.") --- src/amd/vulkan/radv_query.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/ra

[Mesa-dev] [PATCH 2/2] radv: Return VK_NOT_READY if the query results are not available.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> Fixes: 8475a14302e ("radv: Implement pipeline statistics queries.") --- src/amd/vulkan/radv_query.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c i

Re: [Mesa-dev] [PATCH v2] radv: Disable primitive restart for non-indexed draws

buffer. > > Signed-off-by: Alex Smith <asm...@feralinteractive.com> > Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> > --- > src/amd/vulkan/radv_cmd_buffer.c | 55 > > src/amd/vulkan/radv_private.h| 1 + >

Re: [Mesa-dev] [PATCH 1/2] radv: Add occlusion query shader.

) On Mon, Apr 10, 2017 at 4:54 AM, Edward O'Callaghan <funfunc...@folklore1984.net> wrote: > One trivial comment but otherwise 1&2 are, > Reviewed-by: Edward O'Callaghan <funfunc...@folklore1984.net> > > On 04/10/2017 09:34 AM, Bas Nieuwenhuizen wrote: >> Adds a

[Mesa-dev] [PATCH 2/2] radv: Use a shader for occlusion CmdCopyQueryPoolResults.

do that we may need to look a bit more into this. Having 8 WAIT_REG_MEM packets per query doesn't sound ideal. This also restricts the availability word in the pool to timestamp queries only, as occlusion queries don't use it, and pipeline statistic queries likely won't either. Signed-off-by: Bas

[Mesa-dev] [PATCH 1/2] radv: Add occlusion query shader.

Adds a shader for writing occlusion query results to a buffer, as the CP packet isn't support on SI or secondary buffers, and doesn't handle the availability bit (or partial results) nor truncation to 32-bit. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_

[Mesa-dev] [PATCH 3/4] radv: Let count be dynamic in radv_break_on_count.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_query.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index cfe16a9d0e2..dc1844adb51 100644 --- a/src/amd/vulkan/radv_query.c +++

[Mesa-dev] [PATCH 4/4] radv: Implement pipeline statistics queries.

The devil is in the shader again, otherwise this is fairly straightforward. The CTS contains no pipeline statistics copy to buffer testcases, so I did a basic smoketest. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 2 +- src/amd/vulkan/radv_pri

[Mesa-dev] [PATCH 2/4] radv: Rename query pipeline/set layout.

For using them with both occlusion and pipeline statistics queries. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_private.h | 4 ++-- src/amd/vulkan/radv_query.c | 22 +++--- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/s

[Mesa-dev] [PATCH] radv: Enable query inheritance.

mber of samples, but that hasn't happened yet, so we only change it to enable/disable counting) Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/

[Mesa-dev] [PATCH 1/2] radv: Ignore CmdUpdateBuffer with size 0.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_meta_buffer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/vulkan/radv_meta_buffer.c b/src/amd/vulkan/radv_meta_buffer.c index 1e94f3b5866..cfa0b9320e2 100644 --- a/src/amd/vulkan/radv_meta_bu

[Mesa-dev] [PATCH 2/2] radv: Add more trace points.

Most trace points happen after an operation, so add a trace point at the start of the command buffer. Furthermore, add one after a CmdUpdateBuffer using CP_DMA as that didn't emit one yet. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 1 + s

[Mesa-dev] [PATCH] radv: enable variableMultisampleRate.

This is only relevant with 0 attachments. In that case we do nothing on subpass switch already, and the pipeline is the authoritative source of the number of samples, so this shouldn't change anything. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 2

[Mesa-dev] [PATCH 2/2] radv: Set descriptor set limits.

Properly and with comments this time. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_device.c | 44 +--- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/

[Mesa-dev] [PATCH 1/2] radv: Increase integer sizes in descriptor sets.

Needed if we want to allow them taking more than 64 KiB. The calculations of these already used 32 bits. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_descriptor_set.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/s

Re: [Mesa-dev] [PATCH] radv: bump maxGeometryShaderInvocations.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Thu, Apr 13, 2017 at 9:29 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This bumps it to the same level as amdgpu-pro, it also > moves a bunch of dEQP-VK.geometry.i

Re: [Mesa-dev] [PATCH] radv: support S8_UINT as a depth/stencil format.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Thu, Apr 13, 2017 at 9:35 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This enables a bunch of NotSupported CTS tests. > > Signed-off-by: Dave Airlie <

[Mesa-dev] [PATCH] radv: Prefetch compute shader too.

For consistency, doesn't really impact performance. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 958ae6e361e..40e6e

Re: [Mesa-dev] [PATCH] radv: fix stencil regression since new addrlib import

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Thu, Apr 13, 2017 at 6:37 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > The addrlib import meant we'd return after we attempted > to setup the no stencil bit

[Mesa-dev] [PATCH v2] radv: make sizes & offsets 32 bit in radv_descriptor_update_template_entry.

v2: Also convert the calculations. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_descriptor_set.c | 4 ++-- src/amd/vulkan/radv_private.h| 10 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_descriptor_se

[Mesa-dev] [PATCH] radv: make sizes & offsets 32 bit in radv_descriptor_update_template_entry.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_private.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 00190e7eee0..2afc0cbedfc 100644 --- a/src/amd/

Re: [Mesa-dev] [PATCH] radv: allocate thin textures as linear.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Thu, Apr 13, 2017 at 6:14 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This is ported from radeonsi, and avoids the bug in the > addrlib code. This should probab

[Mesa-dev] [PATCH] radv: Add shader prefetch.

Gives me approximately a 2% perf increase in bot dota2 & talos. Having descriptors (both sets and vertex buffers) prefetched didn't help so I didn't include that. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 6 ++ src/amd/vulkan/radv

Re: [Mesa-dev] [PATCH 2/9] radv: start conditionalising vertex inputs.

On Tue, Apr 18, 2017 at 5:57 AM, Dave Airlie wrote: > From: Dave Airlie > > In practice this will probably just drop draw id in a few places. > > Signed-off-by: Dave Airlie > --- > src/amd/common/ac_nir_to_llvm.c | 42

Re: [Mesa-dev] [PATCH 1/9] radv/ac: add initial pre-pass for shader info gathering

Patch 1, 3-9 are Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Tue, Apr 18, 2017 at 5:57 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > There is some radv specific info we need to gather from shaders > bef

[Mesa-dev] [PATCH] radv: Set variant code_size when created from the cache.

Signed-off-by: Bas Nieeuwenhuizen --- src/amd/vulkan/radv_pipeline_cache.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index 5f6355f0d1a..0ab4d2a26e3 100644 ---

Re: [Mesa-dev] [PATCH] radv/ac: copy llvm machine feature flags from radeonsi.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Sun, Apr 23, 2017 at 9:22 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This just updates this to use the same flags as radeonsi > for consistency. > &

[Mesa-dev] [PATCH] radv: Use the correct pipeline for dispatches.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 958ae6e361e..ffa7e430b2b 100644 --- a/src/amd/

[Mesa-dev] [PATCH] radv: Translate x/y to x*(1.0/y).

Moves from accurate divides to rcp and rsq. No new CTS failures. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/common/ac_nir_to_llvm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c

[Mesa-dev] [PATCH] radv: Enable lowering fdiv in nir.

Results in faster code than the lowering by LLVM. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_pipeline.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 8e71d59fae7..5046c9f6b36

[Mesa-dev] [PATCH 6/8] radv: Only flush for the needed stages, and before the flushes.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5d4236ca187..274495f134f 100644 --- a/src/amd/

[Mesa-dev] [PATCH 4/8] radv: Flush more caches after writes.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 8c812084141..a1127130a5d 100644 --- a/src/amd/

[Mesa-dev] [PATCH 5/8] radv: Don't invalidate CB/DB for images that aren't modified outside CB/DB.

Without storaes, the only writes are fast clears, transfers and metadata initialization, each of which have the appropiate invalidations already. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 28 +++- 1 file chang

[Mesa-dev] [PATCH 1/8] radv: Determine cache flushes per object.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 36 +++- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5b44ce84529..07d0a

[Mesa-dev] [PATCH 2/8] radv: Invalidate the correct caches for CB/DB dst barriers.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 07d0a0c2c12..088a3c9025c 100644 --- a/s

[Mesa-dev] [PATCH 8/8] radv: Don't flush the CB before doing a fast clear eliminate.

The only way we write CMASK/DCC compressed textures through shaders is fast clears and CMASK/DCC inits, which have their own flushes. Hence the CB cache is always up to date. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_meta_fast_clear.c | 2 -- 1 file chan

[Mesa-dev] [PATCH 7/8] radv: Don't emit cache flushes on subpass switch.

I think we should only flush right before an action (draw/dispatch etc.), as otherwise it is too easy to issue redundant flushes. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 4 src/amd/vulkan/radv_meta_fast_clear.c | 1 - src/amd/

Re: [Mesa-dev] [PATCH] radv: disabled scaled formats for transfers.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Tue, Mar 7, 2017 at 8:01 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > These really are only supported for vertex buffers. > > Signed-off-by: Dave Airlie <

[Mesa-dev] [PATCH] radv: Store shaders in VRAM.

Less IFETCH latency on misses. Shader code is write once read many, so GTT doesn't make much sense anyway. If it turns out to fragment the CPU visible VRAM too much, we can upload with SDMA. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_pipeline.c

Re: [Mesa-dev] [PATCH] radv: Reinitialise loaderMagic when allocating a cached command buffer

Thanks. Pushed. - Bas On Mon, Mar 13, 2017 at 2:28 PM, Alex Smith wrote: > This must be set to ICD_LOADER_MAGIC by vkAllocateCommandBuffers, which > was being done when allocating a new buffer but not when reusing an > existing one in the cache. This would hit an

Re: [Mesa-dev] [PATCH] radv: setup llvm target data layout

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Mon, Mar 13, 2017 at 9:52 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > Ported from radeonsi, pointed out by Tom. > > "This prevents LLVM from using sext i

Re: [Mesa-dev] [PATCH] radv/ac: fixup texture coord to have right number of channels.

Reviewed-by: Bas Nieuwenhuizen <ba...@google.com> On Wed, Mar 8, 2017 at 11:27 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > Jason has patches to add validation to this area, this should fix > radv shaders. > &

Re: [Mesa-dev] [PATCH] radv: Emit pending flushes before executing a secondary command buffer

Nice catch. Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Mon, Mar 6, 2017 at 3:54 PM, Alex Smith <asm...@feralinteractive.com> wrote: > If we have any pending flushes on the primary command buffer, these > must be performed before executing the secondary buff

[Mesa-dev] [PATCH] radv: Disable HTILE for textures with multiple layers/levels.

It has issues and the fix I'm working on is too complicated for stable, so disable for now. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> CC: 13.0 17.0 <mesa-sta...@lists.freedesktop.org> --- src/amd/vulkan/radv_image.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sr

[Mesa-dev] [PATCH 1/3] radv/amdgpu: Let addrlib calculate the HTILE parameters.

Still not sure we can support miptrees when sampling from HTILE enabled textures. Added the tcCompatible winsys stuff while I'm at it. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_radeon_winsys.h| 5 + src/amd/vulkan/winsys/

[Mesa-dev] [PATCH 3/3] radv: Use the subresource range in HTILE initialization.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 16 +++- src/amd/vulkan/radv_image.c | 3 +-- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c

Re: [Mesa-dev] [PATCH] radv: handle z offset for 3d image <-> buffer copies.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Tue, Mar 7, 2017 at 1:30 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This fixes: > dEQP-VK.pipeline.render_to_image.3d.huge.depth.r8g8b8a8_unorm > &

Re: [Mesa-dev] [PATCH] radv: move fast clear before resolve into own loop.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Tue, Mar 7, 2017 at 12:33 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > Don't fast clear inside the meta loop as things get > conf

[Mesa-dev] [PATCH v2] radv: Use the subresource range in HTILE initialization.

v2: fix levelCount assert. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 16 +++- src/amd/vulkan/radv_image.c | 3 +-- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/

[Mesa-dev] [PATCH 2/3] radv: Use winsys HTILE info.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 10 ++--- src/amd/vulkan/radv_device.c | 4 +- src/amd/vulkan/radv_image.c | 83 --- src/amd/vulkan/radv_meta_clear.c | 2 +- src/amd/

Re: [Mesa-dev] [PATCH] radv: disable mip point pre clamping.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Tue, Mar 7, 2017 at 6:09 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > No idea what this does, but disabling it fixes a bunch > of failing CTS test

Re: [Mesa-dev] [PATCH 3/4] radv: check for upload alloc failure

Pushed. On Sun, Mar 5, 2017 at 10:04 PM, Grazvydas Ignotas wrote: > Mainly to avoid gcc's complains about uninitialized ptr and offset use > later in that code. > > Signed-off-by: Grazvydas Ignotas > --- > src/amd/vulkan/radv_cmd_buffer.c | 7 --- > 1

[Mesa-dev] [PATCH] radv/amdgpu: Add some debug flags.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/Makefile.sources| 1 + src/amd/vulkan/radv_debug.h| 40 ++ src/amd/vulkan/radv_device.c | 4 ++- src/amd/vulkan/radv_pri

[Mesa-dev] [PATCH] radv: Cache command buffers in command pool.

So that we don't keep allocating BOs for the IBs and upload buffers. We run some risk of memory increase with e.g. a bimodal size distribution of command buffers, but I haven't noticed a significant increase with dota2 and talos. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- s

Re: [Mesa-dev] [PATCH 3/4] radv: check for upload alloc failure

On Sun, Mar 5, 2017 at 11:39 PM, Grazvydas Ignotas <nota...@gmail.com> wrote: > On Mon, Mar 6, 2017 at 12:05 AM, Bas Nieuwenhuizen > <b...@basnieuwenhuizen.nl> wrote: >> On Sun, Mar 5, 2017 at 10:04 PM, Grazvydas Ignotas <nota...@gmail.com> wrote: >>>

Re: [Mesa-dev] [PATCH] radv: drop Z24 support.

Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Mon, Mar 6, 2017 at 12:27 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > This isn't exposed in -pro, the hw docs say it is deprecated, > so let's not bother wi

Re: [Mesa-dev] [PATCH 3/4] radv: check for upload alloc failure

16 * layout->dynamic_offset_count, > + 256, , )) > + return; We need to set cmd_buffer->record_fail on failure too. With that fixed, this series is Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> > >

[Mesa-dev] [PATCH] radv: Merge fast clear flushes.

Don't flush multiple times if we clear multiple attachments. Also allows doing the depth clear in parallel with the fast color clears. Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_meta_clear.c | 49 +--- 1 file chang

[Mesa-dev] [PATCH 1/2] radv: Add L2 writeback.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_private.h | 18 ++- src/amd/vulkan/si_cmd_buffer.c | 70 ++ 2 files changed, 54 insertions(+), 34 deletions(-) diff --git a/src/amd/vulkan/radv_private.h b/src/amd/

[Mesa-dev] [PATCH 2/2] radv: Use the new L2 writeback flag.

Signed-off-by: Bas Nieuwenhuizen <ba...@google.com> --- src/amd/vulkan/radv_cmd_buffer.c | 8 src/amd/vulkan/radv_meta_clear.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 16c3f

Re: [Mesa-dev] [PATCH 1/6] radv/ac: switch to new intrinsics for pkrtz and clamp.

Series is Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> On Mon, Mar 6, 2017 at 12:29 AM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > Signed-off-by: Dave Airlie <airl...@redhat.com> > --- > src/amd/common

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