[Mesa-dev] [PATCH] docs: removed the '--with-sha1' requirement from shading.html

The configuration option --with-sha1 is no longer required for the MESA_SHADER_READ_PATH, MESA_SHADER_DUMP_PATH environment variables to take effect. 1- removed the "--with-sha1" sentence from docs/shading.html 2- added an extra note: that the corresponding dumped and replacement shaders must

Re: [Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Hi Eero, On Fri, 4 May 2018 18:29:55 +0300 Eero Tamminen wrote: > You mean returning CAVEAT_SUPPORT in params for compressed formats > which are transparently converted to uncompressed data? Well, that would be the best solution I think, if it's possible to modify an

Re: [Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Hi Eero, Thanks for your feedback, On Thu, 3 May 2018 13:30:38 +0300 Eero Tamminen <eero.t.tammi...@intel.com> wrote: > Hi, > > On 02.05.2018 20:19, Matt Turner wrote: > > On Wed, May 2, 2018 at 9:13 AM, Eleni Maria Stea <es...@igalia.com> > > wrote: > &g

Re: [Mesa-dev] [PATCH v5] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

On 06/14/2018 10:27 PM, Nanley Chery wrote: > +Jason, Ken > > Hello, > > I recently did some miptree work relating to the r8stencil_mt and I > think I now have a more informed opinion about how things should be > structured. I'd like to propose an alternative solution. > > I had initially

[Mesa-dev] [PATCH v5] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

[Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

[Mesa-dev] [PATCH v4] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

[Mesa-dev] [PATCH] mesa: Fix function pointers initialization in status tracker

We assigned the function that gets the device uuid to the GetDriverUuid function pointer and the function that gets the driver uuid to the GetDeviceUuid function pointer inside the state tracker. Exchanged the pointers. --- src/mesa/state_tracker/st_context.c | 4 ++-- 1 file changed, 2

[Mesa-dev] [PATCH] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

Re: [Mesa-dev] [PATCH v5] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

On 07/10/2018 03:10 AM, Nanley Chery wrote: > On Thu, Jun 14, 2018 at 10:50:57PM +0300, Eleni Maria Stea wrote: >> On 06/14/2018 10:27 PM, Nanley Chery wrote: >> >>> +Jason, Ken >>> >>> Hello, >>> >>> I recently did some miptree work re

[Mesa-dev] [PATCH v6] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

[Mesa-dev] [PATCH v2] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

Re: [Mesa-dev] [PATCH 0/8] i965: improved the support for ETC2 formats on Gen 7

On Mon, 19 Nov 2018 10:54:04 +0200 Eleni Maria Stea wrote: > Intel Gen7 GPUs don't have native support for ETC2 formats. We store > the ETC2 images as RGBA in order to render them. This is a problem for > GetCompressed* functions that should return compressed pixel values > but re

Re: [Mesa-dev] [PATCH 2/8] i965: r8stencil_mt/needs_update renamed to shadow_mt/needs_update

On 1/19/19 12:55 AM, Nanley Chery wrote: > The series I pointed you to earlier has a patch like this, but it's more > complete. It also modifies the comment above the data structure being > modified. Do you want to review it? > > https://patchwork.freedesktop.org/patch/253197/ > > I think what

Re: [Mesa-dev] [PATCH 3/8] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

> > + /** > > +* \brief Indicates that we fake the ETC2 compression support > > +* > > +* GPUs Gen < 8 don't support sampling and rendering of ETC2 > > formats so > > +* we need to fake it. This variable is set to true when we > > fake it. > > +*/ > > + bool needs_fake_etc;

Re: [Mesa-dev] [PATCH 3/8] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

On 1/22/19 12:46 PM, Eleni Maria Stea wrote: >>> + /** >>> +* \brief Indicates that we fake the ETC2 compression support >>> +* >>> +* GPUs Gen < 8 don't support sampling and rendering of ETC2 >>> formats so >>> +* we need

Re: [Mesa-dev] [PATCH 3/8] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

On 1/19/19 1:32 AM, Nanley Chery wrote: >> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c >> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c >> index e214fae140..4d1eafac91 100644 >> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c >> +++

Re: [Mesa-dev] [PATCH 3/8] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

On 1/22/19 9:25 PM, Nanley Chery wrote: [...] > > The performance difference should be negligible if the function is > declared static inline in the intel_mipmap_tree.h header. The compiler > should include the body of function (which should be small) and avoid > the overhead of a function call.

[Mesa-dev] [PATCH] i965: fixed clamping in set_scissor_bits when the y is flipped

Calculating the scissor rectangle fields with the y flipped (0 on top) can generate negative values that will cause assertion failure later on as the scissor fields are all unsigned. We must clamp the bbox values again to make sure they don't exceed the fb_height. Also fixed a calculation error.

[Mesa-dev] [PATCH 4/8] i965: Update the shadow miptree from the main to fake the ETC2 compression

On GPUs gen < 8 that don't support ETC2 sampling/rendering we now fake the support using 2 mipmap trees: one (the main) that stores the compressed data for the Get* functions to work and one (the shadow) that stores the same data decompressed for the render/sampling to work. Added the

[Mesa-dev] [PATCH 3/8] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

GPUs Gen < 8 cannot render ETC2 formats. So far, they converted the compressed EAC/ETC2 images to non-compressed RGB format images that they can render. When GetCompressed* functions were called, the pixels were returned in the RGB format and not the compressed format as expected. Trying to fix

[Mesa-dev] [PATCH 2/8] i965: r8stencil_mt/needs_update renamed to shadow_mt/needs_update

Renamed the r8stencil_mt and r8stencil_needs_update to shadow_mt and shadow_needs_update respectively to allow reusing the shadow_mt as a generic purpose secondary mipmap tree. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 src/mesa/drivers/dri/i965/intel_mipmap_tree.c|

[Mesa-dev] [PATCH 1/8] i965: Removed assertions from intel_miptree_map_etc

The assertions that the GL_MAP_WRITE_BIT and GL_MAP_INVALIDATE_RANGE_BIT in intel_miptree_map_etc should be removed since they will fail when the ETC miptree is mapped for reading. Fixes: KHR-GL45.direct_state_access.textures_compressed_subimage crash on Gen 7 GPUs. ---

[Mesa-dev] [PATCH 0/8] i965: improved the support for ETC2 formats on Gen 7

in the main image mipmap tree and we use a secondary mipmap tree to store the RGBA values for the rendering. We perform a lazy update every time that the main miptree changes. Fix: KHR-GL46.direct_state_access.textures_compressed_subimage Eleni Maria Stea (8): i965: Removed assertions from

[Mesa-dev] [PATCH 5/8] i965: Fixed the CopyImageSubData for ETC2 on Gen < 8

CopyImageSubData couldn't work for the first draw call because intel_update_decompressed_shadow was called during the rendering. Moved the intel_update_decompressed_shadow in brw_predraw_resolve_inputs to fix this problem. --- src/mesa/drivers/dri/i965/brw_draw.c | 3 +++ 1 file changed, 3

[Mesa-dev] [PATCH 6/8] i965: Added support for ETC2 mipmaps

Extended the intel_update_decompress_shadow to update all the mipmap tree levels so that we can display and run Get functions on mipmaps. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 48 +++ 1 file changed, 29 insertions(+), 19 deletions(-) diff --git

[Mesa-dev] [PATCH 7/8] i965: Added support for ETC2 texture arrays on Gen7

Modified the calculation of the number of slices in the intel_update_decompressed_shadow function to take the array length into account to support arrays. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 8/8] i965: Enabled the OES_copy_image extension on Gen 7 GPUs

OES_copy_image extension was disabled on Gen7 due to the lack of support for ETC2 images. Enabled it back. --- src/mesa/drivers/dri/i965/intel_extensions.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c

Re: [Mesa-dev] [PATCH 3/8] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

Hi Nanley, On Fri, 18 Jan 2019 15:32:02 -0800 Nanley Chery wrote: > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > > b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index > > e214fae140..4d1eafac91 100644 --- > > a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ > >

Re: [Mesa-dev] [PATCH] i965: fixed clamping in set_scissor_bits when the y is flipped

On Tue, 19 Feb 2019 16:27:56 -0800 Nanley Chery wrote: > On Mon, Dec 10, 2018 at 12:42:40PM +0200, Eleni Maria Stea wrote: > > Calculating the scissor rectangle fields with the y flipped (0 on > > top) can generate negative values that will cause assertion failure > > la

[Mesa-dev] [PATCH v2] i965: fixed clamping in set_scissor_bits when the y is flipped

Calculating the scissor rectangle fields with the y flipped (0 on top) can generate negative values that will cause assertion failure later on as the scissor fields are all unsigned. We must clamp the bbox values again to make sure they don't exceed the fb_height. Also fixed a calculation error.

[Mesa-dev] [PATCH v3] i965: fixed clamping in set_scissor_bits when the y is flipped

Calculating the scissor rectangle fields with the y flipped (0 on top) can generate negative values that will cause assertion failure later on as the scissor fields are all unsigned. We must clamp the bbox values again to make sure they don't exceed the fb_height. Also fixed a calculation error.

[Mesa-dev] [PATCH v4] i965: fixed clamping in set_scissor_bits when the y is flipped

Calculating the scissor rectangle fields with the y flipped (0 on top) can generate negative values that will cause assertion failure later on as the scissor fields are all unsigned. We must clamp the bbox values again to make sure they don't exceed the fb_height. Also fixed a calculation error.

[Mesa-dev] [PATCH v4 1/9] anv: Added the VK_EXT_sample_locations extension to the anv_extensions list

Added the VK_EXT_sample_locations to the anv_extensions.py list to generate the related entrypoints. Reviewed-by: Sagar Ghuge --- src/intel/vulkan/anv_extensions.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_extensions.py index

[Mesa-dev] [PATCH v4 2/9] anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT

The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled with implementation dependent values and according to the table from the Vulkan Specification section [36.1. Limit Requirements]: pname | max | min pname:sampleLocationSampleCounts |-|ename:VK_SAMPLE_COUNT_4_BIT

[Mesa-dev] [PATCH v4 9/9] anv: Enabled the VK_EXT_sample_locations extension

Enabled the VK_EXT_sample_locations for Intel Gen >= 7. v2: Replaced device.info->gen >= 7 with True, as Anv doesn't support anything below Gen7. (Lionel Landwerlin) Reviewed-by: Sagar Ghuge --- src/intel/vulkan/anv_extensions.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[Mesa-dev] [PATCH v4 3/9] anv: Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT

Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT according to the Vulkan Specification section [36.2. Additional Multisampling Capabilities]. v2: 1- Moved the vkGetPhysicalDeviceMultisamplePropertiesEXT from the anv_sample_locations.c to the anv_device.c (Jason Ekstrand) 2-

[Mesa-dev] [PATCH v4 7/9] anv: Optimized the emission of the default locations on Gen8+

We only emit sample locations when the extension is enabled by the user. In all other cases the default locations are emitted once when the device is initialized to increase performance. --- src/intel/vulkan/anv_genX.h| 3 ++- src/intel/vulkan/genX_cmd_buffer.c | 2 +-

[Mesa-dev] [PATCH v4 8/9] anv: Removed unused header file

In src/intel/vulkan/genX_blorp_exec.c we included the file: common/gen_sample_positions.h but not use it. Removed. Reviewed-by: Sagar Ghuge Reviewed-by: Jason Ekstrand --- src/intel/vulkan/genX_blorp_exec.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/intel/vulkan/genX_blorp_exec.c

[Mesa-dev] [PATCH v4 6/9] anv: Added support for dynamic and non-dynamic sample locations on Gen7

Allowing setting dynamic and non-dynamic sample locations on Gen7. v2: Similarly to the previous patches, removed structs and functions that were used to sort and store the sorted sample positions (Jason Ekstrand) --- src/intel/vulkan/anv_genX.h| 13 ++---

[Mesa-dev] [PATCH v4 4/9] anv: Added support for non-dynamic sample locations on Gen8+

Allowing the user to set custom sample locations non-dynamically, by filling the extension structs and chaining them to the pipeline structs according to the Vulkan specification section [26.5. Custom Sample Locations] for the following structures: 'VkPipelineSampleLocationsStateCreateInfoEXT'

[Mesa-dev] [PATCH v4 5/9] anv: Added support for dynamic sample locations on Gen8+

Added support for setting the locations when the pipeline has been created with the dynamic state bit enabled according to the Vulkan Specification section [26.5. Custom Sample Locations] for the function: 'vkCmdSetSampleLocationsEXT' The reason that we preferred to store the boolean valid

[Mesa-dev] [PATCH v4 0/9] Implementation of the VK_EXT_sample_locations

son Ekstrand) We have 754 vk-gl-cts tests for this extension: 690 of the tests pass on Gen >= 9 (where we can support 16 samples). The remaining 64 tests aren't supported because they test the variable sample locations. Eleni Maria Stea (9): anv: Added the VK_EXT_sample_locations ext

[Mesa-dev] [PATCH v3 6/9] anv: Added support for dynamic and non-dynamic sample locations on Gen7

Allowing setting dynamic and non-dynamic sample locations on Gen7. --- src/intel/vulkan/anv_genX.h| 13 ++--- src/intel/vulkan/genX_cmd_buffer.c | 9 ++-- src/intel/vulkan/genX_pipeline.c | 13 + src/intel/vulkan/genX_state.c | 86 +- 4 files

[Mesa-dev] [PATCH v3 3/9] anv: Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT

Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT according to the Vulkan Specification section [36.2. Additional Multisampling Capabilities]. --- src/intel/Makefile.sources | 1 + src/intel/vulkan/anv_sample_locations.c | 60 +

[Mesa-dev] [PATCH v3 5/9] anv: Added support for dynamic sample locations on Gen8+

Added support for setting the locations when the pipeline has been created with the dynamic state bit enabled according to the Vulkan Specification section [26.5. Custom Sample Locations] for the function: 'vkCmdSetSampleLocationsEXT' The reason that we preferred to store the boolean valid

[Mesa-dev] [PATCH v3 2/9] anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT

The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled with implementation dependent values and according to the table from the Vulkan Specification section [36.1. Limit Requirements]: pname | max | min pname:sampleLocationSampleCounts |-|ename:VK_SAMPLE_COUNT_4_BIT

[Mesa-dev] [PATCH v3 4/9] anv: Added support for non-dynamic sample locations on Gen8+

Allowing the user to set custom sample locations non-dynamically, by filling the extension structs and chaining them to the pipeline structs according to the Vulkan specification section [26.5. Custom Sample Locations] for the following structures: 'VkPipelineSampleLocationsStateCreateInfoEXT'

[Mesa-dev] [PATCH v3 1/9] anv: Added the VK_EXT_sample_locations extension to the anv_extensions list

Added the VK_EXT_sample_locations to the anv_extensions.py list to generate the related entrypoints. Reviewed-by: Sagar Ghuge --- src/intel/vulkan/anv_extensions.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_extensions.py index

[Mesa-dev] [PATCH v3 7/9] anv: Optimized the emission of the default locations on Gen8+

We only emit sample locations when the extension is enabled by the user. In all other cases the default locations are emitted once when the device is initialized to increase performance. --- src/intel/vulkan/anv_genX.h| 3 ++- src/intel/vulkan/genX_cmd_buffer.c | 2 +-

[Mesa-dev] [PATCH v3 9/9] anv: Enabled the VK_EXT_sample_locations extension

Enabled the VK_EXT_sample_locations for Intel Gen >= 7. v2: Replaced device.info->gen >= 7 with True, as Anv doesn't support anything below Gen7. (Lionel Landwerlin) Reviewed-by: Sagar Ghuge --- src/intel/vulkan/anv_extensions.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[Mesa-dev] [PATCH v3 8/9] anv: Removed unused header file

In src/intel/vulkan/genX_blorp_exec.c we included the file: common/gen_sample_positions.h but not use it. Removed. Reviewed-by: Sagar Ghuge --- src/intel/vulkan/genX_blorp_exec.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/intel/vulkan/genX_blorp_exec.c

[Mesa-dev] [PATCH v3 0/9] Implementation of the VK_EXT_sample_locations

ort 16 samples). The remaining 64 tests aren't supported because they test the variable sample locations. Eleni Maria Stea (9): anv: Added the VK_EXT_sample_locations extension to the anv_extensions list anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT anv: Imple

Re: [Mesa-dev] [PATCH 4/9] anv: Added support for non-dynamic sample locations on Gen8+

On Wed, 13 Mar 2019 08:16:10 -0500 Jason Ekstrand wrote: > On Mon, Mar 11, 2019 at 10:05 AM Eleni Maria Stea > wrote: > > > Allowing the user to set custom sample locations non-dynamically, by > > filling the extension structs and chaining them to the pipeline

[Mesa-dev] [PATCH 3/9] anv: Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT

Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT according to the Vulkan Specification section [36.2. Additional Multisampling Capabilities]. --- src/intel/Makefile.sources | 1 + src/intel/vulkan/anv_sample_locations.c | 60 +

[Mesa-dev] [PATCH 6/9] anv: Added support for dynamic and non-dynamic sample locations on Gen7

Allowing setting dynamic and non-dynamic sample locations on Gen7. --- src/intel/vulkan/anv_genX.h| 13 ++--- src/intel/vulkan/genX_cmd_buffer.c | 9 ++-- src/intel/vulkan/genX_pipeline.c | 13 + src/intel/vulkan/genX_state.c | 86 +- 4 files

[Mesa-dev] [PATCH 1/9] anv: Added the VK_EXT_sample_locations extension to the anv_extensions list

Added the VK_EXT_sample_locations to the anv_extensions.py list to generate the related entrypoints. --- src/intel/vulkan/anv_extensions.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_extensions.py index 6fff293dee4..9e4e03e46df

[Mesa-dev] [PATCH 5/9] anv: Added support for dynamic sample locations on Gen8+

Added support for setting the locations when the pipeline has been created with the dynamic state bit enabled according to the Vulkan Specification section [26.5. Custom Sample Locations] for the function: 'vkCmdSetSampleLocationsEXT' The reason that we preferred to store the boolean valid

[Mesa-dev] [PATCH 7/9] anv: Optimized the emission of the default locations on Gen8+

We only emit sample locations when the extension is enabled by the user. In all other cases the default locations are emitted once when the device is initialized to increase performance. --- src/intel/vulkan/anv_genX.h| 3 ++- src/intel/vulkan/genX_cmd_buffer.c | 2 +-

[Mesa-dev] [PATCH 4/9] anv: Added support for non-dynamic sample locations on Gen8+

Allowing the user to set custom sample locations non-dynamically, by filling the extension structs and chaining them to the pipeline structs according to the Vulkan specification section [26.5. Custom Sample Locations] for the following structures: 'VkPipelineSampleLocationsStateCreateInfoEXT'

[Mesa-dev] [PATCH 2/9] anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT

The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled with implementation dependent values and according to the table from the Vulkan Specification section [36.1. Limit Requirements]: pname | max | min pname:sampleLocationSampleCounts |-|ename:VK_SAMPLE_COUNT_4_BIT

[Mesa-dev] [PATCH 9/9] anv: Enabled the VK_EXT_sample_locations extension

Enabled the VK_EXT_sample_locations for Intel Gen >= 7. --- src/intel/vulkan/anv_extensions.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_extensions.py index 9e4e03e46df..99007544732 100644 ---

[Mesa-dev] [PATCH 8/9] anv: Removed unused header file

In src/intel/vulkan/genX_blorp_exec.c we included the file: common/gen_sample_positions.h but not use it. Removed. --- src/intel/vulkan/genX_blorp_exec.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c index

[Mesa-dev] [PATCH v2 4/9] anv: Added support for non-dynamic sample locations on Gen8+

Allowing the user to set custom sample locations non-dynamically, by filling the extension structs and chaining them to the pipeline structs according to the Vulkan specification section [26.5. Custom Sample Locations] for the following structures: 'VkPipelineSampleLocationsStateCreateInfoEXT'

[Mesa-dev] [PATCH v2 1/9] anv: Added the VK_EXT_sample_locations extension to the anv_extensions list

Added the VK_EXT_sample_locations to the anv_extensions.py list to generate the related entrypoints. --- src/intel/vulkan/anv_extensions.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_extensions.py index 6fff293dee4..9e4e03e46df

[Mesa-dev] [PATCH v2 0/9] Implementation of the VK_EXT_sample_locations

ort 16 samples). The remaining 64 tests aren't supported because they test the variable sample locations. Eleni Maria Stea (9): anv: Added the VK_EXT_sample_locations extension to the anv_extensions list anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT anv: Imple

[Mesa-dev] [PATCH v2 6/9] anv: Added support for dynamic and non-dynamic sample locations on Gen7

Allowing setting dynamic and non-dynamic sample locations on Gen7. --- src/intel/vulkan/anv_genX.h| 13 ++--- src/intel/vulkan/genX_cmd_buffer.c | 9 ++-- src/intel/vulkan/genX_pipeline.c | 13 + src/intel/vulkan/genX_state.c | 86 +- 4 files

[Mesa-dev] [PATCH v2 5/9] anv: Added support for dynamic sample locations on Gen8+

Added support for setting the locations when the pipeline has been created with the dynamic state bit enabled according to the Vulkan Specification section [26.5. Custom Sample Locations] for the function: 'vkCmdSetSampleLocationsEXT' The reason that we preferred to store the boolean valid

[Mesa-dev] [PATCH v2 2/9] anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT

The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled with implementation dependent values and according to the table from the Vulkan Specification section [36.1. Limit Requirements]: pname | max | min pname:sampleLocationSampleCounts |-|ename:VK_SAMPLE_COUNT_4_BIT

[Mesa-dev] [PATCH v2 3/9] anv: Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT

Implemented the vkGetPhysicalDeviceMultisamplePropertiesEXT according to the Vulkan Specification section [36.2. Additional Multisampling Capabilities]. --- src/intel/Makefile.sources | 1 + src/intel/vulkan/anv_sample_locations.c | 60 +

[Mesa-dev] [PATCH v2 9/9] anv: Enabled the VK_EXT_sample_locations extension

Enabled the VK_EXT_sample_locations for Intel Gen >= 7. v2: Replaced device.info->gen >= 7 with True, as Anv doesn't support anything below Gen7. (Lionel Landwerlin) --- src/intel/vulkan/anv_extensions.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH v2 8/9] anv: Removed unused header file

In src/intel/vulkan/genX_blorp_exec.c we included the file: common/gen_sample_positions.h but not use it. Removed. --- src/intel/vulkan/genX_blorp_exec.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c index

[Mesa-dev] [PATCH v2 7/9] anv: Optimized the emission of the default locations on Gen8+

We only emit sample locations when the extension is enabled by the user. In all other cases the default locations are emitted once when the device is initialized to increase performance. --- src/intel/vulkan/anv_genX.h| 3 ++- src/intel/vulkan/genX_cmd_buffer.c | 2 +-

Re: [Mesa-dev] [PATCH 2/9] anv: Set the values for the VkPhysicalDeviceSampleLocationsPropertiesEXT

On Mon, 11 Mar 2019 11:39:58 -0700 Sagar Ghuge wrote: > On Mon, 2019-03-11 at 17:04 +0200, Eleni Maria Stea wrote: > > The VkPhysicalDeviceSampleLocationPropertiesEXT struct is filled > > with implementation dependent values and according to the table > > from the Vulkan

[Mesa-dev] [PATCH v3 2/5] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

GPUs Gen < 8 cannot sample ETC2 formats. So far, they converted the compressed EAC/ETC2 images to non-compressed RGBA images. When GetCompressed* functions were called, the pixels were returned in this RGBA format and not the compressed format that was expected. Trying to fix this problem, we use

[Mesa-dev] [PATCH v3 0/5] improved the support for ETC2 formats on Gen 7

eni Maria Stea (4): i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees. i965: Fixed the CopyImageSubData for ETC2 on Gen < 8 i965: Enabled the OES_copy_image extension on Gen 7 GPUs i965: Removed unused intel_miptree_map_etc/intel_miptree_unmap_etc Nanley Chery (1

[Mesa-dev] [PATCH v3 4/5] i965: Enabled the OES_copy_image extension on Gen 7 GPUs

OES_copy_image extension was disabled on Gen7 due to the lack of support for ETC2 images. Enabled it back. (Kenneth Graunke) v2: - Removed the blank lines in the comments above OES_copy_image and OES_texture_view extensions in intel_extensions.c (Nanley Chery) ---

[Mesa-dev] [PATCH v3 3/5] i965: Fixed the CopyImageSubData for ETC2 on Gen < 8

For CopyImageSubData to copy the data during the 1st draw call, we need to update the shadow tree right before the rendering. v2: - Added assertion that the miptree doesn't need update at the time we update the texture surface. (Nanley Chery) --- src/mesa/drivers/dri/i965/brw_draw.c

[Mesa-dev] [PATCH v3 5/5] i965: Removed unused intel_miptree_map_etc/intel_miptree_unmap_etc

Functions intel_miptree_(map|unmap)_etc are not reached anymore, as we now use the shadow_mt of each compressed ETC miptree for the emulation. We removed the functions. v2: - In the previous patch series, we only removed the assertions that the tree was mapped for writing. We can now safely

[Mesa-dev] [PATCH v3 1/5] i965: Rename intel_mipmap_tree::r8stencil_* -> ::shadow_*

From: Nanley Chery Use more generic field names. We'll reuse these fields for a workaround with ASTC miptrees. Reviewed-by: Eleni Maria Stea --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 16 src/mesa

Re: [Mesa-dev] [PATCH v2 5/5] i965: Enabled the OES_copy_image extension on Gen 7 GPUs

On Thu, 7 Feb 2019 11:18:59 -0500 Ilia Mirkin wrote: > On Thu, Feb 7, 2019 at 2:49 AM Eleni Maria Stea > wrote: > > > > On Wed, 6 Feb 2019 12:12:27 -0800 > > Nanley Chery wrote: > > > > > > + * For now, we can't enable OES_texture_view on Gen 7

Re: [Mesa-dev] [PATCH v3 2/5] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

Hello, On Thu, 7 Feb 2019 15:46:29 -0800 Nanley Chery wrote: > > - !(mode & BRW_MAP_DIRECT_BIT)) { > > + !(mode & BRW_MAP_DIRECT_BIT) && > > + !(intel_miptree_needs_fake_etc(brw, mt))) { > >intel_miptree_map_etc(brw, mt, map, level, slice); > >

Re: [Mesa-dev] [PATCH v3 2/5] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

Hi Nanley, On Thu, 7 Feb 2019 15:46:29 -0800 Nanley Chery wrote: > > > @@ -3825,10 +3849,20 @@ intel_miptree_unmap(struct brw_context *brw, > > DBG("%s: mt %p (%s) level %d slice %d\n", __func__, > > mt, _mesa_get_format_name(mt->format), level, slice); > > > > + level_w =

[Mesa-dev] [PATCH v5 4/4] i965: Enabled the OES_copy_image extension on Gen 7 GPUs

OES_copy_image extension was disabled on Gen7 due to the lack of support for ETC2 images. Enabled it back. (Kenneth Graunke) v2: - Removed the blank lines in the comments above OES_copy_image and OES_texture_view extensions in intel_extensions.c (Nanley Chery) ---

[Mesa-dev] [PATCH v5 2/4] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

GPUs Gen < 8 cannot sample ETC2 formats. So far, they converted the compressed EAC/ETC2 images to non-compressed RGBA images. When GetCompressed* functions were called, the pixels were returned in this RGBA format and not the compressed format that was expected. Trying to fix this problem, we use

[Mesa-dev] [PATCH v5 3/4] i965: Fixed the CopyImageSubData for ETC2 on Gen < 8

For CopyImageSubData to copy the data during the 1st draw call, we need to update the shadow tree right before the rendering. v2: - Added assertion that the miptree doesn't need update at the time we update the texture surface. (Nanley Chery) v3: - As we now update the tree before the

[Mesa-dev] [PATCH v5 1/4] i965: Rename intel_mipmap_tree::r8stencil_* -> ::shadow_*

From: Nanley Chery Use more generic field names. We'll reuse these fields for a workaround with ASTC miptrees. Reviewed-by: Eleni Maria Stea --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 16 src/mesa

[Mesa-dev] [PATCH v5 0/4] improved the support for ETC2 formats on Gen 7

pha, srgb8-punchthrough-alpha1) piglit.spec.arb_es3_compatibility.oes_compressed_etc2_texture-miptree (srgb8 compat, srgb8 core, srgb8-alpha8 compat, srgb8-alpha8 core, srgb8-punchthrough-alpha1 compat, srgb8-punchthrough-alpha1 core) (9 tests) Total tests passing: 148 Eleni Maria Stea (3): i

[Mesa-dev] [PATCH v4 2/4] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

GPUs Gen < 8 cannot sample ETC2 formats. So far, they converted the compressed EAC/ETC2 images to non-compressed RGBA images. When GetCompressed* functions were called, the pixels were returned in this RGBA format and not the compressed format that was expected. Trying to fix this problem, we use

[Mesa-dev] [PATCH v4 3/4] i965: Fixed the CopyImageSubData for ETC2 on Gen < 8

For CopyImageSubData to copy the data during the 1st draw call, we need to update the shadow tree right before the rendering. v2: - Added assertion that the miptree doesn't need update at the time we update the texture surface. (Nanley Chery) v3: - As we now update the tree before the

[Mesa-dev] [PATCH v4 0/4] improved the support for ETC2 formats on Gen 7

pha, srgb8-punchthrough-alpha1) piglit.spec.arb_es3_compatibility.oes_compressed_etc2_texture-miptree (srgb8 compat, srgb8 core, srgb8-alpha8 compat, srgb8-alpha8 core, srgb8-punchthrough-alpha1 compat, srgb8-punchthrough-alpha1 core) (9 tests) Total tests passing: 148 Eleni Maria Stea (3): i

[Mesa-dev] [PATCH v4 1/4] i965: Rename intel_mipmap_tree::r8stencil_* -> ::shadow_*

From: Nanley Chery Use more generic field names. We'll reuse these fields for a workaround with ASTC miptrees. Reviewed-by: Eleni Maria Stea --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 16 src/mesa

[Mesa-dev] [PATCH v4 4/4] i965: Enabled the OES_copy_image extension on Gen 7 GPUs

OES_copy_image extension was disabled on Gen7 due to the lack of support for ETC2 images. Enabled it back. (Kenneth Graunke) v2: - Removed the blank lines in the comments above OES_copy_image and OES_texture_view extensions in intel_extensions.c (Nanley Chery) ---

[Mesa-dev] [PATCH v4 0/4] improved the support for ETC2 formats on Gen 7

pha, srgb8-punchthrough-alpha1) piglit.spec.arb_es3_compatibility.oes_compressed_etc2_texture-miptree (srgb8 compat, srgb8 core, srgb8-alpha8 compat, srgb8-alpha8 core, srgb8-punchthrough-alpha1 compat, srgb8-punchthrough-alpha1 core) (9 tests) Total tests passing: 148 Eleni Maria Stea (3): i

[Mesa-dev] [PATCH v6 2/5] i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.

GPUs Gen < 8 cannot sample ETC2 formats. So far, they converted the compressed EAC/ETC2 images to non-compressed RGBA images. When GetCompressed* functions were called, the pixels were returned in this RGBA format and not the compressed format that was expected. Trying to fix this problem, we use

[Mesa-dev] [PATCH v6 1/5] i965: Rename intel_mipmap_tree::r8stencil_* -> ::shadow_*

From: Nanley Chery Use more generic field names. We'll reuse these fields for a workaround with ASTC miptrees. Reviewed-by: Eleni Maria Stea --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 16 src/mesa

[Mesa-dev] [PATCH v6 0/5] improved the support for ETC2 formats on Gen 7

pat, srgb8 core, srgb8-alpha8 compat, srgb8-alpha8 core, srgb8-punchthrough-alpha1 compat, srgb8-punchthrough-alpha1 core) (9 tests) Total tests passing: 148 Eleni Maria Stea (4): i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees. i965: Fixed the CopyImageSubData fo

[Mesa-dev] [PATCH v6 3/5] i965: Fixed the CopyImageSubData for ETC2 on Gen < 8

For CopyImageSubData to copy the data during the 1st draw call, we need to update the shadow tree right before the rendering. v2: - Added assertion that the miptree doesn't need update at the time we update the texture surface. (Nanley Chery) v3: - As we now update the tree before the

[Mesa-dev] [PATCH v6 5/5] i965: Removed the field etc_format from the struct intel_mipmap_tree

After the previous changes to emulate the ETC/EAC formats using the secondary shadow miptree, the etc_format field of the intel_mipmap_tree struct became redundant and the remaining check that used it has been replaced. (Nanley Chery) --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +-

[Mesa-dev] [PATCH v6 4/5] i965: Enabled the OES_copy_image extension on Gen 7 GPUs

OES_copy_image extension was disabled on Gen7 due to the lack of support for ETC2 images. Enabled it back. (Kenneth Graunke) v2: - Removed the blank lines in the comments above OES_copy_image and OES_texture_view extensions in intel_extensions.c (Nanley Chery) ---

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