On Tue, 2015-07-28 at 18:17 +0300, Francisco Jerez wrote:
Iago Toral Quiroga ito...@igalia.com writes:
Link to v1:
http://lists.freedesktop.org/archives/mesa-dev/2015-July/089766.html
Changes after review (Curro)
- Drop the patch that asserted that the reg size should always be 1
: 0
We can probably whittle that down pretty quick.
--Jason
-Jordan
On 2015-07-14 00:46:02, Iago Toral Quiroga wrote:
This is the second part of the v3 series including remaining frontend bits
like the optional unsized array at the bottom of SSBO definitions, layout
mode std430
On Tue, 2015-08-04 at 14:08 -0700, Jordan Justen wrote:
On 2015-07-14 00:46:10, Iago Toral Quiroga wrote:
From: Samuel Iglesias Gonsalvez sigles...@igalia.com
They only can be defined in the last position of the shader
storage blocks.
When an unsized array is used in different
On Tue, 2015-08-04 at 16:04 -0700, Jordan Justen wrote:
On 2015-08-04 15:12:06, Jordan Justen wrote:
On 2015-07-14 00:46:11, Iago Toral Quiroga wrote:
From: Samuel Iglesias Gonsalvez sigles...@igalia.com
It also creates unop and triop expressions to tell the driver to
calculate
On Tue, 2015-08-04 at 14:08 -0700, Jordan Justen wrote:
On 2015-07-14 00:46:10, Iago Toral Quiroga wrote:
From: Samuel Iglesias Gonsalvez sigles...@igalia.com
They only can be defined in the last position of the shader
storage blocks.
When an unsized array is used in different
On Thu, 2015-07-30 at 12:33 +0200, Iago Toral wrote:
On Wed, 2015-07-29 at 15:21 -0700, Ian Romanick wrote:
On 07/29/2015 07:01 AM, Samuel Iglesias Gonsalvez wrote:
From: Iago Toral Quiroga ito...@igalia.com
Currently, we only consider precision qualifiers at compile-time
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Wed, 2015-08-05 at 20:31 +1000, Timothy Arceri wrote:
Cc: Iago Toral Quiroga ito...@igalia.com
Cc: Jason Ekstrand jason.ekstr...@intel.com
---
src/glsl/nir/nir_lower_io.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl
On Wed, 2015-08-05 at 20:04 +1000, Timothy Arceri wrote:
On Wed, 2015-08-05 at 10:30 +0200, Iago Toral Quiroga wrote:
---
src/glsl/ast_to_hir.cpp | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index
On Wed, 2015-08-05 at 13:38 +0300, Francisco Jerez wrote:
Iago Toral ito...@igalia.com writes:
On Tue, 2015-08-04 at 16:04 -0700, Jordan Justen wrote:
On 2015-08-04 15:12:06, Jordan Justen wrote:
On 2015-07-14 00:46:11, Iago Toral Quiroga wrote:
From: Samuel Iglesias Gonsalvez sigles
On Wed, 2015-08-05 at 22:22 +1000, Timothy Arceri wrote:
On Wed, 2015-08-05 at 13:45 +0200, Iago Toral wrote:
On Wed, 2015-08-05 at 20:04 +1000, Timothy Arceri wrote:
On Wed, 2015-08-05 at 10:30 +0200, Iago Toral Quiroga wrote:
---
src/glsl/ast_to_hir.cpp | 9 -
1 file
stream,
which is not allowed
Iago
Marek
On Wed, Jun 18, 2014 at 11:51 AM, Iago Toral Quiroga ito...@igalia.com
wrote:
Outputs that are linked to inputs in the next stage must be output to
stream 0,
otherwise we should fail to link.
---
src/glsl/link_varyings.cpp | 8
1 file
On Thu, 2015-07-30 at 09:43 +0200, Marek Olšák wrote:
On Thu, Jul 30, 2015 at 8:49 AM, Iago Toral ito...@igalia.com wrote:
On Wed, 2015-07-29 at 21:58 +0200, Marek Olšák wrote:
Hi,
Where does the spec say we should fail to link? I don't see such a
statement there.
I have reviewed
On Wed, 2015-07-29 at 15:16 -0700, Ian Romanick wrote:
On 07/29/2015 07:01 AM, Samuel Iglesias Gonsalvez wrote:
From: Iago Toral Quiroga ito...@igalia.com
We will need this later on when we implement proper support for precision
qualifiers in the drivers and also to do link time checks
On Fri, 2015-07-31 at 13:12 +0300, Francisco Jerez wrote:
Iago Toral ito...@igalia.com writes:
On Thu, 2015-07-30 at 17:08 +0300, Francisco Jerez wrote:
Iago Toral Quiroga ito...@igalia.com writes:
When we have code such as this:
mov vgrf1.0.x:F, vgrf2.:F
mov vgrf3.0.x:F
On Wed, 2015-07-29 at 15:21 -0700, Ian Romanick wrote:
On 07/29/2015 07:01 AM, Samuel Iglesias Gonsalvez wrote:
From: Iago Toral Quiroga ito...@igalia.com
Currently, we only consider precision qualifiers at compile-time. This patch
adds precision information to ir_variable so we can also
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
El 2015-08-11 14:25, Oded Gabbay escribió:
On Mon, Aug 10, 2015 at 9:50 AM, Jason Ekstrand ja...@jlekstrand.net
wrote:
The swizzle defines where in the format you should look for any given
channel. When we flip the format around for BE targets
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
El 2015-08-08 18:04, Jason Ekstrand escribió:
Cc: Iago Toral ito...@igalia.com
Cc: Oded Gabbay oded.gab...@gmail.com
---
src/mesa/main/formats.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/formats.c b
On Thu, 2015-08-06 at 11:06 -0700, Connor Abbott wrote:
On Thu, Aug 6, 2015 at 12:30 AM, Iago Toral ito...@igalia.com wrote:
On Wed, 2015-08-05 at 12:17 -0700, Connor Abbott wrote:
On Wed, Aug 5, 2015 at 1:30 AM, Iago Toral Quiroga ito...@igalia.com
wrote:
---
src/glsl/nir
On Thu, 2015-08-06 at 18:27 +0300, Francisco Jerez wrote:
Iago Toral Quiroga ito...@igalia.com writes:
If we have spilled/unspilled a register in the current instruction, avoid
emitting unspills for the same register in the same instruction or
consecutive
instructions following
On Thu, 2015-08-06 at 08:53 +0300, Tapani Pälli wrote:
Reviewed-by: Tapani Pälli tapani.pa...@intel.com
On 08/05/2015 11:30 AM, Iago Toral Quiroga wrote:
From: Samuel Iglesias Gonsalvez sigles...@igalia.com
According to ARB_uniform_buffer_object spec:
If the parameter (starting
On Wed, 2015-08-05 at 12:23 -0400, Ilia Mirkin wrote:
On Wed, Aug 5, 2015 at 4:30 AM, Iago Toral Quiroga ito...@igalia.com wrote:
These handle querying the buffer name attached to a giving binding point
as well as the start offset and size of that buffer.
---
src/mesa/main/get.c | 31
On Wed, 2015-08-05 at 11:59 -0700, Connor Abbott wrote:
On Wed, Aug 5, 2015 at 1:30 AM, Iago Toral Quiroga ito...@igalia.com wrote:
From: Samuel Iglesias Gonsalvez sigles...@igalia.com
Signed-off-by: Samuel Iglesias Gonsalvez sigles...@igalia.com
---
src/glsl/nir/glsl_to_nir.cpp | 10
On Fri, 2015-08-07 at 07:43 +0200, Iago Toral wrote:
On Thu, 2015-08-06 at 11:06 -0700, Connor Abbott wrote:
On Thu, Aug 6, 2015 at 12:30 AM, Iago Toral ito...@igalia.com wrote:
On Wed, 2015-08-05 at 12:17 -0700, Connor Abbott wrote:
On Wed, Aug 5, 2015 at 1:30 AM, Iago Toral Quiroga ito
On Wed, 2015-08-05 at 10:29 +0200, Iago Toral Quiroga wrote:
From: Francisco Jerez curroje...@riseup.net
These functions handle the conversion of a vec4 into the form expected
by the dataport unit in message and message return payloads. The
conversion is not always trivial because some
On Fri, 2015-08-07 at 14:14 +0300, Francisco Jerez wrote:
Iago Toral ito...@igalia.com writes:
On Thu, 2015-08-06 at 18:27 +0300, Francisco Jerez wrote:
Iago Toral Quiroga ito...@igalia.com writes:
If we have spilled/unspilled a register in the current instruction, avoid
emitting
qualifier parsing. I wrote a Piglit test that
fails with these changes (I tested against
itoral-ARB_shader_storage_buffer_object-v4.1 branch), here:
http://lists.freedesktop.org/archives/piglit/2015-August/016777.html
On 08/05/2015 11:30 AM, Iago Toral Quiroga wrote:
---
src/glsl/glsl_lexer.ll
On Wed, 2015-08-05 at 12:17 -0700, Connor Abbott wrote:
On Wed, Aug 5, 2015 at 1:30 AM, Iago Toral Quiroga ito...@igalia.com wrote:
---
src/glsl/nir/glsl_to_nir.cpp | 36
src/glsl/nir/nir_intrinsics.h | 12 ++--
2 files changed, 42 insertions
On Wed, 2015-08-05 at 12:24 -0700, Connor Abbott wrote:
On Wed, Aug 5, 2015 at 1:30 AM, Iago Toral Quiroga ito...@igalia.com wrote:
The original GLSL IR intrinsics have been lowered to an internal
version that accepts a block index and an offset instead of a
SSBO reference.
---
src
On Thu, 2015-07-23 at 11:40 -0700, Anuj Phogat wrote:
On Wed, Jul 22, 2015 at 7:10 AM, Iago Toral ito...@igalia.com wrote:
The problem here is that the _mesa_meta_BlitFramebuffer is not setting
G/B channels to 0.0 when doing Luminance/Intensity to RGBA conversions,
so why not implement
On Fri, 2015-07-24 at 16:20 +0300, Francisco Jerez wrote:
Iago Toral Quiroga ito...@igalia.com writes:
Larger registers should have been moved to scratch (like GRF array access)
or split to size 1 by the split_virtual_grfs pass.
Not necessarily. split_virtual_grfs() won't be able
On Fri, 2015-07-24 at 16:18 +0300, Francisco Jerez wrote:
Iago Toral Quiroga ito...@igalia.com writes:
When we have code such as this:
mov vgrf1.0.x:F, vgrf2.:F
mov vgrf3.0.x:F, vgrf1.:F
...
mov vgrf3.0.x:F, vgrf1.:F
And vgrf1 is chosen for spilling, we can emit
On Tue, 2015-07-21 at 11:13 -0700, Anuj Phogat wrote:
On Tue, Jul 21, 2015 at 12:50 AM, Iago Toral ito...@igalia.com wrote:
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/common/meta.c | 13 ++---
1
On Tue, 2015-07-21 at 17:05 -0700, Anuj Phogat wrote:
On Tue, Jul 21, 2015 at 1:36 AM, Iago Toral ito...@igalia.com wrote:
On Tue, 2015-07-21 at 08:13 +0200, Iago Toral wrote:
On Mon, 2015-07-20 at 10:56 -0700, Anuj Phogat wrote:
On Mon, Jul 20, 2015 at 5:10 AM, Iago Toral ito
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Wed, 2015-07-22 at 11:54 -0700, Anuj Phogat wrote:
_mesa_meta_pbo_GetTexSubImage() uses _mesa_meta_BlitFrameBuffer(),
which will do fragment clamping if enabled. But fragment clamping
doesn't affect ReadPixels and GetTexImage.
Without
Looks good to me, if this did not introduce any regressions:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
This allows us to handle cases when texImage-_BaseFormat doesn't match
_mesa_format_get_base_format(texImage-Format). _BaseFormat
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/common/meta.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/common
The problem here is that the _mesa_meta_BlitFramebuffer is not setting
G/B channels to 0.0 when doing Luminance/Intensity to RGBA conversions,
so why not implement the fix in _mesa_meta_BlitFramebuffer directly? The
GL spec expects frambuffer blits to handle these conversions properly,
so it looks
Patches 10-11 are
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/common/meta.c | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git
,
this is:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
}
@@ -648,27 +653,28 @@ glsl_type::get_array_instance(const glsl_type *base,
unsigned array_size)
mtx_lock(glsl_type::mutex);
if (array_types == NULL) {
- array_types = hash_table_ctor(64, hash_table_string_hash
BTW, notice that patches 1-3, 5-7 and 51 have already been reviewed by
Jordan.
Iago
On Tue, 2015-07-14 at 09:46 +0200, Iago Toral Quiroga wrote:
This is the second part of the v3 series including remaining frontend bits
like the optional unsized array at the bottom of SSBO definitions, layout
not see any issues with enabling this
for GLES 3.1 at the time but then I forgot to enable it, but I need to
double check this though.
Iago
Cheers
Mike
On Tue, 14 Jul 2015 at 08:48 Iago Toral Quiroga ito...@igalia.com
wrote:
---
docs/GL3.txt | 2 +-
1 file
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/mesa/swrast/s_aaline.c| 28 ++--
src/mesa/swrast/s_aalinetemp.h| 4 ++--
src/mesa/swrast/s_atifragshader.c | 4 ++--
src/mesa/swrast
On Tue, 2015-07-14 at 11:30 +0200, Iago Toral wrote:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
BTW, ldexpf and copysignf are c99 too, so I guess you'll need to wrap
these too.
Iago
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/glsl/nir/nir_opcodes.py | 4 ++--
1
Needs wrappers for sinf, cosf, powf, logf.
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/mesa/program/prog_execute.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/src
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/util/register_allocate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/util/register_allocate.c b/src/util/register_allocate.c
index 2ad8c3c..95be20f
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
There are a couple of unrelated changes in t_vb_lighttmp.h that I hope
you'll excuse -- there's a block of code that's duplicated modulo a few
trivial differences that I took the liberty of fixing.
---
src/mesa/tnl/t_draw.c | 2
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/glsl/nir/nir_opcodes.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/glsl/nir/nir_opcodes.py b/src/glsl/nir/nir_opcodes.py
index 56e96d9..df5b7e2
This one will need wrapping for fabsf.
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/gallium/auxiliary/util/u_format_rgb9e5.h | 2 +-
src/gallium/auxiliary/util/u_math.h | 2 +-
2 files changed, 2 insertions(+), 2
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
Literals without an f/F suffix are of type double, and implicit
conversion rules specify that the float in (float op double) be
converted to a double before the operation is performed. I
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/mesa/vbo/vbo_context.c| 6 +++---
src/mesa/vbo/vbo_exec_array.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mesa/vbo/vbo_context.c b/src/mesa
* M_PI / 180.0 );
+ s = sinf( angle * M_PI / 180.0 );
180.0F
+ c = cosf( angle * M_PI / 180.0 );
180.0F
I guess we will need wrappers for sinf and cosf.
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
memcpy(m, Identity, sizeof(GLfloat)*16);
optimized = GL_FALSE;
@@ -859,7
as in the previous patch: is there any gain here?
Other than this:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
if (light-_CosCutoff 0)
light-_CosCutoff = 0;
if (light-SpotCutoff != 180.0F)
@@ -165,21 +165,21 @@ _mesa_light(struct gl_context *ctx, GLuint lnum, GLenum
On Tue, 2015-07-14 at 13:19 +0200, Iago Toral wrote:
On Mon, 2015-07-13 at 16:22 -0700, Matt Turner wrote:
---
src/mesa/math/m_clip_tmp.h | 20 ++---
src/mesa/math/m_matrix.c | 70
+++---
src/mesa/math/m_norm_tmp.h | 2 +-
3 files
On Wed, 2015-07-15 at 11:02 -0700, Connor Abbott wrote:
On Wed, Jul 15, 2015 at 7:49 AM, Iago Toral ito...@igalia.com wrote:
Hi,
when we sent the patches for the new nir-vec4 backend we mentioned that
we had a few dEQP tests that would fail to link because of register
spilling. Now
at the patches.
Iag
On Sun, Jun 28, 2015 at 11:29 PM, Iago Toral ito...@igalia.com wrote:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
On Fri, 2015-06-26 at 13:15 -0700, Anuj Phogat wrote:
Currently used ctx-_ImageTransferState check is not sufficient
because it doesn't include the read color
moved it to Gallium where I am not sure that your change is what they
want. You should probably just skip this part.
With these changes,
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
/* And finally, see if there are any transfer ops. */
return _mesa_get_readpixels_transfer_ops
On Fri, 2015-06-19 at 13:40 -0700, Anuj Phogat wrote:
On Tue, Jun 16, 2015 at 9:21 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Jun 16, 2015 11:15, Anuj Phogat anuj.pho...@gmail.com wrote:
Without this patch, piglit test fbo_integer_readpixels_sint_uint fails,
when
forced to use
_mesa_get_readpixels_transfer_ops(ctx, rb-Format, format, type,
uses_blit) != 0;
With the change, indentation for the second line needs to be fixed too.
Other than that,
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
}
return GL_FALSE
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/main/readpix.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index
Hi,
On Thu, 2015-07-16 at 08:15 -0700, Jason Ekstrand wrote:
On Jul 15, 2015 11:20 PM, Iago Toral ito...@igalia.com wrote:
On Wed, 2015-07-15 at 11:02 -0700, Connor Abbott wrote:
On Wed, Jul 15, 2015 at 7:49 AM, Iago Toral ito...@igalia.com
wrote:
Hi,
when we sent
On Mon, 2015-07-20 at 10:56 -0700, Anuj Phogat wrote:
On Mon, Jul 20, 2015 at 5:10 AM, Iago Toral ito...@igalia.com wrote:
On Fri, 2015-06-19 at 13:40 -0700, Anuj Phogat wrote:
On Tue, Jun 16, 2015 at 9:21 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On Jun 16, 2015 11:15, Anuj
the GL_ALPHA_INTEGER case together with the other
single component formats, at first I thought you had missed it. Either
way:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
+ case GL_LUMINANCE_INTEGER_EXT:
+ return GL_LUMINANCE;
+ case GL_LUMINANCE_ALPHA_INTEGER_EXT:
+ return
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/common/meta.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index
On Tue, 2015-07-21 at 08:13 +0200, Iago Toral wrote:
On Mon, 2015-07-20 at 10:56 -0700, Anuj Phogat wrote:
On Mon, Jul 20, 2015 at 5:10 AM, Iago Toral ito...@igalia.com wrote:
On Fri, 2015-06-19 at 13:40 -0700, Anuj Phogat wrote:
On Tue, Jun 16, 2015 at 9:21 PM, Jason Ekstrand ja
to
receive a destFormat that is ala glReadPixels, so there is no need to
care for all those internal formats anyway, but I think you should
explain this in the commit log.
With that change,
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
/* The pixel transfer state will be set to default values
On Tue, 2015-07-21 at 09:24 +0200, Iago Toral wrote:
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Without this patch, piglit test arb_color_buffer_float-readpixels
fails, when forced to use the meta pbo path.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
Cc: mesa-sta
On Tue, 2015-06-16 at 11:15 -0700, Anuj Phogat wrote:
Without this patch, piglit test arb_color_buffer_float-readpixels
fails, when forced to use the meta pbo path.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
Cc: mesa-sta...@lists.freedesktop.org
---
Hi,
when we sent the patches for the new nir-vec4 backend we mentioned that
we had a few dEQP tests that would fail to link because of register
spilling. Now that we have added GS support we see a few instances of
this problem popping up in a few GS piglit tests too, for example this
one:
I think Chris did not review this one:
Reviewed-by: Iago Toral Quiroga ito...@igalia.com
Iago
On Fri, 2015-07-10 at 11:44 -0700, Matt Turner wrote:
BEGIN_BATCH() and ADVANCE_BATCH() will contain do { and } while (0)
respectively to allow declaring local variables used by intervening
On Wed, 2015-10-21 at 14:58 +0300, Francisco Jerez wrote:
> Iago Toral <ito...@igalia.com> writes:
>
> > On Wed, 2015-10-21 at 13:00 +0300, Francisco Jerez wrote:
> >> Iago Toral <ito...@igalia.com> writes:
> >>
> >> > Hi Curro,
> >&
On Wed, 2015-10-21 at 23:24 -0700, Jordan Justen wrote:
> On 2015-10-20 00:43:13, Iago Toral wrote:
> > On Tue, 2015-10-20 at 00:12 -0700, Jordan Justen wrote:
> > > An untyped surface read is volatile because it might be affected by a
> > > writ
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Wed, 2015-10-21 at 12:30 -0700, Matt Turner wrote:
> We implement textureQueryLevels (which takes no arguments, save the
> sampler) using the resinfo message (which takes an argument of LOD).
> Without initializing it, we'd
On Thu, 2015-10-22 at 09:39 -0400, Connor Abbott wrote:
> On Thu, Oct 22, 2015 at 7:21 AM, Iago Toral Quiroga <ito...@igalia.com> wrote:
> > I implemented this first as a separate optimization pass in GLSL IR [1], but
> > Curro pointed out that this being pretty much a res
On Fri, 2015-10-23 at 09:26 -0700, Jason Ekstrand wrote:
> On Thu, Oct 22, 2015 at 11:13 PM, Iago Toral <ito...@igalia.com> wrote:
> > On Thu, 2015-10-22 at 09:09 -0700, Jason Ekstrand wrote:
> >> On Thu, Oct 22, 2015 at 4:21 AM, Iago Toral Quiroga <ito...@igalia
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Sat, 2015-10-24 at 13:20 -0700, Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_genera
tem_values_read;
>
> + /* Which patch inputs are actually read */
> + uint64_t patch_inputs_read;
> + /* Which patch outputs are actually written */
> + uint64_t patch_outputs_written;
These two should be fine as uint32_t since we set them from a GLBitfield
which is 32-bit af
On Wed, 2015-10-28 at 09:11 +0100, Iago Toral wrote:
> Yeah, this makes things more consistent:
> Reviewed-by: Iago Toral Quiroga <ito...@igali.com>
I meant:
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
>
> On Tue, 2015-10-27 at 22:38 -0700, Jordan Just
Yeah, this makes things more consistent:
Reviewed-by: Iago Toral Quiroga <ito...@igali.com>
On Tue, 2015-10-27 at 22:38 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
>
65.
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/mesa/main/uniforms.c | 30 --
> 1 file changed, 20 ins
On Tue, 2015-10-27 at 14:33 +0200, Pohjolainen, Topi wrote:
> On Tue, Oct 27, 2015 at 10:28:58AM +0100, Iago Toral Quiroga wrote:
> > We need this so we can configure different behaviors for passes that
> > cannot deal with side-effectful instructions (CSE) and passes that can
&
On Tue, 2015-10-27 at 22:38 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/glsl/linker.cpp
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2015-10-29 at 00:46 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/glsl/builtin_variables.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
&g
On Thu, 2015-10-29 at 00:47 -0700, Jordan Justen wrote:
> The OpenGLES GLSL 3.1 specification uses the precision qualifier
> ordering rules from ARB_shading_language_420pack.
Maybe expand the commit log to make explicit that this is for GLES 3.1
and desktop GL since 4.2
Reviewed-by: Iago
t generally
need to hold pointers to previous instructions and the places where we
do, like in brw_ENDIF or brw_WHILE we are careful to create the
instructions we need before we look for pointers to others (which we do
using indices into the store anyway).
Reviewed-by: Iago Toral Quiroga <ito...@igalia
On Thu, 2015-10-29 at 00:50 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 --
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 6 --
> 2 files changed, 8 insertions(+), 4 deletions(-)
>
> diff
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2015-10-29 at 00:47 -0700, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/mesa/main/get_hash_params.py | 1 +
> 1 file changed, 1 insertion(+)
>
&
drivers/dri/i965/gen7_cs_state.c
> b/src/mesa/drivers/dri/i965/gen7_cs_state.c
> index 6aeb0cb..da1d05f 100644
> --- a/src/mesa/drivers/dri/i965/gen7_cs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_cs_state.c
> @@ -29,6 +29,7 @@
> #include "brw_shader.h"
> #
d
unsigned we might want to use %y instead of %d here. The same in a bunch
of of the other hunks in this patch.
Either way,
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> if (!pipe) {
>_mesa_error(ctx, GL_INVALID_OPERATION, "glUseProgramStages(pipeline)");
LL || prog->_LinkedShaders[MESA_SHADER_COMPUTE] == NULL) {
>_mesa_error(ctx, GL_INVALID_OPERATION,
>"%s(no active compute shader)",
This hunk won't apply on current master, there is no such comment before
this line. Maybe this is part of another series o
On Thu, 2015-10-22 at 09:09 -0700, Jason Ekstrand wrote:
> On Thu, Oct 22, 2015 at 4:21 AM, Iago Toral Quiroga <ito...@igalia.com> wrote:
> > I implemented this first as a separate optimization pass in GLSL IR [1], but
> > Curro pointed out that this being pretty much a res
On Thu, 2015-10-22 at 16:38 +0200, Iago Toral wrote:
> On Thu, 2015-10-22 at 09:39 -0400, Connor Abbott wrote:
> > On Thu, Oct 22, 2015 at 7:21 AM, Iago Toral Quiroga <ito...@igalia.com>
> > wrote:
> > > I implemented this first as a separate o
ensure that they are last in the SSBO
definition, so maybe it is redundant... if we don't want to add that
check, then maybe it is worth amending the comment to explain why though
(and even in that case maybe we want to add an assert).
With these changes:
Reviewed-by: Iago Toral Quiroga <it
l in that case anyway.
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/mesa/drivers/dri/i965/brw_disasm.c | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
> b/src/mesa/drivers/d
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Wed, 2015-11-04 at 15:33 -0800, Kristian Høgsberg Kristensen wrote:
> We always pass in shader->ir and we already pass in the shader, so just
> drop the exec_list. Most passes either take just a exec_list or a
> shader,
ite this loop as:
if (ctx->Const.ShaderCompilerOptions[i].LowerBufferInterfaceBlocks) {
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
if (prog->_LinkedShaders[i] != NULL)
lower_ubo_reference(prog->_LinkedShaders[i]);
}
}
With that change, and assuming that thi
On Mon, 2015-11-09 at 16:52 +0100, Iago Toral wrote:
> On Wed, 2015-11-04 at 15:33 -0800, Kristian Høgsberg Kristensen wrote:
> > All GLSL IR consumers run this lowering pass so we can move it to the
> > linker. This moves the pass up quite a bit, but that's the point: it
> >
s/loose/lose
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2015-11-05 at 13:33 +0200, Tapani Pälli wrote:
> This information will be used by cross stage validation of varyings
> for pipeline objects.
>
> Signed-off-by: Tapani Pälli <tapani.pa...@intel.c
On Fri, 2015-11-06 at 14:03 +0200, Tapani Pälli wrote:
> From: Iago Toral Quiroga <ito...@igalia.com>
>
> We will need this later on when we implement proper support for
> precision qualifiers in the drivers and also to do link time checks for
> uniforms as indicated by the
On Mon, 2015-11-09 at 12:27 -0500, Connor Abbott wrote:
> On Mon, Nov 9, 2015 at 10:41 AM, Jason Ekstrand <ja...@jlekstrand.net> wrote:
> >
> > On Nov 9, 2015 7:24 AM, "Connor Abbott" <cwabbo...@gmail.com> wrote:
> >>
> >> On Mon, Nov 9
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2015-11-12 at 00:44 -0800, Jordan Justen wrote:
> This commit accidentally used a '==' when '=' was intended.
>
> commit 96b22fb080894ba1840af2372f28a46cc0f40c76
> Author: Kristian Høgsberg Kristensen <k...@bitplan
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