On Sun, 2015-12-13 at 23:10 -0500, Ilia Mirkin wrote:
> On Thu, Sep 10, 2015 at 9:35 AM, Iago Toral Quiroga <ito...@igalia.com> wrote:
> > +ir_expression *
> > +lower_ubo_reference_visitor::process_ssbo_unsized_array_length(ir
On Thu, 2015-12-31 at 11:20 -0800, Jordan Justen wrote:
> v2:
> * Fill UboInterfaceBlockIndex and SsboInterfaceBlockIndex in
>split_ubos_and_ssbos (Iago)
>
> Cc: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
> Cc: Iago Toral <ito...@igalia.com>
> Signed-of
i?id=93322
> Cc: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
> Cc: Iago Toral <ito...@igalia.com>
> Cc: Tapani Pälli <tapani.pa...@intel.com>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Reviewed-by: Juha-Pekka Heikkila <juhapekka.
b), 'options->lower_usub_borrow'),
Don't we need to use b2i with uadd_carry and usub_borrow? ult seems to
return NIR_TRUE (~0u) instead of 1.
With that change (or confirmation that is not needed):
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
Iago
> ]
>
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Wed, 2016-01-06 at 15:30 -0800, Jason Ekstrand wrote:
> We don't need these for GLSL or ARB, but we need them for SPIR-V
> ---
> src/mesa/drivers/dri/i965/brw_shader.cpp | 5 +
> 1 file changed, 5 insertions(+)
>
&g
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> In this lowering pass, shared variables are decomposed into intrinsic
> calls.
>
> v2:
> * Send mem_ctx as a parameter (Iago)
>
> Signed-off-by: Jordan Justen
> ---
> src/glsl/Makefile.sources | 1
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/glsl/nir/glsl_to_nir.cpp | 29 +
> src/glsl/nir/nir_intrinsics.h | 1 +
> 2 files changed, 30 insertions(+)
>
> diff --git
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp | 1 +
> 1 file changed, 1 insertion(+)
&g
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> For compute shader shared variable we will set a default of column
> major.
>
> Signed-off-by: Jordan Justen
> ---
> src/glsl/lower_buffer_access.cpp | 5 +++--
> src/glsl/lower_buffer_access.h | 10
/src/glsl/nir/nir_intrinsics.h
> index de15128..6912258 100644
> --- a/src/glsl/nir/nir_intrinsics.h
> +++ b/src/glsl/nir/nir_intrinsics.h
> @@ -277,5 +277,6 @@ LOAD(shared, 0, 1, NIR_INTRINSIC_CAN_ELIMINATE)
> STORE(output, 0, 0, 0, 0)
> STORE(per_vertex_output, 1, 1, 0, 0)
rage:
>return this->lower_uniforms;
>
> + case ir_var_shader_shared:
> + return false;
I suppose the right thing to do here is to add a lower_shared_variables
parameter to this and take its value from a compiler option that we set
to false, like we do with the other types, bu
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +++
> 1 file changed, 3 insertions(+)
>
>
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Enable ARB_compute_shader on gen7+, on hardware that supports the
> OpenGL 4.3 requirements of a local group size of 1024.
>
> With SIMD16 support, this is lim
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/glsl/builtin_functions.cpp | 70
> +++---
> 1 file ch
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 60
>
> 2 files changed, 62 insertions(+)
>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 54
>
> 1 file changed, 54 insertions(+)
>
> diff --git
is in 4k increments, but must be a power of 2. */
> + slm_size = 4 * 1024;
> + while (slm_size < 64 * 1024 && slm_size < prog_data->total_shared)
total_shared is guaranteed to be <= 64KB because of the assert above so
we should not need the "slm_size &l
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 33
>
> 2 files changed, 35 insertions(+)
>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Reviewed-by: Timothy Arceri <timothy.arc...@collabora.com>
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/glsl/ast_function.cpp | 1
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> When an intrinsic atomic operation is used on a shared variable, we
> translate it to a new 'share variable' specific intrinsic function
s/share/shared
> call.
>
> For example, add call to __intrinsic_atomic_add when used on a shared
>
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Shared variables can be accessed by other threads within the same
> local workgroup. This prevents us from performing certain
> optimizations with shared variables.
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/glsl/nir/glsl_to_nir.cpp | 53
> +++
> src/glsl/nir/nir_intrinsics.h | 25
> 2 files changed, 78
I think we are too late for 11.1.0.
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> docs/relnotes/11.1.0.html | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/docs/relnotes/11.1.0.html b/docs/relnotes/11.1.0.html
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> docs/GL3.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
On Mon, 2015-11-30 at 00:43 -0800, Jordan Justen wrote:
> On 2015-11-25 03:24:38, Iago Toral wrote:
> > On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> > > Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> > > ---
> > > src/
On Mon, 2015-11-30 at 09:56 +0200, Tapani Pälli wrote:
> Hi;
>
> On 11/27/2015 02:14 PM, Iago Toral Quiroga wrote:
> > The current implementation looks for array dereferences on gl_FragData and
> > immediately then proceeds to lower them, however this is not enough because
lways use 430 packing (Iago)
> * Comment / whitespace cleanup (Iago)
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/glsl/Makefile.sources | 1 +
> src/glsl/ir_optimization.h
On Tue, 2015-12-01 at 00:19 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 52
>
> 1 file changed, 52 insertions(+)
>
> diff --git
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-12-01 at 00:19 -0800, Jordan Justen wrote:
> v3:
> * Update based on latest SSBO code (Iago)
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com&
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-12-01 at 00:20 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> ---
> docs/relnotes/11.2.0.html | 1 +
> 1 file
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-12-01 at 00:19 -0800, Jordan Justen wrote:
> v3:
> * Remove extra #includes (Iago)
> * Use recently added GEN7_BTI_SLM instead of BRW_SLM_SURFACE_INDEX (curro)
>
> Signed-off-by: Jordan Justen <jordan.
sed on a shared
For example, a call to ...
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> variable will be translated to a call to
> __intrinsic_atomic_add_shared.
>
> v3:
> * Fix stale comments copied from SSBOs (Iago)
>
> Signed-off-by: Jordan Justen &l
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-12-01 at 00:19 -0800, Jordan Justen wrote:
> v3:
> * Check shared variable size at link time
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com&
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-12-01 at 00:19 -0800, Jordan Justen wrote:
> v3:
> * Update min/max based on latest SSBO code (Iago)
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Iago Toral Quiroga <ito...@iga
On Wed, 2015-11-25 at 10:17 -0500, Connor Abbott wrote:
> On Wed, Nov 25, 2015 at 4:48 AM, Iago Toral <ito...@igalia.com> wrote:
> > On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> >> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> >>
On Wed, 2015-11-25 at 11:59 -0800, Jordan Justen wrote:
> On 2015-11-25 01:32:37, Iago Toral wrote:
> >
> > On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> > > For compute shader shared variable we will set a default of column
> > > major.
> >
:
> * Add comment for lower_buffer_access::setup_buffer_access
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Samuel Iglesias Gonsalvez <sigles...@igalia.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> Reviewed-by: Iago Toral Quiroga <ito...@ig
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> v2:
> * Rename ssbo_get_array_length to ssbo_unsized_array_length_access (Iago)
> * Use always use this-> when referencing buffer_access_type (Iago)
>
> Sign
ten <jordan.l.jus...@intel.com>
> Cc: Samuel Iglesias Gonsalvez <sigles...@igalia.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/glsl/Makefile.sources| 2 +
> src/glsl/lower_buffer_access.cpp | 218
>
Iago)
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Samuel Iglesias Gonsalvez <sigles...@igalia.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/glsl/lower_ubo_
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> The compiler probably already blocks this earlier on, but we should be
> checking for an SSBO here.
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com&g
Reviewed-by:; Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> Cc: Iago Toral Quiroga <ito...@igalia.com>
> ---
> src/gls
Hi,
Jordan sent a piglit test that produces a link failure with the ssbo
code [1]. Doing something like this is sufficient to reproduce the
problem:
[fragment shader]
#version 330
#extension GL_ARB_shader_storage_buffer_object: require
#define SIZE 6
layout (std430) buffer SSBO {
mat4
On Fri, 2015-11-20 at 13:07 +0100, Iago Toral wrote:
> Hi,
>
> Jordan sent a piglit test that produces a link failure with the ssbo
> code [1]. Doing something like this is sufficient to reproduce the
> problem:
>
> [fragment shader]
> #
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2015-11-19 at 22:43 -0800, Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/src/
On Thu, 2015-11-19 at 11:05 +0100, Iago Toral Quiroga wrote:
> These patches are fixes extracted from Connor's fp64 branch that
> I would like to review and land ahead of the rest. They are
> independent of the rest of the series, some of them are even
> general fixes unrelated to fp6
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2015-11-19 at 22:43 -0800, Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp | 11 +++
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/src/
On Thu, 2015-11-19 at 10:54 -0500, Connor Abbott wrote:
> On Thu, Nov 19, 2015 at 5:05 AM, Iago Toral Quiroga <ito...@igalia.com> wrote:
> > These patches are fixes extracted from Connor's fp64 branch that
> > I would like to review and land ahead of the rest. They are
> &
On Thu, 2015-11-19 at 12:19 -0800, Matt Turner wrote:
> For the next patches you send from Connor, please use
> --suppress-cc=author so that every reply doesn't generate a bounce
> message about his disabled @intel email. :)
>
Yeah, will do :)
Iago
On Thu, 2015-11-19 at 10:14 -0500, Connor Abbott wrote:
> I think Ken already pushed a similar patch so we can drop this.
I don't see that in master, but sure, we can hold this back if he is
planning to push the same thing.
Iago
> On Thu, Nov 19, 2015 at 5:05 AM, Iago Toral Quirog
tian Høgsberg <k...@bitplanet.net>
> >> wrote:
> >>> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga <ito...@igalia.com>
> >>> wrote:
> >>>> From: Connor Abbott <connor.w.abb...@intel.com>
> >>>>
> >>>&g
On Fri, 2015-11-20 at 11:09 -0800, Jordan Justen wrote:
> On 2015-11-20 06:48:27, Iago Toral Quiroga wrote:
> > Improves register pressure, since otherwise we end up emitting
> > loads for all the elements in the RHS and them emitting
> > stores for all elements in th
On Mon, 2015-11-23 at 14:03 -0800, Ian Romanick wrote:
> On 11/23/2015 02:01 PM, Ian Romanick wrote:
> > On 11/23/2015 10:54 AM, Jason Ekstrand wrote:
> >> This fixes a regression introduced in b1a83b5d1 that caused basically all
> >> shaders to fail to compile on 32-bit platforms.
> >
> > Here's
ast_cs_input_layout(const struct YYLTYPE ,
> - ast_layout_expression **local_size)
> + ast_layout_expression *const *local_size)
I think this change does not belong in this patch. Otherwise:
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2015-11-24 at 12:26 +, Emil Velikov wrote:
> Hi Iago,
>
> I'm not sure how others feel on the topic, but imho it's not that
> useful to have XX patches where each addresses a couple of lines of
> whitespace issues. Squashing the lot per section (one for glsl,
> another for i965) seems
On Tue, 2016-01-12 at 11:53 -0800, Matt Turner wrote:
> On Tue, Jan 12, 2016 at 1:41 AM, Iago Toral <ito...@igalia.com> wrote:
> > On Mon, 2016-01-11 at 09:36 -0800, Matt Turner wrote:
> >> A shader in Unreal4 uses the result of divide by zero in its color
> >> out
On Tue, 2016-01-12 at 10:29 -0500, Ilia Mirkin wrote:
> IIRC this should come out as b2i + i2d. You should be able to test
> this with llvmpipe/softpipe, which support fp64.
I see, thanks for the quick reply, I'll check this on intel.
Iago
> On Jan 12, 2016 9:49 AM, "Iago Toral
On Tue, 2016-01-12 at 12:41 -0500, Ilia Mirkin wrote:
> On Tue, Jan 12, 2016 at 12:33 PM, Ian Romanick wrote:
> > On 01/12/2016 07:29 AM, Ilia Mirkin wrote:
> >> IIRC this should come out as b2i + i2d. You should be able to test this
> >> with llvmpipe/softpipe, which
Looks good to me, FWIW I built radeonsi and llvmpipe with this change
just in case and I saw no issues.
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-11 at 14:48 -0800, Matt Turner wrote:
> From: Kenneth Graunke <kenn...@whitecape.org>
>
> TGSI doesn'
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-11 at 09:36 -0800, Matt Turner wrote:
> ---
> .../drivers/dri/i965/brw_fs_combine_constants.cpp | 21
> -
> 1 file changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/s
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-11 at 14:48 -0800, Matt Turner wrote:
> NIR's bfm, like Intel/AMD's hardware instructions and GLSL IR's
> ir_binop_bfm takes as src0 and as src1.
> ---
> src/glsl/nir/nir_opcodes.py | 2 +-
> 1 file chang
On Mon, 2016-01-11 at 09:36 -0800, Matt Turner wrote:
> A shader in Unreal4 uses the result of divide by zero in its color
> output, producing NaN and triggering this assertion since NaN is not
> equal to itself.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93560
> ---
>
Makes sense,
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-11 at 16:15 -0800, Kenneth Graunke wrote:
> .length() on an unsized SSBO variable doesn't actually read any data
> from the SSBO, and is allowed on variables marked 'writeonly'.
>
> Fixes compute
On Mon, 2016-06-06 at 16:45 +0200, Jakob Sinclair wrote:
> On 2016-06-06 15:48, Iago Toral wrote:
> > Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> >
>
> I don't have push access so I would be very happy if you could push this
> patch for me. Thanks!
Sure
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Sat, 2016-06-04 at 01:09 +0200, Jakob Sinclair wrote:
> Could cause issues if you tried to read from an uninitialised pointer.
> This just initalises the pointer to null to avoid that being a problem.
> Discovered by Cov
I guess this makes sense:
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com
Out of curiosity, in which case do we get here and can't find a function
name?
On Mon, 2016-06-06 at 07:00 +1000, Dave Airlie wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> This fixes
On Tue, 2016-06-07 at 15:25 +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> One piece of ARB_shader_subroutine I ignored was the fact that it
> needs to store the subroutine index data per context and not per
> shader program.
>
> There is one CTS test that tests this:
>
On Thu, 2016-05-26 at 15:13 +0100, Emil Velikov wrote:
> On 19 May 2016 at 10:00, Iago Toral <ito...@igalia.com> wrote:
> > I have just noticed that this was never pushed, right? I noticed this
> > while working on providing double-precision implementation for the other
&g
On Fri, 2016-06-10 at 22:39 -0700, Francisco Jerez wrote:
> ISTR having suggested this during review of the recent FP64 changes to
> the SIMD lowering pass, but it doesn't look like it was taken into
> account in the end. Using the fs_reg::component_size helper instead
> of this open-coded
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Wed, 2016-06-01 at 21:25 -0700, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
> Cc: "12.0" <mesa-sta...@lists.freedesktop.org>
> ---
> src/mesa/drivers/dri/i965/gen6_s
On Thu, 2016-05-26 at 14:50 +1000, Timothy Arceri wrote:
> The i965 backend currently expects doubles to be packed.
This patch is:
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
With that said, I think these two patches from Samuel might have fixed
i965 to handle unpacke
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Wed, 2016-06-01 at 14:13 +1000, Dave Airlie wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> The driver was adding the skip components but always for buffer 0.
>
> This fixes:
> GL45-CTS.gtf4
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Tue, 2016-05-31 at 22:45 -0700, Kenneth Graunke wrote:
> Isolines aren't reversed. commit 5b2d8c2273c6f fixed this for the vec4
> TES backend, but not the scalar one.
>
> Found while debugging GL45-CTS.t
.0cd420e 100644
> --- a/src/mesa/main/mtypes.h
> +++ b/src/mesa/main/mtypes.h
> @@ -2718,17 +2718,6 @@ struct gl_shader_program
> enum gl_frag_depth_layout FragDepthLayout;
>
> /**
> -* Tessellation Control shader state from layout qualifiers.
> -*/
> - struct
an be while making it somewhat clearer where these
> values originate from.
>
> V2: remove unessisary NULL check
unnecessary
>
> Reviewed-by: Marek Olšák <marek.ol...@amd.com>
> Reviewed-by: Iago Toral <ito...@igalia.com>
> ---
> src/compiler/glsl/lin
On Wed, 2016-06-22 at 11:34 +1000, Timothy Arceri wrote:
> On Mon, 2016-06-20 at 17:38 +0200, Iago Toral wrote:
> > On Mon, 2016-06-20 at 21:11 +1000, Timothy Arceri wrote:
> > >
> > > We will reuse this for fs key generation for the on disk shader
> > > cach
On Wed, 2016-06-22 at 09:54 +1000, Timothy Arceri wrote:
> On Tue, 2016-06-21 at 17:45 +0200, Iago Toral wrote:
> > On Tue, 2016-06-21 at 12:21 +1000, Timothy Arceri wrote:
> > >
> > > We already store this in gl_shader and gl_program here we
> > > remove it
Patches 18 and 18 are:
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-06-20 at 15:07 +1000, Dave Airlie wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> Just add types into unsupported or double
> equivalent spots.
>
> Signed-off-by: D
On Mon, 2016-06-20 at 17:40 +1000, Timothy Arceri wrote:
> This is more consitent with what we do elsewhere and will allow
consistent
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> us to only cache one of the values in the shader cache.
> ---
> src/mes
only amends the bitfield with some special outputs... maybe
something like brw_vs_amend_outputs_written would be more accurate. What
do you think?
Either way:
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
> +{
> + if (key->copy_edgeflag) {
> + outputs_written |=
On Tue, 2016-06-21 at 12:21 +1000, Timothy Arceri wrote:
> We already store this in gl_shader and gl_program here we
> remove it from gl_shader_program and just use the values
> from gl_shader.
>
> This will allow us to keep the shader cache restore code as
> simple as it can be while making it
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-18 at 06:02 -0800, Kenneth Graunke wrote:
> I have a patch that writes shaders as .shader_test files, and it uses
> this function to create the headers (i.e. [vertex shader]).
>
> [tess ctrl shader] isn't a v
e intrinsics.
This patch is
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
It does not add the NIR implementation so if someone wants to use this
with NIR we will have to add the glsl_to_nir code to read this last
parameter and update the ssbo intrinsics in NIR to include it as well.
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2016-02-04 at 21:55 +1100, Timothy Arceri wrote:
> ---
> src/mesa/program/prog_parameter.c | 70
> ---
> src/mesa/program/prog_parameter.h | 7
> 2 files changed, 77 d
current_var = var;
> + this->prog = prog;
No reason to assign this every time we find a variable, we should do
this in the constructor of the parcel object instead.
With that change,
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
>field_counter = 0;
>
Looks good to me,
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Wed, 2016-02-03 at 12:04 -0800, Matt Turner wrote:
> Reported-by: Jan Ziak <0xe2.0x9a.0...@gmail.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93989
> ---
> src/compiler/Makefile.am
On Thu, 2016-02-11 at 19:12 -0800, Kenneth Graunke wrote:
> On Thursday, February 11, 2016 5:49:55 PM PST Matt Turner wrote:
> > On Thu, Feb 11, 2016 at 3:33 PM, Francisco Jerez
> wrote:
> > > Would be really nice if we could also get rid of reg_offset as we're at
> > >
ffset is also valid.
Anyway, I am not blocking anything, the patches are a small thing and
they might help in some cases so feel to go ahead with them. If you
still need a Reviewed-by for these you can add mine or Samuel's.
Iago
>
> On Wed, Feb 3, 2016 at 5:12 PM, Iago Toral <ito...@igalia.com
torage block or "
> - "uniform block");
> + if (decl_type->contains_image()) {
> +/* FINISHME: Same problem as with atomic counters.
> + * FINISHME: Request clarification from Khronos and add
> + * FINISHME: spec quo
Looks good to me,
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Thu, 2016-02-11 at 15:45 +1100, Timothy Arceri wrote:
> Commit c98deb18d5836f in 2010 disallowed embedded struct definitions
> in ES. Then in 2013 d9bb8b7b56ce65b disallowed it for everything but
> GLSL 1.
, but it is probably
unnecessary in practice so do with that as you will.
Iago
On Tue, 2016-01-26 at 16:33 +0100, Iago Toral wrote:
> Patches 1 to 4 are,
>
> Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
>
> I intend to review the remaining patches tomorrow as well if n
On Thu, 2016-01-28 at 09:21 -0800, Matt Turner wrote:
> On Thu, Jan 28, 2016 at 12:32 AM, Iago Toral <ito...@igalia.com> wrote:
> > On Mon, 2016-01-25 at 15:18 -0800, Matt Turner wrote:
(...)
> >> diff --git a/src/glsl/nir/nir_opt_algebraic.py
> >> b/src/glsl/ni
On Wed, 2016-01-27 at 12:29 -0800, Matt Turner wrote:
> On Wed, Jan 27, 2016 at 5:22 AM, Iago Toral <ito...@igalia.com> wrote:
> > I think it would be a good idea to change the shortlog so it is clear
> > that we are only talking about the scalarization aspect. There is still
On Mon, 2016-01-25 at 15:18 -0800, Matt Turner wrote:
> ---
> src/glsl/nir/nir.h| 4
> src/glsl/nir/nir_opt_algebraic.py | 28
> 2 files changed, 32 insertions(+)
>
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index bbd5b1a..3b90b51
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-25 at 15:18 -0800, Matt Turner wrote:
> And mark nir_op_pack_uvec4_to_uint unreachable, since it's only produced
> by lowering pack[SU]norm4x8 which the vec4 backend does not need.
> ---
> src/mes
On Mon, 2016-01-25 at 15:18 -0800, Matt Turner wrote:
> ---
> src/glsl/nir/nir.h | 4
> src/glsl/nir/nir_lower_alu_to_scalar.c | 32
> src/glsl/nir/nir_opcodes.py| 10 ++
> src/glsl/nir/nir_opt_algebraic.py | 20
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Mon, 2016-01-25 at 15:18 -0800, Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_compiler.c | 15 +
> .../dri/i965/brw_fs_channel_expressions.cpp| 8 +++
> src/mesa/drivers/dri
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Sun, 2016-01-24 at 13:59 -0500, Ilia Mirkin wrote:
> Currently any access params (coherent/volatile/restrict) are being lost
> when lowering to the ssbo load/store intrinsics. Keep track of the
> variable being used, and
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
On Sun, 2016-01-31 at 20:39 +0200, Juha-Pekka Heikkila wrote:
> Look after _mesa_meta_setup_sampler() return value.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikk...@gmail.com>
> ---
> src/mesa/drivers/com
Hi Juha,
I don't know why checking for this might be more relevant in Windows,
but in any case:
There are a ton of other places in mesa where we allocate memory via
calloc/malloc and we don't check that the allocation actually succeeded
so I am not sure that fixing a couple of instances of
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