Re: [Mesa-dev] [PATCH v2 19/30] i965/fs: add shuffle_64bit_data_for_32bit_write helper

On Thu, 2016-05-12 at 20:05 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > This does the inverse operation of shuffle_32bit_load_result_to_64bit_data > >

Re: [Mesa-dev] [PATCH v2 21/30] i965/fs: support doubles with shared variable stores

On Thu, 2016-05-12 at 13:35 +0200, Samuel Iglesias Gonsálvez wrote: > From: Iago Toral Quiroga <ito...@igalia.com> > > This is pretty much the same we do with SSBOs. > --- > src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 37 > +++- > 1 file c

Re: [Mesa-dev] [PATCH v2 25/30] i965/tcs/scalar: fix load input for doubles

On Thu, 2016-05-12 at 11:42 -0700, Kenneth Graunke wrote: > On Thursday, May 12, 2016 1:36:02 PM PDT Samuel Iglesias Gonsálvez wrote: > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > --- > > src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 96 ++

Re: [Mesa-dev] [PATCH v2 11/30] i965/fs: add shuffle_32bit_load_result_to_64bit_data helper

On Thu, 2016-05-12 at 20:01 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > There will be a few places where we need to shuffle the result of a 32-bit > &g

Re: [Mesa-dev] [PATCH 06/23] i965/fs: fix copy/constant propagation regioning checks

On Tue, 2016-05-10 at 16:53 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > We were not accounting for reg_suboffset in the check for the start > > of th

Re: [Mesa-dev] [PATCH 29/59] i965/fs: add a pass for lowering PACK opcodes

On Mon, 2016-05-02 at 14:40 -0700, Kenneth Graunke wrote: > On Monday, May 2, 2016 9:15:53 AM PDT Iago Toral wrote: > > On Sat, 2016-04-30 at 00:50 -0700, Kenneth Graunke wrote: > > > On Friday, April 29, 2016 1:29:26 PM PDT Samuel Iglesias Gonsálvez wrote: > > > &g

Re: [Mesa-dev] [PATCH 32/59] i965/fs: optimize unpack double

On Mon, 2016-05-02 at 11:38 +0300, Pohjolainen, Topi wrote: > On Fri, Apr 29, 2016 at 01:29:29PM +0200, Samuel Iglesias Gons?lvez wrote: > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > When we are actually unpacking from a double that we have previously

Re: [Mesa-dev] [PATCH 06/23] i965/fs: fix copy/constant propagation regioning checks

On Tue, 2016-05-03 at 17:37 -0700, Jason Ekstrand wrote: > > > On Tue, May 3, 2016 at 5:21 AM, Samuel Iglesias Gonsálvez > <sigles...@igalia.com> wrote: > From: Iago Toral Quiroga <ito...@igalia.com> > > We were not accounti

Re: [Mesa-dev] [PATCH 27/59] i965/fs: add a stride helper

On Wed, 2016-05-04 at 01:15 -0700, Francisco Jerez wrote: > Iago Toral <ito...@igalia.com> writes: > > > On Mon, 2016-05-02 at 18:48 -0700, Francisco Jerez wrote: > >> Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > >> > >&g

Re: [Mesa-dev] [PATCH 31/59] i965/fs: optimize pack double

On Mon, 2016-05-02 at 15:11 -0400, Connor Abbott wrote: > On Fri, Apr 29, 2016 at 7:29 AM, Samuel Iglesias Gonsálvez > <sigles...@igalia.com> wrote: > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > When we are actually creating a double using values

Re: [Mesa-dev] [PATCH 27/59] i965/fs: add a stride helper

On Mon, 2016-05-02 at 10:30 +0300, Pohjolainen, Topi wrote: > On Fri, Apr 29, 2016 at 01:29:24PM +0200, Samuel Iglesias Gons?lvez wrote: > > From: Connor Abbott > > > > Similar to retype() and offset(). > > --- > > src/mesa/drivers/dri/i965/brw_ir_fs.h | 8 >

Re: [Mesa-dev] [PATCH 18/59] i965: fix brw_saturate_immediate() for doubles

On Mon, 2016-05-02 at 10:34 +0300, Pohjolainen, Topi wrote: > On Mon, May 02, 2016 at 09:22:49AM +0200, Iago Toral wrote: > > On Mon, 2016-05-02 at 10:08 +0300, Pohjolainen, Topi wrote: > > > On Mon, May 02, 2016 at 10:02:50AM +0300, Pohjolainen, Topi wrote: > > > >

Re: [Mesa-dev] [PATCH 59/59] i965/fs: fix MOV_INDIRECT exec_size for doubles

On Sun, 2016-05-01 at 20:04 -0700, Jordan Justen wrote: > On 2016-04-29 04:29:56, Samuel Iglesias Gonsálvez wrote: > > In that case, the writes need two times the size of a 32-bit value. > > We need to adjust the exec_size, so it is not breaking any hardware > > rule. > > > > Signed-off-by:

Re: [Mesa-dev] [PATCH 18/59] i965: fix brw_saturate_immediate() for doubles

On Mon, 2016-05-02 at 10:54 +0300, Pohjolainen, Topi wrote: > On Mon, May 02, 2016 at 09:42:14AM +0200, Iago Toral wrote: > > On Mon, 2016-05-02 at 10:34 +0300, Pohjolainen, Topi wrote: > > > On Mon, May 02, 2016 at 09:22:49AM +0200, Iago Toral wrote: > > > > On

Re: [Mesa-dev] [PATCH 29/59] i965/fs: add a pass for lowering PACK opcodes

On Sat, 2016-04-30 at 00:50 -0700, Kenneth Graunke wrote: > On Friday, April 29, 2016 1:29:26 PM PDT Samuel Iglesias Gonsálvez wrote: > > From: Connor Abbott > > > > --- > > src/mesa/drivers/dri/i965/Makefile.sources | 1 + > > src/mesa/drivers/dri/i965/brw_fs.cpp

Re: [Mesa-dev] [PATCH 18/59] i965: fix brw_saturate_immediate() for doubles

On Mon, 2016-05-02 at 10:08 +0300, Pohjolainen, Topi wrote: > On Mon, May 02, 2016 at 10:02:50AM +0300, Pohjolainen, Topi wrote: > > On Fri, Apr 29, 2016 at 01:29:15PM +0200, Samuel Iglesias Gons?lvez wrote: > > > From: Iago Toral Quiroga <ito...@igalia.com> > >

Re: [Mesa-dev] [PATCH 27/59] i965/fs: add a stride helper

On Thu, 2016-05-05 at 09:15 +0200, Iago Toral wrote: > On Wed, 2016-05-04 at 13:59 -0700, Francisco Jerez wrote: > > Iago Toral <ito...@igalia.com> writes: > > > > > On Wed, 2016-05-04 at 01:15 -0700, Francisco Jerez wrote: > > >> Iago Toral <ito..

Re: [Mesa-dev] [PATCH 27/59] i965/fs: add a stride helper

On Wed, 2016-05-04 at 13:59 -0700, Francisco Jerez wrote: > Iago Toral <ito...@igalia.com> writes: > > > On Wed, 2016-05-04 at 01:15 -0700, Francisco Jerez wrote: > >> Iago Toral <ito...@igalia.com> writes: > >> > >> > On Mon, 2016-05-02

Re: [Mesa-dev] [PATCH 06/23] i965/fs: fix copy/constant propagation regioning checks

On Tue, 2016-05-03 at 17:28 -0700, Jordan Justen wrote: > On 2016-05-03 05:21:55, Samuel Iglesias Gonsálvez wrote: > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > We were not accounting for reg_suboffset in the check for the start > > of the region.

Re: [Mesa-dev] [PATCH 05/23] i965/fs: fix copy-propagation with suboffset from constants

On Tue, 2016-05-03 at 16:21 -0700, Jordan Justen wrote: > On 2016-05-03 05:21:54, Samuel Iglesias Gonsálvez wrote: > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > The current code ignores the suboffet in the instruction's source > > and ju

Re: [Mesa-dev] [PATCH 1/2] glsl: subroutine types cannot be used in constructors.

Looks good to me, Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Tue, 2016-05-03 at 14:39 +1000, Dave Airlie wrote: > From: Dave Airlie <airl...@redhat.com> > > This fixes two o

Re: [Mesa-dev] [PATCH] glsl: resource is a reserved keyword in GLSL 4.20 as well

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Tue, 2016-05-03 at 16:47 +1000, Dave Airlie wrote: > From: Dave Airlie <airl...@redhat.com> > > resource just appears in GLSL 4.20 without any fanfare. > > Fixes GL43-CTX.CommonBugs.CommonBug_ReservedNames >

Re: [Mesa-dev] [PATCH 2/2] glsl/ast: don't accept function calls as constructors.

On Tue, 2016-05-03 at 14:39 +1000, Dave Airlie wrote: > From: Dave Airlie > > This fixes a crash in > GL43-CTS.shader_subroutine.subroutines_not_allowed_as_variables_constructors_and_argument_or_return_types > > Signed-off-by: Dave Airlie > --- >

Re: [Mesa-dev] [PATCH 27/59] i965/fs: add a stride helper

On Mon, 2016-05-02 at 18:48 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > From: Connor Abbott > > > > Similar to retype() and offset(). > > --- > > src/mesa/drivers/dri/i965/brw_ir_fs.h | 8 > > 1 file changed,

Re: [Mesa-dev] [PATCHv2 10/23] i965/fs: Stop using the LOAD_PAYLOAD instruction in lower_simd_width.

Thanks Curro! I have tested this with our fp64 branch in BDW and it works fine. FWIW, I also tested it in IVB with shader.py and did not see any regressions, so we will include it in our branch. Iago On Tue, 2016-05-03 at 21:26 -0700, Francisco Jerez wrote: > Instead of using the LOAD_PAYLOAD

Re: [Mesa-dev] [PATCH 27/59] i965/fs: add a stride helper

On Wed, 2016-05-04 at 09:50 +0200, Iago Toral wrote: > On Mon, 2016-05-02 at 18:48 -0700, Francisco Jerez wrote: > > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > > > From: Connor Abbott <connor.w.abb...@intel.com> > &

Re: [Mesa-dev] [PATCH 2/2] i965: Enable scalar GS by default.

On Tue, 2016-05-10 at 00:46 -0700, Kenneth Graunke wrote: > I'd originally left this off because Orbital Explorer was hanging the > GPU, but it seems to be working these days. There have been a bunch > of changes since then, so we probably fixed something. > > On my Broadwell laptop, both

Re: [Mesa-dev] [PATCH 2/2] i965: Enable scalar GS by default.

On Tue, 2016-05-10 at 00:46 -0700, Kenneth Graunke wrote: > I'd originally left this off because Orbital Explorer was hanging the > GPU, but it seems to be working these days. There have been a bunch > of changes since then, so we probably fixed something. > > On my Broadwell laptop, both

Re: [Mesa-dev] [PATCH 4/4] i965: Properly handle integer types in opt_vector_float().

On Sun, 2016-04-17 at 23:14 -0700, Kenneth Graunke wrote: > Previously, opt_vector_float() always interpreted MOV sources as > floating point, and always created a MOV with a F-type destination. > > This meant that we could mess up sequences of integer loads, such as: > >mov vgrf6.0.x:D, 0D

Re: [Mesa-dev] [PATCH 1/4] i965: Rework opt_vector_float() control flow.

Patches 1-3 are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Sun, 2016-04-17 at 23:14 -0700, Kenneth Graunke wrote: > This reworks opt_vector_float() so that there's only one place that > flushes out any accumulated state and emits a VF. > > Signed-off-by: Ken

Re: [Mesa-dev] [PATCH 05/13] nir/lower_double_ops: lower trunc()

On Tue, 2016-04-19 at 15:32 -0700, Jason Ekstrand wrote: > > > On Tue, Apr 12, 2016 at 1:05 AM, Samuel Iglesias Gonsálvez > <sigles...@igalia.com> wrote: > From: Iago Toral Quiroga <ito...@igalia.com> > > At least i965 hard

Re: [Mesa-dev] [PATCH 05/13] nir/lower_double_ops: lower trunc()

On Wed, 2016-04-20 at 08:37 +0200, Iago Toral wrote: > On Tue, 2016-04-19 at 15:32 -0700, Jason Ekstrand wrote: > > > > > > On Tue, Apr 12, 2016 at 1:05 AM, Samuel Iglesias Gonsálvez > > <sigles...@igalia.com> wrote: > > From

Re: [Mesa-dev] [PATCH 3/5] i965/vec4: Use nir_intrinsic_base in the load_uniform implementation

Patched 3-5 are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Mon, 2016-04-18 at 19:04 -0700, Jason Ekstrand wrote: > We shouldn't be reading the const_index directly > --- > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 2 +- > 1 file changed, 1 insertion(+), 1 del

Re: [Mesa-dev] [PATCH 12/13] nir: add pack_double_2x32_split_y opcode

On Wed, 2016-04-13 at 08:29 -0700, Jason Ekstrand wrote: > > On Apr 13, 2016 7:57 AM, "Connor Abbott" <cwabbo...@gmail.com> wrote: > > > > On Wed, Apr 13, 2016 at 3:24 AM, Iago Toral <ito...@igalia.com> > wrote: > > > On Tue, 2016-04-12 at 13:16

Re: [Mesa-dev] [PATCH 12/13] nir: add pack_double_2x32_split_y opcode

On Wed, 2016-04-13 at 10:57 -0400, Connor Abbott wrote: > On Wed, Apr 13, 2016 at 3:24 AM, Iago Toral <ito...@igalia.com> wrote: > > On Tue, 2016-04-12 at 13:16 -0400, Connor Abbott wrote: > >> I'm not sure I'm so comfortable with this. For one, this is the sort >

Re: [Mesa-dev] [PATCH 12/13] nir: add pack_double_2x32_split_y opcode

On Thu, 2016-04-14 at 10:03 +0200, Iago Toral wrote: > On Wed, 2016-04-13 at 10:57 -0400, Connor Abbott wrote: > > On Wed, Apr 13, 2016 at 3:24 AM, Iago Toral <ito...@igalia.com> wrote: > > > On Tue, 2016-04-12 at 13:16 -0400, Connor Abbott wrote: > > >

Re: [Mesa-dev] [PATCH 4/4] i965: Properly handle integer types in opt_vector_float().

On Mon, 2016-04-18 at 16:54 -0700, Kenneth Graunke wrote: > On Monday, April 18, 2016 4:20:50 PM PDT Iago Toral wrote: > > On Sun, 2016-04-17 at 23:14 -0700, Kenneth Graunke wrote: > > > Previously, opt_vector_float() always interpreted MOV sources as > > > floating poin

Re: [Mesa-dev] [PATCH v2 1/4] i965: Rework opt_vector_float() control flow.

Looks good to me, assuming this does not bring new unexpected regressions, the series is: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Mon, 2016-04-18 at 23:52 -0700, Kenneth Graunke wrote: > This reworks opt_vector_float() so that there's only one place that > flu

Re: [Mesa-dev] [PATCH 12/13] nir: add pack_double_2x32_split_y opcode

On Thu, 2016-04-14 at 13:31 -0700, Jason Ekstrand wrote: > > > On Thu, Apr 14, 2016 at 1:50 AM, Iago Toral <ito...@igalia.com> wrote: > On Wed, 2016-04-13 at 08:29 -0700, Jason Ekstrand wrote: > > > > On Apr 13, 2016 7:57 AM, "Connor Abb

Re: [Mesa-dev] [PATCH] i965: Fix clear code for ignoring colormask for XRGB formats on Gen9+.

base format. Something like this: i <= _mesa_base_format_component_count(irb->Base.Base._BaseFormat) Basically, we do the same check we do against the mesa format, but with the base format. What do you think? Either way, Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> >

Re: [Mesa-dev] [PATCH] i965/fs: Readd opt_drop_redundant_mov_to_flags().

unlit centroid workaround code and as a result does not emit > redundant MOV_DISPATCH_TO_FLAGS instructions. I guess this means that dead-code-elimination doesn't really do anything about this as you initially thought, right? Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> > On

Re: [Mesa-dev] [PATCH] i965: fix varying output setup

This looks correct to me. Assuming no regressions in Piglit, this is: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Fri, 2016-07-22 at 23:19 +1000, Timothy Arceri wrote: > Since 7f53fead5c we treat every location as using all > four components so we only need spec

Re: [Mesa-dev] [PATCH 86/95] i965/vec4/tes: fix input loading for 64bit data types

On Tue, 2016-07-19 at 12:41 +0200, Iago Toral Quiroga wrote: > FIXME: We need to fix the case where not all the attributes fit > in the push constant buffer This FIXME note is obsolete and should be deleted. > --- >  src/mesa/drivers/dri/i965/brw_vec4_

Re: [Mesa-dev] [PATCH 10/95] i965/vec4: handle 32 and 64 bit channels in liveness analysis

This patch should not be so early in the series. It uses the execsize information in the IR which is not available until patch 38, so it should really go after that. Iago On Tue, 2016-07-19 at 12:40 +0200, Iago Toral Quiroga wrote: > From: "Juan A. Suarez Romero" <jasua...@igal

Re: [Mesa-dev] [PATCH 05/95] i965/vec4/nir: support doubles in ALU operations

On Mon, 2016-07-25 at 19:16 -0700, Francisco Jerez wrote: > Iago Toral Quiroga <ito...@igalia.com> writes: > > > > > Basically, this involves considering the bit-size information to > > set > > the appropriate type on both operands and destination. &g

Re: [Mesa-dev] [PATCH] glsl: free hash tables earlier

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Wed, 2016-07-27 at 09:52 +1000, Timothy Arceri wrote: > These are only used by get_matching_input() which has been call > at this point so free the hash tables. > --- >  src/compiler/glsl/link_varyings.cpp | 10 +++---

Re: [Mesa-dev] [PATCH v2 3/6] i965/fs/gen7: split instructions that run into exec masking bugs

On Mon, 2016-07-11 at 12:19 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > In fp64 we can produce code like this: > > > > mov(16) vg

Re: [Mesa-dev] [PATCH 1/2] glsl/types: Fix function type comparison function

Both patches are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Wed, 2016-07-13 at 14:28 -0700, Jason Ekstrand wrote: > It was returning true if the function types have different lengths > rather > than false.  This was new with the SPIR-V to NIR pass and I though

Re: [Mesa-dev] [PATCH 06/95] i965/vec4/nir: fix nir_intrinsic_load_uniform for doubles

On Thu, 2016-07-28 at 15:49 +1000, Timothy Arceri wrote: > On Tue, 2016-07-19 at 12:40 +0200, Iago Toral Quiroga wrote: > > > > From: Connor Abbott <connor.w.abb...@intel.com> > > > > --- > >  src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 1 + > >

Re: [Mesa-dev] [PATCH 6/7] i915: Avoid aliasing violation.

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Thu, 2016-07-28 at 15:35 -0700, Matt Turner wrote: > --- >  src/mesa/drivers/dri/i915/intel_clear.c | 4 +++- >  1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i915/intel_clear.c >

Re: [Mesa-dev] [PATCH 1/4] i965: Use a separate register for every access to an SSA undef.

I made a couple of small comments to patches 1 and 4, but either way all 4 patches are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Fri, 2016-07-29 at 01:29 -0700, Kenneth Graunke wrote: > Previously, we allocated a new VGRF for every undefined definition. > Instead, this

Re: [Mesa-dev] [PATCH 1/9] i965/eu: Take into account the target cache argument in brw_set_dp_read_message.

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Thu, 2016-07-28 at 14:50 -0700, Francisco Jerez wrote: > brw_set_dp_read_message() was setting the data cache as send message > SFID on Gen7+ hardware, ignoring the target cache specified by the > caller.  Some of the calle

Re: [Mesa-dev] [PATCH 4/4] nir: Make nir_opt_remove_phis see through moves.

On Fri, 2016-07-29 at 01:29 -0700, Kenneth Graunke wrote: > I found a shader in Tales of Maj'Eyal that contains: > > if ssa_21 { > block block_1: > /* preds: block_0 */ > ...instructions that prevent the select peephole... >

Re: [Mesa-dev] [PATCH 1/4] i965: Use a separate register for every access to an SSA undef.

On Fri, 2016-07-29 at 01:29 -0700, Kenneth Graunke wrote: > Previously, we allocated a new VGRF for every undefined definition. > Instead, this patch makes us allocate a new VGRF for every use of an > undefined definition.  This makes sure that undefined values are > fully independent of one

Re: [Mesa-dev] [PATCH 1/8] nir: Add a pass for lowering away constant initializers

I dropped a few minor comments in patches 1, 2, 4 and 5, I don't think any of them are very relevant, so feel free to ignore them. Otherwise: Patches 1-5 and 7-8 are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Wed, 2016-07-20 at 15:28 -0700, Jason Ekstrand wrote: > S

Re: [Mesa-dev] [PATCH 1/8] nir: Add a pass for lowering away constant initializers

On Wed, 2016-07-20 at 15:28 -0700, Jason Ekstrand wrote: > Signed-off-by: Jason Ekstrand > --- >  src/compiler/Makefile.sources  |   1 + >  src/compiler/nir/nir.h |   2 + >  src/compiler/nir/nir_lower_constant_initializers.c |

Re: [Mesa-dev] [PATCH 2/8] anv/pipeline: Call nir_lower_constant_initializers

On Wed, 2016-07-20 at 15:28 -0700, Jason Ekstrand wrote: > Signed-off-by: Jason Ekstrand > --- >  src/intel/vulkan/anv_pipeline.c | 13 + >  1 file changed, 13 insertions(+) > > diff --git a/src/intel/vulkan/anv_pipeline.c > b/src/intel/vulkan/anv_pipeline.c >

Re: [Mesa-dev] [PATCH 5/8] nir: Simplify nir_lower_gs_intrinsics

On Wed, 2016-07-20 at 15:28 -0700, Jason Ekstrand wrote: > It's only ever called on single-function shaders.  At this point, > there are > a lot of helpers that can make it all much simpler. This is a nice clean-up. I wonder if for passes like this that have the implicit requirement that all

Re: [Mesa-dev] [PATCH 4/8] nir/lower_returns: Stop using constant initializers

I guess this isn't really necessary since we are going to lower constant initializers away eventually, right? I have no objections to saving the pass some work of course, just wondering if that's really all there is to this change or if I am missing something else. Iago On Wed, 2016-07-20 at

Re: [Mesa-dev] [PATCH 2/2] i965/tes/scalar: fix 64-bit indirect input loads

On Fri, 2016-07-15 at 21:20 +1000, Timothy Arceri wrote: > On Fri, 2016-07-15 at 13:16 +0200, Iago Toral wrote: > > > > On Fri, 2016-07-15 at 20:59 +1000, Timothy Arceri wrote: > > > > > > On Fri, 2016-07-15 at 11:04 +0200, Iago Toral Quiroga wrote: > > &

Re: [Mesa-dev] [PATCH 2/2] i965/tes/scalar: fix 64-bit indirect input loads

On Fri, 2016-07-15 at 20:59 +1000, Timothy Arceri wrote: > On Fri, 2016-07-15 at 11:04 +0200, Iago Toral Quiroga wrote: > > > > We totally ignored this before because there were no piglit tests > > for > > indirect loads in tessellation stages with doubles. &g

Re: [Mesa-dev] [PATCH] glsl: subroutine types cannot be compared

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Mon, 2016-07-18 at 16:39 +0300, Andres Gomez wrote: > subroutine variables are to be used just in the way functions are > called. Although the spec doesn't say it explicitely, this means that > these variables are not to be us

Re: [Mesa-dev] [PATCH] glsl: use linked shaders rather than compiled shaders

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Mon, 2016-07-11 at 12:11 +1000, Timothy Arceri wrote: > At this point there is no reason not to be using the linked shaders, > using the linked shaders should be faster and will make things > simpler > for upcoming

Re: [Mesa-dev] [PATCH 1/3] i965: Use intel_get_image_dims in alloc_texture_storage

On Mon, 2016-07-18 at 22:16 -0700, Jason Ekstrand wrote: > The intel_get_image_dims helper function handles some image dimension > sanitization for us for things such as 1-D array textures.  We should > probably be using it here. > > Signed-off-by: Jason Ekstrand > Cc:

Re: [Mesa-dev] [PATCH v2 1/3] i965/miptree: Enforce that height == 1 for 1-D array textures

All 4 patches are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Tue, 2016-07-19 at 08:26 -0700, Jason Ekstrand wrote: > The GL API and mesa internals do this differently than we do.  In GL, > there > is no depth parameter for 1-D arrays and height is used.  In the i965 &g

Re: [Mesa-dev] [PATCH v2 2/3] i965/miptree: Set logical_depth0 == 6 for cube maps

On Tue, 2016-07-19 at 08:26 -0700, Jason Ekstrand wrote: > This matches what we do for cube maps where logical_depth0 is in > number of > face-layers rather than number of cubes.  This does mean that we will > temporarily be setting the surface bounds too loose for cube map > textures > but we are

Re: [Mesa-dev] Split gl_shader in two and clean-ups

it is a good idea, thanks! I dropped a comment in patch 4, with that fixed patches 1-4 are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> I'll try to review the last 3 patches tomorrow. Iago > ___ > mesa-dev mailing lis

Re: [Mesa-dev] [PATCH 4/7] glsl: pass symbols to find_matching_signature() rather than shader

On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > This will allow us to later split gl_shader into two structs. > --- > src/compiler/glsl/link_functions.cpp | 47 > +--- > 1 file changed, 22 insertions(+), 25 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 1/2] i965: Make emit_urb_writes() not produce an EOT message for GS.

/* For GS, just turn EmitVertex() into a no-op. */ Maybe it would be better to explain in this comment why we can do this safely here, which as you say would be because for GS we will send a send with EOT set at the end of the shader in any case. Both patches are: Reviewed-by: Iago Toral Quiroga

Re: [Mesa-dev] [PATCH 09/11] nir/intrinsics: Add more atomic_counter ops

On Tue, 2016-07-05 at 17:46 -0700, Ian Romanick wrote: > From: Ian Romanick > > Signed-off-by: Ian Romanick > --- >  src/compiler/glsl/glsl_to_nir.cpp  | 43 > +++--- >  src/compiler/glsl/nir_intrinsic_map.py 

Re: [Mesa-dev] [PATCH 09/11] nir/intrinsics: Add more atomic_counter ops

On Tue, 2016-07-05 at 17:46 -0700, Ian Romanick wrote: > From: Ian Romanick > > Signed-off-by: Ian Romanick > --- >  src/compiler/glsl/glsl_to_nir.cpp  | 43 > +++--- >  src/compiler/glsl/nir_intrinsic_map.py 

Re: [Mesa-dev] [PATCH 00/11] ARB_shader_atomic_counter_ops for NIR and i965

On Wed, 2016-07-06 at 09:36 +0200, Iago Toral wrote: > On Tue, 2016-07-05 at 17:46 -0700, Ian Romanick wrote: > > > > The first 7 patches in this series put GLSL-to-NIR on a small > > diet.  I > > looked at the giant sequense of 'if (strcmp(...) == 0) { ... } else &

Re: [Mesa-dev] [PATCH 3/6] i965/fs/gen7: split instructions that run into exec masking bugs

On Fri, 2016-07-08 at 09:21 +0200, Iago Toral wrote: > On Thu, 2016-07-07 at 19:36 -0700, Francisco Jerez wrote: > > > > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > > > > > > > > > From: Iago Toral Quiroga <ito...@

Re: [Mesa-dev] [PATCH 3/6] i965/fs/gen7: split instructions that run into exec masking bugs

On Thu, 2016-07-07 at 19:36 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > > > From: Iago Toral Quiroga <ito...@igalia.com> > > > > In fp64 we can produce code like this: > > > > mov(16) vg

Re: [Mesa-dev] [PATCH 3/6] i965/fs/gen7: split instructions that run into exec masking bugs

On Fri, 2016-07-08 at 09:21 +0200, Iago Toral wrote: > On Thu, 2016-07-07 at 19:36 -0700, Francisco Jerez wrote: > > > > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > > > > > > > > > > > From: Iago Toral Quiroga <ito...@

Re: [Mesa-dev] [PATCH 02/11] glsl: Replace big pile of hand-written code with a generator

On Tue, 2016-07-05 at 17:46 -0700, Ian Romanick wrote: > From: Ian Romanick > > Right now the generator generates nearly identical code.  There is no > change in the binary size. > >    text    data bss dec hex > filename > 7529283  273096   

Re: [Mesa-dev] [PATCH 02/11] glsl: Replace big pile of hand-written code with a generator

On Wed, 2016-07-06 at 09:28 +0200, Iago Toral wrote: > On Tue, 2016-07-05 at 17:46 -0700, Ian Romanick wrote: > > > > From: Ian Romanick <ian.d.roman...@intel.com> > > > > Right now the generator generates nearly identical code.  There is > > no > >

Re: [Mesa-dev] [PATCH 00/11] ARB_shader_atomic_counter_ops for NIR and i965

nk we > care > much about the performance of this code, so I opted to tune for size. > Using an in-code radix trie gets it about as small as I think it can > get.  The result is -784 bytes in a single function.  All 41 strings > just disappear. Yeah, this looks like a nice clean-up.

Re: [Mesa-dev] [PATCH] i965: stop counting double outputs twice

tored at > the max varying location. > > Cc: Iago Toral <ito...@igalia.com> > --- >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 +++ >  1 file changed, 3 insertions(+), 8 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp > b/src/mesa/drive

Re: [Mesa-dev] [PATCH] mesa: make attribute binding message more useful

gnificant, but maybe we can make it a bit more clear by saying something like: "glBindAttribLocation(%u): %u exceeds the maximum number of attributes (%u)" Either way: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> >return; > } >

Re: [Mesa-dev] [PATCH 5/7] glsl/mesa: split gl_shader in two

On Wed, 2016-06-29 at 22:54 +1000, Timothy Arceri wrote: > On Wed, 2016-06-29 at 14:36 +0200, Iago Toral wrote: > > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > > There are two distinctly different uses of this struct. The first > > > is to store GL

Re: [Mesa-dev] Split gl_shader in two and clean-ups

On Wed, 2016-06-29 at 23:12 +1000, Timothy Arceri wrote: > On Wed, 2016-06-29 at 14:42 +0200, Iago Toral wrote: > > On Wed, 2016-06-29 at 14:40 +0200, Iago Toral wrote: > > > On Tue, 2016-06-28 at 16:30 +0200, Iago Toral wrote: > > > > On Tue, 2016-06-28 at 11:

Re: [Mesa-dev] [PATCH] glsl/mesa: move duplicate shader fields into new struct gl_shader_info

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Thu, 2016-06-30 at 14:49 +1000, Timothy Arceri wrote: > --- > > This applys on top of https://patchwork.freedesktop.org/series/9217/ > with hasn't landed just yet. > > src/compiler/glsl/glsl_parser_extras.cp

Re: [Mesa-dev] [PATCH 5/7] glsl/mesa: split gl_shader in two

On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > There are two distinctly different uses of this struct. The first > is to store GL shader objects. The second is to store information > about a shader stage thats been linked. > > The two uses actually share few fields and there is

Re: [Mesa-dev] [PATCH 5/7] glsl/mesa: split gl_shader in two

On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > There are two distinctly different uses of this struct. The first > is to store GL shader objects. The second is to store information > about a shader stage thats been linked. > > The two uses actually share few fields and there is

Re: [Mesa-dev] Split gl_shader in two and clean-ups

On Wed, 2016-06-29 at 14:40 +0200, Iago Toral wrote: > On Tue, 2016-06-28 at 16:30 +0200, Iago Toral wrote: > > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > > There are two distinctly different uses of this struct. The first > > > is to store GL

Re: [Mesa-dev] Split gl_shader in two and clean-ups

On Tue, 2016-06-28 at 16:30 +0200, Iago Toral wrote: > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > There are two distinctly different uses of this struct. The first > > is to store GL shader objects. The second is to store information > > about a shader st

Re: [Mesa-dev] [PATCH 25/95] i965/vec4: fix base offset for nir_registers with doubles

On Tue, 2016-08-02 at 18:40 -0700, Francisco Jerez wrote: > Iago Toral Quiroga <ito...@igalia.com> writes: > > > > > --- > >  src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8 +--- > >  1 file changed, 5 insertions(+), 3 deletions(-) > >

Re: [Mesa-dev] [PATCH 36/95] i965/vec4: add a helper function to create double immediates

On Wed, 2016-08-03 at 13:28 -0700, Francisco Jerez wrote: > Iago Toral Quiroga <ito...@igalia.com> writes: > > > > > Gen7 hardware does not support double immediates so these need > > to be moved in 32-bit chunks to a regular vgrf instead. Instead > > of doi

Re: [Mesa-dev] [PATCH] anv/cmd_buffer: Use the proper depth input attachment surface state

utput.46 Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> > Cc: "17.0" <mesa-sta...@lists.freedesktop.org> > Cc: Iago Toral <ito...@igalia.com> > Cc: Jason Ekstrand <ja...@jlekstrand.net> > Signed-off-by: Nanley Chery <nanley.g.ch...@intel.com&

Re: [Mesa-dev] [PATCH v3] i965: Prevent coverity warning

Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Tue, 2017-01-31 at 15:20 -0500, Robert Foss wrote: > Add assert checking that num_sources is never larger than 3. > > This prevents Coverity from concluding that the unhandled > cases of num_sources not being 0-3 are relev

Re: [Mesa-dev] [PATCH] anv: Improve flushing around STATE_BASE_ADDRESS

a FIXME indicating this situation so we know we have not verified that this is actually needed. Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> > Reported-by: Mark Janes <mark.a.ja...@intel.com> > Tested-by: Mark Janes <mark.a.ja...@intel.com> > --- >  src/intel

Re: [Mesa-dev] [PATCH 2/2] i965: Get rid of mark_surface_used()

e >  brw_type_for_base_type(const struct glsl_type *type) >  { > @@ -1155,7 +1145,7 @@ backend_shader::calculate_cfg() >   * unused but also make sure that addition of small offsets to them > will >   * trigger some of our asserts that surface indices are < > BRW_MAX

Re: [Mesa-dev] [PATCH V2 1/2] mesa: use PRId64/PRIu64 when printing 64-bit ints

Both patches are: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Wed, 2017-02-08 at 12:35 +1100, Timothy Arceri wrote: > V2: actually use PRIu64 > --- >  src/mesa/main/uniform_query.cpp | 4 ++-- >  1 file changed, 2 insertions(+), 2 deletions(-) > > di

Re: [Mesa-dev] [PATCH 1/2] i965: Make assign_common_binding_table_offsets return void

This patch is missing to actually change the implementation in brw_shader.cpp to not return a uint32_t result. With that fixed, this patch is: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Tue, 2017-02-07 at 15:03 -0800, Jason Ekstrand wrote: > It doesn't really matter w

Re: [Mesa-dev] [PATCH 3/6] anv: Report FORMAT_FEATURE_TRANSFER_SRC/DST_BIT_KHR

On Mon, 2017-01-23 at 14:12 -0800, Jason Ekstrand wrote: > As of VK_KHR_maintenance1, these are supposed to be reported for any > formats on which we support transfer operations.  For us, this is > anything that we can texture from. > --- >  src/intel/vulkan/anv_formats.c | 9 - >  1 file

Re: [Mesa-dev] [PATCH 0/6] anv: Implement VK_KHR_maintenance1

I dropped a couple of minor comments on patches 1 and 3, but otherwise the series is: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Mon, 2017-01-23 at 14:12 -0800, Jason Ekstrand wrote: > This little series implements the new VK_KHR_maintenance1 > extension.  Most >

Re: [Mesa-dev] [PATCH 1/6] anv: Set viewport extents correctly when height is negative

On Mon, 2017-01-23 at 14:12 -0800, Jason Ekstrand wrote: > As per VK_KHR_maintenance1, setting a negative height in the viewport > can be used to get flipped coordinates.  This is, aparently, very > useful > when porting D3D apps to Vulkan.  All we need to do to support this > is > to make sure we

Re: [Mesa-dev] [PATCH] anv: Advertise API version 1.0.39

FWIW, vulkan-cts seems happy. Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Thu, 2017-01-26 at 09:27 -0800, Jason Ekstrand wrote: > I'm pretty sure we've kept up with the bug fixes. > --- >  src/intel/vulkan/anv_device.c | 2 +- >  1 file changed, 1 insertion(+), 1 del

Re: [Mesa-dev] i965: Remove duplicate checks

I think the comment affects the hunk after these checks, so maybe removing the checks after the comment makes more sense? Either way: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> On Fri, 2017-02-24 at 15:10 +0200, Juha-Pekka Heikkila wrote: > On both sides of the comment on wha

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