On 25/07/18 20:03, Eric Engestrom wrote:
CovID: 1438113, 1438118, 1438119, 1438121
Fixes: dc1d10b396179766227df "anv,radv: Add support for
VK_KHR_get_display_properties2"
Cc: Jason Ekstrand
Signed-off-by: Eric Engestrom
Reviewed-by: Lionel Landwerlin
---
src/
On 25/07/18 19:54, Eric Engestrom wrote:
CovID: 1438121
Fixes: dc1d10b396179766227df "anv,radv: Add support for
VK_KHR_get_display_properties2"
Cc: Jason Ekstrand
Signed-off-by: Eric Engestrom
Reviewed-by: Lionel Landwerlin
---
src/vulkan/wsi/wsi_common_display.c | 2 +
On 25/07/18 19:45, Eric Engestrom wrote:
CovID: 1438132
Signed-off-by: Eric Engestrom
Reviewed-by: Lionel Landwerlin
---
src/intel/vulkan/anv_device.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
the gen_batch_decode_bo in gen_batch_decode_ctx into uint64_t.
We always seem to use bo.addr but not the map, so no need to bother
getting those.
With or without that changed :
Reviewed-by: Lionel Landwerlin
Thanks!
On 24/07/18 22:55, Kenneth Graunke wrote:
Normally, i965 programs
We might fail on master node drm fd because we won't have the right
permissions.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/tools/intel_dump_gpu.c b/src/intel/tools/intel_dump_gpu.c
On 24/07/18 19:02, Jason Ekstrand wrote:
nir_sweep assumes that constants area always allocated off the variable
to which they belong. Violating this assumption causes them to get
freed early and leads to use-after-free bugs.
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Lionel
On 24/07/18 18:34, Kenneth Graunke wrote:
On Tuesday, July 24, 2018 5:34:57 AM PDT Lionel Landwerlin wrote:
That looks correct to me (and we do the same in Anv).
Also a bit baffled that we haven't run into issues earlier :(
But would be good to have Ken's Rb too.
Thanks a lot!
Reviewed
On 24/07/18 17:41, Marathe, Yogesh wrote:
Lionel, Chris,
-Original Message-
From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf
Of Lionel Landwerlin
Sent: Friday, July 20, 2018 3:31 PM
To: Chris Wilson ; Muthukumar, Aravindan
; mesa-dev@lists.freedesktop.org
On 24/07/18 13:42, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-07-24 13:34:57)
That looks correct to me (and we do the same in Anv).
Also a bit baffled that we haven't run into issues earlier :(
All the allocations should be in multiples of page size, alignment less
than a page size
That looks correct to me (and we do the same in Anv).
Also a bit baffled that we haven't run into issues earlier :(
But would be good to have Ken's Rb too.
Thanks a lot!
Reviewed-by: Lionel Landwerlin
On 24/07/18 12:50, Sergii Romantsov wrote:
Kernel (for ppgtt) requires memory address
On 23/07/18 10:20, Kedar J Karanje wrote:
On Fri, Jul 20, 2018 at 10:59:03AM +0100, Lionel Landwerlin wrote:
On 20/07/18 09:32, aravindan.muthuku...@intel.com wrote:
diff --git a/src/egl/generate/egl.xml b/src/egl/generate/egl.xml
index 9250f93..52b0c9f 100644
--- a/src/egl/generate/egl.xml
On 23/07/18 05:27, Jordan Justen wrote:
This extra character should not be used by snprintf, but we make it
available to verify that we printed the exact number we wanted, and
didn't overflow.
v2:
* Also update Anvil
Signed-off-by: Jordan Justen
Reviewed-by: Lionel Landwerlin (v1
into the shader.
Cc: mesa-sta...@lists.freedesktop.org
Cc: Kenneth Graunke
Tested-by: Lionel Landwerlin
---
src/intel/compiler/brw_nir.h | 1 +
.../compiler/brw_nir_analyze_ubo_ranges.c | 41 +--
src/intel/vulkan/anv_pipeline.c | 2
Thanks Alex!
Reviewed-by: Lionel Landwerlin
On 23/07/18 09:51, Alex Smith wrote:
According to the spec, these should apply to all read/write access
types (so would be equivalent to specifying all other access types
individually). Currently, they were doing nothing.
v2: Handle
On 22/07/18 22:45, Jason Ekstrand wrote:
On Sun, Jul 22, 2018 at 1:23 PM Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com>>
wrote:
On 21/07/18 07:12, Jason Ekstrand wrote:
> The first fix attempt contained a nasty typo which somehow
didn't get
> caug
Nice catch!
Reviewed-by: Lionel Landwerlin
On 22/07/18 05:45, Jordan Justen wrote:
Since various options within INTEL_DEBUG could impact code generation,
we should add this into the renderer string so changing the
INTEL_DEBUG setting will cause the shader cache to work properly.
An example
Reviewed-by: Lionel Landwerlin
On 22/07/18 05:45, Jordan Justen wrote:
This extra character should not be used by snprintf, but we make it
available to verify that we printed the exact number we wanted, and
didn't overflow.
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965
Reviewed-by: Lionel Landwerlin
On 20/07/18 22:51, Jason Ekstrand wrote:
We support mipmapped and arrayed linear images so we need to support
vkGetImageSubresourceLayout on them. Fortunately, it's just a trivial
call into ISL.
---
src/intel/vulkan/anv_image.c | 23 ---
1
On 21/07/18 07:12, Jason Ekstrand wrote:
The first fix attempt contained a nasty typo which somehow didn't get
caught in review. It also didn't work as intended because the sRGB
conversion was happening but then throwing away all but the red channel
because it dind't know it was RGB. Really,
Thanks for the changes, this series is :
Reviewed-by: Lionel Landwerlin
On 20/07/18 22:50, Yunchao He wrote:
From: Ilia Mirkin
Allow the capability to be exposed, and convert the new execution mode
into fs state.
Signed-off-by: Ilia Mirkin
---
src/compiler/shader_info.h| 1
Hi there,
Since your version doesn't add very much to Ilia's series, it would be
nice to retain the initial authorship as well as the 2 patches (separate
generic infrastructure from driver enabling).
Jason also had a comment about the coverage variable that could be moved
into the next hunk.
When running gdb, make sure to pass the LD_PRELOAD variable only to
the executed program, not the debugger. Otherwise the debugger will
run the preloaded constructor/destructor too and bad things will
happen.
Suggested-by: Rafael Antognolli
Signed-off-by: Lionel Landwerlin
---
src/intel/tools
On 20/07/18 11:44, Alex Smith wrote:
According to the spec, these should apply to all read/write access
types (so would be equivalent to specifying all other access types
individually). Currently, they were doing nothing.
Signed-off-by: Alex Smith
Cc: mesa-sta...@lists.freedesktop.org
---
On 20/07/18 11:24, Lionel Landwerlin wrote:
Because we LD_PRELOAD in front of the command line, which might
contain gdb, the fini destructor in intel_dump_gpu.c might be called
twice (once for the program we're tracing and once for gdb). This
change prevents a crash in gdb when the aub->file
to intel_dump_gpu has exited.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 2 +-
src/intel/tools/intel_dump_gpu.in | 11 ---
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/intel/tools/intel_dump_gpu.c b/src/intel/tools/intel_dump_gpu.c
index
Because we LD_PRELOAD in front of the command line, which might
contain gdb, the fini destructor in intel_dump_gpu.c might be called
twice (once for the program we're tracing and once for gdb). This
change prevents a crash in gdb when the aub->file has already been
closed.
Signed-off-by: Lio
On 20/07/18 09:47, Chris Wilson wrote:
Quoting aravindan.muthuku...@intel.com (2018-07-20 09:32:57)
From: "Muthukumar, Aravindan"
The Patch here is to give control to user/ application to really
decide what's the max GPU load it would put. If that can be
known in advance, rpcs can be
On 20/07/18 09:32, aravindan.muthuku...@intel.com wrote:
diff --git a/src/egl/generate/egl.xml b/src/egl/generate/egl.xml
index 9250f93..52b0c9f 100644
--- a/src/egl/generate/egl.xml
+++ b/src/egl/generate/egl.xml
@@ -460,6 +460,14 @@
+
+
+
+
On 18/07/18 21:58, Rafael Antognolli wrote:
On Wed, Jul 18, 2018 at 06:21:32PM +0100, Lionel Landwerlin wrote:
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aub_write.c | 45 ++---
1 file changed, 32 insertions(+), 13 deletions(-)
diff --git a/src
Was that for the whole series, or just this patch? :)
Thanks,
-
Lionel
On 18/07/18 21:42, Jason Ekstrand wrote:
Very sketchily
Reviewed-by: Jason Ekstrand <mailto:ja...@jlekstrand.net>>
On Wed, Jul 18, 2018 at 10:21 AM Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com
Hey Jordan,
I have patch that remove this for loop, reviewed by Jason.
Landing it right now, that should fix this problem.
Thanks,
-
Lionel
On 19/07/18 09:52, Jordan Justen wrote:
Cc: Jason Ekstrand
Cc: Lionel Landwerlin
Fixes: 0a457d987ee "intel/tools: Refactor aub dumping to r
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aub_write.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/intel/tools/aub_write.c b/src/intel/tools/aub_write.c
index 1224e8f6b7f..de4ce33 100644
--- a/src/intel/tools/aub_write.c
+++ b/src/intel
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/intel/tools/intel_dump_gpu.c b/src/intel/tools/intel_dump_gpu.c
index 5fd2c8ea723..6ce7d452afb 100644
--- a/src/intel
input data and since
we've copied/reworked intel_aubdump into intel_dump_gpu within Mesa,
we don't need that code anymore.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 121 +++---
src/intel/tools/intel_dump_gpu.in | 27 +--
2 files changed, 29
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aub_write.c | 45 ++---
1 file changed, 32 insertions(+), 13 deletions(-)
diff --git a/src/intel/tools/aub_write.c b/src/intel/tools/aub_write.c
index de4ce33..9c140553542 100644
--- a/src/intel/tools
. Sorry, I didn't realize how
you'd intended things to be ordered before I landed my refactors. :-(
On Wed, Jul 18, 2018 at 7:20 AM Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com>>
wrote:
In commit 86cb05a6d35a52 ("intel: aubinator: remove standard input
processing
Thanks,
Reviewed-by: Lionel Landwerlin
On 18/07/18 16:24, Jason Ekstrand wrote:
On Wed, Jul 18, 2018 at 3:08 AM Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com>>
wrote:
On 18/07/18 00:05, Jason Ekstrand wrote:
> For large buffers which span an entire l1 page tabl
Awesome tool! And not even too much code!
Reviewed-by: Lionel Landwerlin
In the interest of consistency and because this is an installable
binary, I would rename it.
Now for the hard part : intel_error2aub ?
-
Lionel
On 18/07/18 00:05, Jason Ekstrand wrote:
---
src/intel/tools
Reviewed-by: Lionel Landwerlin
On 18/07/18 00:05, Jason Ekstrand wrote:
---
src/intel/tools/aub_write.c | 764 +++
src/intel/tools/aub_write.h | 96
src/intel/tools/intel_dump_gpu.c | 762 +-
src/intel/tools
Reviewed-by: Lionel Landwerlin
On 18/07/18 00:05, Jason Ekstrand wrote:
Instead of having quite so many singletons, we use a struct aub_file to
organize the bits we need for writing an aub file.
---
src/intel/tools/intel_dump_gpu.c | 498 ++-
1 file changed, 287
input data and since
we've copied/reworked intel_aubdump into intel_dump_gpu within Mesa,
we don't that code anymore.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 73 ---
src/intel/tools/intel_dump_gpu.in | 27 +---
2 files changed, 10
On 18/07/18 00:05, Jason Ekstrand wrote:
For large buffers which span an entire l1 page table, we got the range
calculations wrong. In this case, we end up with an l1_start which is
the first byte represented by the given l1 table and an l1_end which is
the first byte after the range
On 11/07/18 19:25, Kenneth Graunke wrote:
Normally, i965 programs STATE_BASE_ADDRESS every batch, and puts all
state for a given base in a single buffer.
I'm working on a prototype which emits STATE_BASE_ADDRESS only once at
startup, where each base address is a fixed 4GB region of the PPGTT.
Reviewed-by: Lionel Landwerlin
On 11/07/18 19:25, Kenneth Graunke wrote:
Disassembling doesn't modify the assembly.
---
src/intel/common/gen_disasm.c | 7 ---
src/intel/common/gen_disasm.h | 2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/intel/common
On 17/07/18 16:01, Lionel Landwerlin wrote:
Addresses in the command streams should be in canonical form (i.e
bit[63:48] == bit[47]). If the [bo->gtt_offset, bo->gtt_offset +
target_offset] range contains the address 0x8000, the current
code will fail that criteria.
ffer module for softpin support.")
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index df999ffeb1d..80
Gonsálvez
Oops :(
This goes back so far, we can't really pin a particular stable version.
Cc:
Reviewed-by: Lionel Landwerlin
---
src/intel/vulkan/anv_cmd_buffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel/vulkan
On 10/07/18 15:04, Daniel Vetter wrote:
On Wed, Jun 20, 2018 at 06:25:34PM +0100, Lionel Landwerlin wrote:
v2: condition the extension on context isolation support from the
kernel (Chris)
v3: (Lionel)
The initial version of this change used a feature of the Gen7+
command parser
Reviewed-by: Lionel Landwerlin
On 10/07/18 00:01, Jason Ekstrand wrote:
Error states coming from actual Vulkan applications tend to have fairly
long command buffers and lots of chained batches. 30 total BOs isn't
nearly enough. This commit bumps it to 256, makes some things use the
actual
Reviewed-by: Lionel Landwerlin
On 10/07/18 00:01, Jason Ekstrand wrote:
Our attempt to restart the loop with the second level batch worked at
one point but got broken at some point. It was too fragile anyway and
we're not likely to have enough secondaries to actually overflow the
stack so we
Thanks!
Reviewed-by: Lionel Landwerlin
On 09/07/18 21:28, Rafael Antognolli wrote:
Using -vv will increase the verbosity, by printing the ppgtt mappings as
they get written into the aub file.
Cc: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 25 -
src
Reviewed-by: Lionel Landwerlin
On 09/07/18 10:49, Iago Toral Quiroga wrote:
---
src/intel/compiler/brw_fs.cpp | 27 ---
src/intel/compiler/brw_fs.h | 4
2 files changed, 31 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler
have upgrade to Ubuntu 18.04 and
currently not affected by this. I'm not sure how to proceed further
with the issue.
- Danil
On 06.07.18 22:30, Lionel Landwerlin wrote:
Hi Danylo,
I just run into the same issue, thanks for fixing this with autotools.
I think the same issue remains wit
With the version bumped in patch 7, patches 2-7 are :
Reviewed-by: Lionel Landwerlin
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mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Acked-by: Lionel Landwerlin
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
On 07/07/18 17:29, Jason Ekstrand wrote:
The implementation of CreateRenderPass2 uses the helpers we broke out in
previous commits. The implementations of the new vkCmd functions just
call the old versions.
---
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_pass.c|
Fixes: 7987d041fda0c9 ("i965/surface_state: Emit the clear color address
instead of value.")
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surfa
Signed-off-by: Lionel Landwerlin
---
src/vulkan/util/gen_enum_to_str.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/vulkan/util/gen_enum_to_str.py
b/src/vulkan/util/gen_enum_to_str.py
index bf883d5cb8f..fb9ecd65c6d 100644
--- a/src/vulkan/util/gen_enum_to_str.py
Hi Danylo,
I just run into the same issue, thanks for fixing this with autotools.
I think the same issue remains with meson though.
Thanks,
-
Lionel
On 20/06/18 14:25, Danylo Piliaiev wrote:
VK_USE_PLATFORM_XLIB_XRANDR_EXT requires xlib leasing which requires
xcb-randr >= 1.13. Also xrandr
.
to minimize the diff.
Do we still want to save stuff in the cache (anv_device_upload_kernel)
when cache is disabled?
Regardless :
Reviewed-by: Lionel Landwerlin
Thanks!
#ifdef ENABLE_SHADER_CACHE
- struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache
Hi Dongwon,
Jason & I merged some patches to fix similar issues a few weeks ago.
I think we didn't change this function because a crash or hitting an
assert is a good indication that something's gone wrong before we run
into this function.
If you patch fixes an issue, could you give some
We were not properly writing page tables when the virtual address
range spans multiple subtrees of the tables.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 46
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/src/intel
above simpler by
creating our own syscall wrapper regardless. Aubinator won't be
compiled if the syscall number isn't defined.
v2: Simplify dealing with memfd_create (Matt)
Print error message if memfd_create syscall number not found (Eric)
Signed-off-by: Lionel Landwerlin
---
configure.ac
CI by only compiling
aubinator if memfd_create() is available as part of the libc.
Annoyingly the man page says which should include but
that header doesn't exist on my system and memfd_create() is instead
defined in bits/mman-shared.h. Hence the new checks...
Signed-off-by: Lionel Landwerlin
mesa/src/util/u_queue.c:242:15: error: address of array 'queue->name'
will always evaluate to 'true' [-Werror,-Wpointer-bool-conversion]
Signed-off-by: Lionel Landwerlin
---
src/util/u_queue.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/util/u_queue.c b/src/u
src/intel/compiler/brw_fs.cpp:5752:45: warning: comparison between
signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Lionel Landwerlin
---
src/intel/compiler/brw_fs.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_fs.cpp b
from the context")
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 7fe12887030..844ecddb
Test written by Jason :
https://github.com/jekstrand/rb-tree
Signed-off-by: Lionel Landwerlin
---
src/util/Makefile.am | 1 +
src/util/meson.build | 1 +
src/util/tests/rb_tree/Makefile.am| 39 ++
src/util/tests/rb_tree/meson.build| 29
Reviewed-by: Lionel Landwerlin
On 03/07/18 21:24, Anuj Phogat wrote:
Bump
On Fri, Jun 1, 2018 at 2:40 PM Anuj Phogat wrote:
CACHE_MODE_SS is not listed in gfxspecs table for user mode
non-privileged registers. So, making any changes from Mesa
will do nothing. Kernel is already setting
I reread the discussion you had with Jason in order to figure out why
this change is required.
Maybe adding a comment at the top of the function would be a good bit of
documentation for future developers ;)
Regardless this series is :
Reviewed-by: Lionel Landwerlin
Thanks!
On 29/06/18 09
On 22/06/18 16:41, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-06-21 17:29:04)
From: Jason Ekstrand
This is a simple, invasive, liberally licensed red-black tree
implementation. It's an invasive data structure similar to the
Linux kernel linked-list where the intention is that you
Reviewed-by: Lionel Landwerlin
On 21/06/18 17:29, Lionel Landwerlin wrote:
From: Jason Ekstrand
This is a simple, invasive, liberally licensed red-black tree
implementation. It's an invasive data structure similar to the
Linux kernel linked-list where the intention is that you embed
We use memfd to store physical pages as they get read/written to and
the GGTT entries translating virtual address to physical pages.
Based on a commit by Scott Phillips.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aubinator.c | 257 ++--
1 file changed
From: Scott D Phillips
For gen8+, write out PPGTT tables in aub files so that full 48-bit
addresses can be serialized.
v2: Fix handling of `end` index in map_ppgtt
v3: Correctly mark GGTT entry as present (Rafael)
Signed-off-by: Scott D Phillips
Signed-off-by: Lionel Landwerlin
Cc: Jordan
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_aub.h | 2 +-
src/intel/tools/intel_dump_gpu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/tools/intel_aub.h b/src/intel/tools/intel_aub.h
index 2888515048f..74ca26ab9bb 100644
--- a/src/intel
We already embed the headers, no need to redefine defines/structs.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/intel_dump_gpu.c | 30 +-
1 file changed, 1 insertion(+), 29 deletions(-)
diff --git a/src/intel/tools/intel_dump_gpu.c b/src/intel/tools
From: Scott D Phillips
Reviewed-by: Lionel Landwerlin
---
src/intel/common/gen_batch_decoder.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/src/intel/common/gen_batch_decoder.c
b/src/intel/common/gen_batch_decoder.c
index 3852f32de36..2b6978da92d
Signed-off-by: Lionel Landwerlin
---
src/intel/dev/gen_device_info.c | 47 ++---
src/intel/dev/gen_device_info.h | 5
2 files changed, 48 insertions(+), 4 deletions(-)
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index
From: Scott D Phillips
v2: by Lionel
Fix memfd_create compilation issue
Fix pml4 address stored on 32 instead of 64bits
Return no buffer if first ppgtt page is not mapped
v3: Drop additional memfd_create() (Rafael)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
From: Jason Ekstrand
This is a simple, invasive, liberally licensed red-black tree
implementation. It's an invasive data structure similar to the
Linux kernel linked-list where the intention is that you embed a
rb_node struct the data structure you intend to put into the
tree.
The
Hi all,
Some fixes spotted by Rafael.
Thanks,
Jason Ekstrand (1):
util: rb-tree: A simple, invasive, red-black tree
Lionel Landwerlin (12):
intel: aubinator: remove unused variables
intel: aubinator: remove standard input processing option
intel: aubinator: rework register writes
Signed-off-by: Lionel Landwerlin
Acked-by: Rafael Antognolli
---
src/intel/Makefile.am |2 +
src/intel/tools/intel_dump_gpu.c | 1313 +
src/intel/tools/intel_dump_gpu.in | 107 +++
src/intel/tools/meson.build | 18 +
4 files changed, 1440
Scott added new stuff in IGT.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/tools/intel_aub.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/src/intel/tools/intel_aub.h b/src/intel/tools/intel_aub.h
index 5f0aba8e68e..9ca548edaf3
With PPGTT mappings, our aubinator implementation can be quite slow if
we request a buffer that doesn't exist. Instead of doing a PPGTT walk
for invalid addresses (0 lengths), wait until we're sure we want to
decode the data.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/common/gen_batch_decoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/common/gen_batch_decoder.c
b/src/intel/common/gen_batch_decoder.c
index 81d8298c28b..fc0ff95a476 100644
from the aub file and
fetch them on request by the batch decoder. As a result we can get rid
of the 1<<40 mmapped address space and only rely on the mmap aub file
\o/
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/tools/aubinat
-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/tools/aubinator.c | 102 +---
1 file changed, 12 insertions(+), 90 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 0e2fd5fb34a..92db1ed0b31 100644
--- a/src
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/tools/aubinator.c | 82 -
1 file changed, 54 insertions(+), 28 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 92db1ed0b31..d0b26219eb4
These memory offsets are stored in the gen_batch_decode_ctx.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/tools/aubinator.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 77676e9c670
On 20/06/18 19:19, Rafael Antognolli wrote:
On Tue, Jun 19, 2018 at 02:45:21PM +0100, Lionel Landwerlin wrote:
We use memfd to store physical pages as they get read/written to and
the GGTT entries translating virtual address to physical pages.
Based on a commit by Scott Phillips.
Signed-off
v2: Implement missing Enable/Disable (Emil)
v3: Drop unused NewIntelBlackholeRender (Ken)
v4: Bring back NewIntelBlackholeRender as i965 implementation uses it
again (Lionel)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Kenneth Graunke
---
src/mesa/main/enable.c | 14
Inspired by what is already in the kernel.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_context.h | 2 ++
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 13 +
3 files changed, 16 insertions(+)
diff
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_pipe_control.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c
b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 122ac260703..1b89e55c396 100644
--- a/src/mesa
When doing a LRI Post Sync operation, you can put the register offset
in the lower 32bits of the address but won't need a BO.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_pipe_control.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965
of the
command parser (Lionel)
v6: Disable Gen7.5 again... Kernel devs want these patches landed
before they accept the kernel patches to whitelist INSTPM (Lionel)
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_clear.c | 3 +
src/mesa/drivers/dri/i965/brw_context.h
The kernel uses it. It's not recommended to use it in the batchbuffer,
but the hardware doesn't seem to complain.
Signed-off-by: Lionel Landwerlin
---
src/intel/genxml/gen10.xml | 1 +
src/intel/genxml/gen11.xml | 1 +
src/intel/genxml/gen7.xml | 1 +
src/intel/genxml/gen75.xml | 1 +
src
Hi all,
This is a respin of the blackhole render extension with Haswell
disabled. After digging a bit I found out that the kernel command
parser drops our batch when it contains a write to INSTPM.
Unfortunately I have to land those patches to be able to land the
kernel ones.
Cheers,
Lionel
Reviewed-by: Lionel Landwerlin
On 19/06/18 16:05, Eric Engestrom wrote:
Signed-off-by: Eric Engestrom
---
src/intel/tools/aubinator.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index c8d79ae377d68285bd1e
On 20/06/18 01:00, Rafael Antognolli wrote:
On Tue, Jun 19, 2018 at 02:45:22PM +0100, Lionel Landwerlin wrote:
From: Scott D Phillips
v2: by Lionel
Fix memfd_create compilation issue
Fix pml4 address stored on 32 instead of 64bits
Return no buffer if first ppgtt page
On 19/06/18 23:56, Rafael Antognolli wrote:
On Tue, Jun 19, 2018 at 11:40:30AM -0700, Rafael Antognolli wrote:
On Tue, Jun 19, 2018 at 02:45:17PM +0100, Lionel Landwerlin wrote:
Now that we rely on mmap of the data to parse, we can't process the
standard input anymore.
Didn't we rely on mmap
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