[Mesa-dev] [PATCH 1/3] hud: Handle query values according to their type

Performance counters may return floating point values, but the hud is currently interpreting them as int regarding of type. As hud doesn't support floating point values, cast them to ints instead. Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Signed-off-by: Boyan Ding <

[Mesa-dev] [PATCH 2/3] nvc0: Return value of appropriate type for performance metrics

Now that gallium hud properly handle floating point values. And it also helps AMD_performance_monitor to return return correct values for non integer types. Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/

[Mesa-dev] [PATCH 3/3] nvc0: Change type of some metrics to float

Metrics such as IPC are better represented as floats instead of ints. This will help query with AMD_performance monitor to return more useful values instead of 0 and 1s. Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c

[Mesa-dev] [RFC 1/2] hud: Handle query values according to their type

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/auxiliary/hud/hud_driver_query.c | 22 +++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/src/gallium/auxiliary/hud/hud_driver_query.c b/src/gallium/auxiliary/hud/hud_driver_query.c

[Mesa-dev] [RFC 0/2] nvc0: Fix non-integer counters in AMD_performance_monitor

in handling -- the current code looks somewhat ugly. There are also further problems that I look to solve, namely some performance counters, such as ipc, which should be floats instead of ints. But I want to get basics correct first. Boyan Ding (2): hud: Handle query values according to their type

[Mesa-dev] [RFC 2/2] nvc0: Return value of appropriate type instead of u64

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c| 70 +- 1 file changed, 42 insertions(+), 28 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c b/src/gallium/drivers/nouvea

[Mesa-dev] [PATCH v2 3/4] nvc0: Add new launch descriptor format for GP100

v2: Also handle the the new format in indirect dispatch Use compute class check instead of chipset check Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 164 +++- src/gallium/drivers/nouveau/nvc0/nve4_compute.h

[Mesa-dev] [RFC 3/4] nvc0: Add new launch descriptor format for GP100

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 105 ++-- src/gallium/drivers/nouveau/nvc0/nve4_compute.h | 67 +++ 2 files changed, 166 insertions(+), 6 deletions(-) diff --git a/src/gallium/d

[Mesa-dev] [PATCH 2/4] nvc0: Fix index of unk fields in nve4_cp_launch_desc

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nvc0/nve4_compute.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.h b/src/gallium/drivers/nouveau/nvc0/nve4_compute.h index 5fe5

[Mesa-dev] [RFC 0/4] nvc0: ARB_compute_shader for Pascal

discovered when writing the code. Major work is done in the latter two. Boyan Ding (4): nouveau: Fix indentation of maxwell compute class definitions nvc0: Fix index of unk fields in nve4_cp_launch_desc nvc0: Add new launch descriptor format for GP100 nvc0: Enable compute support for Pascal

[Mesa-dev] [RFC 4/4] nvc0: Enable compute support for Pascal

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nv_object.xml.h | 2 ++ src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 6 ++ src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 3 +++ 3 files changed, 7 insertions(+), 4 deletions(-) diff --git

[Mesa-dev] [PATCH 1/4] nouveau: Fix indentation of maxwell compute class definitions

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nv_object.xml.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h index f200c9c9c9..1263bff450

Re: [Mesa-dev] [PATCH v2 2/2] nvc0: Add support for AMD_vertex_shader{layer, viewport_index}

been branched, this hunk should go to 17.2.0 instead. Also, enabling PIPE_CAP_TGSI_TES_LAYER_VIEWPORT will most likely give you ARB_shader_viewport_layer_array. Please include this one here and in docs/features.txt after ensuring that it is really enabled. Cheers, Boyan Ding > GL_NV_fill_rect

Re: [Mesa-dev] [PATCH v2 1/2] nvc0/ir: Only store viewport in scratch register for GP

2017-04-20 6:38 GMT+08:00 Lyude <ly...@redhat.com>: > EMIT only applies to geometry shaders. For everything else, we want to > export the viewport normally. > > Signed-off-by: Lyude <ly...@redhat.com> Reviewed-by: Boyan Ding <boyan.j.d...@gmail.com> > >

Re: [Mesa-dev] [PATCH 2/2] i965: Add ARB_fragment_shader_interlock support.

e new features are only available with > certain drivers. > > > OpenGL 4.2 on i965/ivb > +GL_ARB_fragment_shader_interlock on i965 This should go into 17.2.0 instead. Cheers, Boyan Ding > GL_ARB_gpu_shader_fp64 on i965/ivybridge > GL_ARB_gpu_shader_int64 on i965/gen8+, nvc0,

Re: [Mesa-dev] [PATCH] nv50/ir: Change chipset constants to ISA constants and #define to enum.

2017-04-13 13:45 GMT+08:00 Matthew Mondazzi : > More relevant ISA constants put in place of chipset compares. This helps > better display which features are available to card than previous chipset > compares, making future development easier continue with. > >

Re: [Mesa-dev] [PATCH] nir: Destination component count of shader_clock intrinsic is 2

2017-04-13 2:25 GMT+08:00 Jason Ekstrand <ja...@jlekstrand.net>: > On Wed, Apr 12, 2017 at 6:14 AM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> >> This fixes the following error when using ARB_shader_clock on i965: >> vec1 32 ssa_0 = intrinsic shader_cl

[Mesa-dev] [PATCH] nir: Destination component count of shader_clock intrinsic is 2

sa-sta...@lists.freedesktop.org Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/compiler/glsl/glsl_to_nir.cpp | 3 ++- src/compiler/nir/nir_intrinsics.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_n

[Mesa-dev] [PATCH v3 8/9] nvc0/ir: Implement TGSI_OPCODE_BALLOT and TGSI_OPCODE_READ_*

v2: Check if each channel is masked in TGSI_OPCODE_BALLOT (Ilia Mirkin) Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 31 ++ 1 file changed, 31 insertions(+) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v3 9/9] nvc0: Enable ARB_shader_ballot on Kepler+

readInvocationARB() and readFirstInvocationARB() need SHFL.IDX instruction which is introduced in Kepler. Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- docs/features.txt | 2 +- docs/relnotes

[Mesa-dev] [PATCH v3 5/9] nvc0/ir: Allow 0/1 immediate value as source of OP_VOTE

OP_VOTE accept immediate value 0/1 and emit "0x1" and "not 0x1" in the src field respectively. v2: Make sure that asImm() is not NULL (Samuel Pitoiset) v3: (Ilia Mirkin) Make the handling more symmetric with predicate version in gm107 Use i->getSrc(s) Signed-off-by

[Mesa-dev] [PATCH v3 2/9] nvc0/ir: Properly handle a "split form" of predicate destination

of the highest bit in setPDSTL() Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/n

[Mesa-dev] [PATCH v3 6/9] nvc0/ir: Add SV_LANEMASK_* system values.

v2: Add name strings in nv50_ir_print.cpp (Ilia Mirkin) Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 5 + src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v3 7/9] nvc0/ir: Implement TGSI_SEMANTIC_SUBGROUP_*

Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 27 ++ 1 file changed, 27 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgs

[Mesa-dev] [PATCH v3 3/9] nvc0/ir: Emit OP_SHFL

v2: (Samuel Pitoiset) Add an assertion to check if the target is Kepler Make sure that asImm() is not NULL v3: (Ilia Mirkin) Check the range of immediate value of OP_SHFL Use the new setPDSTL API Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/c

[Mesa-dev] [PATCH v3 4/9] gk110/ir: Emit OP_SHFL

v2: Make sure that asImm() is not NULL (Samuel Pitoiset) v3: Check the range of immediate in OP_SHFL (Ilia Mirkin) Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 56 ++ 1 file changed, 56 insertions(+) diff

[Mesa-dev] [PATCH v3 1/9] gm107/ir: Emit third src 'bound' and optional predicate output of SHFL

v2: Emit the original hard-coded 0x1c03 when OP_SHFL is used in gm107's lowering (Samuel Pitoiset) Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 23 ++ .../nouveau/codegen/nv50_ir_lowering_gm107.cpp

[Mesa-dev] [PATCH 0/9] nvc0: ARB_shader_ballot for Kepler+ (v3)

This is the third, and hopefully the last revision of ballot series. This series mainly incorporates Ilia's feedback, with some fixes, more check and code cleanup. Please review. Boyan Ding (9): gm107/ir: Emit third src 'bound' and optional predicate output of SHFL nvc0/ir: Properly handle

Re: [Mesa-dev] [PATCH v2 8/9] nvc0/ir: Implement TGSI_OPCODE_BALLOT and TGSI_OPCODE_READ_*

2017-04-10 9:54 GMT+08:00 Ilia Mirkin <imir...@alum.mit.edu>: > On Sun, Apr 9, 2017 at 8:58 PM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> --- >> .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 28 >> ++ >> 1 file changed,

Re: [Mesa-dev] [PATCH v2 2/9] nvc0/ir: Properly handle a "split form" of predicate destination

2017-04-10 9:31 GMT+08:00 Ilia Mirkin <imir...@alum.mit.edu>: > Wow, great find! > > On Sun, Apr 9, 2017 at 8:58 PM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> GF100's ISA encoding has a weird form of predicate destination where its >> 3 bits are split

[Mesa-dev] [PATCH v2 9/9] nvc0: Enable ARB_shader_ballot on Kepler+

readInvocationARB() and readFirstInvocationARB() need SHFL.IDX instruction which is introduced in Kepler. --- docs/features.txt | 2 +- docs/relnotes/17.1.0.html | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 ++- 3 files changed, 4

[Mesa-dev] [PATCH v2 6/9] nvc0/ir: Add SV_LANEMASK_* system values.

--- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 5 + 4 files

[Mesa-dev] [PATCH v2 5/9] nvc0/ir: Allow 0/1 immediate value as source of OP_VOTE

Implementation of readFirstInvocationARB() on nvidia hardware needs a ballotARB(true) used to decide the first active thread. This expressed in gm107 asm as (supposing output is $r0): vote any $r0 0x1 0x1 To model the always true input, which corresponds to the second 0x1 above, we make

[Mesa-dev] [PATCH v2 7/9] nvc0/ir: Implement TGSI_SEMANTIC_SUBGROUP_*

--- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 27 ++ 1 file changed, 27 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 3ed7d345c4..1bd01a9a32 100644 ---

[Mesa-dev] [PATCH v2 3/9] nvc0/ir: Emit OP_SHFL

v2: (Samuel Pitoiset) Add an assertion to check if the target is Kepler Make sure that asImm() is not NULL --- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 59 ++ 1 file changed, 59 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp

[Mesa-dev] [PATCH v2 1/9] gm107/ir: Emit third src 'bound' and optional predicate output of SHFL

v2: Emit the original hard-coded 0x1c03 when OP_SHFL is used in gm107's lowering (Samuel Pitoiset) --- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 23 ++ .../nouveau/codegen/nv50_ir_lowering_gm107.cpp | 15 +- 2 files changed, 29 insertions(+), 9

[Mesa-dev] [PATCH v2 2/9] nvc0/ir: Properly handle a "split form" of predicate destination

GF100's ISA encoding has a weird form of predicate destination where its 3 bits are split across whole the instruction. Use a dedicated setPDSTL function instead of original defId which is incorrect in this case. --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 13 +++-- 1

[Mesa-dev] [PATCH 0/9] nvc0: ARB_shader_ballot for Kepler+ (v2)

This is v2 series of my ARB_shader_ballot enablement. I added some fixes based on Samuel Pitoiset's feedback, which mainly include adapting existing OP_SHFL usage to the new form in gm107's lowering and addition of several assertion checks. It is also rebased against current master. Boyan Ding (9

[Mesa-dev] [PATCH v2 8/9] nvc0/ir: Implement TGSI_OPCODE_BALLOT and TGSI_OPCODE_READ_*

--- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 28 ++ 1 file changed, 28 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 1bd01a9a32..2ce6f29905 100644 ---

[Mesa-dev] [PATCH v2 4/9] gk110/ir: Emit OP_SHFL

v2: Make sure that asImm() is not NULL (Samuel Pitoiset) --- .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 56 ++ 1 file changed, 56 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp

Re: [Mesa-dev] [PATCH 1/9] gm107/ir: Emit third src 'bound' and optional predicate output of SHFL

2017-04-08 20:42 GMT+08:00 Samuel Pitoiset <samuel.pitoi...@gmail.com>: > > > On 04/08/2017 11:51 AM, Boyan Ding wrote: >> >> --- >> .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 23 >> ++ >> 1 file changed, 19 inserti

[Mesa-dev] [PATCH 9/9] nvc0: Enable ARB_shader_ballot on Kepler+

readInvocationARB() and readFirstInvocationARB() need SHFL.IDX instruction which is introduced in Kepler. --- docs/features.txt | 2 +- docs/relnotes/17.1.0.html | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 ++- 3 files changed, 4

[Mesa-dev] [PATCH 7/9] nvc0/ir: Implement TGSI_SEMANTIC_SUBGROUP_*

--- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 27 ++ 1 file changed, 27 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 13625bf3bd..56e7951e99 100644 ---

[Mesa-dev] [PATCH 8/9] nvc0/ir: Implement TGSI_OPCODE_BALLOT and TGSI_OPCODE_READ_*

--- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 28 ++ 1 file changed, 28 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 56e7951e99..10cb2325e9 100644 ---

[Mesa-dev] [PATCH 2/9] nvc0/ir: Properly handle a "split form" of predicate destination

GF100's ISA encoding has a weird form of predicate destination where its 3 bits are split across whole the instruction. Use a dedicated setPDSTL function instead of original defId which is incorrect in this case. --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 13 +++-- 1

[Mesa-dev] [PATCH 6/9] nvc0/ir: Add SV_LANEMASK_* system values.

--- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 + src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 5 + 4 files

[Mesa-dev] [PATCH 0/9] nvc0: ARB_shader_ballot for Kepler+

readFirstInvocationARB. Patches 6-8 hook up the logic with tgsi, and the extension is eventually flipped on in the last patch. Boyan Ding (9): gm107/ir: Emit third src 'bound' and optional predicate output of SHFL nvc0/ir: Properly handle a "split form" of predicate destination nvc0/ir: Emit OP_SHFL

[Mesa-dev] [PATCH 5/9] nvc0/ir: Allow 0/1 immediate value as source of OP_VOTE

Implementation of readFirstInvocationARB() on nvidia hardware needs a ballotARB(true) used to decide the first active thread. This expressed in gm107 asm as (supposing output is $r0): vote any $r0 0x1 0x1 To model the always true input, which corresponds to the second 0x1 above, we make

[Mesa-dev] [PATCH 3/9] nvc0/ir: Emit OP_SHFL

--- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 51 ++ 1 file changed, 51 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index d5a310f88c..8dd73bd77d 100644 ---

[Mesa-dev] [PATCH 1/9] gm107/ir: Emit third src 'bound' and optional predicate output of SHFL

--- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 23 ++ 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp index 6903132efa..4a741bf45b

[Mesa-dev] [PATCH 4/9] gk110/ir: Emit OP_SHFL

--- .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 50 ++ 1 file changed, 50 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index 1121ae0912..e82e3684b0 100644 ---

[Mesa-dev] [PATCH v2 2/3] nvc0/ir: Handle TGSI_OPCODE_CLOCK

v2: Check if the input channels are enabled Set lower 32 bits zero instead of clockhi Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v2 3/3] nouveau: enable ARB_shader_clock on nv50 and nvc0

v2: Also enable support on nv50 Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- docs/features.txt | 2 +- docs/relnotes/17.1.0.html | 2 +- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +- src/gallium/drivers/nouvea

Re: [Mesa-dev] [PATCH 07/19] tgsi: add BALLOT/READ_* opcodes

2017-04-01 1:14 GMT+08:00 Nicolai Hähnle : > From: Ilia Mirkin > > v2 (Nicolai): > - BALLOT isn't per-channel > - expand the documentation (also for VOTE_*) > > Signed-off-by: Ilia Mirkin > Signed-off-by: Nicolai Hähnle

Re: [Mesa-dev] [PATCH 2/3] nvc0/ir: Handle TGSI_OPCODE_CLOCK

2017-03-31 11:24 GMT+08:00 Ilia Mirkin <imir...@alum.mit.edu>: > On Thu, Mar 30, 2017 at 10:33 PM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> >> --- >> src/gallium/drivers/nouveau/codegen/nv50_ir_from_t

Re: [Mesa-dev] [PATCH 1/3] gm107/ir: Emit SV_CLOCK system value

ly checked with maxwell+, just believing in the correctness in envydis and uniformity between architectures. But I will check when I reach my pascal machine later. Cheers. Boyan Ding [1] https://github.com/envytools/envytools/pull/84 > > On Thu, Mar 30, 2017 at 10:33 PM, Boyan Ding <boyan

[Mesa-dev] [PATCH 3/3] nvc0: enable ARB_shader_clock

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- docs/features.txt | 2 +- docs/relnotes/17.1.0.html | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH 1/3] gm107/ir: Emit SV_CLOCK system value

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp

[Mesa-dev] [PATCH 2/3] nvc0/ir: Handle TGSI_OPCODE_CLOCK

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp

[Mesa-dev] [PATCH 0/3] ARB_shader_clock for nvc0

This series depends on the Nicolai's work in gallium[1], and it's quite trivial. The first patch handles clock registers on Maxwell+, and the second one translates TGSI_OPCODE_CLOCK into special register reads. The last patch just flips the extension on. Boyan

[Mesa-dev] [PATCH v2] nouveau: enable glsl/tgsi on-disk cache

v2: Fix argument to nouveau_screen_get_name() Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nouveau_screen.c | 30 src/gallium/drivers/nouveau/nouveau_screen.h | 3 +++ 2 files changed, 33 insertions(+) diff --git a/src/g

[Mesa-dev] [PATCH] nouveau: enable glsl/tgsi on-disk cache

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/nouveau_screen.c | 29 src/gallium/drivers/nouveau/nouveau_screen.h | 3 +++ 2 files changed, 32 insertions(+) diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c b/src/g

[Mesa-dev] [RFC v2 3/3] gk110/ir: Use the new rcp/rsq in library

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 32 ++ .../nouveau/codegen/nv50_ir_lowering_nvc0.h| 1 + 2 files changed, 33 insertions(+) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [RFC v2 0/3] More precise rcp and rsq for fp64 on gk110

. However, analysis with mpfr shows that all of those were 1ulp error on both sides. So the precision now should satisfy the requirement. The assembly uses an instruction format yet to be merged to upstream envytools assembler. I'll get that merged soon. Boyan Ding (3): gk110/ir: Add rcp f64

[Mesa-dev] [RFC v2 2/3] gk110/ir: Add rsq f64 implementation

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 69 +- .../drivers/nouveau/codegen/lib/gk110.asm.h| 42 - 2 files changed, 109 insertions(+), 2 deletions(-) diff --git a/src/gallium/d

[Mesa-dev] [RFC v2 1/3] gk110/ir: Add rcp f64 implementation

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 152 - .../drivers/nouveau/codegen/lib/gk110.asm.h| 87 +++- 2 files changed, 235 insertions(+), 4 deletions(-) diff --git a/src/gallium/d

Re: [Mesa-dev] [RFC 1/3] gk110/ir: Add rcp f64 implementation

2017-03-06 0:33 GMT+08:00 Ilia Mirkin <imir...@alum.mit.edu>: > On Sun, Mar 5, 2017 at 10:34 AM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> >> --- >> src/gallium/drive

[Mesa-dev] [RFC 2/3] gk110/ir: Add rcp f64 implementation

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 65 +- .../drivers/nouveau/codegen/lib/gk110.asm.h| 40 - 2 files changed, 103 insertions(+), 2 deletions(-) diff --git a/src/gallium/d

[Mesa-dev] [RFC 0/3] More precise rcp and rsq for fp64 on gk110

to be stable enough. Boyan Ding (3): gk110/ir: Add rcp f64 implementation gk110/ir: Add rcp f64 implementation gk110/ir: Use the new rcp/rsq f64 in library src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 219 - .../drivers/nouveau/codegen/lib/gk110.asm.h| 134

[Mesa-dev] [RFC 3/3] gk110/ir: Use the new rcp/rsq f64 in library

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 32 ++ .../nouveau/codegen/nv50_ir_lowering_nvc0.h| 1 + 2 files changed, 33 insertions(+) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [RFC 1/3] gk110/ir: Add rcp f64 implementation

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 156 - .../drivers/nouveau/codegen/lib/gk110.asm.h| 96 - 2 files changed, 248 insertions(+), 4 deletions(-) diff --git a/src/gallium/d

Re: [Mesa-dev] How to enable virgl?

2017-02-28 18:55 GMT+08:00 Christophe de Dinechin : > Newbie question… > > I’ve been investigating a regression in Fedora 25 between mesa-dri-drivers > versions 12.0.3 and 13.0.3 > (https://bugzilla.redhat.com/show_bug.cgi?id=1426549). > > The output with the Fedora version

Re: [Mesa-dev] [Mesa-stable] [PATCH] mesa: call DrawBuffer(s) driver hook in update_framebuffer for windows-system FB

2017-02-02 7:58 GMT+08:00 Brian Paul : > This makes three places in the code where we call ctx->Driver.DrawBuffers() > or ctx->Driver.DrawBuffer() like this. I think some refactoring would be > good. > > Perhaps these calls can go into _mesa_drawbuffers(). I'll try to look

[Mesa-dev] [PATCH] configure.ac: Remove redundant libglvnd stanza

ter the new libglvnd configuration section. Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- configure.ac | 81 1 file changed, 32 insertions(+), 49 deletions(-) diff --git a/configure.ac b/configure.ac index 64ace9dbcb..687ad9f99b

[Mesa-dev] [PATCH] mesa: call DrawBuffer(s) driver hook in update_framebuffer for windows-system FB

://bugs.freedesktop.org/show_bug.cgi?id=99116 Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/main/framebuffer.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/mesa/main/framebuffer.c b/src/mesa/main/framebuffer.c index c06130dc8d..55a6d5c004 100644 --- a/src/mes

Re: [Mesa-dev] [RFC] st/mesa: Add both front and back buffers for double-buffer visuals

2017-01-18 18:23 GMT+08:00 Józef Kucia <joseph.ku...@gmail.com>: > On Wed, Jan 18, 2017 at 2:25 AM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> I don't think I find that. The only place in state tracker where >> _mesa_add_renderbuffer is called is st_fram

Re: [Mesa-dev] [RFC] st/mesa: Add both front and back buffers for double-buffer visuals

2017-01-18 1:31 GMT+08:00 Brian Paul <bri...@vmware.com>: > On 01/17/2017 06:44 AM, Boyan Ding wrote: >> >> st will only add back buffer attachment to window framebuffer when >> visual is in double-buffer mode. However, some applications may >> render to fron

[Mesa-dev] [RFC] st/mesa: Add both front and back buffers for double-buffer visuals

, in which it adds both front and back buffer attachments. Do the same thing in st. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99116 Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/state_tracker/st_manager.c | 6 +++--- 1 file changed, 3 insertions(+), 3 del

[Mesa-dev] [PATCH] mesa/get: Remove unused extra_ARB_viewport_array

Unused since 0a7691ee (mesa: Enable enums for OES_viewport_array). Silence a warning of unused variable. Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/main/get.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index 10b4

[Mesa-dev] [PATCH] spirv: replace assert() with unreachable()

To match the usage at other places. Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/compiler/spirv/vtn_variables.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index e384

Re: [Mesa-dev] [PATCH] glsl: Do not allow scalar types in vector relational functions

2016-11-23 21:20 GMT+08:00 Boyan Ding <boyan.j.d...@gmail.com>: > 2016-11-07 20:27 GMT+08:00 Boyan Ding <boyan.j.d...@gmail.com>: >> 2016-11-05 3:23 GMT+08:00 Matt Turner <matts...@gmail.com>: >>> On Sun, Oct 30, 2016 at 11:45 PM, Boyan Ding <boyan.j.d...@gma

Re: [Mesa-dev] [PATCH] i915: Add XRGB8888 format to intel_screen_make_configs

2016-11-24 13:29 GMT+08:00 Derek Foreman <der...@osg.samsung.com>: > On 23/11/16 07:18 PM, Boyan Ding wrote: >> >> 2016-11-24 7:01 GMT+08:00 Derek Foreman <der...@osg.samsung.com>: >>> >>> This is a copy of commit 536003c11e4cb1172c540932ce3cce06f03bf

Re: [Mesa-dev] [PATCH] i915: Add XRGB8888 format to intel_screen_make_configs

same patch one and half years ago at [1], but withdrew it because it seems no one got interested in that and I don't have the hardware to test. If you're sure it is correct, this gets my Acked-by: Boyan Ding <boyan.j.d...@gmail.com> Regards, Boyan Ding [1] https://lists.freedesktop.org/arc

Re: [Mesa-dev] [PATCH] glsl: Do not allow scalar types in vector relational functions

2016-11-07 20:27 GMT+08:00 Boyan Ding <boyan.j.d...@gmail.com>: > 2016-11-05 3:23 GMT+08:00 Matt Turner <matts...@gmail.com>: >> On Sun, Oct 30, 2016 at 11:45 PM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >>> According to OpenGL Shading Language 4.50 spec

Re: [Mesa-dev] [PATCH] glsl: Do not allow scalar types in vector relational functions

2016-11-05 3:23 GMT+08:00 Matt Turner <matts...@gmail.com>: > On Sun, Oct 30, 2016 at 11:45 PM, Boyan Ding <boyan.j.d...@gmail.com> wrote: >> According to OpenGL Shading Language 4.50 spec, Section 8.7 "Vector >> Relational Functions", functions of this type

[Mesa-dev] [PATCH] glsl: Do not allow scalar types in vector relational functions

According to OpenGL Shading Language 4.50 spec, Section 8.7 "Vector Relational Functions", functions of this type do not operate on scalar types, so remove scalar types from signature definitions to make the behavior consistent with glslangValidator and other drivers. Signed-off-by:

Re: [Mesa-dev] [PATCH] loader: fix memory leak in loader_dri3_open

gt; } > > fd = xcb_dri3_open_reply_fds(conn, reply)[0]; > + free(reply); > fcntl(fd, F_SETFD, fcntl(fd, F_GETFD) | FD_CLOEXEC); > > return fd; > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org &g

[Mesa-dev] [PATCH 6/8] radeon: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/drivers/dri/radeon/radeon_common.c| 4 ++-- .../drivers/dri/radeon/radeon_common_context.c | 24 +++--- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 2/8] glx: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/glx/dri3_glx.c | 2 +- src/glx/dri_common.c | 4 ++-- src/glx/glxcmds.c| 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c index ee24312..8a4d893 100644 --- a/s

[Mesa-dev] Unify the style of function pointer calls in structs

. I compile-tested the series and it builds okay. Boyan Ding [1] http://lists.freedesktop.org/archives/mesa-dev/2015-November/101007.html ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 4/8] glX_proto_send.py: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mapi/glapi/gen/glX_proto_send.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mapi/glapi/gen/glX_proto_send.py b/src/mapi/glapi/gen/glX_proto_send.py index 2b33030..27e2d87 100644 --- a/src/mapi/gla

[Mesa-dev] [PATCH 3/8] loader/dri3: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/loader/loader_dri3_helper.c | 74 - 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c index 62bfe84..ca0f7a0

[Mesa-dev] [PATCH 1/8] egl/dri2: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/egl/drivers/dri2/egl_dri2.c | 10 -- src/egl/drivers/dri2/platform_android.c | 8 src/egl/drivers/dri2/platform_drm.c | 14 +++--- src/egl/drivers/dri2/platform_wayland.c | 14 +++--- s

[Mesa-dev] [PATCH 5/8] nouveau: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/drivers/dri/nouveau/nouveau_context.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c index cb854b8..6

[Mesa-dev] [PATCH 8/8] program: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/program/prog_hash_table.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa/program/prog_hash_table.c b/src/mesa/program/prog_hash_table.c index 5592b6f..25ca6b3 100644 --- a/src/mesa/p

[Mesa-dev] [PATCH 7/8] xlib: Unify the style of function pointer calls in structs

Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/drivers/x11/glxapi.c | 144 +- 1 file changed, 72 insertions(+), 72 deletions(-) diff --git a/src/mesa/drivers/x11/glxapi.c b/src/mesa/drivers/x11/glxapi.c index a870e94..a3993d5

Re: [Mesa-dev] [PATCH 0/7] DRI3 support for EGL (v4)

XCB error: 3 (BadWindow), sequence: 2171, resource id: 108, > major code: 3 (GetWindowAttributes), minor code: 0 > > Thanks for testing and bug report, > Martin > > Hi, I do remember that Plasma 5 was running okay with compositing on when I was writing v2 of the patch series. But I

[Mesa-dev] [PATCH v2 1/2] main: Don't restrict several KHR_debug enum to desktop GL

In preparation for supporting GL_KHR_debug in OpenGL ES v2: add a missing hunk in _mesa_IsEnabled (Emil) Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> Reviewed-by: Emil Velikov <emil.l.veli...@gmail.com> --- src/mesa/main/enable.c| 10 ++ src/mesa/main/getstring.c |

[Mesa-dev] [RFC 2/2] Revert "Revert "mesa: enable KHR_debug for ES contexts""

This reverts commit bbf728f11b45121bf2d03b61bc0ffc69e0ff0836. Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- I wonder if there are still things left, but I think it is worth trying since GL_KHR_debug doesn't seem to be essentially different on GL and GLES. docs/relnotes/11.1.0.htm

[Mesa-dev] [PATCH 1/2] main: Don't restrict several KHR_debug enum to desktop GL

In preparation for supporting GL_KHR_debug in OpenGL ES Signed-off-by: Boyan Ding <boyan.j.d...@gmail.com> --- src/mesa/main/enable.c| 5 + src/mesa/main/getstring.c | 5 + 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/src/mesa/main/enable.c b/src/mesa/main/en

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