from:"Kibey, Sameer"

Re: [Mesa-dev] [PATCH v3] workarounds: Update workaround names and platforms

2016-02-10 Thread Kibey, Sameer

> -Original Message-
> From: Widawsky, Benjamin
> Sent: Tuesday, February 09, 2016 10:04 PM
> To: Matt Turner
> Cc: Kibey, Sameer; mesa-dev@lists.freedesktop.org; Kenneth Graunke
> Subject: Re: [Mesa-dev] [PATCH v3] workarounds: Update workaround
> names and platforms
> 
> On Tue, Feb 09, 2016 at 10:35:45AM -0800, Matt Turner wrote:
> > On Tue, Feb 9, 2016 at 9:44 AM, Sameer Kibey <sameer.ki...@intel.com>
> wrote:
> > > Update the format in which workarounds are documented in the source
> > > code. This allows mesa to be parsed by the list-workarounds utility
> > > in intel-gpu-tools.
> >
> > I don't know that I find this valuable.
> >
> > Ben touched on one concern -- keeping it updated. But I have another,
> > and that's whether the information is accurate, or useful at all.
> >
> >
> 
> I think the bottom line is it really doesn't hurt the existing situation. The
> primary benefit is it gives us internally a way to easily compare the
> workarounds for different drivers.

Agree with Ben. Also this patch is the first step to get Mesa integrated into 
the Workaround database tool. If we can get Mesa into the WA database tool, 
that will allow quick comparing of Mesa WAs with the Windows driver, so that we 
can answer the question - what workarounds is Linux missing that Windows driver 
has? In some cases, it may help debug issues faster. 

> > > Signed-off-by: Sameer Kibey <sameer.ki...@intel.com>
> > > ---
> > >  src/mesa/drivers/dri/i965/brw_binding_tables.c | 3 ++-
> > >  src/mesa/drivers/dri/i965/brw_blorp.cpp| 2 ++
> > >  src/mesa/drivers/dri/i965/brw_defines.h| 2 ++
> > >  src/mesa/drivers/dri/i965/brw_eu_emit.c| 2 ++
> > >  src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 6 ++
> > >  src/mesa/drivers/dri/i965/brw_pipe_control.c   | 2 ++
> > >  src/mesa/drivers/dri/i965/gen6_queryobj.c  | 5 +++--
> > >  src/mesa/drivers/dri/i965/gen8_depth_state.c   | 7 ---
> > >  src/mesa/drivers/dri/i965/intel_batchbuffer.c  | 2 +-
> > >  9 files changed, 24 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > > b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > > index f3a0310..6dd35dd 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > > +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > > @@ -54,13 +54,14 @@ static uint32_t
> > >  reserve_hw_bt_space(struct brw_context *brw, unsigned bytes)  {
> > > /* From the Broadwell PRM, Volume 16, "Workarounds",
> > > -* WaStateBindingTableOverfetch:
> > >  * "HW over-fetches two cache lines of binding table indices.  When
> > >  *  using the resource streamer, SW needs to pad binding table pointer
> > >  *  updates with an additional two cache lines."
> > >  *
> > >  * Cache lines are 64 bytes, so we subtract 128 bytes from the size of
> > >  * the binding table pool buffer.
> > > +*
> > > +* WaStateBindingTableOverfetch:hsw,bdw,chv,bxt
> > >  */
> > > if (brw->hw_bt_pool.next_offset + bytes >= brw->hw_bt_pool.bo-
> >size - 128) {
> > >gen7_reset_hw_bt_pool_offsets(brw);
> > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > > b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > > index 1bc6d15..f798e29 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > > +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > > @@ -318,6 +318,8 @@ brw_hiz_op_params::brw_hiz_op_params(struct
> intel_mipmap_tree *mt,
> > >  * SURFACE_STATE.Surface_Horizontal_Alignment should be 4 for Z24
> surfaces,
> > >  * not 8. But commit 1f112cc increased the alignment from 4 to 8, 
> > > which
> > >  * prevents the clobbering.
> > > +*
> > > +* WaHizAmbiguate8x4Aligned:hsw
> > >  */
> > > depth.width = ALIGN(depth.width, 8);
> > > depth.height = ALIGN(depth.height, 4); diff --git
> > > a/src/mesa/drivers/dri/i965/brw_defines.h
> > > b/src/mesa/drivers/dri/i965/brw_defines.h
> > > index 01e0c99..2146172 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > > @@ -1762,6 +1762,8 @@ enum brw_message_target {
> > >   * WaForceEnableNonCoherent, HDC memory access may have been
> overridden by the
> > >   * kernel to be non-coherent (matching the behavior of the sam

Re: [Mesa-dev] [PATCH v2] workarounds: Update workaround names and platforms

2016-02-09 Thread Kibey, Sameer


> -Original Message-
> From: Ben Widawsky [mailto:b...@bwidawsk.net]
> Sent: Monday, February 08, 2016 5:41 PM
> To: Kibey, Sameer
> Cc: mesa-dev@lists.freedesktop.org; Sharp, Sarah A; Widawsky, Benjamin
> Subject: Re: [Mesa-dev] [PATCH v2] workarounds: Update workaround
> names and platforms
> 
> On Fri, Feb 05, 2016 at 01:59:23PM -0800, Sameer Kibey wrote:
> > Update the format in which workarounds are documented in the source
> > code. This allows mesa to be parsed by the list-workarounds utility in
> > intel-gpu-tools.
> >
> > Signed-off-by: Sameer Kibey <sameer.ki...@intel.com>
> > ---
> > changed byt to vlv for consistency.
> >  src/mesa/drivers/dri/i965/brw_binding_tables.c | 2 +-
> >  src/mesa/drivers/dri/i965/brw_blorp.cpp| 2 ++
> >  src/mesa/drivers/dri/i965/brw_defines.h| 3 ++-
> >  src/mesa/drivers/dri/i965/brw_eu_emit.c| 3 ++-
> >  src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 ++---
> >  src/mesa/drivers/dri/i965/brw_pipe_control.c   | 4 +++-
> >  src/mesa/drivers/dri/i965/gen6_queryobj.c  | 2 +-
> >  src/mesa/drivers/dri/i965/gen8_depth_state.c   | 3 ++-
> >  src/mesa/drivers/dri/i965/intel_batchbuffer.c  | 2 +-
> >  9 files changed, 20 insertions(+), 10 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > index f3a0310..bcf6422 100644
> > --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> > @@ -54,7 +54,7 @@ static uint32_t
> >  reserve_hw_bt_space(struct brw_context *brw, unsigned bytes)  {
> > /* From the Broadwell PRM, Volume 16, "Workarounds",
> > -* WaStateBindingTableOverfetch:
> > +* WaStateBindingTableOverfetch:hsw,bdw,chv,bxt
> >  * "HW over-fetches two cache lines of binding table indices.  When
> >  *  using the resource streamer, SW needs to pad binding table pointer
> >  *  updates with an additional two cache lines."
> > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > index 1bc6d15..dd01ea8 100644
> > --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> > @@ -304,6 +304,8 @@ brw_hiz_op_params::brw_hiz_op_params(struct
> intel_mipmap_tree *mt,
> >  * aligned to an 8x4 pixel block relative to the upper left corner
> >  * of the depth buffer [...]
> >  *
> > +* WaHizAmbiguate8x4Aligned:hsw
> > +*
> >  * For hiz resolves, the rectangle must also be 8x4 aligned. Item
> >  * WaHizAmbiguate8x4Aligned from the Haswell workarounds page and
> the
> >  * Ivybridge simulator require the alignment.
> > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
> > b/src/mesa/drivers/dri/i965/brw_defines.h
> > index 01e0c99..5410a1d 100644
> > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > @@ -1756,7 +1756,8 @@ enum brw_message_target {
> >  /* Dataport special binding table indices: */
> >  #define BRW_BTI_STATELESS255
> >  #define GEN7_BTI_SLM 254
> > -/* Note that on Gen8+ BTI 255 was redefined to be IA-coherent
> > according to the
> > +/* WaForceEnableNonCoherent:bdw,chv,skl,kbl
> > + * Note that on Gen8+ BTI 255 was redefined to be IA-coherent
> > +according to the
> >   * hardware spec, however because the DRM sets bit 4 of HDC_CHICKEN0
> on BDW,
> >   * CHV and at least some pre-production steppings of SKL due to
> >   * WaForceEnableNonCoherent, HDC memory access may have been
> > overridden by the diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> > b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> > index 35d8039..918d69e 100644
> > --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> > +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> > @@ -1885,7 +1885,8 @@ void brw_CMP(struct brw_codegen *p,
> > brw_set_src0(p, insn, src0);
> > brw_set_src1(p, insn, src1);
> >
> > -   /* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec
> workarounds
> > +   /* WaCMPInstNullDstForcesThreadSwitch:ivb,hsw,vlv
> > +* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec
> > + workarounds
> >  * page says:
> >  *"Any CMP instruction with a null destination must use a {switch}."
> >  *
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> > b/src/mesa/drive

Re: [Mesa-dev] [PATCH v2] workarounds: Update workaround names and platforms

2016-02-08 Thread Kibey, Sameer



> -Original Message-
> From: Widawsky, Benjamin
> Sent: Saturday, February 06, 2016 10:30 AM
> To: Kibey, Sameer
> Cc: mesa-dev@lists.freedesktop.org; Sharp, Sarah A
> Subject: Re: [PATCH v2] workarounds: Update workaround names and
> platforms
> 
> On Fri, Feb 05, 2016 at 01:59:23PM -0800, Sameer Kibey wrote:
> > Update the format in which workarounds are documented in the source
> > code. This allows mesa to be parsed by the list-workarounds utility in
> > intel-gpu-tools.
> >
> > Signed-off-by: Sameer Kibey <sameer.ki...@intel.com>
> 
> Do you have any plan for updating these as we add new platforms to mesa? I
> foresee a problem of these getting stale. I wonder how the drm-intel devs
> deals with that.

To update this for the new platforms should be a trivial patch. I do not see 
any issues with that.
 
> [snip]
> 
> --
> Ben Widawsky, Intel Open Source Technology Center
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Re: [Mesa-dev] [PATCH] list-workarounds: Extend the script to Mesa

2016-02-05 Thread Kibey, Sameer


> -Original Message-
> From: Lespiau, Damien
> Sent: Friday, February 05, 2016 4:16 AM
> To: Kibey, Sameer
> Cc: intel-...@lists.freedesktop.org; mesa-dev@lists.freedesktop.org; Sharp,
> Sarah A; Widawsky, Benjamin
> Subject: Re: [PATCH] list-workarounds: Extend the script to Mesa
> 
> On Thu, Feb 04, 2016 at 06:14:02PM +, Kibey, Sameer wrote:
> > Updated the list-workarounds script so that it can parse Mesa
> > directory if provided. Moved the common code to a separate function to
> > allow reuse for both kernel and mesa.
> >
> > The new command line is:
> > Usage: list-workarounds [options] path-to-kernel
> >-k path-to-kernel -m path-to-mesa
> >
> > The legacy usage is retained to avoid breaking backwards
> > compatibility. New parameters -k and -m are added for the new
> > behavior.
> >
> > Either kernel or mesa or both paths can be specified.
> > If path-to-mesa is invalid, error is reported.
> >
> > Signed-off-by: Sameer Kibey <sameer.ki...@intel.com>
> 
> Out of curiosity, how did you send the email? It doesn't seem to have been
> sent with git send-email and so the patch isn't picked up by our patchwork
> instance.

I sent the email manually, but will use git send-email next time. 

> Out of the comments below, I guess the only serious one is allowing both
> byt/vlv, but maybe mesa only uses one of the two? I wouldn't mind landing
> the patch with that answered.

I will replace byt with vlv to keep it consistent. 

> > ---
> >  scripts/list-workarounds | 75
> > ++--
> >  1 file changed, 54 insertions(+), 21 deletions(-)
> >
> > diff --git a/scripts/list-workarounds b/scripts/list-workarounds index
> > d11b6a9..0b63541 100755
> > --- a/scripts/list-workarounds
> > +++ b/scripts/list-workarounds
> > @@ -18,7 +18,7 @@ def find_nth(haystack, needle, n):
> > return start
> >
> >  valid_platforms = ('ctg', 'elk', 'ilk', 'snb', 'ivb', 'vlv', 'hsw', 'bdw',
> > -  'chv', 'skl', 'bxt')
> > +  'chv', 'skl', 'bxt', 'kbl', 'byt')
> 
> Do we really need both byt and vlv? that creates two different names for the
> same platform, which sounds like a recipe to have the actual set of W/As for
> this platform be the union of vlv and byt ones.

Agree, will remove byt. 

> >  def parse_platforms(line, p):
> > l =  p.split(',')
> > for p in l:
> > @@ -65,9 +65,15 @@ def execute(cmd):
> > return out, err
> >
> >  def parse_options(args):
> > -   usage = "Usage: list-workarounds [options] path-to-kernel"
> > +   usage = "Usage: list-workarounds [options] path-to-kernel -k path-
> to-kernel -m path-to-mesa"
> > parser = optparse.OptionParser(usage, version=1.0)
> 
> Quite frankly, I'd just remove the old behaviour.

Originally I had removed the old behavior. Ben suggested keeping it in case 
some people have it in other scripts. 

> > +   parser.add_option("-k", "--kernel-path", dest="kernel_path",
> default=None,
> > + help="path to kernel")
> > +
> > +   parser.add_option("-m", "--mesa-path", dest="mesa_path",
> default=None,
> > + help="path to mesa")
> > +
> > parser.add_option("-v", "--verbose", action="store_true",
> >   dest="verbose", default=False,
> >   help="be more verbose")
> > @@ -76,30 +82,14 @@ def parse_options(args):
> >   help="List workarounds for the specified platform")
> >
> > (options, args) = parser.parse_args()
> > -
> > return (options, args)
> >
> > -if __name__ == '__main__':
> > -   (options, args) = parse_options(sys.argv[1:])
> > -   verbose = options.verbose
> > -
> > -   if not len(args):
> > -   sys.stderr.write("error: A path to a kernel tree is
> required\n")
> > -   sys.exit(1)
> > -
> > -   kernel_path = args[0]
> > -   kconfig = os.path.join(kernel_path, 'Kconfig')
> > -   if not os.path.isfile(kconfig):
> > -   sys.stderr.write("error: %s does not point to a kernel tree \n"
> > -% kernel_path)
> > -   sys.exit(1)
> > -
> > -   i915_dir = os.path.join('drivers', 'gpu', 'drm', 'i915')
> > +def print_workarounds(code_path, driver_dir):
> > olddir = os.getcwd()
> > -   os.chdir(kernel_path)
&

[Mesa-dev] [PATCH] workarounds: Update workaround names and platforms

2016-02-04 Thread Kibey, Sameer

Update the format in which workarounds are documented
in the source code. This allows mesa to be parsed
by the list-workarounds utility in intel-gpu-tools.

Signed-off-by: Sameer Kibey 
---
 src/mesa/drivers/dri/i965/brw_binding_tables.c | 2 +-
 src/mesa/drivers/dri/i965/brw_blorp.cpp| 2 ++
 src/mesa/drivers/dri/i965/brw_defines.h| 3 ++-
 src/mesa/drivers/dri/i965/brw_eu_emit.c| 3 ++-
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 ++---
 src/mesa/drivers/dri/i965/brw_pipe_control.c   | 4 +++-
 src/mesa/drivers/dri/i965/gen6_queryobj.c  | 2 +-
 src/mesa/drivers/dri/i965/gen8_depth_state.c   | 3 ++-
 src/mesa/drivers/dri/i965/intel_batchbuffer.c  | 2 +-
 9 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c 
b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index f3a0310..bcf6422 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -54,7 +54,7 @@ static uint32_t
 reserve_hw_bt_space(struct brw_context *brw, unsigned bytes)
 {
/* From the Broadwell PRM, Volume 16, "Workarounds",
-* WaStateBindingTableOverfetch:
+* WaStateBindingTableOverfetch:hsw,bdw,chv,bxt
 * "HW over-fetches two cache lines of binding table indices.  When
 *  using the resource streamer, SW needs to pad binding table pointer
 *  updates with an additional two cache lines."
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp 
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 1bc6d15..dd01ea8 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -304,6 +304,8 @@ brw_hiz_op_params::brw_hiz_op_params(struct 
intel_mipmap_tree *mt,
 * aligned to an 8x4 pixel block relative to the upper left corner
 * of the depth buffer [...]
 *
+* WaHizAmbiguate8x4Aligned:hsw
+*
 * For hiz resolves, the rectangle must also be 8x4 aligned. Item
 * WaHizAmbiguate8x4Aligned from the Haswell workarounds page and the
 * Ivybridge simulator require the alignment.
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 10a6d39..3a76317 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1744,7 +1744,8 @@ enum brw_message_target {
 /* Dataport special binding table indices: */
 #define BRW_BTI_STATELESS255
 #define GEN7_BTI_SLM 254
-/* Note that on Gen8+ BTI 255 was redefined to be IA-coherent according to the
+/* WaForceEnableNonCoherent:bdw,chv,skl,kbl
+ * Note that on Gen8+ BTI 255 was redefined to be IA-coherent according to the
  * hardware spec, however because the DRM sets bit 4 of HDC_CHICKEN0 on BDW,
  * CHV and at least some pre-production steppings of SKL due to
  * WaForceEnableNonCoherent, HDC memory access may have been overridden by the
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c 
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 35d8039..918d69e 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1885,7 +1885,8 @@ void brw_CMP(struct brw_codegen *p,
brw_set_src0(p, insn, src0);
brw_set_src1(p, insn, src1);
 
-   /* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec workarounds
+   /* WaCMPInstNullDstForcesThreadSwitch:ivb,hsw,vlv
+* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec workarounds
 * page says:
 *"Any CMP instruction with a null destination must use a {switch}."
 *
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index e05622a..81c3143 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1836,7 +1836,8 @@ fs_generator::generate_code(const cfg_t *cfg, int 
dispatch_width)
  brw_F16TO32(p, dst, src[0]);
  break;
   case BRW_OPCODE_CMP:
- /* The Ivybridge/BayTrail WaCMPInstFlagDepClearedEarly workaround says
+ /* WaCMPInstFlagDepClearedEarly:ivb,hsw,byt
+  * The Ivybridge/BayTrail WaCMPInstFlagDepClearedEarly workaround says
   * that when the destination is a GRF that the dependency-clear bit on
   * the flag register is cleared early.
   *
@@ -1928,7 +1929,8 @@ fs_generator::generate_code(const cfg_t *cfg, int 
dispatch_width)
 
   case BRW_OPCODE_BFI1:
  assert(devinfo->gen >= 7);
- /* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we
+ /* WaForceSIMD8ForBFIInstruction:hsw
+  * The Haswell WaForceSIMD8ForBFIInstruction workaround says that we
   * should
   *
   *"Force BFI instructions to be executed always in SIMD8."
@@ -1947,7 +1949,8 @@ fs_generator::generate_code(const cfg_t *cfg, int 
dispatch_width)
   case BRW_OPCODE_BFI2:

[Mesa-dev] [PATCH] list-workarounds: Extend the script to Mesa

2016-02-04 Thread Kibey, Sameer

Updated the list-workarounds script so that it
can parse Mesa directory if provided. Moved the
common code to a separate function to allow
reuse for both kernel and mesa.

The new command line is:
Usage: list-workarounds [options] path-to-kernel
   -k path-to-kernel -m path-to-mesa

The legacy usage is retained to avoid breaking
backwards compatibility. New parameters -k and
-m are added for the new behavior.

Either kernel or mesa or both paths can be specified.
If path-to-mesa is invalid, error is reported.

Signed-off-by: Sameer Kibey 
---
 scripts/list-workarounds | 75 ++--
 1 file changed, 54 insertions(+), 21 deletions(-)

diff --git a/scripts/list-workarounds b/scripts/list-workarounds
index d11b6a9..0b63541 100755
--- a/scripts/list-workarounds
+++ b/scripts/list-workarounds
@@ -18,7 +18,7 @@ def find_nth(haystack, needle, n):
return start
 
 valid_platforms = ('ctg', 'elk', 'ilk', 'snb', 'ivb', 'vlv', 'hsw', 'bdw',
-  'chv', 'skl', 'bxt')
+  'chv', 'skl', 'bxt', 'kbl', 'byt')
 def parse_platforms(line, p):
l =  p.split(',')
for p in l:
@@ -65,9 +65,15 @@ def execute(cmd):
return out, err
 
 def parse_options(args):
-   usage = "Usage: list-workarounds [options] path-to-kernel"
+   usage = "Usage: list-workarounds [options] path-to-kernel -k 
path-to-kernel -m path-to-mesa"
parser = optparse.OptionParser(usage, version=1.0)
 
+   parser.add_option("-k", "--kernel-path", dest="kernel_path", 
default=None,
+ help="path to kernel")
+
+   parser.add_option("-m", "--mesa-path", dest="mesa_path", default=None,
+ help="path to mesa")
+
parser.add_option("-v", "--verbose", action="store_true",
  dest="verbose", default=False,
  help="be more verbose")
@@ -76,30 +82,14 @@ def parse_options(args):
  help="List workarounds for the specified platform")
 
(options, args) = parser.parse_args()
-
return (options, args)
 
-if __name__ == '__main__':
-   (options, args) = parse_options(sys.argv[1:])
-   verbose = options.verbose
-
-   if not len(args):
-   sys.stderr.write("error: A path to a kernel tree is required\n")
-   sys.exit(1)
-
-   kernel_path = args[0]
-   kconfig = os.path.join(kernel_path, 'Kconfig')
-   if not os.path.isfile(kconfig):
-   sys.stderr.write("error: %s does not point to a kernel tree \n"
-% kernel_path)
-   sys.exit(1)
-
-   i915_dir = os.path.join('drivers', 'gpu', 'drm', 'i915')
+def print_workarounds(code_path, driver_dir):
olddir = os.getcwd()
-   os.chdir(kernel_path)
+   os.chdir(code_path)
work_arounds, err = execute(['git', 'grep', '-n',
 '-e', 'W[aA][A-Z0-9][a-zA-Z0-9_]\+',
-i915_dir])
+driver_dir])
os.chdir(olddir)
if err:
print(err)
@@ -111,3 +101,46 @@ if __name__ == '__main__':
print("%s: %s" % (wa, ', '.join(workarounds[wa])))
elif options.platform in workarounds[wa]:
print(wa)
+
+
+if __name__ == '__main__':
+   (options, args) = parse_options(sys.argv)
+   verbose = options.verbose
+   kernel_path = None
+
+   if not len(args) and options.kernel_path == None and options.mesa_path 
== None:
+   sys.stderr.write("error: A path to either a kernel tree or Mesa 
is required\n")
+   sys.exit(1)
+
+   if len(args):
+   kernel_path = args[0]
+   elif options.kernel_path != None:
+   kernel_path = options.kernel_path
+
+   if kernel_path != None:
+   # --- list Kernel workarounds if path is provided ---
+   kconfig = os.path.join(kernel_path, 'Kconfig')
+   if not os.path.isfile(kconfig):
+   sys.stderr.write("error: %s does not point to a kernel 
tree \n"
+   % kernel_path)
+   sys.exit(1)
+
+   i915_dir = os.path.join('drivers', 'gpu', 'drm', 'i915')
+   print ("List of workarounds found in kernel:")
+   print_workarounds(kernel_path, i915_dir)
+
+   # --- list mesa workarounds if path is provided ---
+   if options.mesa_path != None:
+   # reset workarounds array
+   workarounds = {}
+
+   mesa_path = options.mesa_path
+   i965_dir = os.path.join('src', 'mesa', 'drivers', 'dri', 'i965')
+   mesa_dir = os.path.join(mesa_path, i965_dir)
+   if not os.path.exists(mesa_dir):
+   sys.stderr.write("error: %s does not point to a

Re: [Mesa-dev] [Intel-gfx] [PATCH i-g-t] list-workarounds: Extend the script to Mesa

2016-02-04 Thread Kibey, Sameer

> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, February 04, 2016 10:37 AM
> To: Kibey, Sameer; intel-...@lists.freedesktop.org; mesa-
> d...@lists.freedesktop.org
> Cc: Sharp, Sarah A; Kibey, Sameer; Widawsky, Benjamin
> Subject: Re: [Intel-gfx] [PATCH] list-workarounds: Extend the script to Mesa
> 
> 
> FYI, for IGT patches, please do as instructed in CONTRIBUTING:
> 
> """
>   Please use --subject-prefix="PATCH i-g-t" so that i-g-t patches are easily
>   identified in the massive amount mails on intel-gfx. To ensure this is 
> always
>   done just run
> 
> git config format.subjectprefix "PATCH i-g-t"
> 
>   from within your i-g-t git checkout.
> """
> 
> BR,
> Jani.
> 

Thanks for the input. I changed the subject prefix for this thread, let me know 
if you would like me to send a new email with "PATCH i-g-t" instead. 

> On Thu, 04 Feb 2016, "Kibey, Sameer" <sameer.ki...@intel.com> wrote:
> > Updated the list-workarounds script so that it can parse Mesa
> > directory if provided. Moved the common code to a separate function to
> > allow reuse for both kernel and mesa.
> >
> > The new command line is:
> > Usage: list-workarounds [options] path-to-kernel
> >-k path-to-kernel -m path-to-mesa
> >
> > The legacy usage is retained to avoid breaking backwards
> > compatibility. New parameters -k and -m are added for the new
> > behavior.
> >
> > Either kernel or mesa or both paths can be specified.
> > If path-to-mesa is invalid, error is reported.
> >
> > Signed-off-by: Sameer Kibey <sameer.ki...@intel.com>
> > ---
> >  scripts/list-workarounds | 75
> > ++--
> >  1 file changed, 54 insertions(+), 21 deletions(-)
> >
> > diff --git a/scripts/list-workarounds b/scripts/list-workarounds index
> > d11b6a9..0b63541 100755
> > --- a/scripts/list-workarounds
> > +++ b/scripts/list-workarounds
> > @@ -18,7 +18,7 @@ def find_nth(haystack, needle, n):
> > return start
> >
> >  valid_platforms = ('ctg', 'elk', 'ilk', 'snb', 'ivb', 'vlv', 'hsw', 'bdw',
> > -  'chv', 'skl', 'bxt')
> > +  'chv', 'skl', 'bxt', 'kbl', 'byt')
> >  def parse_platforms(line, p):
> > l =  p.split(',')
> > for p in l:
> > @@ -65,9 +65,15 @@ def execute(cmd):
> > return out, err
> >
> >  def parse_options(args):
> > -   usage = "Usage: list-workarounds [options] path-to-kernel"
> > +   usage = "Usage: list-workarounds [options] path-to-kernel -k path-
> to-kernel -m path-to-mesa"
> > parser = optparse.OptionParser(usage, version=1.0)
> >
> > +   parser.add_option("-k", "--kernel-path", dest="kernel_path",
> default=None,
> > + help="path to kernel")
> > +
> > +   parser.add_option("-m", "--mesa-path", dest="mesa_path",
> default=None,
> > + help="path to mesa")
> > +
> > parser.add_option("-v", "--verbose", action="store_true",
> >   dest="verbose", default=False,
> >   help="be more verbose")
> > @@ -76,30 +82,14 @@ def parse_options(args):
> >   help="List workarounds for the specified platform")
> >
> > (options, args) = parser.parse_args()
> > -
> > return (options, args)
> >
> > -if __name__ == '__main__':
> > -   (options, args) = parse_options(sys.argv[1:])
> > -   verbose = options.verbose
> > -
> > -   if not len(args):
> > -   sys.stderr.write("error: A path to a kernel tree is
> required\n")
> > -   sys.exit(1)
> > -
> > -   kernel_path = args[0]
> > -   kconfig = os.path.join(kernel_path, 'Kconfig')
> > -   if not os.path.isfile(kconfig):
> > -   sys.stderr.write("error: %s does not point to a kernel tree \n"
> > -% kernel_path)
> > -   sys.exit(1)
> > -
> > -   i915_dir = os.path.join('drivers', 'gpu', 'drm', 'i915')
> > +def print_workarounds(code_path, driver_dir):
> > olddir = os.getcwd()
> > -   os.chdir(kernel_path)
> > +   os.chdir(code_path)
> > work_arounds, err = execute(['git', 'grep', '-n',
> >  '-e', 'W[aA][A-Z0-9][a-zA-Z0-9_]\+',
> >

Re: [Mesa-dev] [PATCH v3] workarounds: Update workaround names and platforms

Re: [Mesa-dev] [PATCH v2] workarounds: Update workaround names and platforms

Re: [Mesa-dev] [PATCH v2] workarounds: Update workaround names and platforms

Re: [Mesa-dev] [PATCH] list-workarounds: Extend the script to Mesa

[Mesa-dev] [PATCH] workarounds: Update workaround names and platforms

[Mesa-dev] [PATCH] list-workarounds: Extend the script to Mesa

Re: [Mesa-dev] [Intel-gfx] [PATCH i-g-t] list-workarounds: Extend the script to Mesa

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