Re: [Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2016-04-20 Thread Pohjolainen, Topi
On Thu, Apr 21, 2016 at 08:03:02AM +0300, Pohjolainen, Topi wrote: > On Wed, Apr 20, 2016 at 09:49:02PM -0700, Ben Widawsky wrote: > > From: Ben Widawsky > > > > Starting with Skylake, the display engine is capable of scanning out from > > Y-tiled buffers. As such,

Re: [Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2016-04-20 Thread Kenneth Graunke
On Wednesday, April 20, 2016 9:49:02 PM PDT Ben Widawsky wrote: > From: Ben Widawsky > > Starting with Skylake, the display engine is capable of scanning out from > Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. > This also has the

Re: [Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2016-04-20 Thread Pohjolainen, Topi
On Wed, Apr 20, 2016 at 09:49:02PM -0700, Ben Widawsky wrote: > From: Ben Widawsky > > Starting with Skylake, the display engine is capable of scanning out from > Y-tiled buffers. As such, we can and should use Y-tiling for better > efficiency. > This also has the

[Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2016-04-20 Thread Ben Widawsky
From: Ben Widawsky Starting with Skylake, the display engine is capable of scanning out from Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. This also has the added benefit of being able to fast clear the winsys buffer. Note that the

Re: [Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2015-11-23 Thread Neil Roberts
Hi, Has this situation changed at all? It's probably quite important to get this working because we have to disable fast clears for X-tiled buffers on SKL which effectively means we currently can't do it for window system buffers. Regards, - Neil Chris Wilson writes:

Re: [Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2015-04-13 Thread Chris Wilson
On Mon, Apr 13, 2015 at 04:31:29PM +0200, Daniel Vetter wrote: On Sat, Apr 11, 2015 at 01:16:11PM -0700, Ben Widawsky wrote: Starting with Skylake, the display engine is capable of scanning out from Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. Note

Re: [Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2015-04-13 Thread Daniel Vetter
On Sat, Apr 11, 2015 at 01:16:11PM -0700, Ben Widawsky wrote: Starting with Skylake, the display engine is capable of scanning out from Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. Note that the buffer allocation done for mipmaps will already never

[Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

2015-04-11 Thread Ben Widawsky
Starting with Skylake, the display engine is capable of scanning out from Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. Note that the buffer allocation done for mipmaps will already never allocate an X-tiled buffer for GEN9. Signed-off-by: Ben Widawsky