[Mesa-dev] [PATCH] i965: Don't add barrier deps for FB write messages.
There are never render target reads, so there are no scheduling hazards. Giving the extra flexibility to the scheduler makes it possible to do FB writes as soon as their sources are available, reducing register pressure. It also makes it possible to do the payload setup for more than one FB write message at a time, which could better hide latency. shader-db results on Skylake: total instructions in shared programs: 9110254 -> 9110211 (-0.00%) instructions in affected programs: 2898 -> 2855 (-1.48%) helped: 3 HURT: 0 LOST: 0 GAINED: 1 A reduction in instruction counts is surprising, but legitimate: the three shaders helped were spilling, and reducing register pressure allowed us to issue fewer spills/fills. total cycles in shared programs: 69035108 -> 68928820 (-0.15%) cycles in affected programs: 4412402 -> 4306114 (-2.41%) helped: 4457 HURT: 213 Signed-off-by: Kenneth Graunke--- src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 60f7fd9..4f97577 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -939,8 +939,9 @@ fs_instruction_scheduler::calculate_deps() foreach_in_list(schedule_node, n, ) { fs_inst *inst = (fs_inst *)n->inst; - if (inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || - inst->has_side_effects()) + if ((inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || + inst->has_side_effects()) && + inst->opcode != FS_OPCODE_FB_WRITE) add_barrier_deps(n); /* read-after-write deps. */ @@ -1195,7 +1196,7 @@ vec4_instruction_scheduler::calculate_deps() foreach_in_list(schedule_node, n, ) { vec4_instruction *inst = (vec4_instruction *)n->inst; - if (inst->has_side_effects()) + if (inst->has_side_effects() && inst->opcode != FS_OPCODE_FB_WRITE) add_barrier_deps(n); /* read-after-write deps. */ -- 2.7.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Don't add barrier deps for FB write messages.
Reviewed-by: Connor AbbottFWIW, in this area, another place where we unnecessarily introduce dependencies between instructions is when multiple instructions write to different parts of a virtual register, for example when setting up message headers. Instead of tracking dependencies per-vgrf, we should be tracking them per-register (similar to what liveness analysis does) to avoid that. The glassy mesa repo has some changes to that effect, but their implementation is broken. On Mon, Feb 8, 2016 at 2:31 PM, Kenneth Graunke wrote: > There are never render target reads, so there are no scheduling hazards. > > Giving the extra flexibility to the scheduler makes it possible to do > FB writes as soon as their sources are available, reducing register > pressure. It also makes it possible to do the payload setup for more > than one FB write message at a time, which could better hide latency. > > shader-db results on Skylake: > > total instructions in shared programs: 9110254 -> 9110211 (-0.00%) > instructions in affected programs: 2898 -> 2855 (-1.48%) > helped: 3 > HURT: 0 > LOST: 0 > GAINED: 1 > > A reduction in instruction counts is surprising, but legitimate: > the three shaders helped were spilling, and reducing register > pressure allowed us to issue fewer spills/fills. > > total cycles in shared programs: 69035108 -> 68928820 (-0.15%) > cycles in affected programs: 4412402 -> 4306114 (-2.41%) > helped: 4457 > HURT: 213 > > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 7 --- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp > b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp > index 60f7fd9..4f97577 100644 > --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp > +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp > @@ -939,8 +939,9 @@ fs_instruction_scheduler::calculate_deps() > foreach_in_list(schedule_node, n, ) { >fs_inst *inst = (fs_inst *)n->inst; > > - if (inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || > - inst->has_side_effects()) > + if ((inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || > + inst->has_side_effects()) && > + inst->opcode != FS_OPCODE_FB_WRITE) > add_barrier_deps(n); > >/* read-after-write deps. */ > @@ -1195,7 +1196,7 @@ vec4_instruction_scheduler::calculate_deps() > foreach_in_list(schedule_node, n, ) { >vec4_instruction *inst = (vec4_instruction *)n->inst; > > - if (inst->has_side_effects()) > + if (inst->has_side_effects() && inst->opcode != FS_OPCODE_FB_WRITE) > add_barrier_deps(n); > >/* read-after-write deps. */ > -- > 2.7.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Don't add barrier deps for FB write messages.
On Mon, Feb 8, 2016 at 11:31 AM, Kenneth Graunkewrote: > There are never render target reads, so there are no scheduling hazards. > > Giving the extra flexibility to the scheduler makes it possible to do > FB writes as soon as their sources are available, reducing register > pressure. It also makes it possible to do the payload setup for more > than one FB write message at a time, which could better hide latency. > > shader-db results on Skylake: > > total instructions in shared programs: 9110254 -> 9110211 (-0.00%) > instructions in affected programs: 2898 -> 2855 (-1.48%) > helped: 3 > HURT: 0 > LOST: 0 > GAINED: 1 > > A reduction in instruction counts is surprising, but legitimate: > the three shaders helped were spilling, and reducing register > pressure allowed us to issue fewer spills/fills. > > total cycles in shared programs: 69035108 -> 68928820 (-0.15%) > cycles in affected programs: 4412402 -> 4306114 (-2.41%) > helped: 4457 > HURT: 213 > Nice! Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev