From: XiaoYuan Zheng <xiaoyuan.zh...@amd.com> Flag tcCompatible has different usage in CI and VI. Add a new flag "nonSplit" for CI. --- src/amd/addrlib/addrinterface.h | 3 ++- src/amd/addrlib/r800/ciaddrlib.cpp | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index ead6033..98cd405 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -449,21 +449,22 @@ typedef union _ADDR_SURFACE_FLAGS UINT_32 qbStereo : 1; ///< Quad buffer stereo surface UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0) UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding UINT_32 degrade4Space : 1; ///< Degrade base level's tile mode to save memory UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce UINT_32 dccCompatible : 1; ///< VI: whether to support dcc fast clear UINT_32 czDispCompatible: 1; ///< SI+: CZ family (Carrizo) has a HW bug needs special alignment. ///< This flag indicates we need to follow the alignment with ///< CZ families or other ASICs under PX configuration + CZ. - UINT_32 reserved :10; ///< Reserved bits + UINT_32 nonSplit : 1; ///< CI: depth texture should not be split + UINT_32 reserved : 9; ///< Reserved bits }; UINT_32 value; } ADDR_SURFACE_FLAGS; /** *************************************************************************************************** * ADDR_COMPUTE_SURFACE_INFO_INPUT * * @brief diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 26c4e05..5f8a1fe 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -1003,21 +1003,21 @@ VOID CiAddrLib::HwlSetupTileInfo( { inTileType = ADDR_DEPTH_SAMPLE_ORDER; } } if (IsTileInfoAllZero(pTileInfo)) { // See table entries 0-4 if (flags.depth || flags.stencil) { - if (flags.depth && flags.tcCompatible) + if (flags.depth && (flags.nonSplit || flags.tcCompatible)) { // tileSize = bpp * numSamples * 8 * 8 / 8 UINT_32 tileSize = bpp * numSamples * 8; // Texure readable depth surface should not be split switch (tileSize) { case 128: index = 1; break; -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev