From: Dave Airlie <airl...@redhat.com>

This seems more correct to me, since if we have an array
of floats they'll be vec4 aligned, and if we do af[2],
we want the const index to increase by 2 slots in the non
compact case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Signed-off-by: Dave Airlie <airl...@redhat.com>
---
 src/amd/common/ac_nir_to_llvm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9b850698608..7f0d808b07e 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2835,7 +2835,7 @@ get_dw_address(struct radv_shader_context *ctx,
                                                    LLVMConstInt(ctx->ac.i32, 
4, false), ""), "");
        else if (const_index && !compact_const_index)
                dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
-                                      LLVMConstInt(ctx->ac.i32, const_index, 
false), "");
+                                      LLVMConstInt(ctx->ac.i32, const_index * 
4, false), "");
 
        dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
                               LLVMConstInt(ctx->ac.i32, param * 4, false), "");
-- 
2.14.3

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