From: Nicolai Hähnle <nicolai.haeh...@amd.com> Save compute shader state that will be used for the ARB_query_buffer_object implementation. --- src/gallium/drivers/radeon/r600_pipe_common.h | 3 +++ src/gallium/drivers/radeon/r600_query.h | 7 +++++++ src/gallium/drivers/radeonsi/si_state.c | 12 ++++++++++++ 3 files changed, 22 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 96b23b2..32acca5 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -113,20 +113,21 @@ enum r600_coherency { #ifdef PIPE_ARCH_BIG_ENDIAN #define R600_BIG_ENDIAN 1 #else #define R600_BIG_ENDIAN 0 #endif struct r600_common_context; struct r600_perfcounters; struct tgsi_shader_info; +struct r600_qbo_state; struct radeon_shader_reloc { char name[32]; uint64_t offset; }; struct radeon_shader_binary { /** Shader code */ unsigned char *code; unsigned code_size; @@ -643,20 +644,22 @@ struct r600_common_context { void (*decompress_dcc)(struct pipe_context *ctx, struct r600_texture *rtex); /* Reallocate the buffer and update all resource bindings where * the buffer is bound, including all resource descriptors. */ void (*invalidate_buffer)(struct pipe_context *ctx, struct pipe_resource *buf); /* Enable or disable occlusion queries. */ void (*set_occlusion_query_state)(struct pipe_context *ctx, bool enable); + void (*save_qbo_state)(struct pipe_context *ctx, struct r600_qbo_state *st); + /* This ensures there is enough space in the command stream. */ void (*need_gfx_cs_space)(struct pipe_context *ctx, unsigned num_dw, bool include_draw_vbo); void (*set_atom_dirty)(struct r600_common_context *ctx, struct r600_atom *atom, bool dirty); void (*check_vm_faults)(struct r600_common_context *ctx, struct radeon_saved_cs *saved, enum ring_type ring); diff --git a/src/gallium/drivers/radeon/r600_query.h b/src/gallium/drivers/radeon/r600_query.h index 0cd1a02..4f5aa3a 100644 --- a/src/gallium/drivers/radeon/r600_query.h +++ b/src/gallium/drivers/radeon/r600_query.h @@ -22,20 +22,21 @@ * * Authors: * Nicolai Hähnle <nicolai.haeh...@amd.com> * */ #ifndef R600_QUERY_H #define R600_QUERY_H #include "pipe/p_defines.h" +#include "pipe/p_state.h" #include "util/list.h" struct pipe_context; struct pipe_query; struct r600_common_context; struct r600_common_screen; struct r600_query; struct r600_query_hw; struct r600_resource; @@ -260,11 +261,17 @@ int r600_get_perfcounter_group_info(struct r600_common_screen *, bool r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks); void r600_perfcounters_add_block(struct r600_common_screen *, struct r600_perfcounters *, const char *name, unsigned flags, unsigned counters, unsigned selectors, unsigned instances, void *data); void r600_perfcounters_do_destroy(struct r600_perfcounters *); void r600_query_hw_reset_buffers(struct r600_common_context *rctx, struct r600_query_hw *query); +struct r600_qbo_state { + void *saved_compute; + struct pipe_constant_buffer saved_const0; + struct pipe_shader_buffer saved_ssbo[3]; +}; + #endif /* R600_QUERY_H */ diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 1703e42..443dc37 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -21,20 +21,21 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. * * Authors: * Christian König <christian.koe...@amd.com> */ #include "si_pipe.h" #include "si_shader.h" #include "sid.h" #include "radeon/r600_cs.h" +#include "radeon/r600_query.h" #include "util/u_dual_blend.h" #include "util/u_format.h" #include "util/u_format_s3tc.h" #include "util/u_memory.h" #include "util/u_pstipple.h" #include "util/u_resource.h" /* Initialize an external atom (owned by ../radeon). */ static void @@ -1067,20 +1068,30 @@ static void si_set_active_query_state(struct pipe_context *ctx, boolean enable) } } static void si_set_occlusion_query_state(struct pipe_context *ctx, bool enable) { struct si_context *sctx = (struct si_context*)ctx; si_mark_atom_dirty(sctx, &sctx->db_render_state); } +static void si_save_qbo_state(struct pipe_context *ctx, struct r600_qbo_state *st) +{ + struct si_context *sctx = (struct si_context*)ctx; + + st->saved_compute = sctx->cs_shader_state.program; + + si_get_pipe_constant_buffer(sctx, PIPE_SHADER_COMPUTE, 0, &st->saved_const0); + si_get_shader_buffers(sctx, PIPE_SHADER_COMPUTE, 0, 3, st->saved_ssbo); +} + static void si_emit_db_render_state(struct si_context *sctx, struct r600_atom *state) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; unsigned db_shader_control; radeon_set_context_reg_seq(cs, R_028000_DB_RENDER_CONTROL, 2); /* DB_RENDER_CONTROL */ if (sctx->dbcb_depth_copy_enabled || @@ -3491,20 +3502,21 @@ void si_init_state_functions(struct si_context *sctx) sctx->b.b.set_vertex_buffers = si_set_vertex_buffers; sctx->b.b.set_index_buffer = si_set_index_buffer; sctx->b.b.texture_barrier = si_texture_barrier; sctx->b.b.memory_barrier = si_memory_barrier; sctx->b.b.set_min_samples = si_set_min_samples; sctx->b.b.set_tess_state = si_set_tess_state; sctx->b.b.set_active_query_state = si_set_active_query_state; sctx->b.set_occlusion_query_state = si_set_occlusion_query_state; + sctx->b.save_qbo_state = si_save_qbo_state; sctx->b.need_gfx_cs_space = si_need_gfx_cs_space; sctx->b.b.draw_vbo = si_draw_vbo; si_init_config(sctx); } static uint32_t si_get_bo_metadata_word1(struct r600_common_screen *rscreen) { return (ATI_VENDOR_ID << 16) | rscreen->info.pci_id; -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev