Re: [Mesa-dev] [PATCH 5/7] i965: Move pipelined register access to its own file

2016-12-09 Thread Emil Velikov 
On 9 December 2016 at 10:54, Chris Wilson  wrote:

> --- /dev/null
> +++ b/src/mesa/drivers/dri/i965/brw_pipelined_register.h

> +#ifndef BRW_PIPELINED_REGISTER_H
> +#define BRW_PIPELINED_REGISTER_H
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +void brw_load_register_mem32(struct brw_context *brw,
> + uint32_t reg,
> + drm_intel_bo *bo,
> + uint32_t offset);
> +void brw_load_register_mem64(struct brw_context *brw,
> + uint32_t reg,
> + drm_intel_bo *bo,
> + uint32_t offset);
> +
Please add a couple of forward declarations/includes to resolve the
above types. It will save you/others a bit of "wtf" moments as one
reorders the header inclusions at a later stage.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 5/7] i965: Move pipelined register access to its own file

2016-12-09 Thread Lionel Landwerlin 

Reviewed-by: Lionel Landwerlin 

On 09/12/16 10:54, Chris Wilson wrote:

My ulterior motive is to kill intel_batchbuffer.[ch] and moving
discrete pieces of functionality into their own files is a small step
towards that goal.

Signed-off-by: Chris Wilson 
---
  src/mesa/drivers/dri/i965/Makefile.sources |   2 +
  src/mesa/drivers/dri/i965/brw_compute.c|   1 +
  src/mesa/drivers/dri/i965/brw_conditional_render.c |   2 +
  src/mesa/drivers/dri/i965/brw_context.h|  26 ---
  src/mesa/drivers/dri/i965/brw_draw.c   |   1 +
  .../drivers/dri/i965/brw_performance_monitor.c |   2 +
  src/mesa/drivers/dri/i965/brw_pipelined_register.c | 252 +
  src/mesa/drivers/dri/i965/brw_pipelined_register.h |  76 +++
  src/mesa/drivers/dri/i965/brw_state_upload.c   |   1 +
  src/mesa/drivers/dri/i965/gen6_queryobj.c  |   1 +
  src/mesa/drivers/dri/i965/gen7_l3_state.c  |   2 +
  src/mesa/drivers/dri/i965/gen7_sol_state.c |   2 +
  src/mesa/drivers/dri/i965/gen8_depth_state.c   |   1 +
  src/mesa/drivers/dri/i965/hsw_queryobj.c   |   2 +
  src/mesa/drivers/dri/i965/hsw_sol.c|   2 +
  src/mesa/drivers/dri/i965/intel_batchbuffer.c  | 224 --
  16 files changed, 347 insertions(+), 250 deletions(-)
  create mode 100644 src/mesa/drivers/dri/i965/brw_pipelined_register.c
  create mode 100644 src/mesa/drivers/dri/i965/brw_pipelined_register.h

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index 1c33ea55fa..49044db169 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -137,6 +137,8 @@ i965_FILES = \
brw_object_purgeable.c \
brw_performance_monitor.c \
brw_pipe_control.c \
+   brw_pipelined_register.c \
+   brw_pipelined_register.h \
brw_program.c \
brw_program.h \
brw_program_cache.c \
diff --git a/src/mesa/drivers/dri/i965/brw_compute.c 
b/src/mesa/drivers/dri/i965/brw_compute.c
index 51cd45df7a..d63ebbe588 100644
--- a/src/mesa/drivers/dri/i965/brw_compute.c
+++ b/src/mesa/drivers/dri/i965/brw_compute.c
@@ -28,6 +28,7 @@
  #include "main/state.h"
  #include "brw_context.h"
  #include "brw_draw.h"
+#include "brw_pipelined_register.h"
  #include "brw_state.h"
  #include "intel_batchbuffer.h"
  #include "intel_buffer_objects.h"
diff --git a/src/mesa/drivers/dri/i965/brw_conditional_render.c 
b/src/mesa/drivers/dri/i965/brw_conditional_render.c
index 8574fc1aeb..6ad218be55 100644
--- a/src/mesa/drivers/dri/i965/brw_conditional_render.c
+++ b/src/mesa/drivers/dri/i965/brw_conditional_render.c
@@ -35,6 +35,8 @@
  
  #include "brw_context.h"

  #include "brw_defines.h"
+#include "brw_pipelined_register.h"
+
  #include "intel_batchbuffer.h"
  
  static void

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 77a5f8b879..428f5773c1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1362,32 +1362,6 @@ void hsw_init_queryobj_functions(struct 
dd_function_table *functions);
  void brw_init_conditional_render_functions(struct dd_function_table 
*functions);
  bool brw_check_conditional_render(struct brw_context *brw);
  
-/** intel_batchbuffer.c */

-void brw_load_register_mem32(struct brw_context *brw,
- uint32_t reg,
- drm_intel_bo *bo,
- uint32_t offset);
-void brw_load_register_mem64(struct brw_context *brw,
- uint32_t reg,
- drm_intel_bo *bo,
- uint32_t offset);
-void brw_store_register_mem32(struct brw_context *brw,
-  drm_intel_bo *bo, uint32_t reg, uint32_t offset);
-void brw_store_register_mem64(struct brw_context *brw,
-  drm_intel_bo *bo, uint32_t reg, uint32_t offset);
-void brw_load_register_imm32(struct brw_context *brw,
- uint32_t reg, uint32_t imm);
-void brw_load_register_imm64(struct brw_context *brw,
- uint32_t reg, uint64_t imm);
-void brw_load_register_reg(struct brw_context *brw, uint32_t src,
-   uint32_t dest);
-void brw_load_register_reg64(struct brw_context *brw, uint32_t src,
- uint32_t dest);
-void brw_store_data_imm32(struct brw_context *brw, drm_intel_bo *bo,
-  uint32_t offset, uint32_t imm);
-void brw_store_data_imm64(struct brw_context *brw, drm_intel_bo *bo,
-  uint32_t offset, uint64_t imm);
-
  /*==
   * brw_state_dump.c
   */
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c

[Mesa-dev] [PATCH 5/7] i965: Move pipelined register access to its own file

2016-12-09 Thread Chris Wilson 
My ulterior motive is to kill intel_batchbuffer.[ch] and moving
discrete pieces of functionality into their own files is a small step
towards that goal.

Signed-off-by: Chris Wilson 
---
 src/mesa/drivers/dri/i965/Makefile.sources |   2 +
 src/mesa/drivers/dri/i965/brw_compute.c|   1 +
 src/mesa/drivers/dri/i965/brw_conditional_render.c |   2 +
 src/mesa/drivers/dri/i965/brw_context.h|  26 ---
 src/mesa/drivers/dri/i965/brw_draw.c   |   1 +
 .../drivers/dri/i965/brw_performance_monitor.c |   2 +
 src/mesa/drivers/dri/i965/brw_pipelined_register.c | 252 +
 src/mesa/drivers/dri/i965/brw_pipelined_register.h |  76 +++
 src/mesa/drivers/dri/i965/brw_state_upload.c   |   1 +
 src/mesa/drivers/dri/i965/gen6_queryobj.c  |   1 +
 src/mesa/drivers/dri/i965/gen7_l3_state.c  |   2 +
 src/mesa/drivers/dri/i965/gen7_sol_state.c |   2 +
 src/mesa/drivers/dri/i965/gen8_depth_state.c   |   1 +
 src/mesa/drivers/dri/i965/hsw_queryobj.c   |   2 +
 src/mesa/drivers/dri/i965/hsw_sol.c|   2 +
 src/mesa/drivers/dri/i965/intel_batchbuffer.c  | 224 --
 16 files changed, 347 insertions(+), 250 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_pipelined_register.c
 create mode 100644 src/mesa/drivers/dri/i965/brw_pipelined_register.h

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index 1c33ea55fa..49044db169 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -137,6 +137,8 @@ i965_FILES = \
brw_object_purgeable.c \
brw_performance_monitor.c \
brw_pipe_control.c \
+   brw_pipelined_register.c \
+   brw_pipelined_register.h \
brw_program.c \
brw_program.h \
brw_program_cache.c \
diff --git a/src/mesa/drivers/dri/i965/brw_compute.c 
b/src/mesa/drivers/dri/i965/brw_compute.c
index 51cd45df7a..d63ebbe588 100644
--- a/src/mesa/drivers/dri/i965/brw_compute.c
+++ b/src/mesa/drivers/dri/i965/brw_compute.c
@@ -28,6 +28,7 @@
 #include "main/state.h"
 #include "brw_context.h"
 #include "brw_draw.h"
+#include "brw_pipelined_register.h"
 #include "brw_state.h"
 #include "intel_batchbuffer.h"
 #include "intel_buffer_objects.h"
diff --git a/src/mesa/drivers/dri/i965/brw_conditional_render.c 
b/src/mesa/drivers/dri/i965/brw_conditional_render.c
index 8574fc1aeb..6ad218be55 100644
--- a/src/mesa/drivers/dri/i965/brw_conditional_render.c
+++ b/src/mesa/drivers/dri/i965/brw_conditional_render.c
@@ -35,6 +35,8 @@
 
 #include "brw_context.h"
 #include "brw_defines.h"
+#include "brw_pipelined_register.h"
+
 #include "intel_batchbuffer.h"
 
 static void
diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 77a5f8b879..428f5773c1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1362,32 +1362,6 @@ void hsw_init_queryobj_functions(struct 
dd_function_table *functions);
 void brw_init_conditional_render_functions(struct dd_function_table 
*functions);
 bool brw_check_conditional_render(struct brw_context *brw);
 
-/** intel_batchbuffer.c */
-void brw_load_register_mem32(struct brw_context *brw,
- uint32_t reg,
- drm_intel_bo *bo,
- uint32_t offset);
-void brw_load_register_mem64(struct brw_context *brw,
- uint32_t reg,
- drm_intel_bo *bo,
- uint32_t offset);
-void brw_store_register_mem32(struct brw_context *brw,
-  drm_intel_bo *bo, uint32_t reg, uint32_t offset);
-void brw_store_register_mem64(struct brw_context *brw,
-  drm_intel_bo *bo, uint32_t reg, uint32_t offset);
-void brw_load_register_imm32(struct brw_context *brw,
- uint32_t reg, uint32_t imm);
-void brw_load_register_imm64(struct brw_context *brw,
- uint32_t reg, uint64_t imm);
-void brw_load_register_reg(struct brw_context *brw, uint32_t src,
-   uint32_t dest);
-void brw_load_register_reg64(struct brw_context *brw, uint32_t src,
- uint32_t dest);
-void brw_store_data_imm32(struct brw_context *brw, drm_intel_bo *bo,
-  uint32_t offset, uint32_t imm);
-void brw_store_data_imm64(struct brw_context *brw, drm_intel_bo *bo,
-  uint32_t offset, uint64_t imm);
-
 /*==
  * brw_state_dump.c
  */
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c 
b/src/mesa/drivers/dri/i965/brw_draw.c
index b78e73516e..44d5dac1fc 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -44,6