-
From: Palli, Tapani
Sent: Wednesday, February 14, 2018 9:58 AM
To: Rogovin, Kevin <kevin.rogo...@intel.com>; Jason Ekstrand
<ja...@jlekstrand.net>
Cc: ML mesa-dev <mesa-dev@lists.freedesktop.org>
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
On 14.02.
d.net>
Cc: ML mesa-dev <mesa-dev@lists.freedesktop.org>
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
On 02/12/2018 09:44 AM, Tapani Pälli wrote:
Hi;
On 02/08/2018 09:50 AM, Rogovin, Kevin wrote:
Hi,
I gave it a whirl of setting the .mocs field set to 0 passed
Kevin
-Original Message-
From: Palli, Tapani
Sent: Monday, February 12, 2018 10:14 AM
To: Rogovin, Kevin <kevin.rogo...@intel.com>; Jason Ekstrand
<ja...@jlekstrand.net>
Cc: ML mesa-dev <mesa-dev@lists.freedesktop.org>
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5
w if this looks OK for you.
>
>> -Kevin
>>
>> *From:*Jason Ekstrand [mailto:ja...@jlekstrand.net]
>> *Sent:* Thursday, February 8, 2018 2:47 AM
>> *To:* Rogovin, Kevin <kevin.rogo...@intel.com>
>> *Cc:* ML mesa-dev <mesa-dev@lists.freedesktop.org>
>
c:* ML mesa-dev <mesa-dev@lists.freedesktop.org>
*Subject:* Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
Random thought:
Nanley and I were talking about this just now and I was complaining
about how much I hate the fact that this workaround exists because we
can't implement
AM
*To:* Rogovin, Kevin <kevin.rogo...@intel.com>
*Cc:* ML mesa-dev <mesa-dev@lists.freedesktop.org>
*Subject:* Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
Random thought:
Nanley and I were talking about this just now and I was complaining
about how much I h
.
-Kevin
From: Jason Ekstrand [mailto:ja...@jlekstrand.net]
Sent: Thursday, February 8, 2018 2:47 AM
To: Rogovin, Kevin <kevin.rogo...@intel.com>
Cc: ML mesa-dev <mesa-dev@lists.freedesktop.org>
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
Random thought:
Nanle
Random thought:
Nanley and I were talking about this just now and I was complaining about
how much I hate the fact that this workaround exists because we can't
implement it in Vulkan. Then I got an idea. What would happen if we just
set MOCS to zero (uncached) for ASTC 5x5 textures? Does that
;
> -Kevin
>
Hi,
Thanks for giving it a try.
Regards,
Nanley
> -Original Message-
> From: Nanley Chery [mailto:nanleych...@gmail.com]
> Sent: Friday, December 15, 2017 8:34 PM
> To: Rogovin, Kevin <kevin.rogo...@intel.com>
> Cc: mesa-dev@lists.freedesktop.org
: Friday, December 15, 2017 8:34 PM
To: Rogovin, Kevin <kevin.rogo...@intel.com>
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
On Thu, Dec 14, 2017 at 07:39:46PM +0200, kevin.rogo...@intel.com wrote:
> From: Kevin Rogovin <kevin.rogo.
On Thu, Dec 14, 2017 at 07:39:46PM +0200, kevin.rogo...@intel.com wrote:
> From: Kevin Rogovin
>
> This patch series implements a needed workaround for Gen9 for ASTC5x5
> sampler reads. The crux of the work around is to make sure that the
> sampler does not read an
From: Kevin Rogovin
This patch series implements a needed workaround for Gen9 for ASTC5x5
sampler reads. The crux of the work around is to make sure that the
sampler does not read an ASTC5x5 texture and a surface with an auxilary
buffer without having a texture cache
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