Re: [Mesa-dev] [RFC PATCH v2 1/6] nv50/ir: add nv50_ir_prog_info_out
On Fri, Mar 20, 2020 at 10:20 AM Juan A. Suarez Romero
wrote:
>
> On Thu, 2020-03-19 at 21:57 +0100, Mark Menzynski wrote:
> > From: Karol Herbst
> >
> > Split out the output relevant fields from the nv50_ir_prog_info struct
> > in order to have a cleaner separation between the input and output of
> > the compilation.
> >
>
>
> Please, submit the series through GitLab (
> https://www.mesa3d.org/submittingpatches.html#submit)
>
> Thanks!
>
> J.A.
>
it's fine for nouveau patches, but yeah, I know it makes sense to do
that on gitlab, but if not everybody feels fine in a community doing
stuff on gitlab, I also don't want to enforce that, and that's the
case for nouveau right now.
>
> > gned-off-by: Karol Herbst
> > ---
> > .../drivers/nouveau/codegen/nv50_ir.cpp | 49 ++--
> > src/gallium/drivers/nouveau/codegen/nv50_ir.h | 9 +-
> > .../drivers/nouveau/codegen/nv50_ir_driver.h | 117 +---
> > .../nouveau/codegen/nv50_ir_from_common.cpp | 14 +-
> > .../nouveau/codegen/nv50_ir_from_common.h | 3 +-
> > .../nouveau/codegen/nv50_ir_from_nir.cpp | 204 +++---
> > .../nouveau/codegen/nv50_ir_from_tgsi.cpp | 256 +-
> > .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 6 +-
> > .../nouveau/codegen/nv50_ir_target.cpp| 2 +-
> > .../drivers/nouveau/codegen/nv50_ir_target.h | 5 +-
> > .../nouveau/codegen/nv50_ir_target_nv50.cpp | 17 +-
> > .../nouveau/codegen/nv50_ir_target_nv50.h | 3 +-
> > .../drivers/nouveau/nouveau_compiler.c| 9 +-
> > .../drivers/nouveau/nv50/nv50_program.c | 62 +++--
> > .../drivers/nouveau/nvc0/nvc0_program.c | 87 +++---
> > 15 files changed, 449 insertions(+), 394 deletions(-)
> >
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> > index c65853578f6..c2c5956874a 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> > @@ -1241,15 +1241,18 @@ void Program::releaseValue(Value *value)
> > extern "C" {
> >
> > static void
> > -nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
> > +nv50_ir_init_prog_info(struct nv50_ir_prog_info *info,
> > + struct nv50_ir_prog_info_out *info_out)
> > {
> > + info_out->target = info->target;
> > + info_out->type = info->type;
> > if (info->type == PIPE_SHADER_TESS_CTRL || info->type ==
> > PIPE_SHADER_TESS_EVAL) {
> > - info->prop.tp.domain = PIPE_PRIM_MAX;
> > - info->prop.tp.outputPrim = PIPE_PRIM_MAX;
> > + info_out->prop.tp.domain = PIPE_PRIM_MAX;
> > + info_out->prop.tp.outputPrim = PIPE_PRIM_MAX;
> > }
> > if (info->type == PIPE_SHADER_GEOMETRY) {
> > - info->prop.gp.instanceCount = 1;
> > - info->prop.gp.maxVertices = 1;
> > + info_out->prop.gp.instanceCount = 1;
> > + info_out->prop.gp.maxVertices = 1;
> > }
> > if (info->type == PIPE_SHADER_COMPUTE) {
> >info->prop.cp.numThreads[0] =
> > @@ -1257,23 +1260,26 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info
> > *info)
> >info->prop.cp.numThreads[2] = 1;
> > }
> > info->io.pointSize = 0xff;
> > - info->io.instanceId = 0xff;
> > - info->io.vertexId = 0xff;
> > - info->io.edgeFlagIn = 0xff;
> > - info->io.edgeFlagOut = 0xff;
> > - info->io.fragDepth = 0xff;
> > - info->io.sampleMask = 0xff;
> > + info_out->bin.smemSize = info->bin.smemSize;
> > + info_out->io.genUserClip = info->io.genUserClip;
> > + info_out->io.instanceId = 0xff;
> > + info_out->io.vertexId = 0xff;
> > + info_out->io.edgeFlagIn = 0xff;
> > + info_out->io.edgeFlagOut = 0xff;
> > + info_out->io.fragDepth = 0xff;
> > + info_out->io.sampleMask = 0xff;
> > info->io.backFaceColor[0] = info->io.backFaceColor[1] = 0xff;
> > }
> >
> > int
> > -nv50_ir_generate_code(struct nv50_ir_prog_info *info)
> > +nv50_ir_generate_code(struct nv50_ir_prog_info *info,
> > + struct nv50_ir_prog_info_out *info_out)
> > {
> > int ret = 0;
> >
> > nv50_ir::Program::Type type;
> >
> > - nv50_ir_init_prog_info(info);
> > + nv50_ir_init_prog_info(info, info_out);
> >
> > #define PROG_TYPE_CASE(a, b) \
> > case PIPE_SHADER_##a: type = nv50_ir::Program::TYPE_##b; break
> > @@ -1301,15 +1307,16 @@ nv50_ir_generate_code(struct nv50_ir_prog_info
> > *info)
> >return -1;
> > }
> > prog->driver = info;
> > + prog->driver_out = info_out;
> > prog->dbgFlags = info->dbgFlags;
> > prog->optLevel = info->optLevel;
> >
> > switch (info->bin.sourceRep) {
> > case PIPE_SHADER_IR_NIR:
> > - ret = prog->makeFromNIR(info) ? 0 : -2;
> > + ret = prog->makeFromNIR(info, info_out) ? 0 : -2;
> >break;
> > case PIPE_SHADER_IR_TGSI:
> > - ret = prog->makeFromTGSI(info) ? 0 : -2;
> > + ret = prog->makeFromTGSI(info, info_out) ? 0 : -2;
> >
Re: [Mesa-dev] [RFC PATCH v2 1/6] nv50/ir: add nv50_ir_prog_info_out
On Thu, 2020-03-19 at 21:57 +0100, Mark Menzynski wrote:
> From: Karol Herbst
>
> Split out the output relevant fields from the nv50_ir_prog_info struct
> in order to have a cleaner separation between the input and output of
> the compilation.
>
Please, submit the series through GitLab (
https://www.mesa3d.org/submittingpatches.html#submit)
Thanks!
J.A.
> gned-off-by: Karol Herbst
> ---
> .../drivers/nouveau/codegen/nv50_ir.cpp | 49 ++--
> src/gallium/drivers/nouveau/codegen/nv50_ir.h | 9 +-
> .../drivers/nouveau/codegen/nv50_ir_driver.h | 117 +---
> .../nouveau/codegen/nv50_ir_from_common.cpp | 14 +-
> .../nouveau/codegen/nv50_ir_from_common.h | 3 +-
> .../nouveau/codegen/nv50_ir_from_nir.cpp | 204 +++---
> .../nouveau/codegen/nv50_ir_from_tgsi.cpp | 256 +-
> .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 6 +-
> .../nouveau/codegen/nv50_ir_target.cpp| 2 +-
> .../drivers/nouveau/codegen/nv50_ir_target.h | 5 +-
> .../nouveau/codegen/nv50_ir_target_nv50.cpp | 17 +-
> .../nouveau/codegen/nv50_ir_target_nv50.h | 3 +-
> .../drivers/nouveau/nouveau_compiler.c| 9 +-
> .../drivers/nouveau/nv50/nv50_program.c | 62 +++--
> .../drivers/nouveau/nvc0/nvc0_program.c | 87 +++---
> 15 files changed, 449 insertions(+), 394 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> index c65853578f6..c2c5956874a 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> @@ -1241,15 +1241,18 @@ void Program::releaseValue(Value *value)
> extern "C" {
>
> static void
> -nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
> +nv50_ir_init_prog_info(struct nv50_ir_prog_info *info,
> + struct nv50_ir_prog_info_out *info_out)
> {
> + info_out->target = info->target;
> + info_out->type = info->type;
> if (info->type == PIPE_SHADER_TESS_CTRL || info->type ==
> PIPE_SHADER_TESS_EVAL) {
> - info->prop.tp.domain = PIPE_PRIM_MAX;
> - info->prop.tp.outputPrim = PIPE_PRIM_MAX;
> + info_out->prop.tp.domain = PIPE_PRIM_MAX;
> + info_out->prop.tp.outputPrim = PIPE_PRIM_MAX;
> }
> if (info->type == PIPE_SHADER_GEOMETRY) {
> - info->prop.gp.instanceCount = 1;
> - info->prop.gp.maxVertices = 1;
> + info_out->prop.gp.instanceCount = 1;
> + info_out->prop.gp.maxVertices = 1;
> }
> if (info->type == PIPE_SHADER_COMPUTE) {
>info->prop.cp.numThreads[0] =
> @@ -1257,23 +1260,26 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
>info->prop.cp.numThreads[2] = 1;
> }
> info->io.pointSize = 0xff;
> - info->io.instanceId = 0xff;
> - info->io.vertexId = 0xff;
> - info->io.edgeFlagIn = 0xff;
> - info->io.edgeFlagOut = 0xff;
> - info->io.fragDepth = 0xff;
> - info->io.sampleMask = 0xff;
> + info_out->bin.smemSize = info->bin.smemSize;
> + info_out->io.genUserClip = info->io.genUserClip;
> + info_out->io.instanceId = 0xff;
> + info_out->io.vertexId = 0xff;
> + info_out->io.edgeFlagIn = 0xff;
> + info_out->io.edgeFlagOut = 0xff;
> + info_out->io.fragDepth = 0xff;
> + info_out->io.sampleMask = 0xff;
> info->io.backFaceColor[0] = info->io.backFaceColor[1] = 0xff;
> }
>
> int
> -nv50_ir_generate_code(struct nv50_ir_prog_info *info)
> +nv50_ir_generate_code(struct nv50_ir_prog_info *info,
> + struct nv50_ir_prog_info_out *info_out)
> {
> int ret = 0;
>
> nv50_ir::Program::Type type;
>
> - nv50_ir_init_prog_info(info);
> + nv50_ir_init_prog_info(info, info_out);
>
> #define PROG_TYPE_CASE(a, b) \
> case PIPE_SHADER_##a: type = nv50_ir::Program::TYPE_##b; break
> @@ -1301,15 +1307,16 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
>return -1;
> }
> prog->driver = info;
> + prog->driver_out = info_out;
> prog->dbgFlags = info->dbgFlags;
> prog->optLevel = info->optLevel;
>
> switch (info->bin.sourceRep) {
> case PIPE_SHADER_IR_NIR:
> - ret = prog->makeFromNIR(info) ? 0 : -2;
> + ret = prog->makeFromNIR(info, info_out) ? 0 : -2;
>break;
> case PIPE_SHADER_IR_TGSI:
> - ret = prog->makeFromTGSI(info) ? 0 : -2;
> + ret = prog->makeFromTGSI(info, info_out) ? 0 : -2;
>break;
> default:
>ret = -1;
> @@ -1320,7 +1327,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
> if (prog->dbgFlags & NV50_IR_DEBUG_VERBOSE)
>prog->print();
>
> - targ->parseDriverInfo(info);
> + targ->parseDriverInfo(info, info_out);
> prog->getTarget()->runLegalizePass(prog, nv50_ir::CG_STAGE_PRE_SSA);
>
> prog->convertToSSA();
> @@ -1342,7 +1349,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
>
> prog->optimizePostRA(info->optLevel);
>
> -
[Mesa-dev] [RFC PATCH v2 1/6] nv50/ir: add nv50_ir_prog_info_out
From: Karol Herbst
Split out the output relevant fields from the nv50_ir_prog_info struct
in order to have a cleaner separation between the input and output of
the compilation.
Signed-off-by: Karol Herbst
---
.../drivers/nouveau/codegen/nv50_ir.cpp | 49 ++--
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 9 +-
.../drivers/nouveau/codegen/nv50_ir_driver.h | 117 +---
.../nouveau/codegen/nv50_ir_from_common.cpp | 14 +-
.../nouveau/codegen/nv50_ir_from_common.h | 3 +-
.../nouveau/codegen/nv50_ir_from_nir.cpp | 204 +++---
.../nouveau/codegen/nv50_ir_from_tgsi.cpp | 256 +-
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 6 +-
.../nouveau/codegen/nv50_ir_target.cpp| 2 +-
.../drivers/nouveau/codegen/nv50_ir_target.h | 5 +-
.../nouveau/codegen/nv50_ir_target_nv50.cpp | 17 +-
.../nouveau/codegen/nv50_ir_target_nv50.h | 3 +-
.../drivers/nouveau/nouveau_compiler.c| 9 +-
.../drivers/nouveau/nv50/nv50_program.c | 62 +++--
.../drivers/nouveau/nvc0/nvc0_program.c | 87 +++---
15 files changed, 449 insertions(+), 394 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index c65853578f6..c2c5956874a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1241,15 +1241,18 @@ void Program::releaseValue(Value *value)
extern "C" {
static void
-nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
+nv50_ir_init_prog_info(struct nv50_ir_prog_info *info,
+ struct nv50_ir_prog_info_out *info_out)
{
+ info_out->target = info->target;
+ info_out->type = info->type;
if (info->type == PIPE_SHADER_TESS_CTRL || info->type ==
PIPE_SHADER_TESS_EVAL) {
- info->prop.tp.domain = PIPE_PRIM_MAX;
- info->prop.tp.outputPrim = PIPE_PRIM_MAX;
+ info_out->prop.tp.domain = PIPE_PRIM_MAX;
+ info_out->prop.tp.outputPrim = PIPE_PRIM_MAX;
}
if (info->type == PIPE_SHADER_GEOMETRY) {
- info->prop.gp.instanceCount = 1;
- info->prop.gp.maxVertices = 1;
+ info_out->prop.gp.instanceCount = 1;
+ info_out->prop.gp.maxVertices = 1;
}
if (info->type == PIPE_SHADER_COMPUTE) {
info->prop.cp.numThreads[0] =
@@ -1257,23 +1260,26 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
info->prop.cp.numThreads[2] = 1;
}
info->io.pointSize = 0xff;
- info->io.instanceId = 0xff;
- info->io.vertexId = 0xff;
- info->io.edgeFlagIn = 0xff;
- info->io.edgeFlagOut = 0xff;
- info->io.fragDepth = 0xff;
- info->io.sampleMask = 0xff;
+ info_out->bin.smemSize = info->bin.smemSize;
+ info_out->io.genUserClip = info->io.genUserClip;
+ info_out->io.instanceId = 0xff;
+ info_out->io.vertexId = 0xff;
+ info_out->io.edgeFlagIn = 0xff;
+ info_out->io.edgeFlagOut = 0xff;
+ info_out->io.fragDepth = 0xff;
+ info_out->io.sampleMask = 0xff;
info->io.backFaceColor[0] = info->io.backFaceColor[1] = 0xff;
}
int
-nv50_ir_generate_code(struct nv50_ir_prog_info *info)
+nv50_ir_generate_code(struct nv50_ir_prog_info *info,
+ struct nv50_ir_prog_info_out *info_out)
{
int ret = 0;
nv50_ir::Program::Type type;
- nv50_ir_init_prog_info(info);
+ nv50_ir_init_prog_info(info, info_out);
#define PROG_TYPE_CASE(a, b) \
case PIPE_SHADER_##a: type = nv50_ir::Program::TYPE_##b; break
@@ -1301,15 +1307,16 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
return -1;
}
prog->driver = info;
+ prog->driver_out = info_out;
prog->dbgFlags = info->dbgFlags;
prog->optLevel = info->optLevel;
switch (info->bin.sourceRep) {
case PIPE_SHADER_IR_NIR:
- ret = prog->makeFromNIR(info) ? 0 : -2;
+ ret = prog->makeFromNIR(info, info_out) ? 0 : -2;
break;
case PIPE_SHADER_IR_TGSI:
- ret = prog->makeFromTGSI(info) ? 0 : -2;
+ ret = prog->makeFromTGSI(info, info_out) ? 0 : -2;
break;
default:
ret = -1;
@@ -1320,7 +1327,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
if (prog->dbgFlags & NV50_IR_DEBUG_VERBOSE)
prog->print();
- targ->parseDriverInfo(info);
+ targ->parseDriverInfo(info, info_out);
prog->getTarget()->runLegalizePass(prog, nv50_ir::CG_STAGE_PRE_SSA);
prog->convertToSSA();
@@ -1342,7 +1349,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
prog->optimizePostRA(info->optLevel);
- if (!prog->emitBinary(info)) {
+ if (!prog->emitBinary(info_out)) {
ret = -5;
goto out;
}
@@ -1350,10 +1357,10 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
out:
INFO_DBG(prog->dbgFlags, VERBOSE, "nv50_ir_generate_code: ret = %i\n", ret);
- info->bin.maxGPR = prog->maxGPR;
- info->bin.code = prog->code;
- info->bin.codeSize = prog->binSize;
- info->bin.tlsSpace =
