[Mesa-dev] EGL_EXT_*_drm - primary vs render node (Was Re: [Piglit] [PATCH 1/2] egl: Add sanity test for EGL_EXT_device_query (v3))

Hi Mathias, On 6 September 2016 at 18:32, Mathias Fröhlich wrote: >> ** EGL_EXT_output_drm Correction - the above should read: EGL_EXT_{device,output}_drm >> *** Using/exposing the card or render node >> - Extension is designed with EGL streams in mind (using the

[Mesa-dev] [PATCH 1/4] radeonsi: clamp integer clear color values for DCC fast clear

From: Marek Olšák It should be possible to get TC-compatible fast clear more often now. --- src/gallium/drivers/radeon/r600_texture.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

[Mesa-dev] [PATCH 4/4] radeonsi: unify si_set_optimal_micro_tile_mode call sites

From: Marek Olšák There is nothing special happening in those code blocks. --- src/gallium/drivers/radeon/r600_texture.c | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

Re: [Mesa-dev] [PATCH 2/4] radeonsi: enable DCC fast clear for 128-bit formats

On Wed, Sep 7, 2016 at 1:46 PM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/drivers/radeon/r600_texture.c | 45 > ++- > 1 file changed, 32 insertions(+), 13 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH] gallium: fix clang warnings

On Wed, 2016-09-07 at 10:12 +0200, Nicolai Hähnle wrote: > On 07.09.2016 09:38, Michel Dänzer wrote: > > > > On 07/09/16 12:29 AM, Nicolai Hähnle wrote: > > > > > > On 06.09.2016 16:37, Martina Kollarova wrote: > > > > > > > > 1. Variable 'hole' is uninitialized when used here [- > > > >

Re: [Mesa-dev] [PATCH] android: fix a build issue with libmesa_st_mesa_32

2016-09-07 12:56 GMT+02:00 Emil Velikov : > On 7 September 2016 at 11:01, Mauro Rossi wrote: > > Hi Tapani, > > > > does moving the declaration of the dependency to > > src/mesa/drivers/dri/i965/Android.mk also work? > > Mauro > > > >

[Mesa-dev] [Bug 97549] [SNB, BXT] up to 40% perf drop from "loader/dri3: Overhaul dri3_update_num_back" commit

https://bugs.freedesktop.org/show_bug.cgi?id=97549 Eero Tamminen changed: What|Removed |Added Status|RESOLVED|VERIFIED ---

Re: [Mesa-dev] [PATCH] android: fix a build issue with libmesa_st_mesa_32

On 7 September 2016 at 13:10, Mauro Rossi wrote: > 2016-09-07 12:56 GMT+02:00 Emil Velikov : >> >> On 7 September 2016 at 11:01, Mauro Rossi wrote: >> > Hi Tapani, >> > >> > does moving the declaration of the dependency to

Re: [Mesa-dev] [PATCH 3/4] radeonsi: add more unlikely() uses into si_draw_vbo

On Wed, Sep 7, 2016 at 2:23 AM, Michel Dänzer wrote: > On 06/09/16 08:33 PM, Marek Olšák wrote: >> On Sep 6, 2016 12:03 PM, "Michel Dänzer" > > wrote: >>> On 06/09/16 06:04 PM, Marek Olšák wrote: >>> > On Tue, Sep 6, 2016 at 3:54

Re: [Mesa-dev] [PATCH] android: fix a build issue with libmesa_st_mesa_32

On 7 September 2016 at 11:01, Mauro Rossi wrote: > Hi Tapani, > > does moving the declaration of the dependency to > src/mesa/drivers/dri/i965/Android.mk also work? > Mauro > > LOCAL_WHOLE_STATIC_LIBRARIES := \ > $(MESA_DRI_WHOLE_STATIC_LIBRARIES) \ > + libmesa_genxml \ >

Re: [Mesa-dev] [PATCH 3/4] radeonsi: add more unlikely() uses into si_draw_vbo

On 07/09/16 06:02 PM, Marek Olšák wrote: > > Based on the comments so far, it looks like all annotations in the > patch are very well placed, so I don't know what the fuss is about. As I said, there's no question about the first three annotations, but for the last two we can't know whether they

Re: [Mesa-dev] [PATCH 3/4] radeonsi: add more unlikely() uses into si_draw_vbo

On Wed, Sep 7, 2016 at 11:47 AM, Michel Dänzer wrote: > On 07/09/16 06:02 PM, Marek Olšák wrote: >> >> Based on the comments so far, it looks like all annotations in the >> patch are very well placed, so I don't know what the fuss is about. > > As I said, there's no question

[Mesa-dev] [PATCH] android: depend on libmesa_genxml from i965 Android.gen.mk

Static library dependency is required to pull the generated XML headers into the generated C file. Signed-off-by: Tapani Pälli Reviewed-by: Emil Velikov --- src/mesa/drivers/dri/i965/Android.gen.mk | 2 ++ 1 file changed, 2 insertions(+)

[Mesa-dev] Exposing (or lack of) EGL device support on platforms lacking DRM devices (Was Re: [Piglit] [PATCH 1/2] egl: Add sanity test for EGL_EXT_device_query (v3))

On 6 September 2016 at 18:32, Mathias Fröhlich wrote: >> * Systems with fb only, disabled render nodes and/or alike. >> EGL implementations (in our case the libdrm API provides all the info >> about available DRM devices) can effectively detect the presence of >>

Re: [Mesa-dev] [PATCH 1/5] mesa: bump required GCC version to 4.8.0

LLVM was imported yes, but the integration of it has only started around the same time and it is not enabled by default yet. And it was only imported around two days or so ago. And LLVM does not support all the architectures OpenBSD builds Mesa on. Can you point to something specific that needs

[Mesa-dev] [PATCH v3] clover: Introduce CLOVER_EXTRA_COMPILER_OPTIONS

Options specified via the CLOVER_EXTRA_COMPILER_OPTIONS shell variable are appended to the compiler and linker options specified by the OpenCL program (if any). v2: * rename to CLOVER_EXTRA_COMPILER_OPTIONS * use debug_get_option * append to linker options as well v3: code cleanups

Re: [Mesa-dev] [PATCH] gallium: fix clang warnings

On 07.09.2016 09:38, Michel Dänzer wrote: On 07/09/16 12:29 AM, Nicolai Hähnle wrote: On 06.09.2016 16:37, Martina Kollarova wrote: 1. Variable 'hole' is uninitialized when used here [-Wuninitialized] 2. Comparison of constant -1 with expression of type 'unsigned int' is always false

[Mesa-dev] [Bug 91169] The Chronicles of Riddick: Assault on Dark Athena fails to start with nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=91169 Vladimir changed: What|Removed |Added CC||vovik-...@bk.ru -- You are

Re: [Mesa-dev] [PATCH] android: fix a build issue with libmesa_st_mesa_32

Hi Tapani, does moving the declaration of the dependency to src/mesa/drivers/dri/i965/Android.mk also work? Mauro LOCAL_WHOLE_STATIC_LIBRARIES := \ $(MESA_DRI_WHOLE_STATIC_LIBRARIES) \ + libmesa_genxml \ libmesa_isl ___ mesa-dev mailing list

[Mesa-dev] GLVND EGL EGL_EXT_device_base requirement (Was Re: [Piglit] [PATCH 1/2] egl: Add sanity test for EGL_EXT_device_query (v3))

[Trimming the EGL device spec authors] On 6 September 2016 at 17:16, Kyle Brenneman wrote: > > On 09/06/2016 05:29 AM, Emil Velikov wrote: >> >> * Interaction of ^^ with EGL device extension(s) - update existing >> extensions/introduce new ones >> ** Should

Re: [Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

On 07/09/16 04:19 AM, Christian König wrote: > Am 06.09.2016 um 21:05 schrieb Ilia Mirkin: >> On Tue, Sep 6, 2016 at 2:22 PM, Christian König >> wrote: >>> Am 06.09.2016 um 16:23 schrieb Ilia Mirkin: On Mon, Sep 5, 2016 at 2:48 AM, Michel Dänzer

[Mesa-dev] [Bug 97542] mesa-12.0.1 with llvm-3.9.0_rc3 - src/gallium/state_trackers/clover/llvm/invocation.cpp:212:75: error: no matching function for call to clang::CompilerInvocation::setLangDefault

https://bugs.freedesktop.org/show_bug.cgi?id=97542 Timo Aaltonen changed: What|Removed |Added Status|RESOLVED|REOPENED

[Mesa-dev] Advertising device extensions on implementation supporting both HW and SW devices (Was Re: [Piglit] [PATCH 1/2] egl: Add sanity test for EGL_EXT_device_query (v3))

On 6 September 2016 at 18:32, Mathias Fröhlich wrote: >> * Interaction of ^^ with EGL device extension(s) - update existing >> extensions/introduce new ones >> ** Should EGL_EXT_device_enumeration expose one/multiple SW devices >> - no: we need alternative glvnd EGL

Re: [Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

On Tue, Sep 6, 2016 at 9:19 PM, Christian König wrote: > Am 06.09.2016 um 21:05 schrieb Ilia Mirkin: >> >> On Tue, Sep 6, 2016 at 2:22 PM, Christian König >> wrote: >>> >>> Am 06.09.2016 um 16:23 schrieb Ilia Mirkin: On Mon, Sep 5, 2016

Re: [Mesa-dev] [PATCH] glsl: Add a citation for uniform precision matching.

On Wednesday, September 7, 2016 10:42:06 AM PDT Tapani Pälli wrote: > On 09/07/2016 09:56 AM, Ian Romanick wrote: > > On 09/06/2016 03:24 PM, Kenneth Graunke wrote: > >> On Tuesday, September 6, 2016 1:04:43 PM PDT Eric Anholt wrote: > >>> Kenneth Graunke writes: > >>> >

Re: [Mesa-dev] [PATCH] gallium: fix return value check

On Wed, Sep 7, 2016 at 10:34 AM, Martina Kollarova wrote: > A possible error (-1) was being lost because it was first converted to an > unsigned int and only then checked. > --- > src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c | 12 ++-- > 1 file changed,

Re: [Mesa-dev] [PATCH 1/5] mesa: bump required GCC version to 4.8.0

On Wed, 2016-09-07 at 19:26 +1000, Jonathan Gray wrote: > LLVM was imported yes, but the integration of it has only > started around the same time and it is not enabled by default yet. > And it was only imported around two days or so ago. > Which means its a good time to start a discussion on

Re: [Mesa-dev] [PATCH] glsl: Add a citation for uniform precision matching.

On 09/07/2016 12:37 PM, Kenneth Graunke wrote: On Wednesday, September 7, 2016 10:42:06 AM PDT Tapani Pälli wrote: On 09/07/2016 09:56 AM, Ian Romanick wrote: On 09/06/2016 03:24 PM, Kenneth Graunke wrote: On Tuesday, September 6, 2016 1:04:43 PM PDT Eric Anholt wrote: Kenneth Graunke

Re: [Mesa-dev] [PATCH 3/4] radeonsi: add more unlikely() uses into si_draw_vbo

On 07.09.2016 12:23, Marek Olšák wrote: On Wed, Sep 7, 2016 at 11:47 AM, Michel Dänzer wrote: On 07/09/16 06:02 PM, Marek Olšák wrote: Based on the comments so far, it looks like all annotations in the patch are very well placed, so I don't know what the fuss is about.

Re: [Mesa-dev] [PATCH v3] clover: Introduce CLOVER_EXTRA_COMPILER_OPTIONS

On Wed, 2016-09-07 at 13:43 +0200, Vedran Miletić wrote: > Options specified via the CLOVER_EXTRA_COMPILER_OPTIONS shell > variable > are appended to the compiler and linker options specified by the > OpenCL > program (if any). > > v2: >  * rename to CLOVER_EXTRA_COMPILER_OPTIONS >  * use

Re: [Mesa-dev] [PATCH] gallium: fix clang warnings

On Wed, 2016-09-07 at 07:38 +, Michel Dänzer wrote: > On 07/09/16 12:29 AM, Nicolai Hähnle wrote: > > On 06.09.2016 16:37, Martina Kollarova wrote: > >> 1. Variable 'hole' is uninitialized when used here [-Wuninitialized] > >> 2. Comparison of constant -1 with expression of type 'unsigned int'

Re: [Mesa-dev] [PATCH 2/4] radeonsi: enable DCC fast clear for 128-bit formats

On Wed, Sep 7, 2016 at 2:11 PM, Bas Nieuwenhuizen wrote: > On Wed, Sep 7, 2016 at 1:46 PM, Marek Olšák wrote: >> From: Marek Olšák >> >> --- >> src/gallium/drivers/radeon/r600_texture.c | 45 >> ++- >>

Re: [Mesa-dev] [PATCH 2/4] radeonsi: enable DCC fast clear for 128-bit formats

On Wed, Sep 7, 2016 at 3:42 PM, Marek Olšák wrote: > On Wed, Sep 7, 2016 at 2:11 PM, Bas Nieuwenhuizen > wrote: >> On Wed, Sep 7, 2016 at 1:46 PM, Marek Olšák wrote: >>> From: Marek Olšák >>> >>> --- >>>

[Mesa-dev] [PATCH] gallium: fix return value check

A possible error (-1) was being lost because it was first converted to an unsigned int and only then checked. --- src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c

Re: [Mesa-dev] [PATCH] gallium: fix return value check

On Wed, 2016-09-07 at 17:34 +0300, Martina Kollarova wrote: > A possible error (-1) was being lost because it was first converted > to an > unsigned int and only then checked. > --- >  src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c | 12 ++-- >  1 file changed, 6 insertions(+), 6

Re: [Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

On Wed, Sep 7, 2016 at 5:36 PM, Ilia Mirkin wrote: > On Wed, Sep 7, 2016 at 4:08 AM, Michel Dänzer wrote: >> On 07/09/16 04:19 AM, Christian König wrote: >>> Am 06.09.2016 um 21:05 schrieb Ilia Mirkin: On Tue, Sep 6, 2016 at 2:22 PM, Christian König

Re: [Mesa-dev] [PATCH] spirv/nir: Implement OpAtomicLoad/Store for shared variables

LGTM. Reviewed-by: Jason Ekstrand Maybe we should consider making the orders of arguments a bit more consistent for a few functions so that we can use fill_common_atomic_sources for load and store too. --Jason On Wed, Sep 7, 2016 at 3:10 AM, Lionel Landwerlin

[Mesa-dev] Required-for-rendering internal formats

Hello, Is there a concept in OpenGL that certain internal formats *must* be supported for rendering? An issue we're running into is that NVIDIA hardware supports sampling from RGBA4 textures, but does not support that as a render format. So if you create a tex image with GL_RGBA4, we use that as

Re: [Mesa-dev] [PATCH] EGL: Combine the GL and GLES current contexts (v2)

On Wed, 2016-09-07 at 11:15 -0400, Adam Jackson wrote: > From: Kyle Brenneman > > Only keep track of a single current context, instead of separate > contexts for GL and GLES. In addition to fixing 1.4+ compliance, this fixes the "eglterminate then unbind context" piglit.

Re: [Mesa-dev] [PATCH 3/3] nir/spirv: Use fill_common_atomic_sources for image atomics

On Wed, Sep 7, 2016 at 12:45 AM, Michael Schellenberger Costa < mschellenbergerco...@googlemail.com> wrote: > Hi Jason, > > Am 07.09.2016 um 00:17 schrieb Jason Ekstrand: > > We had two almost identical copies of this code and they were both broken > > but in different ways. The previous two

Re: [Mesa-dev] [PATCH 1/5] mesa: bump required GCC version to 4.8.0

On Wed, Sep 07, 2016 at 11:52:39PM +1000, Timothy Arceri wrote: > On Wed, 2016-09-07 at 19:26 +1000, Jonathan Gray wrote: > > LLVM was imported yes, but the integration of it has only > > started around the same time and it is not enabled by default yet. > > And it was only imported around two

[Mesa-dev] [PATCH] EGL: Combine the GL and GLES current contexts (v2)

From: Kyle Brenneman Only keep track of a single current context, instead of separate contexts for GL and GLES. In EGL 1.4 (and 1.5), EGL_OPENGL_API and EGL_OPENGL_ES_API are supposed to be interchangeable for all purposes except for eglCreateContext. The

Re: [Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

On Wed, Sep 7, 2016 at 4:08 AM, Michel Dänzer wrote: > On 07/09/16 04:19 AM, Christian König wrote: >> Am 06.09.2016 um 21:05 schrieb Ilia Mirkin: >>> On Tue, Sep 6, 2016 at 2:22 PM, Christian König >>> wrote: Am 06.09.2016 um 16:23 schrieb Ilia

[Mesa-dev] [Bug 91169] The Chronicles of Riddick: Assault on Dark Athena fails to start with nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=91169 --- Comment #8 from Ilia Mirkin --- (In reply to Vladimir from comment #7) > I can confirm this happens on Intel with mesa 12.0.2. Is this patch going to > be merged? The situation was a bit unclear to me. Without

Re: [Mesa-dev] [PATCH] spirv/nir: Implement OpAtomicLoad/Store for shared variables

Thanks, I thought about that but the various nir_intrinsic_set_write_mask()/etc.. for load/store kind of discouraged me. I'll give it a try though. On 07/09/16 17:12, Jason Ekstrand wrote: LGTM. Reviewed-by: Jason Ekstrand > Maybe we

Re: [Mesa-dev] [PATCH] spirv/nir: Implement OpAtomicLoad/Store for shared variables

On Wed, Sep 7, 2016 at 9:17 AM, Lionel Landwerlin < lionel.g.landwer...@intel.com> wrote: > Thanks, > > I thought about that but the various nir_intrinsic_set_write_mask()/etc.. > for load/store kind of discouraged me. > I'll give it a try though. > I just looked a bit and it's going to be a

Re: [Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

Am 07.09.2016 um 17:36 schrieb Ilia Mirkin: On Wed, Sep 7, 2016 at 4:08 AM, Michel Dänzer wrote: On 07/09/16 04:19 AM, Christian König wrote: Am 06.09.2016 um 21:05 schrieb Ilia Mirkin: On Tue, Sep 6, 2016 at 2:22 PM, Christian König wrote: Am

Re: [Mesa-dev] [PATCH] gallium: fix clang warnings

On 07.09.2016 14:40, Jan Vesely wrote: On Wed, 2016-09-07 at 10:12 +0200, Nicolai Hähnle wrote: On 07.09.2016 09:38, Michel Dänzer wrote: On 07/09/16 12:29 AM, Nicolai Hähnle wrote: On 06.09.2016 16:37, Martina Kollarova wrote: 1. Variable 'hole' is uninitialized when used here [-

Re: [Mesa-dev] [PATCH 09/10] st/vdpau: implement the new DMA-buf based interop

Am 07.09.2016 um 18:06 schrieb Marek Olšák: On Wed, Sep 7, 2016 at 5:36 PM, Ilia Mirkin wrote: On Wed, Sep 7, 2016 at 4:08 AM, Michel Dänzer wrote: On 07/09/16 04:19 AM, Christian König wrote: Am 06.09.2016 um 21:05 schrieb Ilia Mirkin: On Tue, Sep

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Sep 7, 2016 10:45 AM, "Nanley Chery" wrote: > > On Wed, Sep 07, 2016 at 10:26:25AM -0700, Jason Ekstrand wrote: > > On Wed, Sep 7, 2016 at 9:50 AM, Jason Ekstrand wrote: > > > > > On Wed, Sep 7, 2016 at 9:36 AM, Nanley Chery

Re: [Mesa-dev] [PATCH] EGL: Combine the GL and GLES current contexts (v2)

On 7 September 2016 at 16:57, Adam Jackson wrote: > On Wed, 2016-09-07 at 11:15 -0400, Adam Jackson wrote: >> From: Kyle Brenneman >> >> Only keep track of a single current context, instead of separate >> contexts for GL and GLES. > > In addition to fixing

Re: [Mesa-dev] [PATCH] EGL: Combine the GL and GLES current contexts (v2)

On Wed, 2016-09-07 at 22:07 +0100, Emil Velikov wrote: > Was going to mention this but it slipped through. Can we get a proper > spec quote in the code ? I guess the logic through eglCreateContext (the only place where the API difference matters) is a little contorted, certainly took me more

[Mesa-dev] [PATCH] egl: Document why EGL_OPENGL{, _ES}_API are mostly identical

Signed-off-by: Adam Jackson --- src/egl/main/eglcontext.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/egl/main/eglcontext.c b/src/egl/main/eglcontext.c index ebc004d..057b60f 100644 --- a/src/egl/main/eglcontext.c +++ b/src/egl/main/eglcontext.c @@ -457,6

Re: [Mesa-dev] [v3 4/6] i965/rbc: Consult rb settings for texture surface setup

On Sep 7, 2016 10:24 AM, "Topi Pohjolainen" wrote: > > Once mcs buffer gets allocated without delay for lossless > compression (same as we do for msaa), one gets regression in: > > GL45-CTS.texture_barrier_ARB.same-texel-rw > > Setting the auxiliary surface for both

Re: [Mesa-dev] [PATCH 04/12] anv: Add func anv_image_has_hiz()

On Wed 07 Sep 2016, Nanley Chery wrote: > On Fri, Sep 02, 2016 at 11:42:24AM -0700, Chad Versace wrote: > > On Thu 01 Sep 2016, Jason Ekstrand wrote: > > > On Wed, Aug 31, 2016 at 8:29 PM, Nanley Chery > > > wrote: > > > > > > From: Chad Versace

Re: [Mesa-dev] [4.1/6] i965: Add sanity check for non-compressible texture views

On Sep 7, 2016 10:24 AM, "Topi Pohjolainen" wrote: > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 34 > 1 file changed, 34 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Wed, Sep 7, 2016 at 9:36 AM, Nanley Chery wrote: > On Tue, Sep 06, 2016 at 05:02:55PM -0700, Jason Ekstrand wrote: > > On Tue, Sep 6, 2016 at 4:12 PM, Nanley Chery > wrote: > > > > > On Wed, Aug 31, 2016 at 02:22:33PM -0700, Jason Ekstrand wrote:

[Mesa-dev] [v3 3/6] i965: Track non-compressible sampling of renderbuffers

v3: - Actually set the flags when needed instead of falsely overwriting them (Jason). - Use more generic name for flag (dropped RENDERBUFFER) - Consult also shader images Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c

Re: [Mesa-dev] [PATCH v3] clover: Introduce CLOVER_EXTRA_COMPILER_OPTIONS

On 09/07/2016 04:14 PM, Jan Vesely wrote: > On Wed, 2016-09-07 at 13:43 +0200, Vedran Miletić wrote: >> Options specified via the CLOVER_EXTRA_COMPILER_OPTIONS shell >> variable >> are appended to the compiler and linker options specified by the >> OpenCL >> program (if any). >> >> v2: >> *

Re: [Mesa-dev] [PATCH 14/33] intel/blorp: Add an entrypoint for doing bit-for-bit copies

On Wed, Sep 07, 2016 at 10:26:25AM -0700, Jason Ekstrand wrote: > On Wed, Sep 7, 2016 at 9:50 AM, Jason Ekstrand wrote: > > > On Wed, Sep 7, 2016 at 9:36 AM, Nanley Chery > > wrote: > > > >> On Tue, Sep 06, 2016 at 05:02:55PM -0700, Jason Ekstrand

Re: [Mesa-dev] [PATCH v3] clover: Introduce CLOVER_EXTRA_COMPILER_OPTIONS

On Wednesday 07 September 2016 19:28:36 Serge Martin wrote: > On Wednesday 07 September 2016 18:37:51 Vedran Miletić wrote: > > On 09/07/2016 04:14 PM, Jan Vesely wrote: > > > On Wed, 2016-09-07 at 13:43 +0200, Vedran Miletić wrote: > > >> Options specified via the CLOVER_EXTRA_COMPILER_OPTIONS

[Mesa-dev] [Bug 91169] The Chronicles of Riddick: Assault on Dark Athena fails to start with nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=91169 --- Comment #7 from Vladimir --- I can confirm this happens on Intel with mesa 12.0.2. Is this patch going to be merged? -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the

[Mesa-dev] [PATCH] spirv/nir: Implement OpAtomicLoad/Store for shared variables

Missing bits from 2afb950161f847d9b0a7be03dfb62cacc5ea51ba. Signed-off-by: Lionel Landwerlin Cc: Jason Ekstrand --- src/compiler/spirv/spirv_to_nir.c | 35 ++- 1 file changed, 34 insertions(+), 1

[Mesa-dev] [PATCH 3/4] radeonsi: fix texture reinterpretation after DCC fast clear

From: Marek Olšák The problem is that TC-compatible DCC clear codes translate into different clear values when you change the format. I have a new piglit reproducing the issue. --- src/gallium/drivers/radeon/r600_texture.c | 32 +++ 1 file

[Mesa-dev] [PATCH 2/4] radeonsi: enable DCC fast clear for 128-bit formats

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 45 ++- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index

[Mesa-dev] [PATCH] vl/dri3: handle the case of different GPU

use a linear buffer in case of back buffer Signed-off-by: Nayan Deshmukh --- src/gallium/auxiliary/vl/vl_winsys_dri3.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c

[Mesa-dev] [PATCH] r300g: Set R300_VAP_CNTL on RSxxx to avoid triangle flickering

On the RSxxx chip series, HW TCL is missing and r300_emit_vs_state() is never called. However, if R300_VAP_CNTL is never set, the hardware (at least the RS690 I tested this on) comes up with rendering artifacts, and parts that are uploaded before this "fix" remain broken in VRAM. This causes

Re: [Mesa-dev] [PATCH 07/12] anv/image: Memset hiz surfaces to 0 when binding memory

On Thu, Sep 01, 2016 at 04:12:23PM -0700, Jason Ekstrand wrote: > On Wed, Aug 31, 2016 at 8:29 PM, Nanley Chery wrote: > > > From: Jason Ekstrand > > > > Nanley Chery (amend): > > - Change memset value from 0xff to 0 (a defined value for HiZ). >

Re: [Mesa-dev] [v3 3/6] i965: Track non-compressible sampling of renderbuffers

On Sep 7, 2016 10:24 AM, "Topi Pohjolainen" wrote: > > v3: >- Actually set the flags when needed instead of falsely > overwriting them (Jason). >- Use more generic name for flag (dropped RENDERBUFFER) >- Consult also shader images > > Signed-off-by:

Re: [Mesa-dev] [PATCH] gallium: remove PIPE_BIND_TRANSFER_READ/WRITE

Marek Olšák writes: > From: Marek Olšák > > not used in any useful way > diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c > b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c > index 0627f3d..77b38b5 100644 > ---

[Mesa-dev] [PATCH 55/57] i965/vec4: Don't spill non-GRF-aligned register regions.

A better fix would be to do something along the lines of the FS back-end spilling code and emit a scratch read before any instruction that overwrites the register to spill partially due to a non-zero sub-register offset. In the meantime mark registers used with a non-zero sub-register offset as

[Mesa-dev] [PATCH 42/57] i965/fs: Misc simplification.

Get rid of some leftover redundant arithmetic introduced during the conversion to byte offsets and sizes that can be simplified easily. --- src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs_nir.cpp| 2 +-

[Mesa-dev] [PATCH 25/57] i965/fs: Stop using fs_reg::in_range() in favor of regions_overlap().

Its only use left in the FS back-end should be using regions_overlap() instead to avoid getting a false negative result in cases where source and destination overlap but the former starts before the latter in the VGRF file. --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 ++- 1 file changed, 2

[Mesa-dev] [PATCH 14/57] i965/fs: Handle arbitrary offsets in brw_reg_from_fs_reg for MRF/VGRF registers.

This restriction seemed rather artificial... Removing it actually simplifies things slightly. --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp

[Mesa-dev] [PATCH 57/57] i965/vec4: Assert that pull constant load offsets are 16B-aligned.

Non-16B-aligned pull constant loads are unlikely to be particularly useful given that you can get roughly the same effect by using swizzles on the result. --- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [PATCH 35/57] i965/fs: Simplify result_live calculation in dead_code_eliminate().

No need to unroll the first iteration of the loop manually. --- src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp

[Mesa-dev] [PATCH 33/57] i965/fs: Simplify get_fpu_lowered_simd_width() by using inequalities instead of rounding.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index c9d3d7d..743929a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++

[Mesa-dev] [PATCH 41/57] i965/fs: Get rid of fs_inst::set_smear().

component() was generally a better alternative because of several issues set_smear() had: - It wouldn't take the original stride and offset of the register into account, which means that set_smear() on the result of e.g. another set_smear() call or an offset() call would give a bogus

[Mesa-dev] [PATCH 21/57] i965/fs: Compare full register offsets in cmod propagation pass.

This could potentially have misoptimized a program in cases where inst->src[0] had a non-zero sub-GRF offset. --- src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp

[Mesa-dev] [PATCH 20/57] i965/fs: Don't consider LOAD_PAYLOAD with stride > 1 source to behave like a raw copy.

Noticed the problem by inspection while typing in the previous commit. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f6a9ec1..57a3494 100644 ---

[Mesa-dev] [PATCH 11/57] i965/vec4: Replace vec4_instruction::regs_read with ::size_read using byte units.

The previous regs_read value can be recovered by rewriting each reference of regs_read() like 'x = i.regs_read(j)' to 'x = DIV_ROUND_UP(i.size_read(j), reg_unit)'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the

[Mesa-dev] [PATCH 05/57] i965/fs: Add wrapper functions for fs_inst::regs_read and ::regs_written.

This is in preparation for dropping fs_inst::regs_read and ::regs_written in favor of more accurate alternatives expressed in byte units. The main reason these wrappers are useful is that a number of optimization passes implement dataflow analysis with register granularity, so these helpers will

[Mesa-dev] [PATCH 50/57] i965/vec4: Compare full register offsets in opt_register_coalesce nop move check.

In preparation for adding support for sub-GRF offsets to the VEC4 IR. --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index f97de18..d9dbc4c 100644 ---

[Mesa-dev] [PATCH 17/57] i965/fs: Take into account misalignment in regs_written() and regs_read().

There was a workaround for this in fs_inst::size_read() for the SHADER_OPCODE_MOV_INDIRECT instruction and FIXED_GRF register file *only*. We should take this possibility into account for the sources and destinations of all instructions on all optimization passes that need to quantize dataflow in

[Mesa-dev] [PATCH 47/57] i965/vec4: Simplify src/dst_reg to brw_reg conversion by using byte_offset().

This should also have the side effect of fixing convert_to_hw_regs() to handle sub-GRF register offsets. --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp

[Mesa-dev] [PATCH 48/57] i965/vec4: Change opt_vector_float to keep track of the last offset seen in bytes.

This simplifies things slightly and makes the pass more correct in presence of sub-GRF offsets. --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp

[Mesa-dev] [PATCH 31/57] i965/fs: Fix signedness of the return value of fs_inst::size_read().

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- src/mesa/drivers/dri/i965/brw_ir_fs.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index e033a65..c9d3d7d 100644 ---

[Mesa-dev] [PATCH 39/57] i965/fs: Move region_contained_in to the IR header and fix for non-VGRF files.

Also changed the argument names since 'src' and 'dst' don't make that much sense outside of the context of copy propagation. --- src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 14 -- src/mesa/drivers/dri/i965/brw_ir_fs.h | 13 + 2 files changed, 13

[Mesa-dev] [PATCH 30/57] i965/fs: Switch mask_relative_to() used in compute-to-mrf to byte units.

This makes the helper function less annoying to use and somewhat more accurate. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index

[Mesa-dev] [PATCH 08/57] i965/vec4: Replace vec4_instruction::regs_written with ::size_written field in bytes.

The previous regs_written field can be recovered by rewriting each rvalue reference of regs_written like 'x = i.regs_written' to 'x = DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference like 'i.regs_written = x' to 'i.size_written = x * reg_unit'. For the same reason as in the

[Mesa-dev] [PATCH 26/57] i965/vec4: Port regions_overlap() to the vec4 IR.

This is copy-pasted almost line by line from the FS back-end. The only reason it cannot be implemented in terms of backend_reg is that the backend_reg::nr field doesn't have the same meaning for uniforms on both back-ends. It could be easily deduplicated by using a template function. ---

[Mesa-dev] [PATCH 23/57] i965/fs: Fix LOAD_PAYLOAD handling in register coalesce is_nop_mov().

is_nop_mov() was broken for LOAD_PAYLOAD instructions in two ways: On the one hand the original destination register offset wasn't being taken into account which would give incorrect results if it was already non-zero, and on the other hand all source registers were being treated as if they had a

[Mesa-dev] [PATCH 15/57] i965/fs: Handle fixed HW GRF subnr in reg_offset().

This will be useful later on when we start using reg_offset() on fixed hardware registers. --- src/mesa/drivers/dri/i965/brw_ir_fs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index

[Mesa-dev] [PATCH 27/57] i965/vec4: Drop backend_reg::in_range() in favor of regions_overlap().

This makes sure that overlap checks are done correctly throughout the back-end when the '*this' register starts before the register/size pair provided as argument, and is actually less annoying to use than in_range() at this point since regions_overlap() takes its size arguments in bytes. ---

[Mesa-dev] [PATCH 37/57] i965/fs: Simplify copy propagation LOAD_PAYLOAD ACP setup.

By keeping track of 'offset' in byte units. --- src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp index

[Mesa-dev] [PATCH 06/57] i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_written.

This is in preparation for dropping vec4_instruction::regs_read and ::regs_written in favor of more accurate alternatives expressed in byte units. The main reason these wrappers are useful is that a number of optimization passes implement dataflow analysis with register granularity, so these

[Mesa-dev] [PATCH 32/57] i965/fs: Simplify byte_offset().

In the most common case this can now be implemented as a simple addition because the offset is already encoded as a single scalar value in bytes. --- src/mesa/drivers/dri/i965/brw_ir_fs.h | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff --git

[Mesa-dev] [PATCH 12/57] i965/fs: Return more accurate read size from fs_inst::size_read for IMM and UNIFORM files.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 5979461..7473f07 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++

[Mesa-dev] [PATCH 18/57] i965/vec4: Take into account misalignment in regs_written() and regs_read().

Unlike the FS counterpart of this commit this was likely not (yet) a bug, but let's fix it already in preparation for implementing support for sub-GRF offsets in the VEC4 back-end. --- src/mesa/drivers/dri/i965/brw_ir_vec4.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff

[Mesa-dev] [PATCH 45/57] i965/ir: Don't print ARF subnr values twice.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 src/mesa/drivers/dri/i965/brw_vec4.cpp | 4 2 files changed, 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index a90aba0..6d4303c 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp

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