Re: [Mesa-dev] [PATCH v2 7/7] anv: Implement the Skylake stencil PMA optimization

On Mon, Feb 13, 2017 at 08:45:47PM -0800, Jason Ekstrand wrote: > On Mon, Feb 13, 2017 at 6:13 PM, Jason Ekstrand > wrote: > > > On Mon, Feb 13, 2017 at 5:00 PM, Nanley Chery > > wrote: > > > >> On Fri, Feb 10, 2017 at 11:02:21AM -0800, Jason

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/2] i965/fs: fix indirect load DF uniforms on BSW/BXT

Samuel Iglesias Gonsálvez writes: > Previously we were emitting two MOV_INDIRECT instructions by calculating > source's indirect offsets for each 32-bit half of a DF source. However, > this is not needed as we can just emit two 32-bit MOV INDIRECT without > doing that

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

Matt Turner writes: > Provides the ability to read the .note.gnu.build-id section of ELF > binaries, which is inserted by the --build-id=... flag to ld. > --- > configure.ac | 2 + > src/util/Makefile.sources | 2 + > src/util/build_id.c | 109 >

Re: [Mesa-dev] [PATCH 3/6] docs/releasing: update the website section

On Monday, 2017-02-13 13:42:20 +, Emil Velikov wrote: > From: Emil Velikov > > Things are automated via git hooks. > > Cc: Brian Paul > Cc: Eric Engestrom > Signed-off-by: Emil Velikov >

[Mesa-dev] [PATCH mesa] docs: fix gamma correction link

That link has been dead for 15 years... We could link to Archive.org [1] to get the last time this page existed, but I feel like Wikipedia is a better choice. [1] http://web.archive.org/web/20021211151318/http://www.inforamp.net/~poynton/notes/colour_and_gamma/GammaFAQ.html Signed-off-by: Eric

Re: [Mesa-dev] [PATCH] anv: fix Get*MemoryRequirements for !LLC

On Tue, Feb 14, 2017 at 09:37:20AM -0800, Jason Ekstrand wrote: > On Tue, Feb 14, 2017 at 9:35 AM, Connor Abbott wrote: > > > On Tue, Feb 14, 2017 at 12:33 PM, Jason Ekstrand > > wrote: > > > On Tue, Feb 14, 2017 at 9:23 AM, Connor Abbott

Re: [Mesa-dev] [Mesa-stable] [PATCH 2/2] i965/fs: emit MOV_INDIRECT with the source with the right register type

Samuel Iglesias Gonsálvez writes: > This was hiding bugs as it retyped the source to destination's type. > > Signed-off-by: Samuel Iglesias Gonsálvez > Cc: "17.0" Reviewed-by: Francisco Jerez

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand wrote: > I'm not sure how I feel about the silent fall-backs. At least in the Vulkan > driver, we should fail to compile if we can't get build-id. Otherwise, > you'll end up compiling a driver that will always fail device

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue 14 Feb 2017, Matt Turner wrote: > On Tue, Feb 14, 2017 at 11:21 AM, Matt Turner wrote: > > On Tue, Feb 14, 2017 at 11:18 AM, Matt Turner wrote: > >> On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand > >> wrote: > >>> I'm not

Re: [Mesa-dev] [PATCH v2 7/7] anv: Implement the Skylake stencil PMA optimization

On Tue, Feb 14, 2017 at 10:53:37AM -0800, Jason Ekstrand wrote: > On Tue, Feb 14, 2017 at 10:35 AM, Nanley Chery > wrote: > > > On Mon, Feb 13, 2017 at 08:45:47PM -0800, Jason Ekstrand wrote: > > > On Mon, Feb 13, 2017 at 6:13 PM, Jason Ekstrand > >

Re: [Mesa-dev] features.txt & EXT_debug_label extension

On 02/10/2017 02:56 AM, Eero Tamminen wrote: > Hi, > > On 09.02.2017 19:30, Ian Romanick wrote: >> On 02/09/2017 05:19 PM, Eero Tamminen wrote: >>> When checking GL errors for "Unturned" (Steam top-20 Unity3D based >>> game), I noticed that it uses functions from extension unsupported by >>>

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 11:18 AM, Matt Turner wrote: > On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand wrote: >> I'm not sure how I feel about the silent fall-backs. At least in the Vulkan >> driver, we should fail to compile if we can't get build-id.

Re: [Mesa-dev] [PATCH v2 1/4] driconf: add allow_higher_compat_version option

This series is Reviewed-by: Edmondo Tommasina Thanks edmondo On Tue, Feb 14, 2017 at 4:18 PM, Samuel Pitoiset wrote: > Mesa currently doesn't allow to create 3.1+ compatibility profiles > mainly because various features are unimplemented

Re: [Mesa-dev] [PATCH 3/4] gallium/radeon: add a HUD query for monitoring the CS thread activity

On Mon, Feb 13, 2017 at 4:57 PM, Marek Olšák wrote: > On Mon, Feb 13, 2017 at 4:37 PM, Nicolai Hähnle wrote: >> On 11.02.2017 20:58, Marek Olšák wrote: >>> >>> From: Marek Olšák >>> >>> --- >>> src/gallium/drivers/radeon/r600_query.c

[Mesa-dev] [PATCH 2/2] anv: Use build-id for pipeline cache UUID.

The --build-id=... ld flag has been present since binutils-2.18, released 28 Aug 2007. --- src/intel/vulkan/Makefile.am | 1 + src/intel/vulkan/anv_device.c | 31 --- 2 files changed, 13 insertions(+), 19 deletions(-) diff --git a/src/intel/vulkan/Makefile.am

Re: [Mesa-dev] [PATCH] anv/entrypoints: Only generate entrypoints for supported features

Reviewed-by: Lionel Landwerlin Thanks! On 14/02/17 18:26, Jason Ekstrand wrote: This changes the way anv_entrypoints_gen.py works from generating a table containing every single entrypoint in the XML to just the ones that we actually need. There's no reason for

Re: [Mesa-dev] GLSL IR & TGSI on-disk shader cache

On Tue, Feb 7, 2017 at 3:31 PM, Timothy Arceri wrote: > On Tue, 2017-02-07 at 23:58 +0100, Matt Turner wrote: >> On Tue, Feb 7, 2017 at 4:42 AM, Timothy Arceri > > wrote: >> > This series adds support for a GLSL IR level and TGSI (OpenGL/st) >> >

Re: [Mesa-dev] [PATCH] anv/entrypoints: Only generate entrypoints for supported features

On 14 February 2017 at 18:26, Jason Ekstrand wrote: > This changes the way anv_entrypoints_gen.py works from generating a > table containing every single entrypoint in the XML to just the ones > that we actually need. There's no reason for us to burn entrypoint > table

Re: [Mesa-dev] [PATCH 4/6] docs: add hyperlink to the releasing documentation

On Monday, 2017-02-13 13:42:21 +, Emil Velikov wrote: > From: Emil Velikov > I just noticed xlibdriver.html and versions.html are also missing from contents.html, if you want to add them as well :) > Signed-off-by: Emil Velikov > ---

[Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

Provides the ability to read the .note.gnu.build-id section of ELF binaries, which is inserted by the --build-id=... flag to ld. --- configure.ac | 2 + src/util/Makefile.sources | 2 + src/util/build_id.c | 109 ++

Re: [Mesa-dev] [PATCH] radeonsi: allow unaligned vertex buffer offsets and strides on CIK-VI

On Tue, Feb 14, 2017 at 7:24 PM, Matt Arsenault wrote: > > On Feb 13, 2017, at 09:01, Marek Olšák wrote: > > So that we can disable u_vbuf for GL core profiles. > > This is a v2 of the previous VI-only patch. > It requires SH_MEM_CONFIG.ALIGNMENT_MODE =

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 11:21 AM, Matt Turner wrote: > On Tue, Feb 14, 2017 at 11:18 AM, Matt Turner wrote: >> On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand >> wrote: >>> I'm not sure how I feel about the silent fall-backs. At

[Mesa-dev] [Bug 99692] [radv] Mostly broken on Hawaii PRO/CIK ASICs

https://bugs.freedesktop.org/show_bug.cgi?id=99692 --- Comment #14 from Bas Nieuwenhuizen --- (In reply to Jan Ziak from comment #11) > (In reply to Kai from comment #9) > > The full stack I used was(Debian testing as a base) is: > > GPU: Hawaii PRO [Radeon R9 290]

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 11:39 AM, Kristian H. Kristensen wrote: > Matt Turner writes: >> diff --git a/src/util/build_id.c b/src/util/build_id.c >> new file mode 100644 >> index 000..a2e21b7 >> --- /dev/null >> +++ b/src/util/build_id.c >> @@ -0,0

[Mesa-dev] [Bug 99638] Mesa opengles Peppa Pig and openggles2 smurfs on Radeon PowerPC and PPC64

https://bugs.freedesktop.org/show_bug.cgi?id=99638 --- Comment #20 from Casey C --- If at all helpful, I'd be happy to donate and ship a G5 970MP (PCIe) to a dev -- You are receiving this mail because: You are the QA Contact for the

Re: [Mesa-dev] [PATCH 4/6] docs: add hyperlink to the releasing documentation

On 14 February 2017 at 18:06, Eric Engestrom wrote: > On Monday, 2017-02-13 13:42:21 +, Emil Velikov wrote: >> From: Emil Velikov >> > > I just noticed xlibdriver.html and versions.html are also missing from > contents.html, if you want

[Mesa-dev] [Bug 99692] [radv] Mostly broken on Hawaii PRO/CIK ASICs

https://bugs.freedesktop.org/show_bug.cgi?id=99692 --- Comment #15 from Jan Ziak <0xe2.0x9a.0...@gmail.com> --- (In reply to Kai from comment #12) > (In reply to Jan Ziak from comment #11) > > Is LLVM-5.0-devel required? I am using LLVM-4.0.0_rc1 and even vulkaninfo is > > terminating with an

Re: [Mesa-dev] [PATCH] radeonsi: allow unaligned vertex buffer offsets and strides on CIK-VI

On 13.02.2017 18:01, Marek Olšák wrote: From: Marek Olšák So that we can disable u_vbuf for GL core profiles. This is a v2 of the previous VI-only patch. It requires SH_MEM_CONFIG.ALIGNMENT_MODE = UNALIGNED on CIK-VI. --- src/gallium/drivers/radeonsi/si_descriptors.c |

[Mesa-dev] [Bug 99638] Mesa opengles Peppa Pig and openggles2 smurfs on Radeon PowerPC and PPC64

https://bugs.freedesktop.org/show_bug.cgi?id=99638 --- Comment #14 from intermedi...@hotmail.com --- Thanks Ilia! in case you need help in testing a future patch ask freely. -- You are receiving this mail because: You are the QA Contact for the

Re: [Mesa-dev] [PATCH 2/2] mesa: remove tabs in dri xmlconfig.c

On 14/02/17 19:21, Nicolai Hähnle wrote: Yay, style fixes :) Does this mean you're planning to do some work on driconfig-related things? I realised I should be taking notice of any driconfig options for shader-cache so I've added a new helper in the series I sent today. The helper just

Re: [Mesa-dev] [PATCH 3/3] r100: use correct libdrm_radeon macro

On 14.02.2017 02:15, Emil Velikov wrote: Remove local definition of RADEON_INFO_TILE_CONFIG and use the correct macro provided by libdrm_radeon RADEON_INFO_TILING_CONFIG. Latter was present as of libdrm 2.4.22, sirca 2010. Signed-off-by: Emil Velikov ---

Re: [Mesa-dev] [PATCH 2/2] mesa: remove tabs in dri xmlconfig.c

Yay, style fixes :) Does this mean you're planning to do some work on driconfig-related things? Anyway, these patches are Acked-by: Nicolai Hähnle On 13.02.2017 23:03, Timothy Arceri wrote: --- src/mesa/drivers/dri/common/xmlconfig.c | 724

Re: [Mesa-dev] [PATCH] radv: adopt some init config workarounds from radeonsi.

Reviewed-by: Bas Nieuwenhuizen On Tue, Feb 14, 2017, at 07:25, Dave Airlie wrote: > From: Dave Airlie > > Just one bonaire fix. > > Signed-off-by: Dave Airlie > --- > src/amd/vulkan/si_cmd_buffer.c | 11 +-- > 1 file

Re: [Mesa-dev] [PATCH] gallium/radeon: add HUD queries for GPU temperature and clocks

On 13.02.2017 23:08, Samuel Pitoiset wrote: Only the Radeon kernel driver exposed the GPU temperature and the shader/memory clocks, this implements the same functionality for the AMDGPU kernel driver. These queries will return 0 if the DRM version is less than 3.10, I don't explicitely check

Re: [Mesa-dev] software implementation of vulkan for gsoc/evoc

On 13.02.2017 17:54, Jacob Lifshay wrote: the algorithm i was going to use would get the union of the sets of live variables at the barriers (union over barriers), create an array of structs that holds them all, then for each barrier, insert the code to store all live variables, then end the for

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

On Mon, 2017-02-13 at 16:29 +, Lionel Landwerlin wrote: > Run this by our CI earlier today and got a few failures : > > dEQP-VK.image.load_store.buffer.r8g8b8a8_snorm > dEQP-VK.image.load_store.buffer.r8g8b8a8_unorm > dEQP-VK.image.format_reinterpret.buffer.r32_uint_r8g8b8a8_snorm >

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

On Tue, 2017-02-14 at 09:46 +, Alex Smith wrote: > On 14 February 2017 at 08:45, Iago Toral wrote: > > On Mon, 2017-02-13 at 16:29 +, Lionel Landwerlin wrote: > > > Run this by our CI earlier today and got a few failures : > > > > > >

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

On Tue, 2017-02-14 at 11:37 +, Lionel Landwerlin wrote: > On 14/02/17 11:19, Iago Toral wrote: > > > > On Tue, 2017-02-14 at 09:46 +, Alex Smith wrote: > > > > > > On 14 February 2017 at 08:45, Iago Toral > > > wrote: > > > > > > > > On Mon, 2017-02-13 at 16:29

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

On Tue, 2017-02-14 at 11:42 +, Alex Smith wrote: > Hi Iago, > > On 14 February 2017 at 11:19, Iago Toral wrote: > > On Tue, 2017-02-14 at 09:46 +, Alex Smith wrote: > > > On 14 February 2017 at 08:45, Iago Toral > > wrote: > > > > On Mon, 2017-02-13

[Mesa-dev] [Bug 99638] Mesa opengles Peppa Pig and openggles2 smurfs on Radeon PowerPC and PPC64

https://bugs.freedesktop.org/show_bug.cgi?id=99638 --- Comment #18 from Pekka Paalanen --- I mean, simply fixing Mesa now to look right without verifying if the other graphics stack components actually got it right too might lead to another breakage later. It is even

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

Hi Iago, On 14 February 2017 at 11:19, Iago Toral wrote: > On Tue, 2017-02-14 at 09:46 +, Alex Smith wrote: > > On 14 February 2017 at 08:45, Iago Toral wrote: > > > On Mon, 2017-02-13 at 16:29 +, Lionel Landwerlin wrote: > > > > Run this by our CI

[Mesa-dev] [Bug 99791] Wayland EGL do not fallback to software rendering anymore when the wl_drm interface is not available

https://bugs.freedesktop.org/show_bug.cgi?id=99791 --- Comment #4 from Cédric Legrand --- I applied Daniel's patch from comment #3 on Mesa 17.0.0, I can confirm that it fixes the issue, thanks a lot. Unfortunately, it did not have time to land in the final release...

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

On 14 February 2017 at 08:45, Iago Toral wrote: > On Mon, 2017-02-13 at 16:29 +, Lionel Landwerlin wrote: > > Run this by our CI earlier today and got a few failures : > > > > dEQP-VK.image.load_store.buffer.r8g8b8a8_snorm > > dEQP-VK.image.load_store.buffer.r8g8b8a8_unorm

[Mesa-dev] [PATCH 1/2] i965/fs: fix indirect load DF uniforms on BSW/BXT

Previously we were emitting two MOV_INDIRECT instructions by calculating source's indirect offsets for each 32-bit half of a DF source. However, this is not needed as we can just emit two 32-bit MOV INDIRECT without doing that calculation. Signed-off-by: Samuel Iglesias Gonsálvez

[Mesa-dev] [PATCH 2/2] i965/fs: emit MOV_INDIRECT with the source with the right register type

This was hiding bugs as it retyped the source to destination's type. Signed-off-by: Samuel Iglesias Gonsálvez Cc: "17.0" --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 1/3] anv/apply_pipeline_layout: Set image.write_only to false

From: Jason Ekstrand This makes our driver robust to changes in spirv_to_nir which would set this flag on the variable. Right now, our driver relies on spirv_to_nir *not* setting var->data.image.write_only for correctness. Any patch which implements the

Re: [Mesa-dev] [RFC PATCH 1/4] driconf: add new force_compat_profile option

On Feb 14, 2017 4:11 AM, "Michel Dänzer" wrote: On 14/02/17 09:28 AM, Samuel Pitoiset wrote: > On 02/13/2017 11:43 PM, Marek Olšák wrote: >> On Mon, Feb 13, 2017 at 5:06 PM, Marek Olšák wrote: >>> On Mon, Feb 13, 2017 at 5:04 PM, Samuel Pitoiset >>>

[Mesa-dev] [Bug 99638] Mesa opengles Peppa Pig and openggles2 smurfs on Radeon PowerPC and PPC64

https://bugs.freedesktop.org/show_bug.cgi?id=99638 --- Comment #17 from Pekka Paalanen --- The plot thickens: https://lists.freedesktop.org/archives/wayland-devel/2017-February/033084.html Apparently it's even more of a mess that I thought. -- You are receiving this mail

Re: [Mesa-dev] [PATCH] r300g: only allow byteswapped formats on big endian

I've changed my mind. The patch can be merged if nobody disagrees. Marek On Feb 13, 2017 2:10 PM, "Marek Olšák" wrote: > I'd like some evidence that the bug is caused by r300g and not some common > code. > > Marek > > On Feb 13, 2017 12:10 PM, "Grazvydas Ignotas"

Re: [Mesa-dev] [PATCH 1/2] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

On 14/02/17 11:19, Iago Toral wrote: On Tue, 2017-02-14 at 09:46 +, Alex Smith wrote: On 14 February 2017 at 08:45, Iago Toral wrote: On Mon, 2017-02-13 at 16:29 +, Lionel Landwerlin wrote: Run this by our CI earlier today and got a few failures :

[Mesa-dev] [Bug 99638] Mesa opengles Peppa Pig and openggles2 smurfs on Radeon PowerPC and PPC64

https://bugs.freedesktop.org/show_bug.cgi?id=99638 --- Comment #19 from intermedi...@hotmail.com --- Thanks Pekka for your infos and job :-) -- You are receiving this mail because: You are the QA Contact for the bug.___

Re: [Mesa-dev] software implementation of vulkan for gsoc/evoc

On 14.02.2017 09:58, Jacob Lifshay wrote: On Feb 14, 2017 12:18 AM, "Nicolai Hähnle" > wrote: On 13.02.2017 17:54, Jacob Lifshay wrote: the algorithm i was going to use would get the union of the sets of live

Re: [Mesa-dev] [PATCH] gallium/radeon: add HUD queries for GPU temperature and clocks

On 02/14/2017 09:23 AM, Nicolai Hähnle wrote: On 13.02.2017 23:08, Samuel Pitoiset wrote: Only the Radeon kernel driver exposed the GPU temperature and the shader/memory clocks, this implements the same functionality for the AMDGPU kernel driver. These queries will return 0 if the DRM

[Mesa-dev] [PATCH] nir/spirv: do not require a format with images that are not sampled

As soon as we support shaderStorageImageWriteWithoutFormat we can see write-only images (sampled == 2) that don't have a format specified. --- src/compiler/spirv/spirv_to_nir.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c

Re: [Mesa-dev] software implementation of vulkan for gsoc/evoc

On Feb 14, 2017 12:18 AM, "Nicolai Hähnle" wrote: On 13.02.2017 17:54, Jacob Lifshay wrote: > the algorithm i was going to use would get the union of the sets of live > variables at the barriers (union over barriers), create an array of > structs that holds them all, then

Re: [Mesa-dev] [PATCH] nir/spirv: do not require a format with images that are not sampled

On Tue, 2017-02-14 at 11:32 +0100, Iago Toral Quiroga wrote: > As soon as we support shaderStorageImageWriteWithoutFormat we can see > write-only images (sampled == 2) that don't have a format specified. > --- I didn't do a thorough testing yet, but I caught this immediately after modifying an

[Mesa-dev] [PATCH v2 3/3] anv: Add support for shaderStorageImageWriteWithoutFormat

This allows shaders to write to storage images declared with unknown format if they are decorated with NonReadable ("writeonly" in GLSL). Previously an image view would always use a lowered format for its surface state, however when a shader declares a write-only image, we should use the real

[Mesa-dev] [PATCH v2 2/3] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

Allow that capability if the driver indicates that it is supported, and flag whether images are read-only/write-only in the nir_variable (based on the NonReadable and NonWritable decorations), which drivers may need to implement this. Signed-off-by: Alex Smith

Re: [Mesa-dev] [PATCH] radeonsi: allow unaligned vertex buffer offsets and strides on CIK-VI

On Feb 14, 2017 9:06 AM, "Nicolai Hähnle" wrote: On 13.02.2017 18:01, Marek Olšák wrote: > From: Marek Olšák > > So that we can disable u_vbuf for GL core profiles. > > This is a v2 of the previous VI-only patch. > It requires

Re: [Mesa-dev] [PATCH v2 2/3] spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat

Reviewed-by: Lionel Landwerlin On 14/02/17 10:34, Alex Smith wrote: Allow that capability if the driver indicates that it is supported, and flag whether images are read-only/write-only in the nir_variable (based on the NonReadable and NonWritable decorations),

Re: [Mesa-dev] [RFC PATCH 1/4] driconf: add new force_compat_profile option

On 02/14/2017 01:54 PM, Edmondo Tommasina wrote: On Feb 14, 2017 11:50 AM, "Marek Olšák" > wrote: On Feb 14, 2017 4:11 AM, "Michel Dänzer" > wrote: On 14/02/17 09:28 AM, Samuel

[Mesa-dev] [PATCH v3 17/24] i965/vec4: consider subregister offset in live variables

From: "Juan A. Suarez Romero" Take into account offset values less than a full register (32 bytes) when getting the var from register. This is required when dealing with an operation that writes half of the register (like one d2x in IVB/BYT, which uses exec_size == 4). -

[Mesa-dev] [PATCH v3 18/24] i965/vec4: adapt setup_imm_df() to allow inserting instructions before another one

Add a new setup_imm_df() that allows the insertion of the instructions before another one. This will be used in the lowering passes for DF instructions. v2: - Adapt emission of DIM instruction too. Signed-off-by: Samuel Iglesias Gonsálvez ---

[Mesa-dev] [PATCH v3 21/24] i965: Use correct VertStride on align16 instructions.

From: Matt Turner In commit c35fa7a, we changed the "width" of DF source registers to 2, which is conceptually fine. Unfortunately a VertStride of 2 is not allowed by align16 instructions on IVB/BYT, and the regular VertStride of 4 works fine in any case. See

[Mesa-dev] [PATCH v3 23/24] i965: enable OpenGL 4.0 to Ivybridge/Baytrail

Signed-off-by: Samuel Iglesias Gonsálvez --- src/mesa/drivers/dri/i965/intel_extensions.c | 2 ++ src/mesa/drivers/dri/i965/intel_screen.c | 6 -- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c

[Mesa-dev] [PATCH v3 22/24] i965: enable ARB_gpu_shader_fp64 for Ivybridge/Baytrail

Signed-off-by: Samuel Iglesias Gonsálvez --- src/mesa/drivers/dri/i965/intel_extensions.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index

[Mesa-dev] [PATCH v3 24/24] docs: mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as supported by i965/gen7+

Signed-off-by: Samuel Iglesias Gonsálvez --- docs/features.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/features.txt b/docs/features.txt index 5905dba9b39..bb2bf884626 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -107,7

Re: [Mesa-dev] [PATCH] radeonsi: allow unaligned vertex buffer offsets and strides on CIK-VI

On 14.02.2017 11:58, Marek Olšák wrote: On Feb 14, 2017 9:06 AM, "Nicolai Hähnle" > wrote: On 13.02.2017 18:01, Marek Olšák wrote: From: Marek Olšák > So that we can disable

Re: [Mesa-dev] [RFC PATCH 1/4] driconf: add new force_compat_profile option

On Feb 14, 2017 2:02 PM, "Samuel Pitoiset" wrote: On 02/14/2017 01:54 PM, Edmondo Tommasina wrote: > > > On Feb 14, 2017 11:50 AM, "Marek Olšák" > wrote: > > > > On Feb 14, 2017 4:11 AM, "Michel Dänzer"

[Mesa-dev] [Bug 99692] [radv] Mostly broken on Hawaii PRO/CIK ASICs

https://bugs.freedesktop.org/show_bug.cgi?id=99692 --- Comment #9 from Kai --- (In reply to Dave Airlie from comment #8) > https://patchwork.freedesktop.org/series/19593/ > > is the series. I can confirm, that all the issues I was seeing as reported in comment #0

Re: [Mesa-dev] radv cik fixes

Hey Dave, Dave Airlie wrote on 14.02.2017 07:10: > Hey, > > This is a bunch of CIK fixes I found thanks to Lyude for remote > access to a test machine. > > The main one is 1/4, it changes the memory base alignment > so that color buffers are aligned properly. I can confirm, that this series

Re: [Mesa-dev] [PATCH] util/disk_cache: fix d7b3707c612

On 13 February 2017 at 20:31, Jan Vesely wrote: > On Sat, 2017-02-11 at 22:32 +1100, Timothy Arceri wrote: >> I forgot to error check stat() and also I wasn't using the subdir in >> is_two_character_sub_directory(). > > can you (mostly) swap title and description? > git id

Re: [Mesa-dev] [RFC PATCH 1/4] driconf: add new force_compat_profile option

On Feb 14, 2017 11:50 AM, "Marek Olšák" wrote: On Feb 14, 2017 4:11 AM, "Michel Dänzer" wrote: On 14/02/17 09:28 AM, Samuel Pitoiset wrote: > On 02/13/2017 11:43 PM, Marek Olšák wrote: >> On Mon, Feb 13, 2017 at 5:06 PM, Marek Olšák

[Mesa-dev] [PATCH v3 00/24] i965 Ivybridge ARB_gpu_shader_fp64 / OpenGL 4.0

Hi, This series implements initial support for Ivybridge FP64 for both align16 and align1 backends, and with that we can enable FP64 and OpenGL 4.0 in Ivybridge. These patches are available in our repository for testing. You can clone it using the following command: $ git clone -b

[Mesa-dev] [PATCH v3 04/24] i965/fs: double regioning parameters and execsize for DF in IVB/BYT

From: "Juan A. Suarez Romero" In IVB and BYT, both regioning parameters and execution sizes are measured as 32-bits element size. So when we have something like: mov(8) g2<1>DF g3<4,4,1>DF We are not actually moving 8 doubles (our intention), but 4 doubles. We need to

[Mesa-dev] [PATCH v3 01/24] i965/disasm: also print nibctrl in IVB for execsize=8

From: Iago Toral Quiroga 4-wide DF operations where NibCtrl applies require and execsize of 8 in IvyBridge/BayTrail. v2: - Refactor NibCtrl printing (Matt) Reviewed-by: Matt Turner Reviewed-by: Francisco Jerez ---

[Mesa-dev] [PATCH v3 02/24] i965: Handle IVB DF differences in the validator.

From: Matt Turner On IVB/BYT, region parameters and execution size for DF are in terms of 32-bit elements, so they are doubled. For evaluating the validity of an instruction, we halve them. v2 (Sam): - Add comments. Reviewed-by: Samuel Iglesias Gonsálvez

[Mesa-dev] [PATCH v3 03/24] i965/fs: add helper to retrieve instruction data size

From: "Juan A. Suarez Romero" The execution data size is the biggest type size of any instruction operand. We will use it to know if the instruction deals with DF, because in Ivy we need to double the execution size and regioning parameters. v2: - Fix typo in commit log

[Mesa-dev] [PATCH v3 19/24] i965/vec4: fix SIMD-with lowering for CMP/MOV instructions with conditional modifiers

From: "Juan A. Suarez Romero" When splitting a CMP/MOV instruction with NULL dest, DF sources, and conditional modifier; we can't use directly the flag registers, as they will have the wrong results in IVB/BYT after the scalarization. Rather, we need to store the result in

[Mesa-dev] [PATCH v3 08/24] i965/fs: fix dst stride in IVB/BYT type conversions

From: "Juan A. Suarez Romero" When converting a DF to 32-bit conversions, we set dst stride to 2, to fulfill alignment restrictions because the upper Dword of every Qword will be written with undefined value. But in IVB/BYT, this is not necessary, as each DF conversion

[Mesa-dev] [PATCH v3 09/24] i965/fs: fix lower SIMD width for IVB/BYT's MOV_INDIRECT

From: "Juan A. Suarez Romero" According to the IVB and HSW PRMs: "2.When the destination requires two registers and the sources are indirect, the sources must use 1x1 regioning mode." So for DF instructions the execution size is not limited by the number of address

[Mesa-dev] [PATCH v3 12/24] i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT

The hardware applies the same channel enable signals to both halves of the compressed instruction which will be just wrong under non-uniform control flow. Fix this by splitting those instructions to SIMD4. Signed-off-by: Samuel Iglesias Gonsálvez Reviewed-by: Francisco

[Mesa-dev] [PATCH v3 14/24] i965/vec4: keep original type when dealing with null registers

From: "Juan A. Suarez Romero" Keep the original type when dealing with null registers. Specially because we do no want to introduce an implicit conversion between types that could affect the conditional flags. This affects specially when the original type is DF, and we are

[Mesa-dev] [PATCH v3 07/24] i965/fs: generalize the legalization d2x pass

Add support to SEL instruction and add an assert to detect unsupported instructions than do d2x conversions. Signed-off-by: Samuel Iglesias Gonsálvez --- Curro, this patch legalizes SEL instruction too. If other optimizations modify later any SEL's (or any other

[Mesa-dev] [PATCH v3 05/24] i965/fs: clamp exec_size when an instruction has a scalar DF source

Then the SIMD lowering pass will get rid of any compressed instructions with scalar source (whether force_writemask_all or not) and we avoid hitting the Gen7 region decompression bug. Signed-off-by: Samuel Iglesias Gonsálvez Suggested-by: Francisco Jerez

[Mesa-dev] [PATCH v3 13/24] i965/vec4: split DF instructions and later double its execsize in IVB/BYT

We need to split DF instructions in two on IVB/BYT as it needs an execsize 8 to process 4 DF values (one GRF in total). v2: - Rename helper and make it static inline function (Matt). - Fix indention and add braces (Matt). Signed-off-by: Samuel Iglesias Gonsálvez ---

[Mesa-dev] [PATCH v3 11/24] i965/fs: Get 64-bit indirect moves working on IVB.

From: Francisco Jerez Reviewed-by: Samuel Iglesias Gonsálvez --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 27 -- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH v3 16/24] i965/vec4: fix SIMD-width lowering for VEC4_OPCODE_FROM_DOUBLE in IVB/BYT

From: "Juan A. Suarez Romero" When splitting VEC4_OPCODE_FROM_DOUBLE in Ivybridge/Baytrail, the second part should use a temporal register, and then move the values to the second half of the original destination, so we get all the results in the same register. v2: - Fix

[Mesa-dev] [PATCH v3 06/24] i965: Use <0, 2, 1> region for scalar DF sources on IVB/BYT.

From: Matt Turner On HSW+, scalar DF sources can be accessed using the normal <0,1,0> region, but on IVB and BYT DF regions must be programmed in terms of floats. A <0,2,1> region accomplishes this. v2: - Apply region <0,2,1> in brw_reg_from_fs_reg() (Curro). Signed-off-by:

[Mesa-dev] [PATCH v3 10/24] i965: Use source region <1, 2, 0> when converting to DF.

From: Matt Turner Doing so allows us to use a single MOV in VEC4_OPCODE_TO_DOUBLE instead of two. Reviewed-by: Samuel Iglesias Gonsálvez --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 28 +++-

[Mesa-dev] [PATCH v3 20/24] i965/vec4: Fix exec size for MOVs SET_{HIGH, LOW}_32BIT.

From: Matt Turner Otherwise for a pack_double_2x32_split opcode, we emit: vec1 64 ssa_135 = pack_double_2x32_split ssa_133, ssa_134 mov(8) g5<1>UD g5<4>.xUD { align16 1Q compacted }; mov(8) g7<2>UD g5<4,4,1>UD

[Mesa-dev] [PATCH v3 15/24] i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYT

From: "Juan A. Suarez Romero" In the generator we must generate slightly different code for Ivybridge/Baytrail, because of the way the stride works in this hardware. --- src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 17 - 1 file changed, 16

Re: [Mesa-dev] [RFC PATCH 1/4] driconf: add new force_compat_profile option

On 14 February 2017 at 13:02, Samuel Pitoiset wrote: > On 02/14/2017 01:54 PM, Edmondo Tommasina wrote: >> >> "ignore_compat_version_limit" >> >> "allow_higher_compat_version"? > > > "allow_higher_compat_version" looks good to me. Anyone else? :) >

[Mesa-dev] Query with respect to support of x32

Hi, I am using mesa 12.0.1 from yocto project (http://git.yoctoproject.org/cgit/cgit.cgi/poky/tree/meta/recipes-graphics/mesa/mesa_12.0.1.bb?h=morty). While building core-image-sato ( which is the graphical image ), I found that Qt5 examples for opengl are failing for x32. The target machine

[Mesa-dev] [Bug 99517] [TRACKER] Mesa 17.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=99517 Emil Velikov changed: What|Removed |Added Resolution|--- |FIXED

[Mesa-dev] [PATCH v2 2/4] drirc: add allow_higher_compat_version for Worms WMD

v2: s/force_compat_profile/allow_higher_compat_version Signed-off-by: Samuel Pitoiset Reviewed-by: Marek Olšák (v1) --- src/mesa/drivers/dri/common/drirc | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/common/drirc

[Mesa-dev] [PATCH v2 1/4] driconf: add allow_higher_compat_version option

Mesa currently doesn't allow to create 3.1+ compatibility profiles mainly because various features are unimplemented and bugs can happen. However, some buggy apps request a compat profile without using any old features unimplemented in mesa, and they fail to start. This option should help some

[Mesa-dev] [PATCH v2 4/4] drirc: add allow_higher_compat_version for Tropico 5

v2: s/force_compat_profile/allow_higher_compat_version Signed-off-by: Samuel Pitoiset Reviewed-by: Marek Olšák (v1) --- src/mesa/drivers/dri/common/drirc | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/common/drirc

[Mesa-dev] [PATCH v2 3/4] drirc: add allow_higher_compat_version for Crookz - The Big Heist

v2: s/force_compat_profile/allow_higher_compat_version Signed-off-by: Samuel Pitoiset Reviewed-by: Marek Olšák (v1) --- src/mesa/drivers/dri/common/drirc | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/common/drirc

Re: [Mesa-dev] Query with respect to support of x32

On Tue, Feb 14, 2017 at 3:12 PM, Haridasan, Sujith wrote: > I am using mesa 12.0.1 from yocto project > (http://git.yoctoproject.org/cgit/cgit.cgi/poky/tree/meta/recipes-graphics/mesa/mesa_12.0.1.bb?h=morty). > While building core-image-sato ( which is the graphical

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