Re: [Mesa-dev] [PATCH 8/8] i965: remove now unused GLSL IR optimisations

On 18 April 2017 at 06:52, Timothy Arceri wrote: > These are no longer used since the previous commit. Patches 4 - 8 are: Acked-by: Elie Tournier > --- > src/mesa/drivers/dri/i965/Makefile.sources | 2 - >

[Mesa-dev] [PATCH] swr: simd16 vs work

Build VS with alternating output for the current simd16 fe double-pump of a simd8 shader. --- src/gallium/drivers/swr/swr_shader.cpp | 30 +- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/swr/swr_shader.cpp

Re: [Mesa-dev] [PATCH 3/3] egl/android: Dequeue buffers inside EGL calls (v2)

Hi Tomasz, On 19 April 2017 at 08:00, Tomasz Figa wrote: > Android buffer queues can be abandoned, which results in failing to > dequeue next buffer. Currently this would fail somewhere deep within > the DRI stack calling loader's getBuffers*(), without any error > reporting

[Mesa-dev] [Bug 100668] No pixel formats with WGL_SWAP_UNDEFINED_ARB && WGL_DOUBLE_BUFFER_ARB=true

https://bugs.freedesktop.org/show_bug.cgi?id=100668 Charles Huber changed: What|Removed |Added Resolution|--- |NOTABUG

Re: [Mesa-dev] [PATCH 3/9] freedreno/ir3: resync instr-a3xx.h/disasm-a3xx.c

2017-04-19 0:15 GMT+02:00 Rob Clark : > Sync to the same files from freedreno.git to correct decoding of ldgb/ > stgb instructions. > > Signed-off-by: Rob Clark > --- > src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c | 2 +- >

[Mesa-dev] [PATCH v5 2/3] mesa/glthread: add tracking of PBO binding

In gl core, buffer must be reserved first by CreateBuffers/GenBuffers to be valid. v4: update comments based on Nicolai review Signed-off-by: Gregory Hainaut --- src/mesa/main/marshal.c | 36 +--- 1 file changed, 33 insertions(+), 3

[Mesa-dev] [PATCH v5 0/3] asynchronous pbo transfer with glthread

Hello, Please find the latest version that include a small fix for hash deletion. I think the series is good now. Please review/ack it. Allow to handle this kind of case: genBuffer(); BindBuffer(pbo) DeleteBuffer(pbo); BindBuffer(rand_pbo) TexSubImage2D(user_memory_pointer); //

[Mesa-dev] [PATCH v5 3/3] mapi/glthread: generate asynchronous code for PBO transfer

Improve speed on PCSX2 v2: Add ppbo/ubpo status in XML file Disable variable parameter (as the pointer would be a fixed offset) v3: split buffer tracking into separate patches. use 'goto fallback_to_sync' when asynchronous transfer isn't supported v4: add Nicolai comment to explain why ppbo

[Mesa-dev] [PATCH v5 1/3] mesa/glthread: track buffer creation/destruction

It would be used in next commit to allow asynchronous PBO transfer. The tracking saves the buffer name into a hash. Saving pointer will be more complex as the buffer is created in BindBuffer due to IsBuffer insanity. Perf wise DeleteBuffers is now synchronous for robustness. v5: properly delete

[Mesa-dev] [PATCH] mesa: fix Windows build error related to getuid()

getuid() and geteuid() are not present on Windows. --- src/mesa/main/context.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index 984c9e0..3570f94 100644 --- a/src/mesa/main/context.c +++ b/src/mesa/main/context.c @@

Re: [Mesa-dev] [0.5/16] i965/blorp/gen9: Do not try deferred mcs allocation for CCS_E

On Monday, February 27, 2017 10:44:42 AM PDT Topi Pohjolainen wrote: > For lossless compression mcs is always allocated when miptree > itself is created. The deferred logic in blorp is only meant for > CCS_D (single sample fast clear without compression). > > In

[Mesa-dev] [PATCH] radv: Add shader prefetch.

Gives me approximately a 2% perf increase in bot dota2 & talos. Having descriptors (both sets and vertex buffers) prefetched didn't help so I didn't include that. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 6 ++ src/amd/vulkan/radv_private.h

Re: [Mesa-dev] [PATCH] swr: simd16 vs work

Reviewed-by: Bruce Cherniak > On Apr 19, 2017, at 8:41 AM, Tim Rowley wrote: > > Build VS with alternating output for the current simd16 fe double-pump > of a simd8 shader. > --- > src/gallium/drivers/swr/swr_shader.cpp | 30

[Mesa-dev] [Bug 100708] Trine 2 doesn't start on radeonsi on mesa 17

https://bugs.freedesktop.org/show_bug.cgi?id=100708 --- Comment #2 from Nikita Krupenko --- I haven't tested with 12 and 13 version (steam always crashes on start if I use /usr/lib/dri/radeonsi_dri.so from that build, may be because I use configured flag

[Mesa-dev] [PATCH v2 1/2] nvc0/ir: Only store viewport in scratch register for GP

EMIT only applies to geometry shaders. For everything else, we want to export the viewport normally. Signed-off-by: Lyude Changes since v1: - Put back old conditional for Converter::storeDst Signed-off-by: Lyude ---

Re: [Mesa-dev] [PATCH 2/2] intel/isl: Only create a CCS buffer if the surface format supports it

On Tue, Apr 18, 2017 at 07:58:37PM -0700, Jason Ekstrand wrote: > On Tue, Apr 18, 2017 at 4:31 PM, Nanley Chery wrote: > > > Signed-off-by: Nanley Chery > > --- > > src/intel/isl/isl.c | 5 - > > 1 file changed, 4 insertions(+), 1

[Mesa-dev] [PATCH 2/2] nvc0: Add support for ARB_vertex_shader{layer, viewport_index}

Enables support for the ARB_vertex_shader_layer and ARB_vertex_shader_layer_viewport_index extensions for the GM200. Signed-off-by: Lyude --- src/gallium/drivers/nouveau/nvc0/nvc0_context.h| 1 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-

[Mesa-dev] [PATCH 0/2] Add support for ARB_vertex_shader_{layer, viewport_index}

Adds support for the ARB_vertex_shader{layer,viewport_index} extensions on the GM200. Lyude (2): nvc0/ir: Export viewport index in fragment shaders nvc0: Add support for ARB_vertex_shader{layer,viewport_index} .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 22 +-

[Mesa-dev] [PATCH 1/2] nvc0/ir: Export viewport index in fragment shaders

Since ABR_vertex_shader_layer/viewport_index enables the ability to interact with gl_ViewportIndex from the fragment shader, we don't want to skip emitting the viewport index for fragment shaders. As well, only save the viewport index into a scratch register for Geometry shaders, since EMIT is

Re: [Mesa-dev] [PATCH 1/2] nvc0/ir: Export viewport index in fragment shaders

On Wed, Apr 19, 2017 at 5:10 PM, Lyude wrote: > Since ABR_vertex_shader_layer/viewport_index enables the ability to > interact with gl_ViewportIndex from the fragment shader, we don't want > to skip emitting the viewport index for fragment shaders. > > As well, only save the

Re: [Mesa-dev] [PATCH 2/2] nvc0: Add support for ARB_vertex_shader{layer, viewport_index}

On Wed, Apr 19, 2017 at 5:10 PM, Lyude wrote: > Enables support for the ARB_vertex_shader_layer and > ARB_vertex_shader_layer_viewport_index extensions for the GM200. There are no such extensions. There are AMD_bla bla extensions. Also, Nicolai recently added a new cap called

[Mesa-dev] [Bug 90264] [Regression, bisected] Tooltip corruption in Chrome

https://bugs.freedesktop.org/show_bug.cgi?id=90264 Emanuel Czirai changed: What|Removed |Added CC|

Re: [Mesa-dev] [Mesa-stable] [PATCH] st/clover: add space between < and ::

On 04/19/2017 01:05 PM, Emil Velikov wrote: > From: Emil Velikov > > As pointed out by compiler > > ./llvm/codegen.hpp:52:22: error: ‘<::’ cannot begin a template-argument list > [-fpermissive] > ./llvm/codegen.hpp:52:22: note: ‘<:’ is an alternate spelling for ‘[’.

[Mesa-dev] [PATCH v2 2/2] nvc0: Add support for AMD_vertex_shader{layer, viewport_index}

From: Ilia Mirkin Enables support for the AMD_vertex_shader_layer and AMD_vertex_shader_layer_viewport_index extensions for the GM200. Signed-off-by: Lyude Signed-off-by: Ilia Mirkin Changes since v1: - Add comments in release

[Mesa-dev] [PATCH v2 0/2] Add support for AMD_vertex_shader_{layer, viewport_index}

Adds support for the ARB_vertex_shader{layer,viewport_index} extensions on the GM200. Ilia Mirkin (1): nvc0: Add support for AMD_vertex_shader{layer,viewport_index} Lyude (1): nvc0/ir: Only store viewport in scratch register for GP docs/relnotes/17.1.0.html | 2 ++

Re: [Mesa-dev] [RFC PATCH 03/26] glsl: introduce new base types for bindless samplers/images

On 04/19/2017 11:14 AM, Nicolai Hähnle wrote: On 19.04.2017 09:51, Samuel Pitoiset wrote: On 04/18/2017 11:26 PM, Nicolai Hähnle wrote: On 18.04.2017 21:49, Dave Airlie wrote: On 19 April 2017 at 05:30, Samuel Pitoiset wrote: On 04/18/2017 08:14 PM, Nicolai

[Mesa-dev] [PATCH] radv: Set variant code_size when created from the cache.

Signed-off-by: Bas Nieeuwenhuizen --- src/amd/vulkan/radv_pipeline_cache.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index 5f6355f0d1a..0ab4d2a26e3 100644 ---

Re: [Mesa-dev] [PATCH 2/2] i965: Add ARB_fragment_shader_interlock support.

Hi Pam, looks good overall, a couple of comments below, Plamena Manolova writes: > Adds suppport for ARB_fragment_shader_interlock. We achieve > the interlock and fragment ordering by issuing a memory fence > via sendc. > > Signed-off-by: Plamena Manolova

[Mesa-dev] [PATCH 02/35] genxml: Remove unused parameter.

'start' parameter from Group.emit_pack_function() is useless. Signed-off-by: Rafael Antognolli --- src/intel/genxml/gen_pack_header.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/genxml/gen_pack_header.py

[Mesa-dev] [PATCH 25/35] i965: Port gen7+ state emitting code to genxml.

Ported in this patch: - 3DSTATE_DS - 3DSTATE_GS - 3DSTATE_HS - 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources | 6 +- src/mesa/drivers/dri/i965/brw_state.h | 18 +-

[Mesa-dev] [PATCH 07/35] i965: Port Gen6+ DEPTH_STENCIL state to genxml.

From: Kenneth Graunke This emits 3DSTATE_WM_DEPTH_STENCIL on Gen8+ or DEPTH_STENCIL_STATE (and the relevant pointer packets) on Gen6-7.5 from a single function. Signed-off-by: Kenneth Graunke Signed-off-by: Rafael Antognolli

[Mesa-dev] [PATCH 13/35] i965: Port Gen6+ 3DSTATE_SBE state to genxml.

Emit 3DSTATE_SBE on Gen6+ using brw_batch_emit helper, that uses pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 2 +- src/mesa/drivers/dri/i965/brw_state.h | 2 +-

[Mesa-dev] [PATCH 15/35] genxml: Add alias for MOCS.

Use an alias, so we can set the same value as the #define's. Signed-off-by: Rafael Antognolli --- src/intel/genxml/gen8.xml | 1 + src/intel/genxml/gen9.xml | 1 + 2 files changed, 2 insertions(+) diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml

[Mesa-dev] [PATCH 18/35] i965: Port gen6+ 3DSTATE_WM to genxml.

Emit 3DSTATE_WM on Gen6+ using brw_batch_emit helper, that uses pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 1 +- src/mesa/drivers/dri/i965/brw_state.h | 14 +-

[Mesa-dev] [PATCH 16/35] i965: Port gen7+ 3DSTATE_SOL to genxml.

Emit 3DSTATE_SOL on Gen7+ using brw_batch_emit helper, that uses pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 1 +- src/mesa/drivers/dri/i965/brw_state.h | 6 +-

[Mesa-dev] [PATCH 03/35] genxml: Fix python crash when no dwords are found.

If the 'dwords' dict is empty, max(dwords.keys()) throws an exception. This case could happen when we have an instruction that is only an array of other structs, with variable length. v2: - Add another clause for empty dwords and make it work with python 3 (Dylan) - Set the length to 0

[Mesa-dev] [PATCH 14/35] i965: Remove calculate_attr_overrides.

This function now lives inside genX_state_upload.c. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources | 1 +- src/mesa/drivers/dri/i965/brw_state.h | 8 +- src/mesa/drivers/dri/i965/gen6_sf_state.c | 265

[Mesa-dev] [PATCH 22/35] i965: Port gen6+ 3DSTATE_VS to genxml.

Emit 3DSTATE_VS on Gen6+ using brw_batch_emit helper, that uses pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 2 +- src/mesa/drivers/dri/i965/brw_state.h | 3 +-

[Mesa-dev] [PATCH 23/35] genxml: Clip guardbands are float, not int.

This makes genxml create the right struct types, and generate the right batch commands. Signed-off-by: Rafael Antognolli --- src/intel/genxml/gen6.xml | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/intel/genxml/gen6.xml

[Mesa-dev] [PATCH 31/35] genxml: Normalize xml for 3DSTATE_MULTISAMPLE.

Name the options to "Pixel Location": - PIXLOC_CENTER -> CENTER - PIXLOC_UL_CORNER -> UL_CORNER Signed-off-by: Rafael Antognolli --- src/intel/blorp/blorp_genX_exec.h | 4 +--- src/intel/genxml/gen6.xml | 4 ++-- src/intel/genxml/gen7.xml | 4

[Mesa-dev] [PATCH 00/35] This series converts part of the state emitting code to use genxml

structs. All the code was moved to a single file (genX_state_upload.c) and state emitting code for different platforms was merged into one function per state. There is still a lot of code to convert, and this is still a work in progress, but these seemed to be the largest functions and I wanted

Re: [Mesa-dev] [PATCH 01/35] intel/aubinator: Correctly read variable length structs.

Tested-by: Jason Ekstrand On Wed, Apr 19, 2017 at 4:55 PM, Rafael Antognolli < rafael.antogno...@intel.com> wrote: > Before this commit, when a group with count="0" is found, only one field > is added to the struct representing the instruction. This causes only > one entry

[Mesa-dev] [PATCH 1/3] genxml/pack: Allow hex values in the XML

--- src/intel/genxml/gen_pack_header.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/genxml/gen_pack_header.py b/src/intel/genxml/gen_pack_header.py index 2a70945..5b55143 100644 --- a/src/intel/genxml/gen_pack_header.py +++

[Mesa-dev] [PATCH 2/3] genxml: Add better support for MI_MATH

This breaks the guts of MI_MATH (the instruction part) out into its own structure with proper named values. --- src/intel/genxml/gen75.xml | 69 +++--- src/intel/genxml/gen8.xml | 69 +++--- src/intel/genxml/gen9.xml

[Mesa-dev] [PATCH 3/3] anv/query: Use genxml for MI_MATH

--- src/intel/vulkan/genX_query.c | 71 +-- 1 file changed, 28 insertions(+), 43 deletions(-) diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index 2c70b4f..126431b 100644 --- a/src/intel/vulkan/genX_query.c +++

Re: [Mesa-dev] [PATCH v2 2/2] nvc0: Add support for AMD_vertex_shader{layer, viewport_index}

2017-04-20 6:38 GMT+08:00 Lyude : > From: Ilia Mirkin > > Enables support for the AMD_vertex_shader_layer and > AMD_vertex_shader_layer_viewport_index extensions for the GM200. > > Signed-off-by: Lyude > Signed-off-by: Ilia Mirkin

Re: [Mesa-dev] [PATCH v4 0/3] asynchronous pbo transfer with glthread

Hello All, I ported PCSX2 to xcb (at least the non-glx part). Crash is gone :) So I can send the v5 with the hash delete fix. However, Mesa might receive crash bug report when glthread is enabled on a random app that doesn't use xcb/XinitThread properly. Maybe it would be better to always

[Mesa-dev] [PATCH 33/35] genxml: Normalize xml for 3DSTATE_CC_STATE_POINTERS.

- "COLOR_CALC_STATE Change" -> "Color Calc State Pointer Valid" - "Pointer to COLOR_CALC_STATE" -> "Color Calc State Pointer" - "BackFace" -> "Backface" Signed-off-by: Rafael Antognolli --- src/intel/blorp/blorp_genX_exec.h | 4 ++-- src/intel/genxml/gen6.xml

[Mesa-dev] [PATCH 09/35] i965: Port Gen6+ 3DSTATE_CLIP state to genxml.

Emit clip state on Gen6+ using brw_batch_emit helper, using pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/brw_state.h | 1 +- src/mesa/drivers/dri/i965/gen6_clip_state.c | 139 +--

[Mesa-dev] [PATCH 28/35] i965: Port gen6+ 3DSTATE_SCISSOR_STATE_POINTERS to use genxml.

Emit 3DSTATE_SCISSOR_STATE_POINTERS using brw_batch_emit, and pack the scissor states using GENX(SCISSOR_RECT_pack), generated from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/brw_state.h | 1 +-

[Mesa-dev] [PATCH 26/35] i965: Port gen6+ blend state code to genxml.

Upload blend states using GENX(BLEND_STATE_ENTRY_pack), generated from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 1 +- src/mesa/drivers/dri/i965/brw_state.h | 3 +- src/mesa/drivers/dri/i965/gen6_cc.c

[Mesa-dev] [PATCH 12/35] i965: Port gen6+ 3DSTATE_SF to genxml.

Emit sf state on Gen6+ using brw_batch_emit helper, using pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/brw_state.h | 3 +- src/mesa/drivers/dri/i965/brw_util.h | 25 +-

[Mesa-dev] [PATCH 34/35] i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.

Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 1 +- src/mesa/drivers/dri/i965/brw_state.h | 1 +- src/mesa/drivers/dri/i965/gen6_cc.c | 90 + src/mesa/drivers/dri/i965/genX_state_upload.c

[Mesa-dev] [PATCH 27/35] i965: Port gen7+ 3DSTATE_TE to genxml.

Emit 3DSTATE_TE on Gen7+ using brw_batch_emit helper. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 1 +- src/mesa/drivers/dri/i965/brw_state.h | 1 +- src/mesa/drivers/dri/i965/gen7_te_state.c | 67

[Mesa-dev] [PATCH 30/35] i965: Port gen6+ emit vertices code to genxml.

The original brw_emit_vertices code is left intact for now, as it is still used by gen4-5. We are bringing all the code to genX_state_upload.c, and gen4-5 state emitting code is left on a separate file. Signed-off-by: Rafael Antognolli ---

[Mesa-dev] [PATCH 29/35] i965: Port push constant code to genxml.

The following states are ported on this patch: - gen6_gs_push_constants - gen6_vs_push_constants - gen6_wm_push_constants - gen7_tes_push_constants Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 4 +-

[Mesa-dev] [PATCH 01/35] intel/aubinator: Correctly read variable length structs.

Before this commit, when a group with count="0" is found, only one field is added to the struct representing the instruction. This causes only one entry to be printed by aubinator, for variable length groups. With this commit we "detect" that there's a variable length group (count="0") and store

[Mesa-dev] [PATCH 06/35] i965: Get real per-gen atom lists.

From: Kenneth Graunke Build libi965_gen[4,5].la too, since they contain the declaration for gen[4,5]_init_atoms. Remove gen4 and 5 init_atoms from genX_state_upload. Signed-off-by: Kenneth Graunke Signed-off-by: Rafael Antognolli

[Mesa-dev] [PATCH 04/35] genxml: Make BLEND_STATE command support variable length array.

We need to emit BLEND_STATE, which size is 1 + 2 * nr_draw_buffers dwords (on gen8+), but the BLEND_STATE struct length is always 17. By marking it size 1, which is actually the size of the struct minus the BLEND_STATE_ENTRY's, we can emit a BLEND_STATE of variable number of entries. For gen6 and

[Mesa-dev] [PATCH 17/35] i965: Port gen7+ 3DSTATE_PS to genxml.

Emit 3DSTATE_PS on Gen7+ using brw_batch_emit helper, that uses pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/gen7_wm_state.c | 137 +---

[Mesa-dev] [PATCH 08/35] genxml: Rename clip enable property.

There are two variants: - Clip Enable - CLIP Enable (on gen6) Rename everything to Clip Enable. Signed-off-by: Rafael Antognolli --- src/intel/genxml/gen6.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/genxml/gen6.xml

[Mesa-dev] [PATCH 05/35] i965: Add genxml related plumbing in a new genX_state_upload.c file.

From: Kenneth Graunke Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/Makefile.sources| 15 ++- src/mesa/drivers/dri/i965/genX_state_upload.c | 109 +++- 2 files changed, 119 insertions(+), 5 deletions(-) create

[Mesa-dev] [PATCH 19/35] i965: Port gen8+ 3DSTATE_PS_EXTRA to genxml.

Emit 3DSTATE_PS_EXTRA on Gen8+ using brw_batch_emit helper, that uses pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/Makefile.sources| 1 +- src/mesa/drivers/dri/i965/brw_state.h | 10 +-

[Mesa-dev] [PATCH 11/35] genxml: Update xml for 3DSTATE_SF.

- Normalize "Anti-Aliasing Enable" - Add "Multisample Rasterization Mode" constants - Rename "Use Point Width on Vertex" to "Vertex" - Rename "Use Point Width from State" to "State" Signed-off-by: Rafael Antognolli --- src/intel/genxml/gen6.xml | 15

[Mesa-dev] [PATCH 20/35] genxml: Make "Reorder Mode" fields consistent.

From: Kenneth Graunke Both GS and SOL have these fields. Some were ReorderEnable = true, some were ReorderMode = REORDER_TRAILING, and some were just TRAILING. Signed-off-by: Kenneth Graunke --- src/intel/genxml/gen6.xml| 5 -

Re: [Mesa-dev] [PATCH 2/3] genxml: Add better support for MI_MATH

On Wednesday, April 19, 2017 5:17:26 PM PDT Jason Ekstrand wrote: > This breaks the guts of MI_MATH (the instruction part) out into its own > structure with proper named values. Patch 1 is: Acked-by: Kenneth Graunke (...maybe Dylan will have an opinion...) Patches 2-3

Re: [Mesa-dev] [PATCH v3] radv: Use host memory pool for non-freeable descriptors.

Acked-by: Edward O'Callaghan On 04/19/2017 09:53 AM, Bas Nieuwenhuizen wrote: > v2: Handle out of pool memory error. > v3: Actually use VK_ERROR_OUT_OF_POOL_MEMORY_KHR for the error condition. > > Signed-off-by: Bas Nieuwenhuizen > --- >

Re: [Mesa-dev] [RFC 2/2] glx: drop GLX_MESA_multithread_makecurrent support

Timothy Arceri writes: > This extension is not supported by GLVND, also as far > as I can tell this extension requires us to do extra > locking for objects that are not normaly shared across > contexts, like vertex array and pipeline objects. Can you explain how it would

Re: [Mesa-dev] [PATCH v2 1/2] nvc0/ir: Only store viewport in scratch register for GP

2017-04-20 6:38 GMT+08:00 Lyude : > EMIT only applies to geometry shaders. For everything else, we want to > export the viewport normally. > > Signed-off-by: Lyude Reviewed-by: Boyan Ding > > Changes since v1: > - Put back old

Re: [Mesa-dev] [PATCH 08/35] genxml: Rename clip enable property.

On Wednesday, April 19, 2017 4:56:01 PM PDT Rafael Antognolli wrote: > There are two variants: >- Clip Enable >- CLIP Enable (on gen6) > > Rename everything to Clip Enable. > > Signed-off-by: Rafael Antognolli > --- > src/intel/genxml/gen6.xml | 2 +- > 1

Re: [Mesa-dev] [PATCH] mesa: fix Windows build error related to getuid()

Thanks Brian. Reviewed-by: Timothy Arceri On 20/04/17 04:14, Brian Paul wrote: getuid() and geteuid() are not present on Windows. --- src/mesa/main/context.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/main/context.c

Re: [Mesa-dev] [RFC 1/2] Revert "mapi: rewrite u_current_init() function without u_thread_self()"

On 19/04/17 20:32, Emil Velikov wrote: On 19 April 2017 at 08:45, Timothy Arceri wrote: This reverts commit 458c7490c29ef2960a33a089f65490e044da5d27. The commit did not revert cleanly so this was fixed up by hand. u_thread_self() will be used by the following patch. I

Re: [Mesa-dev] [PATCH 2/2] i965: Add ARB_fragment_shader_interlock support.

Hi Francisco, Thank you for reviewing! On Wed, Apr 19, 2017 at 4:18 PM, Francisco Jerez wrote: > Hi Pam, looks good overall, a couple of comments below, > > Plamena Manolova writes: > > > Adds suppport for ARB_fragment_shader_interlock. We

[Mesa-dev] [PATCH 35/35] i965: Port gen6+ state emitting code to genxml.

On this patch, we port: - brw_polygon_stipple - brw_polygon_stipple_offset - brw_line_stipple - brw_drawing_rect The original code is still left behind because it is being used by gen4-5. Signed-off-by: Rafael Antognolli ---

[Mesa-dev] [PATCH 21/35] genxml: 3DSTATE_VS rename Function Enable to Enable.

Signed-off-by: Rafael Antognolli --- src/intel/blorp/blorp_genX_exec.h | 2 +- src/intel/genxml/gen6.xml | 2 +- src/intel/genxml/gen7.xml | 2 +- src/intel/genxml/gen75.xml| 2 +- src/intel/genxml/gen8.xml | 2 +-

[Mesa-dev] [PATCH 10/35] i965: Port Gen8+ 3DSTATE_RASTER state to genxml.

Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from genxml. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/brw_state.h | 1 +- src/mesa/drivers/dri/i965/gen8_sf_state.c | 125 +---

[Mesa-dev] [PATCH 24/35] genxml: Rename "Function Enable" to "Enable".

Rename that field name on genxml for: - 3DSTATE_GS - gen6+ - 3DSTATE_DS - gen7+ - 3DSTATE_HS - gen7+ Signed-off-by: Rafael Antognolli --- src/intel/genxml/gen6.xml| 2 +- src/intel/genxml/gen7.xml| 6 +++--- src/intel/genxml/gen75.xml

[Mesa-dev] [PATCH 32/35] i965: Port gen6+ multisample state emitting code to genxml.

Emit 3DSTATE_MULTISAMPLE using brw_batch_emit. Signed-off-by: Rafael Antognolli --- src/mesa/drivers/dri/i965/brw_context.h| 9 +- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/gen6_multisample_state.c | 6 +-

Re: [Mesa-dev] [PATCH 23/35] genxml: Clip guardbands are float, not int.

On Wednesday, April 19, 2017 4:56:16 PM PDT Rafael Antognolli wrote: > This makes genxml create the right struct types, and generate the right > batch commands. > > Signed-off-by: Rafael Antognolli > --- > src/intel/genxml/gen6.xml | 8 > 1 file changed, 4

Re: [Mesa-dev] [PATCH 02/35] genxml: Remove unused parameter.

On Wednesday, April 19, 2017 4:55:55 PM PDT Rafael Antognolli wrote: > 'start' parameter from Group.emit_pack_function() is useless. > > Signed-off-by: Rafael Antognolli > --- > src/intel/genxml/gen_pack_header.py | 4 ++-- > 1 file changed, 2 insertions(+), 2

Re: [Mesa-dev] [RFC PATCH 03/26] glsl: introduce new base types for bindless samplers/images

On 19.04.2017 00:01, Ilia Mirkin wrote: On Tue, Apr 18, 2017 at 5:26 PM, Nicolai Hähnle wrote: On 18.04.2017 21:49, Dave Airlie wrote: On 19 April 2017 at 05:30, Samuel Pitoiset wrote: On 04/18/2017 08:14 PM, Nicolai Hähnle wrote: On

[Mesa-dev] [AppVeyor] mesa master #4122 failed

Build mesa 4122 failed Commit 1787a3163f by Timothy Arceri on 4/4/2017 5:45 AM: mesa: add KHR_no_error support to glVertexAttribDivisor()\n\nReviewed-by: Nicolai Hähnle Configure your notification preferences

Re: [Mesa-dev] [PATCH] st/clover: add space between < and ::

On 19.04.2017 13:05, Emil Velikov wrote: From: Emil Velikov As pointed out by compiler ./llvm/codegen.hpp:52:22: error: ‘<::’ cannot begin a template-argument list [-fpermissive] ./llvm/codegen.hpp:52:22: note: ‘<:’ is an alternate spelling for ‘[’. Insert

Re: [Mesa-dev] [RFC PATCH 03/26] glsl: introduce new base types for bindless samplers/images

On Wed, Apr 19, 2017 at 5:47 AM, Nicolai Hähnle wrote: > By the way, this is also how Ilia's example would be implemented. When > inlined, it could become something like: > > layout (bound_sampler) uniform sampler2D u_tex; > in sampler2D in_tex; > > void main() > { >

Re: [Mesa-dev] [RFC PATCH 03/26] glsl: introduce new base types for bindless samplers/images

On 04/19/2017 03:23 PM, Ilia Mirkin wrote: On Wed, Apr 19, 2017 at 5:47 AM, Nicolai Hähnle wrote: By the way, this is also how Ilia's example would be implemented. When inlined, it could become something like: layout (bound_sampler) uniform sampler2D u_tex; in

Re: [Mesa-dev] [PATCH v3] bin/get-{extra, fixes}-pick-list.sh: add support for ignore list

On 19 April 2017 at 08:56, Juan A. Suarez Romero wrote: > On Tue, 2017-04-11 at 10:46 +0200, Juan A. Suarez Romero wrote: >> Both scripts does not use a file with the commits to ignore. So if we >> have handled one of the suggested commits and decided we won't pick it, >> the

Re: [Mesa-dev] [RFC 2/2] glx: drop GLX_MESA_multithread_makecurrent support

On 19 April 2017 at 08:45, Timothy Arceri wrote: > This extension is not supported by GLVND, also as far > as I can tell this extension requires us to do extra > locking for objects that are not normaly shared across > contexts, like vertex array and pipeline objects. > >

Re: [Mesa-dev] [PATCH 3/4] st/mesa: automake: honour the vdpau header install location

On 19 April 2017 at 07:17, Nicolai Hähnle wrote: > Patches 1-3: > > Reviewed-by: Nicolai Hähnle > Thanks Nicolai! Pushed the three to master. -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH] i965: Solve Android native fence fd double close issue

Any comments to this patch? Thanks, Randy > -Original Message- > From: Xu, Randy > Sent: Tuesday, April 18, 2017 2:27 PM > To: mesa-dev@lists.freedesktop.org > Cc: Palli, Tapani ; Xu, Randy > Subject: [PATCH] i965: Solve Android native fence

Re: [Mesa-dev] [PATCH v5 0/3] asynchronous pbo transfer with glthread

On 20/04/17 01:54 AM, Gregory Hainaut wrote: > Hello, > > Please find the latest version that include a small fix for hash deletion. I > think the series is good now. Please review/ack it. I'm afraid I have to NACK it. As discussed in the v4 cover letter thread, Mesa's glthread cannot make any

Re: [Mesa-dev] [PATCH 4/4] HACK: st/clover: automake: set -fpermissive for clover/llvm

On 18 April 2017 at 20:26, Francisco Jerez wrote: > Emil Velikov writes: > >> Without it the compiler will barf at us with dozens of errors like >> the following. >> >> In file included from llvm/codegen/bitcode.cpp:34:0: >>

[Mesa-dev] [PATCH] st/clover: add space between < and ::

From: Emil Velikov As pointed out by compiler ./llvm/codegen.hpp:52:22: error: ‘<::’ cannot begin a template-argument list [-fpermissive] ./llvm/codegen.hpp:52:22: note: ‘<:’ is an alternate spelling for ‘[’. Insert whitespace between ‘<’ and ‘::’ Cc: Francisco

Re: [Mesa-dev] [RFC 1/2] Revert "mapi: rewrite u_current_init() function without u_thread_self()"

On 19 April 2017 at 08:45, Timothy Arceri wrote: > This reverts commit 458c7490c29ef2960a33a089f65490e044da5d27. > > The commit did not revert cleanly so this was fixed up by hand. > > u_thread_self() will be used by the following patch. I see your interesting in dropping

Re: [Mesa-dev] [PATCH] configure.ac: manually expand PKG_CHECK_VAR

On 18 April 2017 at 15:46, Brian Paul wrote: > On 04/18/2017 04:43 AM, Emil Velikov wrote: >> >> From: Emil Velikov >> >> The macro is introduced with pkgconfig v0.28 which isn't universally >> available. Thus it will error at configure stage. >> >>

Re: [Mesa-dev] [RFC] - Rewrite mesa website in Sphinx

On 11 April 2017 at 13:10, Jean Hertel wrote: > Any more thoughts on this? > > > I would really appreciate feedback from more contributors. > Indeed. Brian, Eric, others - how do you feel with the Sphinx edition of the site? If the current theme feels a bit off there's

Re: [Mesa-dev] [PATCH] swr: simd16 vs work

FWIW I think it would make a lot more sense if you'd just extend the gallivm code to be able to build proper simd16 shaders. But just my 2 cents... Roland Am 19.04.2017 um 15:41 schrieb Tim Rowley: > Build VS with alternating output for the current simd16 fe double-pump > of a simd8 shader. >

Re: [Mesa-dev] [PATCH v4 0/3] asynchronous pbo transfer with glthread

On 20/04/17 01:43 AM, gregory hainaut wrote: > Hello All, > > I ported PCSX2 to xcb (at least the non-glx part). Crash is gone :) > So I can send the v5 with the hash delete fix. > > However, Mesa might receive crash bug report when glthread is enabled > on a random app that doesn't use

Re: [Mesa-dev] [RFC 2/2] glx: drop GLX_MESA_multithread_makecurrent support

On 20/04/17 10:53, Eric Anholt wrote: Timothy Arceri writes: This extension is not supported by GLVND, also as far as I can tell this extension requires us to do extra locking for objects that are not normaly shared across contexts, like vertex array and pipeline

Re: [Mesa-dev] [PATCH 3/3] egl/android: Dequeue buffers inside EGL calls (v2)

On Wed, Apr 19, 2017 at 11:51 PM, Emil Velikov wrote: > Hi Tomasz, > > On 19 April 2017 at 08:00, Tomasz Figa wrote: >> Android buffer queues can be abandoned, which results in failing to >> dequeue next buffer. Currently this would fail somewhere

[Mesa-dev] [Bug 100708] Trine 2 doesn't start on radeonsi on mesa 17

https://bugs.freedesktop.org/show_bug.cgi?id=100708 --- Comment #3 from Michel Dänzer --- Marek, any ideas? Nikita, can you try if it still happens with Mesa Git master? -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for

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