The loop goes through the list of enabled extensions marking them as
enabled in the list, but this relies on every other extension being
initialized to false by default.
This bug would make us, for example, advertise certain device extension
entry points as available even when the corresponding
Hi Ilia,
On 4 February 2018 at 19:09, Ilia Mirkin wrote:
> One might have split this up into multiple patches, but it's just very
> repetitive and similar code.
You probably want to add this into gbm_to_dri_image_formats[] inside
src/gbm/backends/dri/gbm_dri.c, so Wayland
On Mon, Feb 5, 2018 at 6:24 AM, Daniel Stone wrote:
> Hi Ilia,
>
> On 4 February 2018 at 19:09, Ilia Mirkin wrote:
>> One might have split this up into multiple patches, but it's just very
>> repetitive and similar code.
>
> You probably want to add
Hi Dylan,
Am Freitag, 2. Februar 2018, 20:30:36 CET schrieb Dylan Baker:
> The linkage of all of the gallium media targets is broken in various
> ways in the meson build. This series should correct that by doing more
> what the autotools build does.
>
> You may note in the last 5 patches the
Reviewed-by: Lionel Landwerlin
Fixes: abc62282b5c "anv: Add a per-device table of enabled extensions"
We want it in 18.0 too I think.
Thanks a lot!
On 05/02/18 09:46, Iago Toral Quiroga wrote:
The loop goes through the list of enabled extensions marking them as
https://bugs.freedesktop.org/show_bug.cgi?id=104949
Bug ID: 104949
Summary: swrast: Epiphany WEB browser core dumps under Mesa
17.3.3
Product: Mesa
Version: 17.3
Hardware: Other
OS: All
Status:
https://bugs.freedesktop.org/show_bug.cgi?id=104949
Daniel Stone changed:
What|Removed |Added
CC|
On Sun, 2018-02-04 at 14:40 -0500, Connor Abbott wrote:
> On Mon, Dec 11, 2017 at 11:01 AM, Jason Ekstrand t> wrote:
> > On Mon, Dec 11, 2017 at 12:55 AM, Iago Toral
> > wrote:
> > >
> > > This didn't get any reviews yet. Any takers?
> > >
> > > On Fri,
On Sun, 2018-02-04 at 10:58 -0800, Matt Turner wrote:
> On Wed, Dec 13, 2017 at 11:21 PM, Iago Toral
> wrote:
> > On Tue, 2017-12-12 at 08:20 +0100, Iago Toral wrote:
> >
> > On Mon, 2017-12-11 at 08:01 -0800, Jason Ekstrand wrote:
> >
> > On Mon, Dec 11, 2017 at 12:55 AM,
Otherwise loop unrolling will fail to see the actual cost of
the unrolling operations when the loop body contains 64-bit integer
instructions, and very specially when the divmod64 lowering applies,
since its lowering is quite expensive.
Without this change, some in-development CTS tests for int64
Similar for the 4 case.
Suggested by Bas.
Signed-off-by: Samuel Pitoiset
---
src/compiler/nir/nir_opt_algebraic.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/nir/nir_opt_algebraic.py
b/src/compiler/nir/nir_opt_algebraic.py
index
On 1 February 2018 at 11:35, Emil Velikov wrote:
> On 25 January 2018 at 15:11, Stephan Gerhold wrote:
>> On Thu, Jan 25, 2018 at 11:22:10AM +, Emil Velikov wrote:
>>> On 24 January 2018 at 14:13, Stephan Gerhold wrote:
>>>
https://bugs.freedesktop.org/show_bug.cgi?id=104949
--- Comment #2 from Emil Velikov ---
Created attachment 137171
--> https://bugs.freedesktop.org/attachment.cgi?id=137171=edit
Force-disable extension/error out if using API while extension is not set
(In reply to
Otherwise the code size increases because the original fexp2()
instructions can't be deleted.
Signed-off-by: Samuel Pitoiset
---
src/compiler/nir/nir_opt_algebraic.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Mon, Feb 05, 2018 at 09:22:15AM +1100, Timothy Arceri wrote:
> This has been unused since 8761a04d0d93.
Reviewed-by: Elie Tournier
> ---
> src/intel/compiler/brw_nir.c | 8
> src/intel/compiler/brw_nir.h | 1 -
> 2 files changed, 9 deletions(-)
>
> diff
On 5 February 2018 at 07:02, Tapani Pälli wrote:
> v2: cleanup, move callbacks to _egl_display struct (Emil Velikov)
> adapt to earlier ctx->screen changes
>
> v3: remove useless checking, add _eglSetFuncName (Emil Velikov)
>
> Signed-off-by: Tapani Pälli
On 5 February 2018 at 07:02, Tapani Pälli wrote:
> Next patch will allow disk_cache instance to be created without
> path set for it, modify some test cases that assume disk_cache
> creation to fail with invalid path. Creation should succeed but
> simple put/get test fail.
On 5 February 2018 at 08:09, Tapani Pälli wrote:
> Hi;
>
>
> On 02/04/2018 11:57 PM, Mauro Rossi wrote:
>>
>> Similar to 90dd6e5 ("Android: egl: add dependency on libnativewindow")
>>
>> Fixes the following building errors:
>>
>> In file included from
On 02/04/2018 02:12 PM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
Instead of updating all modified gl_vertex_array_object::_VertexArray
entried just update those ones that are modified and enabled.
"entries"
"those ones that" -> "those that"
Also
On 05.02.2018 17:26, Emil Velikov wrote:
On 5 February 2018 at 07:02, Tapani Pälli wrote:
v2: cleanup, move callbacks to _egl_display struct (Emil Velikov)
adapt to earlier ctx->screen changes
v3: remove useless checking, add _eglSetFuncName (Emil Velikov)
Reviewed-by: Brian Paul
On 02/04/2018 04:01 PM, srol...@vmware.com wrote:
From: Roland Scheidegger
This parameter for _mesa_get_min_incations_per_fragment() was once used
by the intel driver, but it's long gone.
---
src/mesa/program/program.c
Reviewed-by: Jason Ekstrand
On Mon, Feb 5, 2018 at 3:08 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Reviewed-by: Lionel Landwerlin
> Fixes: abc62282b5c "anv: Add a per-device table of enabled extensions"
>
> We want it in
Reviewed-by: Jason Ekstrand
On Tue, Jan 23, 2018 at 5:11 AM, Iago Toral Quiroga
wrote:
> The SPIR-V parser splits in/out struct variables and creates
> a separate variable for each first-level member of the struct.
> When the struct variable has an
Tested-By: Karol Herbst
On Mon, Feb 5, 2018 at 6:15 AM, Ilia Mirkin wrote:
> The hardware skips over unallocated slots, so we have to make sure those
> registers are packed together.
>
> Fixes KHR-GL45.enhanced_layouts.fragment_data_location_api
>
>
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/Makefile.sources | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeon/Makefile.sources
b/src/gallium/drivers/radeon/Makefile.sources
index b756d72..f8ee860 100644
---
Implement required IBs for UVD HEVC encode.
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 965
1 file changed, 965 insertions(+)
create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
diff --git
Add UVD hevc encode pipe video codec creation entry
Signed-off-by: James Zhu
---
src/gallium/drivers/radeonsi/si_uvd.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_uvd.c
Add hevc encode hardware interface for UVD
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc.h | 459
1 file changed, 459 insertions(+)
create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
diff --git
https://bugs.freedesktop.org/show_bug.cgi?id=104777
Juan A. Suarez changed:
What|Removed |Added
Resolution|--- |FIXED
Implement UVD hevc encode functions
Signed-off-by: James Zhu
---
1 | 21 ++
src/gallium/drivers/radeon/radeon_uvd_enc.c | 340
2 files changed, 361 insertions(+)
create mode 100644 1
create mode 100644
Signed-off-by: James Zhu
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 1927a3a..6f305b7 100644
---
Based on amdgpu hardware query information to check if UVD hevc enc support
Signed-off-by: James Zhu
---
src/amd/common/ac_gpu_info.c | 10 +-
src/amd/common/ac_gpu_info.h | 1 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git
Enable UVD encode for HEVC main profile
Signed-off-by: James Zhu
---
src/gallium/drivers/radeonsi/si_get.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_get.c
b/src/gallium/drivers/radeonsi/si_get.c
index
Split out some of the code into three new helper functions:
buffer_target_to_bind_flags(), storage_flags_to_buffer_flags(),
buffer_usage() to make the code more managable.
---
src/mesa/state_tracker/st_cb_bufferobjects.c | 191 +++
1 file changed, 104 insertions(+), 87
Use a new helper function, st_access_flags_to_transfer_flags(), to
convert the GL_MAP_x flags to PIPE_TRANSFER_x flags.
We'll be able to use this function in a couple other places.
---
src/mesa/state_tracker/st_cb_bufferobjects.c | 38
---
src/mesa/state_tracker/st_cb_fbo.c | 18 +-
src/mesa/state_tracker/st_cb_texture.c | 17 -
2 files changed, 17 insertions(+), 18 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_fbo.c
b/src/mesa/state_tracker/st_cb_fbo.c
index 3a5c03c..0800f5b
Since the type is gl_vertex_array. Update comment to explain that
these arrays are only used by the VBO module.
Also rename some local variables in _mesa_update_vao_derived_arrays().
---
src/mesa/main/arrayobj.c | 13 ++---
src/mesa/main/attrib.c| 2 +-
Hi;
On 02/04/2018 11:57 PM, Mauro Rossi wrote:
Similar to 90dd6e5 ("Android: egl: add dependency on libnativewindow")
Fixes the following building errors:
In file included from external/mesa/src/intel/vulkan/gen7_cmd_buffer.c:30:
In file included from
If we don't have HiZ, then anv_layout_to_aux_usage will return NONE for
both layouts. If the two layouts are the same, they will get the aux
usage. In either case, the code below will give us ISL_AUX_OP_NONE and
we'll return without doing anything.
---
src/intel/vulkan/genX_cmd_buffer.c | 12
---
src/intel/vulkan/genX_cmd_buffer.c | 53 +-
1 file changed, 35 insertions(+), 18 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index a7950cf..056528f 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++
This little series adds support for enabling CCS_E for images which may
have VK_IMAGE_USAGE_STORAGE_BIT set. Previously, we just bailed on these
images and disabled CCS. However, so long as we do a full resolve when
entering VK_IMAGE_LAYOUT_GENERAL, we can support CCS_E for all the other
layouts
Checking the sample count is almost as good as aux usage in this case.
---
src/intel/vulkan/genX_cmd_buffer.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 056528f..afe577c 100644
---
This fixes a regression for now, in the future we should gather
the used components properly.
Fixes: be973ed21f6e "radeonsi: load the right number of components for VS
inputs and TBOs"
Cc: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 7 +--
1 file
Do you have any data from shader-db for this change (and the other patch)?
On 02/05/2018 06:08 AM, Samuel Pitoiset wrote:
> Similar for the 4 case.
>
> Suggested by Bas.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/compiler/nir/nir_opt_algebraic.py | 2 ++
> 1
I just wrote the same patch:
Reviewed-by: Dylan Baker
Quoting Vinson Lee (2018-02-05 15:24:45)
> CC r600_shader.lo
> r600_shader.c: In function ‘egcm_int_to_double’:
> r600_shader.c:4543:12: error: ‘ctx’ is a pointer; did you mean to use ‘->’?
> if
On 2018-02-05 16:14, kallisti5 wrote:
On 2018-02-05 15:39, Dylan Baker wrote:
Quoting kallisti5 (2018-02-05 12:58:30)
On 2017-10-24 11:47, Emil Velikov wrote:
> Hi Jerome,
>
> On 23 October 2017 at 16:58, Jerome Duval
> wrote:
>> * configure.ac:
>> -pthread is not
I'm tempted to say the other places which only check for __GNUC__ should
also check for __clang__, just to be move obvious (or does everyone know
that __clang__ implies __GNUC_?). Maybe others have an opinion.
Anyway, the location in question below seems to be first place this
appears in
I don't have a test case hitting this assert. But, it's nice to have
an assert checking the limit.
Signed-off-by: Anuj Phogat
---
src/intel/isl/isl_surface_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/intel/isl/isl_surface_state.c
This fixes a regression for now, in the future we should gather
the used components properly.
V2: just set for VS and correctly handle doubles
Fixes: be973ed21f6e "radeonsi: load the right number of components for VS
inputs and TBOs"
Cc: Marek Olšák
---
On 2018-02-05 18:13, Dylan Baker wrote:
Quoting kallisti5 (2018-02-05 15:36:06)
On 2018-02-05 16:14, kallisti5 wrote:
> On 2018-02-05 15:39, Dylan Baker wrote:
>> Quoting kallisti5 (2018-02-05 12:58:30)
>>> On 2017-10-24 11:47, Emil Velikov wrote:
>>> > Hi Jerome,
>>> >
>>> > On 23 October 2017
Instead of having aux usage and ANV_AUX_USAGE_DEFAULT to mean "give me
something reasonable" we now use anv_layout_to_aux_usage whenever a
layout is available. If a layout is available, we ignore the aux_usage
parameter. For the cases where we have an explicit aux usage such as
clears and aux
We have to do resolves whenever we go into the general layout for these
images. However, it also means that images which declare the storage
usage but don't actually need it most of the time will still get
compression.
---
src/intel/vulkan/anv_image.c | 18 +++---
1 file changed, 15
On 05/02/18 15:04, Dieter Nützel wrote:
Am 02.02.2018 10:24, schrieb Timothy Arceri:
On 02/02/18 19:26, Dieter Nützel wrote:
Hello Tim,
_this_ version brake UH, UV, mpv, blender 2.79 (some test files not
all).
Must be something with the cache file(s).
The cache currently needs to be
This is turning our CI red, so I'm going to go ahead and push this.
Quoting Vinson Lee (2018-02-05 15:24:45)
> CC r600_shader.lo
> r600_shader.c: In function ‘egcm_int_to_double’:
> r600_shader.c:4543:12: error: ‘ctx’ is a pointer; did you mean to use ‘->’?
> if (ctx.bc->chip_class
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i965/genX_state_upload.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index aa4d64d08e..67fb328dbc
On Mon, Jan 29, 2018 at 11:37 AM, Robert Foss wrote:
> This struct is used in mesa and drm_hwcomposer.
> Versions of if have been implemented in several grallocs:
> drm_gralloc, gbm_gralloc, minigbm and intel-minigbm.
>
> Other than the 1:1 move of the struct a new
Quoting kallisti5 (2018-02-05 15:36:06)
> On 2018-02-05 16:14, kallisti5 wrote:
> > On 2018-02-05 15:39, Dylan Baker wrote:
> >> Quoting kallisti5 (2018-02-05 12:58:30)
> >>> On 2017-10-24 11:47, Emil Velikov wrote:
> >>> > Hi Jerome,
> >>> >
> >>> > On 23 October 2017 at 16:58, Jerome Duval
CC r600_shader.lo
r600_shader.c: In function ‘egcm_int_to_double’:
r600_shader.c:4543:12: error: ‘ctx’ is a pointer; did you mean to use ‘->’?
if (ctx.bc->chip_class == CAYMAN)
^
->
Fixes: 35b430157776 ("r600/fp64: fix integer->double conversion")
Quoting kallisti5 (2018-02-05 14:14:42)
> On 2018-02-05 15:39, Dylan Baker wrote:
> > Quoting kallisti5 (2018-02-05 12:58:30)
> >> On 2017-10-24 11:47, Emil Velikov wrote:
> >> > Hi Jerome,
> >> >
> >> > On 23 October 2017 at 16:58, Jerome Duval
> >> > wrote:
> >> >> *
On 02/05/2018 03:19 PM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
Hi Brian,
Actually after incorporating your review requests to set
gl_vertex_array::Size and gl_vertex_array::Ptr to zero, radeonsi
started to assert in Bitmap/CopyPixels/DrawPixels.
On Mon, Feb 5, 2018 at 12:16 PM, James Zhu wrote:
> Implement UVD hevc encode functions
>
> Signed-off-by: James Zhu
> ---
> 1 | 21 ++
> src/gallium/drivers/radeon/radeon_uvd_enc.c | 340
>
On 05/02/2018 17:34, Dylan Baker wrote:
Quoting Jon Turney (2018-02-03 13:19:20)
On 03/02/2018 18:07, Dylan Baker wrote:
Quoting Jon Turney (2018-02-03 05:49:40)
- if not ['darwin', 'windows'].contains(host_machine.system())
+ if not ['darwin', 'windows',
https://bugs.freedesktop.org/show_bug.cgi?id=104949
--- Comment #3 from Daniel Stone ---
Yeah, good catch! Bug filed: https://bugs.webkit.org/show_bug.cgi?id=182490
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the
On Mon, Feb 5, 2018 at 5:40 AM, Iago Toral Quiroga wrote:
> Otherwise loop unrolling will fail to see the actual cost of
> the unrolling operations when the loop body contains 64-bit integer
> instructions, and very specially when the divmod64 lowering applies,
> since its
Quoting Jon Turney (2018-02-03 13:19:20)
> On 03/02/2018 18:07, Dylan Baker wrote:
> > Quoting Jon Turney (2018-02-03 05:49:40)
> >> - if not ['darwin', 'windows'].contains(host_machine.system())
> >> + if not ['darwin', 'windows', 'cygwin'].contains(host_machine.system())
> >> +# TODO: PPC,
On 2018-02-05 12:16 PM, James Zhu wrote:
Add UVD hevc encode pipe video codec creation entry
Signed-off-by: James Zhu
---
src/gallium/drivers/radeonsi/si_uvd.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git
On 2018-02-05 01:04 PM, Alex Deucher wrote:
On Mon, Feb 5, 2018 at 12:16 PM, James Zhu wrote:
Implement UVD hevc encode functions
Signed-off-by: James Zhu
---
1 | 21 ++
On Sat, Feb 3, 2018 at 2:58 PM, Jordan Justen
wrote:
> On 2018-02-03 14:24:06, Jason Ekstrand wrote:
> > On February 3, 2018 13:59:40 Jordan Justen
> wrote:
> >
> > > Signed-off-by: Jordan Justen
> > >
The first 2 patches of this series should be added to branch 18.0 too.
On Fri, Jan 26, 2018 at 11:32:38AM -0800, Rafael Antognolli wrote:
> Fixes: ca19ee33d7d39cb89d948b1c983763065975ce5b
> Signed-off-by: Rafael Antognolli
> Cc: Kenneth Graunke
Am 05.02.2018 um 05:29 schrieb Dave Airlie:
> From: Dave Airlie
>
> This cleans up and fixes the previous fix even more.
>
> Buffers from textures start at max const,
> buffers from buffers/images come in from the 168 offset.
>
> This fixes a bunch of:
>
On 2018-02-05 18:13, Dylan Baker wrote:
Pretty close. I lied, apparently the pthreads fix is in 0.44
https://github.com/mesonbuild/meson/commit/fc547ad05e5a8e650ae5bc2ecc7d40e4dbcc9f0f
Here's my branch, but it needs rebase pretty bad, there's also a patch
to use
shared glapi that I added
Am 05.02.2018 um 05:29 schrieb Dave Airlie:
> From: Dave Airlie
>
> The compute emission path always emits this currently, and emitting
> it on the fragment path breaks the blitter.
>
> This fixes gpu hangs in KHR-GL45.compute_shader.resource-texture
>
> Signed-off-by: Dave
On Fri, Jan 19, 2018 at 03:47:37PM -0800, Jason Ekstrand wrote:
> This commit completely reworks aux tracking. This includes a number of
> somewhat distinct changes:
>
> 1) Since we are no longer fast-clearing multiple slices, we only need
> to track one fast clear color and one fast clear
On Mon, Feb 5, 2018 at 5:41 PM, Nanley Chery wrote:
> On Fri, Jan 19, 2018 at 03:47:37PM -0800, Jason Ekstrand wrote:
> > This commit completely reworks aux tracking. This includes a number of
> > somewhat distinct changes:
> >
> > 1) Since we are no longer fast-clearing
This commit completely reworks aux tracking. This includes a number of
somewhat distinct changes:
1) Since we are no longer fast-clearing multiple slices, we only need
to track one fast clear color and one fast clear type.
2) We store two bits for fast clear instead of one to let us
On Fri, Jan 19, 2018 at 03:47:37PM -0800, Jason Ekstrand wrote:
> This commit completely reworks aux tracking. This includes a number of
> somewhat distinct changes:
>
> 1) Since we are no longer fast-clearing multiple slices, we only need
> to track one fast clear color and one fast clear
On Mon, Feb 05, 2018 at 06:05:59PM -0800, Jason Ekstrand wrote:
> On Mon, Feb 5, 2018 at 5:41 PM, Nanley Chery wrote:
>
> > On Fri, Jan 19, 2018 at 03:47:37PM -0800, Jason Ekstrand wrote:
> > > This commit completely reworks aux tracking. This includes a number of
> > >
val->i32[swizzle[i]] is guaranteed to have non-positive value before the
__is_power_of_two call, so unary minus is equivalent to abs in this case.
---
src/compiler/nir/nir_search_helpers.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_search_helpers.h
Am 05.02.2018 um 05:29 schrieb Dave Airlie:
> From: Dave Airlie
>
> Since enhanced layouts allows setting specific MRT outputs, we
> can get sparse outputs, so we have to calculate the shader
> mask earlier.
>
> Signed-off-by: Dave Airlie
> ---
>
https://bugs.freedesktop.org/show_bug.cgi?id=102032
--- Comment #2 from programmerj...@gmail.com ---
(In reply to Bas Nieuwenhuizen from comment #1)
> I went looking to why there were no good CTS tests for this and found this
> in the vulkan spec:
>
> For the OpSRem and OpSMod instructions, if
---
src/amd/common/ac_llvm_build.c | 19 +++
src/amd/common/ac_llvm_build.h | 3 +++
src/amd/common/ac_nir_to_llvm.c | 34 --
3 files changed, 30 insertions(+), 26 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c
---
src/amd/common/ac_nir_to_llvm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ac4af12b3e..e06a22f8a9 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@
This will be used in the following commits.
---
src/amd/common/ac_llvm_build.c | 8
src/amd/common/ac_llvm_build.h | 3 +++
src/amd/common/ac_nir_to_llvm.c | 6 +-
3 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c
---
src/amd/common/ac_llvm_build.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 08c488775e..0764d8c7f9 100644
--- a/src/amd/common/ac_llvm_build.c
+++
For 7-9/9
Reviewed-by: Roland Scheidegger
Am 05.02.2018 um 05:29 schrieb Dave Airlie:
> From: Dave Airlie
>
> If we only get 1,2,3,6 framebuffers we want a sparse target mask.
>
> Signed-off-by: Dave Airlie
> ---
>
On 6 February 2018 at 14:12, Roland Scheidegger wrote:
> Am 05.02.2018 um 05:29 schrieb Dave Airlie:
>> From: Dave Airlie
>>
>> This cleans up and fixes the previous fix even more.
>>
>> Buffers from textures start at max const,
>> buffers from
Am 05.02.2018 um 05:58 schrieb Dave Airlie:
> From: Dave Airlie
>
> If we have gaps in the shader mask we have to have 0x1 in them
> according to a comment in radeonsi, and this is required to fix
> the test at least on cayman.
>
> We also need to record the highest one
On Mon, Feb 5, 2018 at 6:42 AM, Ilia Mirkin wrote:
> On Mon, Feb 5, 2018 at 6:24 AM, Daniel Stone wrote:
>> Hi Ilia,
>>
>> On 4 February 2018 at 19:09, Ilia Mirkin wrote:
>>> One might have split this up into multiple patches,
Am 05.02.2018 um 07:05 schrieb Dave Airlie:
> From: Dave Airlie
>
> With sb enabled on cayman, this was overwriting the proper
> cf index value with random ones if the dst gpr was 2 or 3,
> only save the value for a MOVA instruction.
>
> Fixes:
>
Am 06.02.2018 um 06:04 schrieb Dave Airlie:
> On 6 February 2018 at 14:12, Roland Scheidegger wrote:
>> Am 05.02.2018 um 05:29 schrieb Dave Airlie:
>>> From: Dave Airlie
>>>
>>> This cleans up and fixes the previous fix even more.
>>>
>>> Buffers from
Implement UVD hevc encode functions
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc.c | 340
1 file changed, 340 insertions(+)
create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
diff --git
From: Mathias Fröhlich
Set the _DrawArray pointer to NULL when calling into the Drivers
Bitmap/CopyPixels/DrawPixels hooks. This fixes an assert that gets
uncovered with the following patch gets applied.
Signed-off-by: Mathias Fröhlich
---
Reviewed-by: Bas Nieuwenhuizen
On Mon, Feb 5, 2018 at 9:37 PM, Samuel Pitoiset
wrote:
> RadeonSI and RADV lower fdiv.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_nir_to_llvm.c | 5 -
> 1 file
In this file there are similar cases with macros PUBLIC, USED and
ATTRIBUTE_NOINLINE, before defining which as __attribute__(...), code
only checks for __GNUC__.
Should I add comments there as well?
2018-02-05 22:51 GMT+02:00 Brian Paul :
> On 02/05/2018 01:44 PM, Vlad Golovkin
In file included from ../src/gallium/targets/dri/target.c:1:
In file included from ../src/gallium/auxiliary/target-helpers/drm_helper.h:8:
../src/util/xmlpool.h:103:10: fatal error: 'xmlpool/options.h' file not found
See also 26bde1e3.
Signed-off-by: Jon Turney
---
On 2018-02-05 15:39, Dylan Baker wrote:
Quoting kallisti5 (2018-02-05 12:58:30)
On 2017-10-24 11:47, Emil Velikov wrote:
> Hi Jerome,
>
> On 23 October 2017 at 16:58, Jerome Duval
> wrote:
>> * configure.ac:
>> -pthread is not available on Haiku.
>> Haiku doesn't
From: Mathias Fröhlich
Instead of updating all modified gl_vertex_array_object::_VertexArray
entries just update those that are modified and enabled.
Also release buffer object from the _VertexArray that belong
to disabled attributes.
v2: Also set Ptr and Size to zero.
From: Mathias Fröhlich
Hi Brian,
Actually after incorporating your review requests to set
gl_vertex_array::Size and gl_vertex_array::Ptr to zero, radeonsi
started to assert in Bitmap/CopyPixels/DrawPixels.
So, here the updated series including the requested changes.
From: Mathias Fröhlich
When changing the attribute binding in the VAO we also need to
account for getting rid of non vbo bits from VertexAttribBufferMask.
Signed-off-by: Mathias Fröhlich
Reviewed-by: Brian Paul
---
Hi Brian,
On Monday, 5 February 2018 18:23:17 CET Brian Paul wrote:
> Since the type is gl_vertex_array. Update comment to explain that
> these arrays are only used by the VBO module.
>
> Also rename some local variables in _mesa_update_vao_derived_arrays().
Makes sense to me and the change
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