With branching, for simplicity and usefulness, this assumes both paths are
taken. With loops, it assumes their basic blocks execute 10 times.
The average latency for variable latency instructions in this patch is rather
poor, with only something reasonably accurate for IMUL/IMAD. It should be
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Tue, Jul 3, 2018 at 12:43 PM, Samuel Pitoiset
wrote:
> That might reduce CPU overhead a little bit when using
> RADV_TRACE_FILE.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 11 +++
> 1 file changed, 7
Ping. One more loose patch following the same logic/principle as the
x11+egl patch for nouveau depth 30, that would benefit from a r-b and
ideally make it into Mesa 18.2. to clear out nouveau depth 30 support.
Obsessively tested by now by myself on intel, amd, nouveau and
dri3/present with prime
On Sun, Jul 8, 2018 at 5:47 PM, Samuel Pitoiset
wrote:
> Needed for VK_KHR_create_renderpass2.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 4 ++--
> src/amd/vulkan/radv_meta_clear.c | 4 ++--
> src/amd/vulkan/radv_meta_resolve.c| 14
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Sun, Jul 8, 2018 at 5:47 PM, Samuel Pitoiset
wrote:
> VkCreateRenderPass2KHR() is quite similar to VkCreateRenderPass()
> but refactoring the code is a bit painful.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c
On Thu, Jul 5, 2018 at 2:03 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> This uses the common compiler passes abstraction to help radv
> avoid fixed cost compiler overheads. This uses a linked list per
> thread stored in thread local storage, with an entry in the list
> for each target
https://bugs.freedesktop.org/show_bug.cgi?id=107158
Bug ID: 107158
Summary: When compiling against musl libc, pthread.h is not
included in radv_amdgpu_winsys
Product: Mesa
Version: 18.0
Hardware: All
OS:
https://bugs.freedesktop.org/show_bug.cgi?id=107158
Bas Nieuwenhuizen changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #1 from Bas
https://bugs.freedesktop.org/show_bug.cgi?id=107156
Timothy Arceri changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #3 from Timothy
Reviewed-by: Jason Ekstrand
---
src/intel/compiler/brw_fs_nir.cpp | 11 ++-
src/intel/compiler/brw_nir.c | 4
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index 02ac92e62f1..83ed9575f80
Implement at brw_eu_validate the restriction from Intel Broadwell PRM,
vol 07, section "Instruction Set Reference", subsection "EUISA
Instructions", Send Message (page 990):
"r127 must not be used for return address when there is a src and
dest overlap in send instruction."
v2: Style fixes (Matt
Reviewed-by: Jason Ekstrand
---
src/intel/compiler/brw_fs_nir.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index 83ed9575f80..4155b2ed996 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++
Since Gen8+ Intel PRM states that "r127 must not be used for return
address when there is a src and dest overlap in send instruction."
This patch implements this restriction creating new grf127_send_hack_node
at the register allocator. This node has a fixed assignation to grf127.
For vgrf that
This series enables support to VK_KHR_8bit_storage vulkan extension
for anv. It enables all capabilities available for this extension
including StorageBuffer8BitAccess, UniformAndStorageBuffer8BitAccess
and StoragePushConstant8.
8-bit read operations from UBO and SSBO and push constants are
When the destination is a BYTE type allow raw movs
even if the stride is not exact multiple of destination
type and exec type, execution type is Word and its size is 2.
This restriction was only allowing stride==2 destinations
for 8-bit types.
Reviewed-by: Jason Ekstrand
---
Update to headers and grammar to ff684ffc6a35d2a58f0f63108877d0064ea33feb
---
src/compiler/spirv/spirv.core.grammar.json | 44 ++
src/compiler/spirv/spirv.h | 3 ++
2 files changed, 40 insertions(+), 7 deletions(-)
diff --git
v2: Update comment according to this patch. (Jason Ekstrand)
Reviewed-by: Jason Ekstrand
---
src/intel/compiler/brw_fs_nir.cpp | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index
Reviewed-by: Jason Ekstrand
---
src/compiler/shader_info.h| 1 +
src/compiler/spirv/spirv_to_nir.c | 6 ++
2 files changed, 7 insertions(+)
diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index 8c58ee285ec..3b95d5962c0 100644
--- a/src/compiler/shader_info.h
+++
Enables SPV_KHR_8bit_storage and VK_KHR_8bit_storage on gen 8+
using the VK_KHR_get_physical_device_properties2 functionality
to expose if the extension is supported or not.
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_device.c | 11 +++
src/intel/vulkan/anv_extensions.py |
Acked-by: Jason Ekstrand
On Sun, Jul 8, 2018 at 5:29 PM Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> Update to headers and grammar to ff684ffc6a35d2a58f0f63108877d0064ea33feb
> ---
> src/compiler/spirv/spirv.core.grammar.json | 44 ++
>
Ping? I think this series should be ready for merging, had all review
comments addressed and was obsessively tested by myself on intel, amd,
nouveau and dri3/present with prime renderoffload for intel+nouveau,
amd+nouveau and nouveau+amd, on both native x11 and wayland+weston. It
makes many things
Clamp the x and y co-ordinates of the rectangles.
v2: Clamp width/height after converting to co-ordinates
(Ilia Merkin)
Signed-off-by: Harish Krupo
---
src/egl/main/eglapi.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git
https://bugs.freedesktop.org/show_bug.cgi?id=107156
Bug ID: 107156
Summary: earth tessellation bug
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
On 07/07/18 17:29, Jason Ekstrand wrote:
The implementation of CreateRenderPass2 uses the helpers we broke out in
previous commits. The implementations of the new vkCmd functions just
call the old versions.
---
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_pass.c|
Acked-by: Lionel Landwerlin
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https://bugs.freedesktop.org/show_bug.cgi?id=107156
--- Comment #1 from ximik ---
Created attachment 140506
--> https://bugs.freedesktop.org/attachment.cgi?id=140506=edit
earth tessellation bug
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact
With the version bumped in patch 7, patches 2-7 are :
Reviewed-by: Lionel Landwerlin
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https://bugs.freedesktop.org/show_bug.cgi?id=107156
--- Comment #2 from ximik ---
Created attachment 140507
--> https://bugs.freedesktop.org/attachment.cgi?id=140507=edit
earth tessellation bug
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee
https://bugs.freedesktop.org/show_bug.cgi?id=107022
--- Comment #1 from ximik ---
on the video on the embedded link is visible. same problem. card r290x, the
driver of the message 18-18.2 git
link https://mega.nz/#!Pr5nmYTQ!uGrPyzSW32-Ln60x2jUxrvtW3VH9rG2b2uTgC1iwe18
--
You are receiving
On Tue, Jul 3, 2018 at 11:25 PM Dave Airlie wrote:
> From: Dave Airlie
>
> ---
> src/compiler/nir/nir_gather_info.c | 2 ++
> src/compiler/nir/nir_lower_indirect_derefs.c | 4
> src/compiler/nir/nir_lower_vars_to_ssa.c | 4
> 3 files changed, 10 insertions(+)
>
> diff
This is a very clever solution to the problem. I like it. :-)
Reviewed-by: Jason Ekstrand
I think that's all of them. I've pushed the XML bump so you should be able
to land at will.
--Jason
On Sun, Jul 8, 2018 at 5:29 PM Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> Since
---
src/compiler/nir/nir_lower_vars_to_ssa.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c
b/src/compiler/nir/nir_lower_vars_to_ssa.c
index 3f37acaed33..ef2019551c6 100644
--- a/src/compiler/nir/nir_lower_vars_to_ssa.c
+++
Fixes "value not uniquely defined" messages during shader-db runs.
Fixes: 57594065c30feec9376b "nv50/ir: import new shader backend code"
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff
VkCreateRenderPass2KHR() is quite similar to VkCreateRenderPass()
but refactoring the code is a bit painful.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 24 +
src/amd/vulkan/radv_extensions.py | 1 +
src/amd/vulkan/radv_pass.c| 169
Needed for VK_KHR_create_renderpass2.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 4 ++--
src/amd/vulkan/radv_meta_clear.c | 4 ++--
src/amd/vulkan/radv_meta_resolve.c| 14 +++---
src/amd/vulkan/radv_meta_resolve_cs.c | 4 ++--
https://bugs.freedesktop.org/show_bug.cgi?id=106644
--- Comment #28 from erhar...@mailbox.org ---
(In reply to Ben Crocker from comment #26)
I added the following exports
% export GALLIVM_MATTRS="-vsx"
% export GALLIVM_VSX=0
as you suggested, but the tests still segfault.
Config was:
https://bugs.freedesktop.org/show_bug.cgi?id=106644
erhar...@mailbox.org changed:
What|Removed |Added
Attachment #140477|0 |1
is obsolete|
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