Reinserting code directly before a jump means the block gets split
and merged, removing the original block and replacing it in the
process.
Hence keeping a pointer to the continue block over a reinsert
causes issues.
This code changes nir_opt_if to simply look for the new continue
block.
CC:
On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
> also move some of the GLSL builtins over we will need for implementing
> some OpenCL builtins
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/Makefile.sources | 2 +
> src/compiler/nir/meson.build | 2 +
>
I made some nitpick comments below. Patches 1-5 are
Reviewed-by: Jason Ekstrand
On Sat, Jul 14, 2018 at 7:56 PM Jason Ekstrand wrote:
> On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
>
>> OpenCL knows vector of size 8 and 16.
>>
>> Signed-off-by: Karol Herbst
>> ---
>>
On Fri, Jun 29, 2018 at 10:27 PM, Karol Herbst wrote:
> We already guarded all OP_SULDP against out of bound accesses, but those
> ended up just reusing whatever value was stored in the dest registers.
>
> fixes CTS test shader_image_load_store.incomplete_textures
>
> v2: fix for loads not ending
nir_validate complains in case less than 4 components are
provided.
CC: 18.1
---
src/compiler/spirv/spirv_to_nir.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index
I thought I'd just fixed this...
Just sent a patch which fixes this and a few other image bugs. I've
had it sitting in a FutureTech branch for about a week and forgot to
send it. :(
On July 14, 2018 16:26:17 Bas Nieuwenhuizen wrote:
> nir_validate complains in case less than 4 components are
On Sat, Jul 14, 2018 at 8:44 PM, Ilia Mirkin wrote:
> On Fri, Jun 29, 2018 at 10:27 PM, Karol Herbst wrote:
>> We already guarded all OP_SULDP against out of bound accesses, but those
>> ended up just reusing whatever value was stored in the dest registers.
>>
>> fixes CTS test
On Sun, Jul 15, 2018 at 4:29 AM, Jason Ekstrand wrote:
> On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
>>
>> also move some of the GLSL builtins over we will need for implementing
>> some OpenCL builtins
>>
>> Signed-off-by: Karol Herbst
>> ---
>> src/compiler/Makefile.sources |
I'd much rather see the INT_CLAMP be a bit on the mode (e.g. the high
bit), which you get at the beginning and then remove from the mode.
That way you don't have to keep checking for it.
On Sun, Jun 24, 2018 at 5:00 PM, Karol Herbst wrote:
> fixes a couple of packed_pixel CTS tests. No
it is the # of dimensions of the grid (which, like local wg size, is
not baked into the shader, compared to glsl)
BR,
-R
On Sat, Jul 14, 2018 at 4:18 PM, Jason Ekstrand wrote:
> What is WorkDim? how is it different from the global and/or local workgroup
> dimensions?
>
> On Thu, Jul 12, 2018
On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
> OpenCL knows vector of size 8 and 16.
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/nir/nir.c| 14
> src/compiler/nir/nir.h| 34 ++-
>
I'm not really sure what this doing. Mind giving some more explanation?
Is this something that's an issue with Vulkan SPIR-V as well?
On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
> Signed-off-by: Karol Herbst
> ---
> src/compiler/spirv/vtn_cfg.c | 25 ++---
> 1
On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
> also move some of the GLSL builtins over we will need for implementing
> some OpenCL builtins
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/Makefile.sources | 2 +
> src/compiler/nir/meson.build | 2 +
>
Looks good for me.
Reviewed-by: Qiang Yu
Regards,
Qiang
On Thu, Jul 12, 2018 at 12:28 AM Harish Krupo
wrote:
>
>
> Harish Krupo writes:
>
> > Clamp the x and y co-ordinates of the rectangles.
> >
> > v2: Clamp width/height after converting to co-ordinates
> > (Ilia Merkin)
> >
> >
On Sun, Jul 15, 2018 at 4:58 AM, Jason Ekstrand wrote:
> I'm not really sure what this doing. Mind giving some more explanation? Is
> this something that's an issue with Vulkan SPIR-V as well?
>
I am not entirely sure. I know this came up when I called functions
having vectors and scalars as
What is WorkDim? how is it different from the global and/or local
workgroup dimensions?
On Thu, Jul 12, 2018 at 4:30 AM Karol Herbst wrote:
> From: Rob Clark
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/nir/nir.c | 2 ++
> src/compiler/nir/nir_intrinsics.py | 1 +
>
https://bugs.freedesktop.org/show_bug.cgi?id=99730
Alexander Tsoy changed:
What|Removed |Added
CC||alexan...@tsoy.me
--
You are
For one thing, the NIR opcodes for image load/store always take and
return a vec4 value regardless of the image type. We need to fix up
both the source and destination to handle it. For another thing, we
weren't actually setting up a destination in the OpAtomicLoad case.
---
Make glXChooseFBConfig properly handle the case where the only matching
configs have the sRGB flag set, but no sRGB attribute is specified.
Since 6e06e281, the sRGBcapable flag is now actually compared, using
MATCH_DONT_CARE.
7b0f912e added defaulting of sRGBcapable to GL_FALSE in
Seems like it increases performance by 2-3% for some demos and games.
---
src/amd/vulkan/radv_device.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 8274b6ea09..71635ded49 100644
---
Overshot it by one every time.
CC:
---
src/amd/vulkan/radv_pipeline.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 4c794d9515..27e13a2251 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++
CC:
---
src/amd/vulkan/radv_cmd_buffer.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index e066b160b6..b6729e40b4 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++
Used the wrong register ...
CC:
---
src/amd/vulkan/radv_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 1f01d2ff4d..4c794d9515 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++
When no occlusion queries are active even if out of order is enabled.
---
src/amd/vulkan/radv_cmd_buffer.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b6729e40b4..78838d9939 100644
---
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