really like to make it compatible with LLVM 3.0 before it gets
merged (it only works with LLVM 2.9 now), but if compute support evolves
quickly, I might be tempted to push the 2.9 version into the master
branch.
If you are interested, test it out and let me know what you think.
Thanks,
Tom
In lp_bld_tgsi_aos.c, emit_fetch() the switch statement is
replaced by a call to to a function pointer, which has been added
as a field of struct lp_build_tgsi_aos_context.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |4 ++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c | 40
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
index 9118a68..b235e90 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
lp_emit_{declaration,instruction,store,fetch}_aos are now visibile
in other files.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 32 +
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c | 140 ---
2 files changed, 103 insertions(+), 69 deletions(-)
diff --git
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 95 +++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 92 --
2 files changed, 95 insertions(+), 92 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
In lp_bld_tgsi_soa.c, emit_fetch() the switch statement is
replaced by a call to to a function pointer, which has been added
as a field of struct lp_build_tgsi_aos_context.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |4 ++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 46
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
index cabf907..be017c9 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
lp_emit_{declaration,instruction,store,fetch,get_temp_ptr}_soa
are now visibile in other files.
Add lp_get_temp_ptr_soa to header, squash with previous commit.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 37
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 264
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |2 ++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c |3 ---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c |2 --
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |2 ++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c |5 +++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
index
The code to create and add the list of tgsi instructions is now in
lp_bld_tgsi.c.
---
src/gallium/auxiliary/Makefile.sources |1 +
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c | 71 +++
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 19 +-
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h |9 +
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c |3 ++-
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c |3 ++-
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 12
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 14 --
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
On Sat, 2011-12-10 at 03:16 -0800, Stéphane Marchesin wrote:
On Fri, Dec 9, 2011 at 14:15, Tom Stellard tstel...@gmail.com wrote:
Hi,
I have just pushed a branch containing an LLVM shader backend for r600g to
my
personal git repo:
http://cgit.freedesktop.org/~tstellar/mesa/ r600g
On Mon, 2011-12-12 at 07:05 -0800, Jose Fonseca wrote:
- Original Message -
Hi,
I have just pushed a branch containing an LLVM shader backend for
r600g to my
personal git repo:
http://cgit.freedesktop.org/~tstellar/mesa/ r600g-llvm-shader
Hi Tom,
This is pretty cool
On Thu, 2011-12-15 at 10:41 -0800, Jose Fonseca wrote:
- Original Message -
On Mon, 2011-12-12 at 07:05 -0800, Jose Fonseca wrote:
- Original Message -
Hi,
I have just pushed a branch containing an LLVM shader backend for
r600g to my
personal git repo:
Hi Jose,
On Thu, 2011-12-15 at 10:41 -0800, Jose Fonseca wrote:
- Original Message -
On Mon, 2011-12-12 at 07:05 -0800, Jose Fonseca wrote:
- Original Message -
Hi,
I have just pushed a branch containing an LLVM shader backend for
r600g to my
personal
Target specific intrinsics are also prefixed with llvm, so this assert
was preventing us from using them.
---
src/gallium/auxiliary/gallivm/lp_bld_intr.c |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_intr.c
On Fri, 2012-01-06 at 20:15 +0100, Vincent Lejeune wrote:
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 156 +--
1 files changed, 75 insertions(+), 81 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
I've been working more on the TGSI-LLVM converter, and I've found that
it would be useful to be able to look up information about how an opcode
calculates its result.
I'm looking for feedback on whether adding a field to struct
tgsi_opcode_info is the right way to do this, and also if the
On Tue, Aug 16, 2011 at 10:24 AM, Lauri Kasanen c...@gmx.com wrote:
Hi list
This patchset adds post-processing to all Gallium drivers. It's also posted
to the gsoc branch at http://cgit.freedesktop.org/~cand/mesa/log/?h=gsoc if
you prefer cgit.
The included filters are three color ones
According to the GLSL spec, the implementor can decide which way to round
when the fraction is .5. The r300 compiler will round down, so we can use
CND and save an instruction.
---
MLAA should work on r300g (r500 only) with this patch. I've tested
with the kasanen-post-process-v2 branch and it
On Thu, 2011-08-25 at 22:28 -0400, Chia-I Wu wrote:
On Fri, Aug 26, 2011 at 5:29 AM, Tom Stellard thomas.stell...@amd.com wrote:
On Thu, 2011-08-25 at 00:55 -0400, Chia-I Wu wrote:
From: Chia-I Wu o...@lunarg.com
---
src/gallium/drivers/r300/Makefile | 63
Reduction instructions can't share an instruction group with other
instructions, so we need to check for them when trying to merge
instruction groups.
---
src/gallium/drivers/r600/r600_asm.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git
On Tue, Jan 22, 2013 at 04:06:05PM +0100, Michel Dänzer wrote:
On Mon, 2013-01-21 at 23:03 +0100, Tom Stellard wrote:
I don't think we emit the int_AMDGPU_mul intrinsic anymore, but it probably
doesn't hurt to keep it around until we sort out all of the legacy vs
non-legacy
On Tue, Jan 22, 2013 at 06:33:37PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
Fixes piglit spec/ARB_sampler_objects/sampler-incomplete and
spec/EXT_texture_swizzle/depth_texture_mode_and_swizzle.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off
On Tue, Jan 22, 2013 at 08:14:42PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
Fixes 37 piglit tests and allows e.g. FlightGear to run with radeonsi.
Nice!
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
On Tue, Jan 22, 2013 at 09:33:46AM -0600, Aaron Watry wrote:
Am 22.01.2013 13:08, schrieb Michel Dänzer:
On Mon, 2013-01-21 at 22:28 +0100, Christian König wrote:
v2: don't mess up other loops
Signed-off-by: Christian König deathsimple at vodafone.de Series is
Tested-by: Michel
From: Tom Stellard thomas.stell...@amd.com
Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.
---
lib/Target/R600/AMDGPUAsmPrinter.cpp| 3 +++
test/CodeGen/R600
From: Tom Stellard thomas.stell...@amd.com
---
test/CodeGen/R600/predicates.ll | 100
1 file changed, 100 insertions(+)
create mode 100644 test/CodeGen/R600/predicates.ll
diff --git a/test/CodeGen/R600/predicates.ll b/test/CodeGen/R600/predicates.ll
new
From: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/r600/r600_asm.c | 43 ++---
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_asm.c
b/src/gallium/drivers/r600/r600_asm.c
index 3aaea4a..809f85f 100644
From: Tom Stellard thomas.stell...@amd.com
r600_bytecode::ar_chan stores the register channel for the value that
will be loaded into the AR register.
At the moment, this field is only used by the LLVM backend. The default
backend always sets ar_chan = 0.
---
src/gallium/drivers/r600/r600_asm.c
On Wed, Jan 23, 2013 at 02:20:21AM +0100, Christoph Bumiller wrote:
On 23.01.2013 02:07, Vadim Girlin wrote:
On 01/23/2013 04:42 AM, Christoph Bumiller wrote:
On 23.01.2013 01:21, Vadim Girlin wrote:
On 01/23/2013 03:59 AM, Vincent Lejeune wrote:
- Mail original -
De : Vadim
On Mon, Jan 21, 2013 at 10:28:56PM +0100, Christian König wrote:
v2: don't mess up other loops
Hi Christian,
This patch regresses the glsl1-do-loop test, this test worked fine with v1 of
the patch, but the structurizer creates an infinite loop with v2. See
attached LLVM IR.
-Tom
On Tue, Jan 22, 2013 at 10:19:14PM +0100, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 3 +++
lib/Target/R600/R600ISelLowering.cpp | 8
2 files changed, 11 insertions(+)
diff --git a/lib/Target/R600
On Wed, Jan 23, 2013 at 09:21:14PM +0100, Vincent Lejeune wrote:
v2:fix a bug with write masked inst
I usually only version patches if I've already submitted a previous version to
the mailiing list, so if you haven't submitted a version of this patch before
you don't need this. If this is
On Wed, Jan 23, 2013 at 09:23:03PM +0100, Vincent Lejeune wrote:
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp
b/lib/Target/R600/AMDILISelDAGToDAG.cpp
index 84223f6..2cc4724 100644
---
liveness of special interpolation regs instead of reserving them -
this will allow to reuse those regs, lowering reg pressure.
Signed-off-by: Vadim Girlin vadimgir...@gmail.com
v2[Vincent Lejeune]: Rebased against current llvm master
Reviewed-by: Tom Stellard thomas.stell...@amd.com
against current master
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/r600/r600_llvm.c | 195
+++
src/gallium/drivers/r600/r600_shader.c | 159 -
src/gallium/drivers/r600/r600_shader.h | 3 +-
src/gallium
On Thu, Jan 24, 2013 at 01:15:19AM +0100, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp
b/lib/Target/R600
On Thu, Jan 24, 2013 at 01:16:35AM +0100, Vincent Lejeune wrote:
---
lib/Target/R600/AMDGPUTargetMachine.cpp | 2 +-
lib/Target/R600/R600LowerConstCopy.cpp | 167
+---
2 files changed, 157 insertions(+), 12 deletions(-)
diff --git
Hi Vincent,
For bug fixes, the Mesa convention is to use a normal commit message describing
what the change does and then put a link to the bug at the end of the
message. See for example:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=728bf86a23f6de137c0871ea87b09e75e55468a9
On Thu, Jan 24,
From: Tom Stellard thomas.stell...@amd.com
We were using the NEED_RADEON_GALLIUM conditional to decide whether or not
to build llvm_wrapper.cpp, which is required for using the LLVM backend.
llvm_wrapper.cpp needs to be linked against the LLVM IPO libary
and this library is only added
From: Tom Stellard thomas.stell...@amd.com
This is required when LLVM is built with CMake, which creates one
shared library for each component.
---
configure.ac | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/configure.ac b/configure.ac
index ccf95c5
From: Tom Stellard thomas.stell...@amd.com
---
configure.ac | 35 +++
1 file changed, 19 insertions(+), 16 deletions(-)
diff --git a/configure.ac b/configure.ac
index ccf95c5..9cc5c4a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1898,21 +1898,23 @@ dnl
From: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/R600Instructions.td |2 +-
test/CodeGen/R600/selectcc-icmp-select-float.ll |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/Target/R600/R600Instructions.td
b/lib/Target/R600
From: Tom Stellard thomas.stell...@amd.com
All of the le and lt variants are unsupported.
---
test/CodeGen/R600/unsuported-cc.ll | 83
1 files changed, 83 insertions(+), 0 deletions(-)
create mode 100644 test/CodeGen/R600/unsuported-cc.ll
diff --git
From: Tom Stellard thomas.stell...@amd.com
These instructions compare two floating point values and return an
integer true (-1) or false (0) value.
When compiling code generated by the Mesa GLSL frontend, the SET*_DX10
instructions save us four instructions for most branch decisions that
use
On Thu, Jan 31, 2013 at 11:50:46AM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
GLX uses mapi/glapi/libglapi.la, which is only built for OpenGL.
This patch fixes https://bugs.freedesktop.org/show_bug.cgi?id=59364
Tested-by: Tom Stellard thomas.stell...@amd.com
From: Tom Stellard thomas.stell...@amd.com
This is for the case when no processor is passed to the backend. This
prevents the
'' is not a recognized processor for this target (ignoring processor)
warning from being generated by clang.
---
lib/Target/R600/Processors.td |1 +
1 files
From: Tom Stellard thomas.stell...@amd.com
---
tests/cl/program/program-tester.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/cl/program/program-tester.c
b/tests/cl/program/program-tester.c
index 096cd2a..189b617 100644
--- a/tests/cl/program/program
.
[PATCH 2/4] R600/SI: Add basic support for more integer vector
[PATCH 3/4] R600/SI: Make sample intrinsic address parameter type
[PATCH 4/4] R600/SI: Use proper instructions for array/shadow
For the series:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
-by: Tom Stellard thomas.stell...@amd.com
.../drivers/r300/compiler/radeon_optimize.c| 21
++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r300/compiler/radeon_optimize.c
b/src/gallium/drivers/r300/compiler/radeon_optimize.c
On Sat, Feb 02, 2013 at 07:03:00PM +0100, Vincent Lejeune wrote:
---
Hi Vincent,
Could you add a test case for this. Also, if the AMDGPUISD::MAD node
isn't being used anymore, it should be removed.
-Tom
lib/Target/R600/AMDGPUISelLowering.cpp | 6 +++---
deletions(-)
Reviewed-by: Tom Stellard thomas.stell...@amd.com
diff --git a/lib/Target/R600/R600ISelLowering.cpp
b/lib/Target/R600/R600ISelLowering.cpp
index 4dc6729..f796738 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -279,57 +279,6
On Sat, Feb 02, 2013 at 07:03:01PM +0100, Vincent Lejeune wrote:
This fixes a couple of regressions on (probably not just) cayman
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Tom Stellard thomas.stell...@amd.com
diff
On Sat, Feb 02, 2013 at 07:03:03PM +0100, Vincent Lejeune wrote:
This allows MachineInstScheduler to reorder them, and thus make scheduling
more
efficient.
---
lib/Target/R600/R600Instructions.td | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Tom Stellard
On Mon, Feb 04, 2013 at 04:04:25PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
22 more little piglits with radeonsi.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
lib/Target/R600/SIInstructions.td
On Mon, Feb 04, 2013 at 05:54:13PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIInstrInfo.td | 10 ++
lib
On Mon, Feb 04, 2013 at 05:54:14PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
The _SGPR variants where wrong.
*were* wrong.
This looks good, it's nice to see so much of the c++ code disapear.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off
On Mon, Feb 04, 2013 at 05:56:32PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
For both patches.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/drivers/radeonsi/radeonsi_shader.c
On Mon, Feb 04, 2013 at 07:14:22PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
20 more little piglits with radeonsi.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
lib/Target/R600/SIInstructions.td
On Tue, Feb 05, 2013 at 09:03:47PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
Allows nexuiz to run with radeonsi.
Nice!
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
lib/Target/R600/SIInstrInfo.cpp
On Tue, Feb 05, 2013 at 11:16:05PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Remove all the unused code.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/AMDGPUAsmPrinter.cpp
Hi Christian,
I'm still unable to get the glsl1-while-loop with continue test to pass
on R600 with the new structurizer. For this test, the structurizer is
producing strange code and I'm not sure if it is correct. I have
attached the full before and after dumps to this email. Here is the
just regressed because they started using the clamp modifier.
Signed-off-by: Michel Dänzer michel.daen...@amd.com
Reviewed-by: Tom Stellard thomas.stell...@amd.com
Go ahead and commit this to the upstream LLVM tree and mark it is a
candidate for the stable branches, just like we do for Mesa
From: Tom Stellard thomas.stell...@amd.com
Also output a more useful error message.
NOTE: This is a candidate for the Mesa stable branches
---
lib/Target/R600/AMDGPUISelLowering.h |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/lib/Target/R600/AMDGPUISelLowering.h
From: Tom Stellard thomas.stell...@amd.com
NOTE: This is a candidate for the Mesa stable branches
---
lib/Target/R600/R600Instructions.td |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/lib/Target/R600/R600Instructions.td
b/lib/Target/R600/R600Instructions.td
From: Tom Stellard thomas.stell...@amd.com
These are all files that I authored, but forgot to add the license
headers.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Tom Stellard thomas.stell...@amd.com
---
.../drivers/r300/compiler/radeon_compiler_util.h | 27
From: Tom Stellard thomas.stell...@amd.com
---
.../drivers/r300/compiler/radeon_variable.c|2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r300/compiler/radeon_variable.c
b/src/gallium/drivers/r300/compiler/radeon_variable.c
index 77bb9d4
From: Tom Stellard thomas.stell...@amd.com
This will be used by the test suite in later commits.
NOTE: This is a candidate for the stable branches.
---
src/gallium/drivers/r300/compiler/r3xx_vertprog.c |2 +-
src/gallium/drivers/r300/compiler/radeon_swizzle.h |2 ++
2 files changed, 3
From: Tom Stellard thomas.stell...@amd.com
This way make check can report whether or not the tests pass.
NOTE: This is a candidate for the stable branches.
---
.../r300/compiler/tests/r300_compiler_tests.c | 12 +++-
.../r300/compiler/tests/r300_compiler_tests.h |3
From: Tom Stellard thomas.stell...@amd.com
Now you can convert assembly strings into a full struct radeon_compiler
object and use it to test individual compiler pases.
NOTE: This is a candidate for the stable branches.
---
.../drivers/r300/compiler/tests/rc_test_helpers.c | 67
From: Tom Stellard thomas.stell...@amd.com
The OMOD value was only being folded to one instruction in cases where
the MUL instruction was reading a value written by more than one
instruction.
https://bugs.freedesktop.org/show_bug.cgi?id=60503
NOTE: This is a candidate for the stable branches
On Mon, Feb 11, 2013 at 03:47:47PM +0100, Christian König wrote:
Am 11.02.2013 15:35, schrieb Michel Dänzer:
On Son, 2013-02-10 at 19:38 +0100, Vincent Lejeune wrote:
diff --git a/lib/Target/R600/SIInstructions.td
b/lib/Target/R600/SIInstructions.td
index a09f243..7e50e86 100644
---
On Mon, Feb 11, 2013 at 03:35:44PM +0100, Michel Dänzer wrote:
On Son, 2013-02-10 at 19:38 +0100, Vincent Lejeune wrote:
diff --git a/lib/Target/R600/SIInstructions.td
b/lib/Target/R600/SIInstructions.td
index a09f243..7e50e86 100644
--- a/lib/Target/R600/SIInstructions.td
+++
From: Tom Stellard thomas.stell...@amd.com
NOTE: This is a candidate for the Mesa stable branch.
---
lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 1 +
lib/Target/R600/R600Instructions.td| 4
test/CodeGen/R600/128bit-kernel-args.ll| 18
From: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/AMDILDevice.cpp | 20 ++--
lib/Target/R600/AMDILSIDevice.cpp | 15 +--
2 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/lib/Target/R600/AMDILDevice.cpp b/lib/Target/R600/AMDILDevice.cpp
to fix instruction defs on SI, so they display the instruction
operands, but again this can be done in another patch.
Thanks for adding more tests!
Reviewed-by: Tom Stellard thomas.stell...@amd.com
+define void @test() {
+ %res1 = call 4 x float @llvm.SI.sample.(i32 15, 4 x i32 undef,
+ 8 x
On Tue, Feb 12, 2013 at 10:24:24AM +0100, Michel Dänzer wrote:
On Mon, 2013-02-11 at 19:39 +0100, Vincent Lejeune wrote:
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 24
1 file changed, 24 insertions(+)
diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp
On Tue, Feb 12, 2013 at 05:23:43PM +0100, Vincent Lejeune wrote:
It fixes around 100 tfb piglit tests and 16 glean tests.
NOTE: This is a candidate for the Mesa stable branch.
Hi Vincent,
Could you add a lit test for this as well?
Thanks,
Tom
---
lib/Target/R600/AMDILISelDAGToDAG.cpp |
On Tue, Feb 12, 2013 at 06:39:09PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
8 more little piglits.
Is this a candidate for the stable branch?
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/radeonsi_shader.c | 29
On Tue, Feb 12, 2013 at 06:13:19PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
SIInstrFormats.td should contain the instruction encoding definitions
and everything else should go in SIInstrInfo.td. I got this backwards,
when I first created these files, so
On Tue, Feb 12, 2013 at 06:13:22PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Seems to be allot simpler, and also paves the
way for further improvements.
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/AMDGPU.h
On Tue, Feb 12, 2013 at 10:45:27PM +0100, Vincent Lejeune wrote:
It fixes around 100 tfb piglit tests and 16 glean tests.
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 2 ++
lib/Target
On Wed, Feb 13, 2013 at 04:34:23PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
The important fix is that the constant interpolation value is stored in the
parameter slot P0, which is encoded as 2.
In addition, pass the parameter slot as an operand to
to V_INTERP_MOV_F32
instead of hardcoding it there, and add a special register class for the
parameter slots for type checking and pretty dumping.
NOTE: This is a candidate for the Mesa stable branch.
Signed-off-by: Michel Dänzer michel.daen...@amd.com
Reviewed-by: Tom Stellard thomas.stell...@amd.com
On Wed, Feb 13, 2013 at 10:18:23AM +0100, Christian König wrote:
Am 13.02.2013 01:20, schrieb Tom Stellard:
On Tue, Feb 12, 2013 at 06:13:19PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
SIInstrFormats.td should contain the instruction encoding definitions
On Wed, Feb 13, 2013 at 10:34:12AM +0100, Christian König wrote:
Am 13.02.2013 01:39, schrieb Tom Stellard:
[SNIP]
Way back when I first started working on the backend I was using
immediate operands in instructions defined to only uses registers, and
it worked most of the time, but I
On Tue, Feb 12, 2013 at 06:13:24PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIInstrInfo.td|4
lib/Target/R600/SIInstructions.td |5 +
2 files changed, 9
There's just the one cleanup on patch 10 that you mentioned, but
otherwise the series looks good to me. Should we mark all these patches
as candidates for the stable branch?
For the series:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
On Tue, Feb 12, 2013 at 06:13:13PM +0100, Christian
On Wed, Feb 13, 2013 at 11:24:24AM -0500, Tom Stellard wrote:
On Tue, Feb 12, 2013 at 06:13:24PM +0100, Christian König wrote:
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
lib/Target/R600/SIInstrInfo.td|4
From: Tom Stellard thomas.stell...@amd.com
In some cases, we were losing track of live implicit registers which
was creating dead defs and causing the scheduler to produce invalid
code.
NOTE: This is a candidate for the Mesa stable branch.
---
lib/Target/R600/AMDGPUIndirectAddressing.cpp | 35
From: Tom Stellard thomas.stell...@amd.com
Kernel function arguments are lowered to loads from the PARAM_I address
space. When creating these load instructions, we were initializing
their MachinePointerInfo with an Arguement object that was not attached
to any function. This was causing
From: Tom Stellard thomas.stell...@amd.com
This stops the Machine Verifier from complaining about uses of undefined
physical registers.
NOTE: This is a candidate for the Mesa stable branch.
---
lib/Target/R600/R600RegisterInfo.cpp |6 ++
1 files changed, 6 insertions(+), 0 deletions
From: Tom Stellard thomas.stell...@amd.com
NOTE: This is a candidate for the Mesa stable branch.
---
lib/Target/R600/R600RegisterInfo.td |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/lib/Target/R600/R600RegisterInfo.td
b/lib/Target/R600/R600RegisterInfo.td
index
to be packed together in a single VLIW group).
Also it tries to reduce clause switching by grouping instruction of the
same kind (ALU/FETCH/CF) together.
Vincent Lejeune:
- Support for VLIW4 Slot assignement
- Recomputation of ScheduleDAG to get more parallelism opportunities
Tom Stellard:
- Fix
On Wed, Feb 13, 2013 at 04:34:24PM +0100, Michel Dänzer wrote:
From: Michel Dänzer michel.daen...@amd.com
Requires corresponding LLVM R600 backend fix to work correctly, but even
without that it doesn't hang anymore.
13 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
From: Tom Stellard thomas.stell...@amd.com
This way llvm_wrapper.cpp is compiled with -DHAVE_LLVM=0x
---
src/gallium/drivers/r600/Makefile.am | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/Makefile.am
b/src/gallium/drivers/r600/Makefile.am
From: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/r600/llvm_wrapper.cpp | 4
src/gallium/drivers/radeon/radeon_llvm_emit.cpp | 9 -
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/llvm_wrapper.cpp
b/src/gallium/drivers
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