[Mesa-dev] [PATCH 1/2] radeonsi: fix indirect loads of 64 bit constants

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haeh...@amd.com>

This fixes GL45-CTS.compute_shader.fp64-case3.

Cc: mesa-sta...@lists.freedesktop.org
---
 src/gallium/drivers/radeonsi/si_shader.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 25146e8..15432b2 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1907,25 +1907,25 @@ static LLVMValueRef fetch_constant(
        addr = lp_build_mul_imm(&bld_base->uint_bld, addr, 16);
        addr = lp_build_add(&bld_base->uint_bld, addr,
                            lp_build_const_int32(base->gallivm, idx * 4));
 
        result = buffer_load_const(ctx, bufp, addr);
 
        if (!tgsi_type_is_64bit(type))
                result = bitcast(bld_base, type, result);
        else {
                LLVMValueRef addr2, result2;
-               addr2 = ctx->radeon_bld.soa.addr[ireg->Index][ireg->Swizzle + 
1];
+               addr2 = ctx->radeon_bld.soa.addr[ireg->Index][ireg->Swizzle];
                addr2 = LLVMBuildLoad(base->gallivm->builder, addr2, "load addr 
reg2");
                addr2 = lp_build_mul_imm(&bld_base->uint_bld, addr2, 16);
                addr2 = lp_build_add(&bld_base->uint_bld, addr2,
-                                    lp_build_const_int32(base->gallivm, idx * 
4));
+                                    lp_build_const_int32(base->gallivm, (idx + 
1) * 4));
 
                result2 = buffer_load_const(ctx, bufp, addr2);
 
                result = radeon_llvm_emit_fetch_64bit(bld_base, type,
                                                      result, result2);
        }
        return result;
 }
 
 /* Upper 16 bits must be zero. */
-- 
2.7.4

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