subject:"\[Mesa\-dev\] \[PATCH v2 23\/24\] intel\/blorp\: Use isl_aux_op instead of blorp_hiz

Re: [Mesa-dev] [PATCH v2 23/24] intel/blorp: Use isl_aux_op instead of blorp_hiz_op

2018-01-30 Thread Nanley Chery

On Fri, Jan 19, 2018 at 03:47:40PM -0800, Jason Ekstrand wrote:
> ---
>  src/intel/blorp/blorp.c   |  2 +-
>  src/intel/blorp/blorp.h   | 19 +
>  src/intel/blorp/blorp_clear.c |  2 +-
>  src/intel/blorp/blorp_genX_exec.h | 39 
> ++-
>  src/intel/blorp/blorp_priv.h  |  2 +-
>  src/intel/vulkan/anv_blorp.c  | 15 +--
>  src/mesa/drivers/dri/i965/brw_blorp.c | 16 +--
>  src/mesa/drivers/dri/i965/brw_blorp.h |  2 +-
>  src/mesa/drivers/dri/i965/brw_clear.c |  4 +--
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 +-
>  10 files changed, 44 insertions(+), 71 deletions(-)
> 
> diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> index e8a2c61..f067515 100644
> --- a/src/intel/blorp/blorp.c
> +++ b/src/intel/blorp/blorp.c
> @@ -293,7 +293,7 @@ blorp_ensure_sf_program(struct blorp_context *blorp,
>  void
>  blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
>   uint32_t level, uint32_t start_layer, uint32_t num_layers,
> - enum blorp_hiz_op op)
> + enum isl_aux_op op)
>  {
> struct blorp_params params;
> blorp_params_init();
> diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
> index f1be12b..ce3762c 100644
> --- a/src/intel/blorp/blorp.h
> +++ b/src/intel/blorp/blorp.h
> @@ -207,27 +207,10 @@ blorp_mcs_partial_resolve(struct blorp_batch *batch,
>enum isl_format format,
>uint32_t start_layer, uint32_t num_layers);
>  
> -/**
> - * For an overview of the HiZ operations, see the following sections of the
> - * Sandy Bridge PRM, Volume 1, Part2:
> - *   - 7.5.3.1 Depth Buffer Clear
> - *   - 7.5.3.2 Depth Buffer Resolve
> - *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
> - *
> - * Of these, two get entered in the resolve map as needing to be done to the
> - * buffer: depth resolve and hiz resolve.
> - */
> -enum blorp_hiz_op {
> -   BLORP_HIZ_OP_NONE,
> -   BLORP_HIZ_OP_DEPTH_CLEAR,
> -   BLORP_HIZ_OP_DEPTH_RESOLVE,
> -   BLORP_HIZ_OP_HIZ_RESOLVE,
> -};
> -
>  void
>  blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
>   uint32_t level, uint32_t start_layer, uint32_t num_layers,
> - enum blorp_hiz_op op);
> + enum isl_aux_op op);
>  
>  #ifdef __cplusplus
>  } /* end extern "C" */
> diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
> index 8b7c5a8..e9f5463 100644
> --- a/src/intel/blorp/blorp_clear.c
> +++ b/src/intel/blorp/blorp_clear.c
> @@ -630,7 +630,7 @@ blorp_gen8_hiz_clear_attachments(struct blorp_batch 
> *batch,
> struct blorp_params params;
> blorp_params_init();
> params.num_layers = 1;
> -   params.hiz_op = BLORP_HIZ_OP_DEPTH_CLEAR;
> +   params.hiz_op = ISL_AUX_OP_FAST_CLEAR;
> params.x0 = x0;
> params.y0 = y0;
> params.x1 = x1;
> diff --git a/src/intel/blorp/blorp_genX_exec.h 
> b/src/intel/blorp/blorp_genX_exec.h
> index 8d007b8..5e1312a 100644
> --- a/src/intel/blorp/blorp_genX_exec.h
> +++ b/src/intel/blorp/blorp_genX_exec.h
> @@ -787,16 +787,16 @@ blorp_emit_ps_config(struct blorp_batch *batch,
>  
> blorp_emit(batch, GENX(3DSTATE_WM), wm) {
>switch (params->hiz_op) {
> -  case BLORP_HIZ_OP_DEPTH_CLEAR:
> +  case ISL_AUX_OP_FAST_CLEAR:
>   wm.DepthBufferClear = true;
>   break;
> -  case BLORP_HIZ_OP_DEPTH_RESOLVE:
> +  case ISL_AUX_OP_FULL_RESOLVE:
>   wm.DepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_HIZ_RESOLVE:
> +  case ISL_AUX_OP_AMBIGUATE:
>   wm.HierarchicalDepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_NONE:
> +  case ISL_AUX_OP_NONE:
>   break;
>default:
>   unreachable("not reached");
> @@ -872,16 +872,16 @@ blorp_emit_ps_config(struct blorp_batch *batch,
>   batch->blorp->isl_dev->info->max_wm_threads - 1;
>  
>switch (params->hiz_op) {
> -  case BLORP_HIZ_OP_DEPTH_CLEAR:
> +  case ISL_AUX_OP_FAST_CLEAR:
>   wm.DepthBufferClear = true;
>   break;
> -  case BLORP_HIZ_OP_DEPTH_RESOLVE:
> +  case ISL_AUX_OP_FULL_RESOLVE:
>   wm.DepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_HIZ_RESOLVE:
> +  case ISL_AUX_OP_AMBIGUATE:
>   wm.HierarchicalDepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_NONE:
> +  case ISL_AUX_OP_NONE:
>   break;
>default:
>   unreachable("not reached");
> @@ -1014,7 +1014,7 @@ blorp_emit_depth_stencil_state(struct blorp_batch 
> *batch,
>ds.DepthBufferWriteEnable = true;
>  
>switch (params->hiz_op) {
> -  case BLORP_HIZ_OP_NONE:
> +  case ISL_AUX_OP_NONE:
>   ds.DepthTestEnable = true;
>

Re: [Mesa-dev] [PATCH v2 23/24] intel/blorp: Use isl_aux_op instead of blorp_hiz_op

2018-01-22 Thread Pohjolainen, Topi

On Fri, Jan 19, 2018 at 03:47:40PM -0800, Jason Ekstrand wrote:
> ---
>  src/intel/blorp/blorp.c   |  2 +-
>  src/intel/blorp/blorp.h   | 19 +
>  src/intel/blorp/blorp_clear.c |  2 +-
>  src/intel/blorp/blorp_genX_exec.h | 39 
> ++-
>  src/intel/blorp/blorp_priv.h  |  2 +-
>  src/intel/vulkan/anv_blorp.c  | 15 +--
>  src/mesa/drivers/dri/i965/brw_blorp.c | 16 +--
>  src/mesa/drivers/dri/i965/brw_blorp.h |  2 +-
>  src/mesa/drivers/dri/i965/brw_clear.c |  4 +--
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 +-
>  10 files changed, 44 insertions(+), 71 deletions(-)

Reviewed-by: Topi Pohjolainen 

> 
> diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> index e8a2c61..f067515 100644
> --- a/src/intel/blorp/blorp.c
> +++ b/src/intel/blorp/blorp.c
> @@ -293,7 +293,7 @@ blorp_ensure_sf_program(struct blorp_context *blorp,
>  void
>  blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
>   uint32_t level, uint32_t start_layer, uint32_t num_layers,
> - enum blorp_hiz_op op)
> + enum isl_aux_op op)
>  {
> struct blorp_params params;
> blorp_params_init();
> diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
> index f1be12b..ce3762c 100644
> --- a/src/intel/blorp/blorp.h
> +++ b/src/intel/blorp/blorp.h
> @@ -207,27 +207,10 @@ blorp_mcs_partial_resolve(struct blorp_batch *batch,
>enum isl_format format,
>uint32_t start_layer, uint32_t num_layers);
>  
> -/**
> - * For an overview of the HiZ operations, see the following sections of the
> - * Sandy Bridge PRM, Volume 1, Part2:
> - *   - 7.5.3.1 Depth Buffer Clear
> - *   - 7.5.3.2 Depth Buffer Resolve
> - *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
> - *
> - * Of these, two get entered in the resolve map as needing to be done to the
> - * buffer: depth resolve and hiz resolve.
> - */
> -enum blorp_hiz_op {
> -   BLORP_HIZ_OP_NONE,
> -   BLORP_HIZ_OP_DEPTH_CLEAR,
> -   BLORP_HIZ_OP_DEPTH_RESOLVE,
> -   BLORP_HIZ_OP_HIZ_RESOLVE,
> -};
> -
>  void
>  blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
>   uint32_t level, uint32_t start_layer, uint32_t num_layers,
> - enum blorp_hiz_op op);
> + enum isl_aux_op op);
>  
>  #ifdef __cplusplus
>  } /* end extern "C" */
> diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
> index 8b7c5a8..e9f5463 100644
> --- a/src/intel/blorp/blorp_clear.c
> +++ b/src/intel/blorp/blorp_clear.c
> @@ -630,7 +630,7 @@ blorp_gen8_hiz_clear_attachments(struct blorp_batch 
> *batch,
> struct blorp_params params;
> blorp_params_init();
> params.num_layers = 1;
> -   params.hiz_op = BLORP_HIZ_OP_DEPTH_CLEAR;
> +   params.hiz_op = ISL_AUX_OP_FAST_CLEAR;
> params.x0 = x0;
> params.y0 = y0;
> params.x1 = x1;
> diff --git a/src/intel/blorp/blorp_genX_exec.h 
> b/src/intel/blorp/blorp_genX_exec.h
> index 8d007b8..5e1312a 100644
> --- a/src/intel/blorp/blorp_genX_exec.h
> +++ b/src/intel/blorp/blorp_genX_exec.h
> @@ -787,16 +787,16 @@ blorp_emit_ps_config(struct blorp_batch *batch,
>  
> blorp_emit(batch, GENX(3DSTATE_WM), wm) {
>switch (params->hiz_op) {
> -  case BLORP_HIZ_OP_DEPTH_CLEAR:
> +  case ISL_AUX_OP_FAST_CLEAR:
>   wm.DepthBufferClear = true;
>   break;
> -  case BLORP_HIZ_OP_DEPTH_RESOLVE:
> +  case ISL_AUX_OP_FULL_RESOLVE:
>   wm.DepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_HIZ_RESOLVE:
> +  case ISL_AUX_OP_AMBIGUATE:
>   wm.HierarchicalDepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_NONE:
> +  case ISL_AUX_OP_NONE:
>   break;
>default:
>   unreachable("not reached");
> @@ -872,16 +872,16 @@ blorp_emit_ps_config(struct blorp_batch *batch,
>   batch->blorp->isl_dev->info->max_wm_threads - 1;
>  
>switch (params->hiz_op) {
> -  case BLORP_HIZ_OP_DEPTH_CLEAR:
> +  case ISL_AUX_OP_FAST_CLEAR:
>   wm.DepthBufferClear = true;
>   break;
> -  case BLORP_HIZ_OP_DEPTH_RESOLVE:
> +  case ISL_AUX_OP_FULL_RESOLVE:
>   wm.DepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_HIZ_RESOLVE:
> +  case ISL_AUX_OP_AMBIGUATE:
>   wm.HierarchicalDepthBufferResolveEnable = true;
>   break;
> -  case BLORP_HIZ_OP_NONE:
> +  case ISL_AUX_OP_NONE:
>   break;
>default:
>   unreachable("not reached");
> @@ -1014,7 +1014,7 @@ blorp_emit_depth_stencil_state(struct blorp_batch 
> *batch,
>ds.DepthBufferWriteEnable = true;
>  
>switch (params->hiz_op) {
> -  case BLORP_HIZ_OP_NONE:
> +  case ISL_AUX_OP_NONE:
>

[Mesa-dev] [PATCH v2 23/24] intel/blorp: Use isl_aux_op instead of blorp_hiz_op

2018-01-19 Thread Jason Ekstrand

---
 src/intel/blorp/blorp.c   |  2 +-
 src/intel/blorp/blorp.h   | 19 +
 src/intel/blorp/blorp_clear.c |  2 +-
 src/intel/blorp/blorp_genX_exec.h | 39 ++-
 src/intel/blorp/blorp_priv.h  |  2 +-
 src/intel/vulkan/anv_blorp.c  | 15 +--
 src/mesa/drivers/dri/i965/brw_blorp.c | 16 +--
 src/mesa/drivers/dri/i965/brw_blorp.h |  2 +-
 src/mesa/drivers/dri/i965/brw_clear.c |  4 +--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 +-
 10 files changed, 44 insertions(+), 71 deletions(-)

diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index e8a2c61..f067515 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -293,7 +293,7 @@ blorp_ensure_sf_program(struct blorp_context *blorp,
 void
 blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
  uint32_t level, uint32_t start_layer, uint32_t num_layers,
- enum blorp_hiz_op op)
+ enum isl_aux_op op)
 {
struct blorp_params params;
blorp_params_init();
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index f1be12b..ce3762c 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -207,27 +207,10 @@ blorp_mcs_partial_resolve(struct blorp_batch *batch,
   enum isl_format format,
   uint32_t start_layer, uint32_t num_layers);
 
-/**
- * For an overview of the HiZ operations, see the following sections of the
- * Sandy Bridge PRM, Volume 1, Part2:
- *   - 7.5.3.1 Depth Buffer Clear
- *   - 7.5.3.2 Depth Buffer Resolve
- *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
- *
- * Of these, two get entered in the resolve map as needing to be done to the
- * buffer: depth resolve and hiz resolve.
- */
-enum blorp_hiz_op {
-   BLORP_HIZ_OP_NONE,
-   BLORP_HIZ_OP_DEPTH_CLEAR,
-   BLORP_HIZ_OP_DEPTH_RESOLVE,
-   BLORP_HIZ_OP_HIZ_RESOLVE,
-};
-
 void
 blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
  uint32_t level, uint32_t start_layer, uint32_t num_layers,
- enum blorp_hiz_op op);
+ enum isl_aux_op op);
 
 #ifdef __cplusplus
 } /* end extern "C" */
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 8b7c5a8..e9f5463 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -630,7 +630,7 @@ blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch,
struct blorp_params params;
blorp_params_init();
params.num_layers = 1;
-   params.hiz_op = BLORP_HIZ_OP_DEPTH_CLEAR;
+   params.hiz_op = ISL_AUX_OP_FAST_CLEAR;
params.x0 = x0;
params.y0 = y0;
params.x1 = x1;
diff --git a/src/intel/blorp/blorp_genX_exec.h 
b/src/intel/blorp/blorp_genX_exec.h
index 8d007b8..5e1312a 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -787,16 +787,16 @@ blorp_emit_ps_config(struct blorp_batch *batch,
 
blorp_emit(batch, GENX(3DSTATE_WM), wm) {
   switch (params->hiz_op) {
-  case BLORP_HIZ_OP_DEPTH_CLEAR:
+  case ISL_AUX_OP_FAST_CLEAR:
  wm.DepthBufferClear = true;
  break;
-  case BLORP_HIZ_OP_DEPTH_RESOLVE:
+  case ISL_AUX_OP_FULL_RESOLVE:
  wm.DepthBufferResolveEnable = true;
  break;
-  case BLORP_HIZ_OP_HIZ_RESOLVE:
+  case ISL_AUX_OP_AMBIGUATE:
  wm.HierarchicalDepthBufferResolveEnable = true;
  break;
-  case BLORP_HIZ_OP_NONE:
+  case ISL_AUX_OP_NONE:
  break;
   default:
  unreachable("not reached");
@@ -872,16 +872,16 @@ blorp_emit_ps_config(struct blorp_batch *batch,
  batch->blorp->isl_dev->info->max_wm_threads - 1;
 
   switch (params->hiz_op) {
-  case BLORP_HIZ_OP_DEPTH_CLEAR:
+  case ISL_AUX_OP_FAST_CLEAR:
  wm.DepthBufferClear = true;
  break;
-  case BLORP_HIZ_OP_DEPTH_RESOLVE:
+  case ISL_AUX_OP_FULL_RESOLVE:
  wm.DepthBufferResolveEnable = true;
  break;
-  case BLORP_HIZ_OP_HIZ_RESOLVE:
+  case ISL_AUX_OP_AMBIGUATE:
  wm.HierarchicalDepthBufferResolveEnable = true;
  break;
-  case BLORP_HIZ_OP_NONE:
+  case ISL_AUX_OP_NONE:
  break;
   default:
  unreachable("not reached");
@@ -1014,7 +1014,7 @@ blorp_emit_depth_stencil_state(struct blorp_batch *batch,
   ds.DepthBufferWriteEnable = true;
 
   switch (params->hiz_op) {
-  case BLORP_HIZ_OP_NONE:
+  case ISL_AUX_OP_NONE:
  ds.DepthTestEnable = true;
  ds.DepthTestFunction = COMPAREFUNCTION_ALWAYS;
  break;
@@ -1024,15 +1024,17 @@ blorp_emit_depth_stencil_state(struct blorp_batch 
*batch,
*   - 7.5.3.2 Depth Buffer Resolve
*   - 7.5.3.3 Hierarchical Depth Buffer Resolve
*/
-  case BLORP_HIZ_OP_DEPTH_RESOLVE:
+  case ISL_AUX_OP_FULL_RESOLVE:

Re: [Mesa-dev] [PATCH v2 23/24] intel/blorp: Use isl_aux_op instead of blorp_hiz_op

Re: [Mesa-dev] [PATCH v2 23/24] intel/blorp: Use isl_aux_op instead of blorp_hiz_op

[Mesa-dev] [PATCH v2 23/24] intel/blorp: Use isl_aux_op instead of blorp_hiz_op

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