subject:"Re\: \[Mesa\-dev\] \[PATCH v2 0\/8\] The 2nd version for UVD HEVC encode"

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-19 Thread James Zhu




On 2018-02-16 01:31 PM, Mark Thompson wrote:

On 16/02/18 17:53, James Zhu wrote:

Hi Mark,

I couldn't reproduce the issue on my Polaris 11 to run mpv / ffmpeg about 1.5 
hours.

one terminal run:

ffmpeg -y -hwaccel vaapi -hwaccel_device /dev/dri/renderD128 
-hwaccel_output_format vaapi -i video/Mr.Right.mp4 -an -c:v hevc_vaapi -bf 0 
out.mp4

the other  terminal run:

mpv --fs --loop --no-audio --vo gpu --gpu-context=x11egl --hwdec=vaapi 
video/Mr.Right.mp4
But it has some failure with vaDeriveImage. I am not  sure if this failure 
matters, the video still can play without any other error,

If it's calling vaDeriveImage() at all that suggests it isn't using the proper 
interop path, and may be falling back to software decode.  This should work in 
recent versions of mpv with git Mesa and libva - maybe have a look at the 
verbose output and see what it's actually doing?
I think you are right, it should fall back to software decode. During 
the weekend test, my system hung also with legacy VAAPI test output setting.



mpv --fs --loop --no-audio --vo vaapi  --hwdec=vaapi video/Mr.Right.mp4

No error reported with this command line.

I haven't tried the legacy VAAPI test output, I'll try later to see if that 
also triggers the failure for me.


I don't think that this sort of issue should block the patches in Mesa because 
it looks likely that it is a kernel issue somehow - userspace shouldn't be able 
to nuke the GPU at all.  Still, the feature is essentially unusable for me 
because of this problem, and I imagine it will apply to at least some other 
people with setups which are match mine in some way as yet unknown.
Yeah, if there are no more comments from the community. We will push the 
patches to the upstream tomorrow.


Thanks,

- Mark


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Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-16 Thread Mark Thompson

On 16/02/18 17:53, James Zhu wrote:
> Hi Mark,
> 
> I couldn't reproduce the issue on my Polaris 11 to run mpv / ffmpeg about 1.5 
> hours.
> 
> one terminal run:
> 
> ffmpeg -y -hwaccel vaapi -hwaccel_device /dev/dri/renderD128 
> -hwaccel_output_format vaapi -i video/Mr.Right.mp4 -an -c:v hevc_vaapi -bf 0 
> out.mp4
> 
> the other  terminal run:
> 
> mpv --fs --loop --no-audio --vo gpu --gpu-context=x11egl --hwdec=vaapi 
> video/Mr.Right.mp4
> But it has some failure with vaDeriveImage. I am not  sure if this failure 
> matters, the video still can play without any other error,

If it's calling vaDeriveImage() at all that suggests it isn't using the proper 
interop path, and may be falling back to software decode.  This should work in 
recent versions of mpv with git Mesa and libva - maybe have a look at the 
verbose output and see what it's actually doing?

> mpv --fs --loop --no-audio --vo vaapi  --hwdec=vaapi video/Mr.Right.mp4
> 
> No error reported with this command line.

I haven't tried the legacy VAAPI test output, I'll try later to see if that 
also triggers the failure for me.

I don't think that this sort of issue should block the patches in Mesa because 
it looks likely that it is a kernel issue somehow - userspace shouldn't be able 
to nuke the GPU at all.  Still, the feature is essentially unusable for me 
because of this problem, and I imagine it will apply to at least some other 
people with setups which are match mine in some way as yet unknown.

Thanks,

- Mark
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Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-13 Thread Mark Thompson

On 13/02/18 16:38, James Zhu wrote:
> Hi Mark,
> 
> Did you still encounter hung issue?
> 
> If yes, could you share me with your play and transcode streams and command 
> line,
> then I can try to reproduce at my side.
> 
> Thanks & Best Regards!
> 
> James Zhu

Yes, it does still happen with the latest patches and vanila kernel 4.15.2, on 
an RX 460 / Polaris 11.


To reproduce:

Take a normal 1080p H.264 input file (I tried a few different ones and it 
didn't change anyway, if you want something exactly the same then the usual Big 
Buck Bunny video was among those tested).

Use the GPU to play back the video with mpv in a normal X session running on 
the AMD card (I'm running this via ssh in an otherwise-empty X instance):

mpv --fs --loop --no-audio --vo gpu --gpu-context=x11egl --hwdec=vaapi 
bbb_1080_264.mp4

Then transcode it to H.265 on the same device at the same time:

ffmpeg -y -hwaccel vaapi -hwaccel_device /dev/dri/renderD129 
-hwaccel_output_format vaapi -i bbb_1080_264.mp4 -an -c:v hevc_vaapi -bf 0 
out.mp4

and the GPU locks up completely very quickly (within a few seconds / a few 
hundred frames of starting).

That leaves unkillable zombie processes of everything which was touching the 
GPU at the time it died:

$ ps aux | grep [d]efunct
root  6994  0.4  0.0  0 0 ?Zsl  20:43   0:22 [Xorg] 

mrt  20601  0.3  0.0  0 0 ?Zl   21:50   0:02 [mpv] 
mrt  20630  0.0  0.0  0 0 ?Zl   21:51   0:00 [ffmpeg_g] 



To compare, encoding H.264 instead of H.265 at the same time with:

ffmpeg -y -hwaccel vaapi -hwaccel_device /dev/dri/renderD129 
-hwaccel_output_format vaapi -i bbb_1080_264.mp4 -an -c:v h264_vaapi -profile 
constrained_baseline -bf 0 out.mp4

does not fail.


Thanks,

- Mark



Kernel messages:

[279612.955929] INFO: task kworker/u24:3:20617 blocked for more than 120 
seconds.
[279612.955936]   Not tainted 4.15.2 #2
[279612.955939] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables 
this message.
[279612.955943] kworker/u24:3   D0 20617  2 0x8000
[279612.955957] Workqueue: events_unbound commit_work
[279612.955961] Call Trace:
[279612.955975]  ? __schedule+0x26b/0x840
[279612.955982]  schedule+0x28/0x80
[279612.955987]  schedule_timeout+0x1de/0x360
[279612.956123]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[279612.956246]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 
[amdgpu]
[279612.956254]  dma_fence_default_wait+0x1f6/0x280
[279612.956261]  ? dma_fence_release+0x90/0x90
[279612.956267]  dma_fence_wait_timeout+0x33/0xe0
[279612.956274]  reservation_object_wait_timeout_rcu+0x198/0x340
[279612.956396]  amdgpu_dm_do_flip+0x112/0x350 [amdgpu]
[279612.956514]  amdgpu_dm_atomic_commit_tail+0x8a4/0x9a0 [amdgpu]
[279612.956521]  ? pick_next_task_fair+0x14f/0x5f0
[279612.956528]  commit_tail+0x3a/0x70
[279612.956534]  process_one_work+0x17c/0x370
[279612.956540]  worker_thread+0x2e/0x370
[279612.956545]  ? process_one_work+0x370/0x370
[279612.956551]  kthread+0x111/0x130
[279612.956558]  ? kthread_create_worker_on_cpu+0x70/0x70
[279612.956564]  ret_from_fork+0x1f/0x30
[279733.790840] INFO: task amdgpu_cs:0:20607 blocked for more than 120 seconds.
[279733.790848]   Not tainted 4.15.2 #2
[279733.790850] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables 
this message.
[279733.790854] amdgpu_cs:0 D0 20607  20087 0x8002
[279733.790861] Call Trace:
[279733.790876]  ? __schedule+0x26b/0x840
[279733.790883]  schedule+0x28/0x80
[279733.790890]  schedule_preempt_disabled+0xa/0x10
[279733.790898]  __mutex_lock.isra.1+0x18e/0x4c0
[279733.790906]  ? __slab_free+0x14b/0x300
[279733.790915]  ? drm_release+0x36/0x3b0
[279733.790920]  drm_release+0x36/0x3b0
[279733.790929]  __fput+0xcd/0x1d0
[279733.790937]  task_work_run+0x7b/0xa0
[279733.790943]  do_exit+0x2d0/0xb10
[279733.790948]  ? __check_object_size+0xaf/0x1b0
[279733.790954]  do_group_exit+0x3a/0xa0
[279733.790960]  get_signal+0x260/0x560
[279733.790968]  do_signal+0x36/0x690
[279733.791053]  ? amdgpu_drm_ioctl+0x6c/0x80 [amdgpu]
[279733.791060]  ? do_vfs_ioctl+0xa1/0x610
[279733.791066]  ? SyS_futex+0x12d/0x180
[279733.791072]  exit_to_usermode_loop+0x58/0x90
[279733.791077]  do_syscall_64+0xe8/0xf0
[279733.791082]  entry_SYSCALL_64_after_hwframe+0x21/0x86
[279733.791088] RIP: 0033:0x7f769b8f27dd
[279733.791091] RSP: 002b:7f768b6bbd70 EFLAGS: 0246 ORIG_RAX: 
00ca
[279733.791097] RAX: fe00 RBX: 7f76902db2f0 RCX: 
7f769b8f27dd
[279733.791100] RDX:  RSI: 0080 RDI: 
7f76902db318
[279733.791103] RBP:  R08:  R09: 

[279733.791106] R10:  R11: 0246 R12: 
19f0
[279733.791109] R13: 7f76902db2c8 R14:  R15: 
7f76902db318
[279733.791115] INFO: task kworker/u24:3:20617 blocked for more than 120 
seconds.
[279733.791119]   Not tainted 4.15.2 #2

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-13 Thread James Zhu


Hi Mark,

Did you still encounter hung issue?

If yes, could you share me with your play and transcode streams and command 
line,
then I can try to reproduce at my side.

Thanks & Best Regards!

James Zhu

On 2018-02-10 11:06 AM, Mark Thompson wrote:


On 08/02/18 23:05, Mark Thompson wrote:

On 08/02/18 22:37, Alex Deucher wrote:

On Thu, Feb 8, 2018 at 5:28 PM, Mark Thompson  wrote:

On 06/02/18 20:05, James Zhu wrote:

The whole series are the updated version. Changes are made mainly based
on the comments from prevous code review from Alex, Leo and Boyuan

James Zhu (8):
   amd/common:add uvd hevc enc support check in hw query
   winsys/amdgpu:add uvd hevc enc support in amdgpu cs
   radeon/uvd:add uvd hevc enc hw interface header
   radeon/uvd:add uvd hevc enc hw ib implementation
   radeon/uvd:add uvd hevc enc functions
   radeon/uvd:add uvd hevc enc files in Makefile list
   radeonsi:create uvd hevc enc entry
   radeonsi: enable uvd encode for HEVC main

  src/amd/common/ac_gpu_info.c|   10 +-
  src/amd/common/ac_gpu_info.h|1 +
  src/gallium/drivers/radeon/Makefile.sources |3 +
  src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
  src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
  src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 +++
  src/gallium/drivers/radeonsi/si_get.c   |4 +-
  src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
  src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
  9 files changed, 1990 insertions(+), 5 deletions(-)
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c


Can you explain what the requirements are for using this (hardware, firmware, 
software)?

 From what I can find it should be on Polaris and Vega, but I haven't succeeded 
in getting it working on Polaris.

Yes, polaris and vega10.  For polaris, you'll need a kernel that
enables the uvd enc rings.  Patches went upstream last year, 4.14 I
think?  4.15 is a good bet.

Ah, that's where I'm going wrong - despite the dates it's not actually in 4.14, 
so I need 4.15.


  As for the polaris firmware, you'll need
version FW_1_130_16 or newer:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=2a713be25a44bd6cec90d8affc54b246a2ca9c7b

Right, I have the encoder working with 4.15.2 on an RX 460 / Polaris 11 with 
firmware 1.130_16.

There seems to be some issue with using both encode and playback at the same 
time?  It hangs the amdgpu driver and all userspaces processes interacting with 
it become stuck and unkillable, requiring a reboot to recover.  It's completely 
repeatable, and only needs a few seconds to die when both mpv (playback) and 
ffmpeg (transcode) are running at the same time.

There is no message at all from the stuck driver, but I end up with hung tasks 
like:

[ 1209.317130] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1209.317132]   Not tainted 4.15.2 #2
[ 1209.317133] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1209.317133] kworker/u24:0   D0 5  2 0x8000
[ 1209.317137] Workqueue: events_unbound commit_work
[ 1209.317138] Call Trace:
[ 1209.317142]  ? __schedule+0x26b/0x840
[ 1209.317144]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1209.317145]  schedule+0x28/0x80
[ 1209.317146]  schedule_timeout+0x1de/0x360
[ 1209.317177]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1209.317199]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 [amdgpu]
[ 1209.317201]  dma_fence_default_wait+0x1f6/0x280
[ 1209.317203]  ? dma_fence_release+0x90/0x90
[ 1209.317204]  dma_fence_wait_timeout+0x33/0xe0
[ 1209.317205]  reservation_object_wait_timeout_rcu+0x198/0x340
[ 1209.317227]  amdgpu_dm_do_flip+0x112/0x350 [amdgpu]
[ 1209.317248]  amdgpu_dm_atomic_commit_tail+0x8a4/0x9a0 [amdgpu]
[ 1209.317250]  ? pick_next_task_fair+0x14f/0x5f0
[ 1209.317251]  commit_tail+0x3a/0x70
[ 1209.317252]  process_one_work+0x17c/0x370
[ 1209.317253]  worker_thread+0x2e/0x370
[ 1209.317255]  ? process_one_work+0x370/0x370
[ 1209.317256]  kthread+0x111/0x130
[ 1209.317257]  ? kthread_create_worker_on_cpu+0x70/0x70
[ 1209.317258]  ret_from_fork+0x1f/0x30
[ 1330.152054] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1330.152056]   Not tainted 4.15.2 #2
[ 1330.152056] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1330.152057] kworker/u24:0   D0 5  2 0x8000
[ 1330.152059] Workqueue: events_unbound commit_work
[ 1330.152060] Call Trace:
[ 1330.152063]  ? __schedule+0x26b/0x840
[ 1330.152065]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1330.152066]  schedule+0x28/0x80
[ 1330.152067]  schedule_timeout+0x1de/0x360
[ 1330.152108]  ?

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-12 Thread Zhu, James



On 2018-02-10 11:06 AM, Mark Thompson wrote:

On 08/02/18 23:05, Mark Thompson wrote:


On 08/02/18 22:37, Alex Deucher wrote:


On Thu, Feb 8, 2018 at 5:28 PM, Mark Thompson 
 wrote:


On 06/02/18 20:05, James Zhu wrote:


The whole series are the updated version. Changes are made mainly based
on the comments from prevous code review from Alex, Leo and Boyuan

James Zhu (8):
  amd/common:add uvd hevc enc support check in hw query
  winsys/amdgpu:add uvd hevc enc support in amdgpu cs
  radeon/uvd:add uvd hevc enc hw interface header
  radeon/uvd:add uvd hevc enc hw ib implementation
  radeon/uvd:add uvd hevc enc functions
  radeon/uvd:add uvd hevc enc files in Makefile list
  radeonsi:create uvd hevc enc entry
  radeonsi: enable uvd encode for HEVC main

 src/amd/common/ac_gpu_info.c|   10 +-
 src/amd/common/ac_gpu_info.h|1 +
 src/gallium/drivers/radeon/Makefile.sources |3 +
 src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
 src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 +++
 src/gallium/drivers/radeonsi/si_get.c   |4 +-
 src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
 9 files changed, 1990 insertions(+), 5 deletions(-)
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
 create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c



Can you explain what the requirements are for using this (hardware, firmware, 
software)?

>From what I can find it should be on Polaris and Vega, but I haven't succeeded 
>in getting it working on Polaris.


Yes, polaris and vega10.  For polaris, you'll need a kernel that
enables the uvd enc rings.  Patches went upstream last year, 4.14 I
think?  4.15 is a good bet.


Ah, that's where I'm going wrong - despite the dates it's not actually in 4.14, 
so I need 4.15.



 As for the polaris firmware, you'll need
version FW_1_130_16 or newer:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=2a713be25a44bd6cec90d8affc54b246a2ca9c7b


Right, I have the encoder working with 4.15.2 on an RX 460 / Polaris 11 with 
firmware 1.130_16.

There seems to be some issue with using both encode and playback at the same 
time?  It hangs the amdgpu driver and all userspaces processes interacting with 
it become stuck and unkillable, requiring a reboot to recover.  It's completely 
repeatable, and only needs a few seconds to die when both mpv (playback) and 
ffmpeg (transcode) are running at the same time.

There is no message at all from the stuck driver, but I end up with hung tasks 
like:

[ 1209.317130] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1209.317132]   Not tainted 4.15.2 #2
[ 1209.317133] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1209.317133] kworker/u24:0   D0 5  2 0x8000
[ 1209.317137] Workqueue: events_unbound commit_work
[ 1209.317138] Call Trace:
[ 1209.317142]  ? __schedule+0x26b/0x840
[ 1209.317144]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1209.317145]  schedule+0x28/0x80
[ 1209.317146]  schedule_timeout+0x1de/0x360
[ 1209.317177]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1209.317199]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 [amdgpu]
[ 1209.317201]  dma_fence_default_wait+0x1f6/0x280
[ 1209.317203]  ? dma_fence_release+0x90/0x90
[ 1209.317204]  dma_fence_wait_timeout+0x33/0xe0
[ 1209.317205]  reservation_object_wait_timeout_rcu+0x198/0x340
[ 1209.317227]  amdgpu_dm_do_flip+0x112/0x350 [amdgpu]
[ 1209.317248]  amdgpu_dm_atomic_commit_tail+0x8a4/0x9a0 [amdgpu]
[ 1209.317250]  ? pick_next_task_fair+0x14f/0x5f0
[ 1209.317251]  commit_tail+0x3a/0x70
[ 1209.317252]  process_one_work+0x17c/0x370
[ 1209.317253]  worker_thread+0x2e/0x370
[ 1209.317255]  ? process_one_work+0x370/0x370
[ 1209.317256]  kthread+0x111/0x130
[ 1209.317257]  ? kthread_create_worker_on_cpu+0x70/0x70
[ 1209.317258]  ret_from_fork+0x1f/0x30
[ 1330.152054] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1330.152056]   Not tainted 4.15.2 #2
[ 1330.152056] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1330.152057] kworker/u24:0   D0 5  2 0x8000
[ 1330.152059] Workqueue: events_unbound commit_work
[ 1330.152060] Call Trace:
[ 1330.152063]  ? __schedule+0x26b/0x840
[ 1330.152065]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1330.152066]  schedule+0x28/0x80
[ 1330.152067]  schedule_timeout+0x1de/0x360
[ 1330.152108]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1330.152130]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 [amdgpu]
[ 1330.152132]  dma_fence_default_wait+0x1f6/0x280
[

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-10 Thread Mark Thompson

On 08/02/18 23:05, Mark Thompson wrote:
> On 08/02/18 22:37, Alex Deucher wrote:
>> On Thu, Feb 8, 2018 at 5:28 PM, Mark Thompson  wrote:
>>> On 06/02/18 20:05, James Zhu wrote:
 The whole series are the updated version. Changes are made mainly based
 on the comments from prevous code review from Alex, Leo and Boyuan

 James Zhu (8):
   amd/common:add uvd hevc enc support check in hw query
   winsys/amdgpu:add uvd hevc enc support in amdgpu cs
   radeon/uvd:add uvd hevc enc hw interface header
   radeon/uvd:add uvd hevc enc hw ib implementation
   radeon/uvd:add uvd hevc enc functions
   radeon/uvd:add uvd hevc enc files in Makefile list
   radeonsi:create uvd hevc enc entry
   radeonsi: enable uvd encode for HEVC main

  src/amd/common/ac_gpu_info.c|   10 +-
  src/amd/common/ac_gpu_info.h|1 +
  src/gallium/drivers/radeon/Makefile.sources |3 +
  src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
  src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
  src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 
 +++
  src/gallium/drivers/radeonsi/si_get.c   |4 +-
  src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
  src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
  9 files changed, 1990 insertions(+), 5 deletions(-)
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c

>>>
>>> Can you explain what the requirements are for using this (hardware, 
>>> firmware, software)?
>>>
>>> From what I can find it should be on Polaris and Vega, but I haven't 
>>> succeeded in getting it working on Polaris.
>>
>> Yes, polaris and vega10.  For polaris, you'll need a kernel that
>> enables the uvd enc rings.  Patches went upstream last year, 4.14 I
>> think?  4.15 is a good bet.
> 
> Ah, that's where I'm going wrong - despite the dates it's not actually in 
> 4.14, so I need 4.15.
> 
>>  As for the polaris firmware, you'll need
>> version FW_1_130_16 or newer:
>> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=2a713be25a44bd6cec90d8affc54b246a2ca9c7b

Right, I have the encoder working with 4.15.2 on an RX 460 / Polaris 11 with 
firmware 1.130_16.

There seems to be some issue with using both encode and playback at the same 
time?  It hangs the amdgpu driver and all userspaces processes interacting with 
it become stuck and unkillable, requiring a reboot to recover.  It's completely 
repeatable, and only needs a few seconds to die when both mpv (playback) and 
ffmpeg (transcode) are running at the same time.

There is no message at all from the stuck driver, but I end up with hung tasks 
like:

[ 1209.317130] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1209.317132]   Not tainted 4.15.2 #2
[ 1209.317133] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1209.317133] kworker/u24:0   D0 5  2 0x8000
[ 1209.317137] Workqueue: events_unbound commit_work
[ 1209.317138] Call Trace:
[ 1209.317142]  ? __schedule+0x26b/0x840
[ 1209.317144]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1209.317145]  schedule+0x28/0x80
[ 1209.317146]  schedule_timeout+0x1de/0x360
[ 1209.317177]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1209.317199]  ? dce110_timing_generator_get_crtc_scanoutpos+0x6b/0xa0 [amdgpu]
[ 1209.317201]  dma_fence_default_wait+0x1f6/0x280
[ 1209.317203]  ? dma_fence_release+0x90/0x90
[ 1209.317204]  dma_fence_wait_timeout+0x33/0xe0
[ 1209.317205]  reservation_object_wait_timeout_rcu+0x198/0x340
[ 1209.317227]  amdgpu_dm_do_flip+0x112/0x350 [amdgpu]
[ 1209.317248]  amdgpu_dm_atomic_commit_tail+0x8a4/0x9a0 [amdgpu]
[ 1209.317250]  ? pick_next_task_fair+0x14f/0x5f0
[ 1209.317251]  commit_tail+0x3a/0x70
[ 1209.317252]  process_one_work+0x17c/0x370
[ 1209.317253]  worker_thread+0x2e/0x370
[ 1209.317255]  ? process_one_work+0x370/0x370
[ 1209.317256]  kthread+0x111/0x130
[ 1209.317257]  ? kthread_create_worker_on_cpu+0x70/0x70
[ 1209.317258]  ret_from_fork+0x1f/0x30
[ 1330.152054] INFO: task kworker/u24:0:5 blocked for more than 120 seconds.
[ 1330.152056]   Not tainted 4.15.2 #2
[ 1330.152056] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this 
message.
[ 1330.152057] kworker/u24:0   D0 5  2 0x8000
[ 1330.152059] Workqueue: events_unbound commit_work
[ 1330.152060] Call Trace:
[ 1330.152063]  ? __schedule+0x26b/0x840
[ 1330.152065]  ? __update_load_avg_se.isra.37+0x1b6/0x1c0
[ 1330.152066]  schedule+0x28/0x80
[ 1330.152067]  schedule_timeout+0x1de/0x360
[ 1330.152108]  ? dce110_timing_generator_get_position+0x51/0x60 [amdgpu]
[ 1330.152130]  ?

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-08 Thread Mark Thompson

On 08/02/18 22:37, Alex Deucher wrote:
> On Thu, Feb 8, 2018 at 5:28 PM, Mark Thompson  wrote:
>> On 06/02/18 20:05, James Zhu wrote:
>>> The whole series are the updated version. Changes are made mainly based
>>> on the comments from prevous code review from Alex, Leo and Boyuan
>>>
>>> James Zhu (8):
>>>   amd/common:add uvd hevc enc support check in hw query
>>>   winsys/amdgpu:add uvd hevc enc support in amdgpu cs
>>>   radeon/uvd:add uvd hevc enc hw interface header
>>>   radeon/uvd:add uvd hevc enc hw ib implementation
>>>   radeon/uvd:add uvd hevc enc functions
>>>   radeon/uvd:add uvd hevc enc files in Makefile list
>>>   radeonsi:create uvd hevc enc entry
>>>   radeonsi: enable uvd encode for HEVC main
>>>
>>>  src/amd/common/ac_gpu_info.c|   10 +-
>>>  src/amd/common/ac_gpu_info.h|1 +
>>>  src/gallium/drivers/radeon/Makefile.sources |3 +
>>>  src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
>>>  src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
>>>  src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 
>>> +++
>>>  src/gallium/drivers/radeonsi/si_get.c   |4 +-
>>>  src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
>>>  src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
>>>  9 files changed, 1990 insertions(+), 5 deletions(-)
>>>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
>>>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
>>>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
>>>
>>
>> Can you explain what the requirements are for using this (hardware, 
>> firmware, software)?
>>
>> From what I can find it should be on Polaris and Vega, but I haven't 
>> succeeded in getting it working on Polaris.
> 
> Yes, polaris and vega10.  For polaris, you'll need a kernel that
> enables the uvd enc rings.  Patches went upstream last year, 4.14 I
> think?  4.15 is a good bet.

Ah, that's where I'm going wrong - despite the dates it's not actually in 4.14, 
so I need 4.15.

>  As for the polaris firmware, you'll need
> version FW_1_130_16 or newer:
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=2a713be25a44bd6cec90d8affc54b246a2ca9c7b

Thanks,

- Mark
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Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-08 Thread Alex Deucher

On Thu, Feb 8, 2018 at 5:28 PM, Mark Thompson  wrote:
> On 06/02/18 20:05, James Zhu wrote:
>> The whole series are the updated version. Changes are made mainly based
>> on the comments from prevous code review from Alex, Leo and Boyuan
>>
>> James Zhu (8):
>>   amd/common:add uvd hevc enc support check in hw query
>>   winsys/amdgpu:add uvd hevc enc support in amdgpu cs
>>   radeon/uvd:add uvd hevc enc hw interface header
>>   radeon/uvd:add uvd hevc enc hw ib implementation
>>   radeon/uvd:add uvd hevc enc functions
>>   radeon/uvd:add uvd hevc enc files in Makefile list
>>   radeonsi:create uvd hevc enc entry
>>   radeonsi: enable uvd encode for HEVC main
>>
>>  src/amd/common/ac_gpu_info.c|   10 +-
>>  src/amd/common/ac_gpu_info.h|1 +
>>  src/gallium/drivers/radeon/Makefile.sources |3 +
>>  src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
>>  src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
>>  src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 
>> +++
>>  src/gallium/drivers/radeonsi/si_get.c   |4 +-
>>  src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
>>  src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
>>  9 files changed, 1990 insertions(+), 5 deletions(-)
>>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
>>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
>>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
>>
>
> Can you explain what the requirements are for using this (hardware, firmware, 
> software)?
>
> From what I can find it should be on Polaris and Vega, but I haven't 
> succeeded in getting it working on Polaris.

Yes, polaris and vega10.  For polaris, you'll need a kernel that
enables the uvd enc rings.  Patches went upstream last year, 4.14 I
think?  4.15 is a good bet.  As for the polaris firmware, you'll need
version FW_1_130_16 or newer:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/commit/?id=2a713be25a44bd6cec90d8affc54b246a2ca9c7b

Alex

>
> Thanks,
>
> - Mark
> ___
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Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

2018-02-08 Thread Mark Thompson

On 06/02/18 20:05, James Zhu wrote:
> The whole series are the updated version. Changes are made mainly based 
> on the comments from prevous code review from Alex, Leo and Boyuan
> 
> James Zhu (8):
>   amd/common:add uvd hevc enc support check in hw query
>   winsys/amdgpu:add uvd hevc enc support in amdgpu cs
>   radeon/uvd:add uvd hevc enc hw interface header
>   radeon/uvd:add uvd hevc enc hw ib implementation
>   radeon/uvd:add uvd hevc enc functions
>   radeon/uvd:add uvd hevc enc files in Makefile list
>   radeonsi:create uvd hevc enc entry
>   radeonsi: enable uvd encode for HEVC main
> 
>  src/amd/common/ac_gpu_info.c|   10 +-
>  src/amd/common/ac_gpu_info.h|1 +
>  src/gallium/drivers/radeon/Makefile.sources |3 +
>  src/gallium/drivers/radeon/radeon_uvd_enc.c |  370 
>  src/gallium/drivers/radeon/radeon_uvd_enc.h |  471 ++
>  src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 
> +++
>  src/gallium/drivers/radeonsi/si_get.c   |4 +-
>  src/gallium/drivers/radeonsi/si_uvd.c   |   15 +-
>  src/gallium/winsys/amdgpu/drm/amdgpu_cs.c   |6 +
>  9 files changed, 1990 insertions(+), 5 deletions(-)
>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
>  create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
> 

Can you explain what the requirements are for using this (hardware, firmware, 
software)?

From what I can find it should be on Polaris and Vega, but I haven't succeeded 
in getting it working on Polaris.

Thanks,

- Mark
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Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

Re: [Mesa-dev] [PATCH v2 0/8] The 2nd version for UVD HEVC encode

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