Zack Rusin wrote:
>> Sure, it would be very reasonable to make these target-specific
>> builtins when targeting a GPU, the same way we have target-specific
>> builtins for SSE.
>
> Actually currently the plan is to have essentially a "two pass" LLVM IR. I
> wanted the first one to never lower any
On Dec 30, 2008, at 3:03 PM, Zack Rusin wrote:
> On Tuesday 30 December 2008 15:30:35 Chris Lattner wrote:
>> On Dec 30, 2008, at 6:39 AM, Corbin Simpson wrote:
However, the special instrucions cannot directly be mapped to LLVM
IR, like
"min", the conversion involves in 'extract' t
On Tuesday 30 December 2008 15:30:35 Chris Lattner wrote:
> On Dec 30, 2008, at 6:39 AM, Corbin Simpson wrote:
> >> However, the special instrucions cannot directly be mapped to LLVM
> >> IR, like
> >> "min", the conversion involves in 'extract' the vector, create
> >> less-than-compare, create 'se
On Tue, Dec 30, 2008 at 21:30, Chris Lattner wrote:
> On Dec 30, 2008, at 6:39 AM, Corbin Simpson wrote:
>>> However, the special instrucions cannot directly be mapped to LLVM
>>> IR, like
>>> "min", the conversion involves in 'extract' the vector, create
>>> less-than-compare, create 'select' ins
On Tue, Dec 30, 2008 at 20:08, Zack Rusin wrote:
> On Tuesday 30 December 2008 11:05:34 Alex wrote:
>> Hello.
>>
>> I am very new to this mailing list so if I've missed something please
>> nicely point it out.
>>
>> I am reading the source code of the Mesa Cell driver (branch "gallium-0.2")
>> and
On Dec 30, 2008, at 6:39 AM, Corbin Simpson wrote:
>> However, the special instrucions cannot directly be mapped to LLVM
>> IR, like
>> "min", the conversion involves in 'extract' the vector, create
>> less-than-compare, create 'select' instruction, and create 'insert-
>> element'
>> instruction
On Tuesday 30 December 2008 11:05:34 Alex wrote:
> Hello.
>
> I am very new to this mailing list so if I've missed something please
> nicely point it out.
>
> I am reading the source code of the Mesa Cell driver (branch "gallium-0.2")
> and get really confused.
>
> If I read correctly, there are tw
Hello.
I am very new to this mailing list so if I've missed something please nicely
point it out.
I am reading the source code of the Mesa Cell driver (branch "gallium-0.2")
and get really confused.
If I read correctly, there are two paths converting TGSI tokens to LLVM IR.
The first one I call
Alex wrote:
> Hello.
>
> Sorry I am not sure this question should go to llvm or mesa3d-dev mailing
> list, so I post it to both.
>
> I am writing a llvm backend for a modern graphics processor which has a ISA
> very similar to that of Direct 3D.
>
> I am reading the code in Gallium-3D driver in
Good news!
Alex Deucher and I have worked hard in the last months to finally get
some triangles (and textures, etc.) out of r6xx and r7xx chips from AMD.
This includes work on the initial r6xx drm implementation by Dave
Airlie, and a lot of work by John Bridgman to get the final "go" with
the nece
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