SA_SIGINFO and si_pid
Hi
In the SIGCHLD signal handler of parent process, I need to get the pid
of the child when the child dies. To do this I'm using sigaction with
the SA_SIGINFO flag. But the siginfo_t-si_pid member does not seem to
be set.
I found the following post from Otto that seems to say that what I'm
trying to do may not work on OpenBSD.
http://www.archivum.info/fa.openbsd.tech/2008-02/msg00124.html
Ive tried the following code on linux and everything works great, but on
OpenBSD it doesn't work. I've tried it on 3.8 and 4.2, and I'm currently
downloading 4.4 to see if it works on there.
#include signal.h
#include stdio.h
#include stdlib.h
#include sys/types.h
#include unistd.h
#include string.h
#include errno.h
void signalChild(
int signal, siginfo_t* info, void* notUsed
){
printf(Entering signal handler!\n);
if ( info == NULL )
{
printf(siginfo is NULL...aborting!\n);
exit(1);
}
printf(Handling signal %d at %p\n, signal, info-si_addr);
printf(PID: %d\t \n, info-si_pid);
printf(Signal code: %d\n, info-si_code );
}
int main()
{
struct sigaction child;
sigemptyset ( child.sa_mask );
child.sa_sigaction = signalChild;
child.sa_flags = 0;
child.sa_flags |= SA_SIGINFO;
child.sa_flags = ~SA_NOCLDSTOP;
if ( sigaction( SIGCHLD, child, NULL ) == -1 )
{
fprintf( stderr, Error with signal setup. Errno: %i\n, errno );
exit( 1 );
}
int pid = fork();
if ( pid == 0 )
{
fprintf( stderr, PID: %i\n, getpid() );
exit(0);
}
sleep( 1 );
exit(0);
}
Does anybody know how I'm to accomplish this, or why it doesn't work?
Thank You
Jonathan Steel
BLOCKSIZE in .cshrc
Hi Why is the line 'setenv BLOCKSIZE 1k' present in the .cshrc file? We noticed this because csh appears to be the default shell for our 3.5 and 3.6 boxes and subsequently any functions that use sys/stat.h are messed up. Thanks Jonathan Steel
Bypass Mode for Intel Bypass Network Card
Hi I have the Intel PRO/1000 PT Quad Port Bypass Server Adapter and I don't know how to get the bypass mode working under OpenBSD. Thers is almost no documentation from Intel and the only reference Ive seen to changing the bypass mode is a line that said it must be changed programattically. So is there a program or some kind of command that I can run in OpenBSD to enable the bypass mode when the computer is turned off? Does OpenBSD even support the bypass features of this card? Thanks Jonathan Steel -- Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
Hard Drive Errors
Hi Everyone I would like to revisit a problem I was unable to solve about a year ago, an error messages I was getting about pciide temouts. Several times we have had hard drives that will display the following error and then the computer freezes: wd1(pciide1:1:0): timeout type: ata c_bcount: 65536 c_skip: 0 pciide1:1:0: bus-master DMA error: missing interrupt, status=0x21 I tried to find the source of this problem and could not. I'm willing to accept that this could be due to a dying hard drive, overheated hard drive, or any similar causes except for a loose cable. The second error is very similar but does not make the computer lock up. I have been having this problem on many computers and more frequently than the above error. It doesn't seem to have any direct side effects. But the other day I noticed the error on one of my computers and we were having speed troubles with one of the disks. So we tried to reboot and for some reason the system got stuck and the watchdog didnt reboot the machine. I have no idea if this problem is linked to the hard drive error. Anyways, here is the error: wd2(pciide1:1:0): timeout type: ata c_bcount: 49152 c_skip: 0 pciide1:1:0: bus-master DMA error: missing interrupt, status=0x61 wd2a: device timeout reading fsbn 176823520 of 176823520-0 (wd2 bn 176823583; cn 175420 tn 3 sn 34), retrying wd2: soft error (corrected) Does anybody know what this is and if its a bad thing? I have attached the dmesg from a computer the last two times it got the error. Thanks Jonathan Steel dmesg from 2008-01-22 OpenBSD 4.1 (GENERIC.esentire) #0: Wed Aug 15 20:55:55 UTC 2007 [EMAIL PROTECTED]:/usr/src/sys/arch/i386/compile/GENERIC.esentire cpu0: Intel(R) Core(TM)2 Quad CPU @ 2.40GHz (GenuineIntel 686-class) 2.40 GHz cpu0: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,CX16, xTPR real mem = 3756482560 (3668440K) avail mem = 3445522432 (3364768K) using 4278 buffers containing 187949056 bytes (183544K) of memory mainbus0 (root) bios0 at mainbus0: AT/286+ BIOS, date 08/25/07, BIOS32 rev. 0 @ 0xfd470, SMBIOS rev. 2.51 @ 0xdfeea000 (31 entries) bios0: Supermicro PDSMi pcibios0 at bios0: rev 2.1 @ 0xfd470/0xb90 pcibios0: PCI BIOS has 20 Interrupt Routing table entries pcibios0: PCI Interrupt Router at 000:31:0 (Intel 82801GB LPC rev 0x00) pcibios0: PCI bus #15 is the last bus bios0: ROM list: 0xc/0xb000 0xcb000/0x1000 0xcc000/0x1000 0xcd000/0x1000 acpi at mainbus0 not configured ipmi at mainbus0 not configured mainbus0: Intel MP Specification (Version 1.4) cpu0 at mainbus0: apid 0 (boot processor) cpu0: apic clock running at 266 MHz cpu1 at mainbus0: apid 1 (application processor) cpu1: Intel(R) Core(TM)2 Quad CPU @ 2.40GHz (GenuineIntel 686-class) 2.40 GHz cpu1: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,CX16, xTPR cpu2 at mainbus0: apid 2 (application processor) cpu2: Intel(R) Core(TM)2 Quad CPU @ 2.40GHz (GenuineIntel 686-class) 2.40 GHz cpu2: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,CX16, xTPR cpu3 at mainbus0: apid 3 (application processor) cpu3: Intel(R) Core(TM)2 Quad CPU @ 2.40GHz (GenuineIntel 686-class) 2.40 GHz cpu3: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,CX16, xTPR mainbus0: bus 0 is type PCI mainbus0: bus 9 is type PCI mainbus0: bus 10 is type PCI mainbus0: bus 13 is type PCI mainbus0: bus 14 is type PCI mainbus0: bus 15 is type PCI mainbus0: bus 16 is type ISA ioapic0 at mainbus0: apid 4 pa 0xfec0, version 20, 24 pins ioapic1 at mainbus0: apid 5 pa 0xfec1, version 20, 24 pins pci0 at mainbus0 bus 0: configuration mode 1 (no bios) pchb0 at pci0 dev 0 function 0 Intel E7230 MCH rev 0xc0 ppb0 at pci0 dev 1 function 0 Intel E7230 PCIE rev 0xc0 pci1 at ppb0 bus 1 ppb1 at pci0 dev 28 function 0 Intel 82801GB PCIE rev 0x01 pci2 at ppb1 bus 9 ppb2 at pci2 dev 0 function 0 Intel PCIE-PCIE rev 0x09 pci3 at ppb2 bus 10 em0 at pci3 dev 1 function 0 Intel PRO/1000GT (82541GI) rev 0x05: apic 5 int 0 (irq 11), address 00:0e:0c:c6:49:e0 Intel IOxAPIC rev 0x09 at pci2 dev 0 function 1 not configured ppb3 at pci0 dev 28 function 4 Intel 82801G PCIE rev 0x01 pci4 at ppb3 bus 13 em1 at pci4 dev 0 function 0 Intel PRO/1000MT (82573E) rev 0x03: apic 4 int 16 (irq 11), address 00:30:48:91:3e:f0 ppb4 at pci0 dev 28 function 5 Intel 82801G PCIE rev 0x01 pci5 at ppb4 bus 14 em2 at pci5 dev 0 function 0 Intel PRO/1000MT (82573L) rev 0x00: apic 4 int 17 (irq 12), address 00:30:48:91:3e:f1 uhci0 at pci0 dev 29 function 0 Intel 82801GB USB rev 0x01: apic 4 int 23 (irq 10) usb0 at uhci0: USB revision 1.0 uhub0 at usb0
Performance Issues of Intel Quad Port NIC
to compatibility, channel 1 wired to compatibility wd0 at pciide0 channel 0 drive 0: WDC WD2500YS-01SHB0 wd0: 16-sector PIO, LBA48, 239372MB, 490234752 sectors wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 5 atapiscsi0 at pciide0 channel 1 drive 0 scsibus0 at atapiscsi0: 2 targets cd0 at scsibus0 targ 0 lun 0: TEAC, CD-224E-N, 1.AA SCSI0 5/cdrom removable cd0(pciide0:1:0): using PIO mode 4, Ultra-DMA mode 2 ichiic0 at pci0 dev 31 function 3 Intel 82801GB SMBus rev 0x01: irq 11 iic0 at ichiic0 lm1 at iic0 addr 0x2d: W83627HF wbng0 at iic0 addr 0x2f: w83793g spdmem0 at iic0 addr 0x50: DDR2 SDRAM ECC PC2-5300CL5 spdmem1 at iic0 addr 0x51: DDR2 SDRAM ECC PC2-5300CL5 spdmem2 at iic0 addr 0x52: DDR2 SDRAM ECC PC2-5300CL5 spdmem3 at iic0 addr 0x53: DDR2 SDRAM ECC PC2-5300CL5 usb1 at uhci0: USB revision 1.0 uhub1 at usb1 Intel UHCI root hub rev 1.00/1.00 addr 1 usb2 at uhci1: USB revision 1.0 uhub2 at usb2 Intel UHCI root hub rev 1.00/1.00 addr 1 usb3 at uhci2: USB revision 1.0 uhub3 at usb3 Intel UHCI root hub rev 1.00/1.00 addr 1 usb4 at uhci3: USB revision 1.0 uhub4 at usb4 Intel UHCI root hub rev 1.00/1.00 addr 1 isa0 at ichpcib0 isadma0 at isa0 pckbc0 at isa0 port 0x60/5 pckbd0 at pckbc0 (kbd slot) pckbc0: using irq 1 for kbd slot wskbd0 at pckbd0: console keyboard, using wsdisplay0 pmsi0 at pckbc0 (aux slot) pckbc0: using irq 12 for aux slot wsmouse0 at pmsi0 mux 0 pcppi0 at isa0 port 0x61 midi0 at pcppi0: PC speaker spkr0 at pcppi0 lpt0 at isa0 port 0x378/4 irq 7 lm0 at isa0 port 0x290/8: W83627HF lm1 detached npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16 pccom0 at isa0 port 0x3f8/8 irq 4: ns16550a, 16 byte fifo pccom1 at isa0 port 0x2f8/8 irq 3: ns16550a, 16 byte fifo fdc0 at isa0 port 0x3f0/6 irq 6 drq 2 biomask ef65 netmask ef65 ttymask ffe7 pctr: 686-class user-level performance counters enabled mtrr: Pentium Pro MTRR support dkcsum: wd0 matches BIOS drive 0x80 root on wd0a swap on wd0b dump on wd0b Thank You Jonathan Steel
Driver for Winbond W83793G
I have created some code to handle the winbond W83793G. The design of this
chip is different from other winbond chips, so the normal detection method
did not work, as different registers needed to be queried.
I left out the sensor information for the fans because I could not get
them working. If I try and configure them, sysctl does not print out
anything to do with them. I have the same error for the w83792d. I also
left out the chassis intrusion detection because I could not get it
working.
It would be nice if this was committed. I can help on any testing that
needs to be done.
I have only run the diff against 4.1 because that is what I developed it
on.
I just noticed that I forgot to replace 0x0d and 0x0e with constants. They
could be set as follows
#define WB_W83793G_BANK0_VENDID 0x0d
#define WB_W83793G_BANK0_CHIPID 0x0e
Thanks
Jonathan Steel
::
i2c_scan.c.diff
::
--- i2c_scan.c 2007-10-10 19:23:44.0 +
+++ ../../i2c/i2c_scan.c2007-10-10 19:34:17.0 +
@@ -764,7 +764,16 @@
} else if (name == NULL
(addr 0x78) == 0x48) {/* addr 0b1001xxx */
name = lm75probe();
+ } else if (iicprobe(0x0b) 0x50) {
+ if ((iicprobe(0x0d) == 0x5c (iicprobe(0x00) 0x80)) ||
+ (iicprobe(0x0d) == 0xa3 !(iicprobe(0x00) 0x80))) {
+ if ( iicprobe(0x0e) == 0x7b ) {
+ name = w83793g;
+ }
+ }
}
+}
+
#if 0
/*
* XXX This probe needs to be improved; the driver does some
::
lm78.c.diff
::
--- lm78.c 2007-10-10 19:23:29.0 +
+++ ../../ic/lm78.c 2007-10-10 19:30:49.0 +
@@ -299,6 +299,25 @@
{ NULL }
};
+struct lm_sensor w83793g_sensors[] = {
+ /* Voltage */
+ { VCore A, SENSOR_VOLTS_DC, 0, 0x10, lm_refresh_volt, RFACT_NONE
},
+ { VCore B, SENSOR_VOLTS_DC, 0, 0x11, lm_refresh_volt, RFACT_NONE
},
+ { -12V, SENSOR_VOLTS_DC, 0, 0x14, wb_refresh_nvolt, RFACT(232,
56) },
+ { DIMM, SENSOR_VOLTS_DC, 0, 0x15, wb_refresh_nvolt, RFACT(232,
56) },
+ { +3.3V, SENSOR_VOLTS_DC, 0, 0x16, lm_refresh_volt, RFACT_NONE },
+ { +12V, SENSOR_VOLTS_DC, 0, 0x17, lm_refresh_volt, RFACT(28, 10)
},
+ { -5V, SENSOR_VOLTS_DC, 0, 0x18, wb_refresh_nvolt, RFACT(120,
56) },
+ { 5VSB, SENSOR_VOLTS_DC, 0, 0x19, lm_refresh_volt, RFACT(17, 33)
},
+ { VBAT, SENSOR_VOLTS_DC, 0, 0x1a, lm_refresh_volt, RFACT_NONE },
+
+ /* Temperature */
+ { , SENSOR_TEMP, 0, 0x1c, lm_refresh_temp },
+ { , SENSOR_TEMP, 0, 0x20, lm_refresh_temp },
+
+ { NULL }
+};
+
struct lm_sensor as99127f_sensors[] = {
/* Voltage */
{ VCore A, SENSOR_VOLTS_DC, 0, 0x20, lm_refresh_volt, RFACT_NONE
},
@@ -411,6 +430,42 @@
{
int banksel, vendid, devid;
+ /* Read vendor ID for W83793G */
+ banksel = sc-lm_readreg(sc, 0x00);
+ banksel = banksel | 0x80;
+ sc-lm_writereg(sc, 0x00, banksel);
+ vendid = sc-lm_readreg(sc, 0x0d) 8;
+ banksel = banksel ~0x80;
+ sc-lm_writereg(sc, 0x00, banksel);
+ vendid |= sc-lm_readreg(sc, 0x0d);
+ DPRINTF(( winbond vend id 0x%x\n, vendid));
+
+ if (vendid == WB_VENDID_WINBOND) {
+ /* Read device/chip ID */
+ sc-chipid = sc-lm_readreg(sc, 0x0e);
+ DPRINTF(( winbond chip id 0x%x\n, sc-chipid));
+ devid = sc-lm_readreg(sc, 0x0f);
+
+ if (sc-chipid == WB_CHIPID_W83793G) {
+ lm_setup_sensors(sc, w83793g_sensors);
+ if (devid == 0x11)
+ printf(: W83793G rev B\n);
+ else if (devid == 0x12)
+ printf(: W83793G rev C\n);
+ else
+ printf(: W83793G rev 0x%x\n, devid);
+ goto found;
+ }
+ else {
+ printf(: unknown Winbond chip (ID 0x%x)\n,
sc-chipid)
;
+ /* Handle as a standard LM78. */
+ lm_setup_sensors(sc, lm78_sensors);
+ sc-refresh_sensor_data = lm_refresh_sensor_data;
+
+ return 1;
+ }
+ }
+
/* Read vendor ID */
banksel = sc-lm_readreg(sc, WB_BANKSEL);
sc-lm_writereg(sc, WB_BANKSEL, WB_BANKSEL_HBAC);
@@ -489,6 +544,7 @@
return 1;
}
+found:
sc-refresh_sensor_data = wb_refresh_sensor_data;
return 1;
}
::
lm78_i2c.c.diff
::
--- lm78_i2c.c 2007-10-10 19:23:44.0 +
+++ ../../i2c/lm78_i2c.c2007-10-10 19:34:17.0 +
@@ -54,7 +54,8 @@
strcmp(ia-ia_name, w83782d) == 0 ||
strcmp(ia-ia_name, w83783s) == 0 ||
strcmp(ia-ia_name, w83791d
Winbond W83792D and W83627HF
I have created some code in lm78.c to handle the W83792D watchdog portion
of the chip. A diff is pasted at the end of this message. There is one
problem with it though. Under OpenBSD 4.1, if sysctl.kern.period is set to
anything other than 0 while sysctl.kern.auto is set to 1, after a few
seconds a panic occurs with the following trace:
panic: process context required
lockmgr
ichiic_ic2_acquire_bus
lm_i2c_writereg
wb_w83792d_wdg_cb
wdog_tickle
softclock
Bad Frame Pointer: ...
The problem is that lockmgr requires the caller to have a process id, but
the wdog tickler is not associated with a process. So either lockmgr needs
to be changed to handle a caller with no process, or the tickler needs to
be associated with a context.
The problem is different on current. The trace I get for that is:
kernel: page fault trap, code = 0
Stooped at sleep_setup + 0x1d: cmpb $0x7, 0x35(%ebx)
ddb trace
sleep_setup(d0xd9cdc, d1901700, 10, d071e656, cba8d6aa) at sleep_setup+0x1d
tsleep(d1901700, 10, d071e656, 64) at tsleep+0x5c
ichiic_i2c_exec(d1901700, 1, 2f, d08d9dae, 1) at ichiic_i2c_exec+0x27d
iic_exec(d1901740, 1, 2f, d08d9dae, 1, d08d9daf, 1, 9, d1901764, 10) at
iic_exec+0x177
lm_i2c_writereg(d191b800, 4, d07555f0d0, d08d8000, 0) at
lm_i2c_readreg+0x40
wb_w83792d_wdg_cb(d191b800) at wb_w83792_wdb_cb+0x17
wdog_tickle(0, 0, 0, 5305, 0) at wdog_tickle+0x25
sofclock(d0650058, 10, 380010, d080010, d08d9e6c) at softclock+0x23c
Bad Frame Pointer: 0xd08d9e14
I only looked at the problem on current for a short period of time. I'm
going to be using the watchdogd so I don't actually need the
sysctl.watchdog.auto functionality. But if this is going to get committed,
than I would be more than happy in testing any changes that may arise due
to the issues above.
On another note, about five months I submitted a driver for the W83627HF
watchdog in a new file called wbwdg.c. I have been coordinating with an
OpenBSD developer to get it committed, and last I heard it was going to
get committed. But it has not been committed, and I seem to have lost
contact with the developer. So I was wondering if this code could get
committed?
Thanks
Jonathan Steel
Diff for W83792D watchdog
--- lm78.c Mon Jun 25 16:50:18 2007
+++ lm78.c_old Mon Jan 29 08:06:01 2007
@@ -69,6 +69,9 @@
void as_refresh_temp(struct lm_softc *, int);
+void wb_w83792d_wdg_init(struct lm_softc *);
+int wb_w83792d_wdg_cb(void *, int);
+
struct lm_chip {
int (*chip_match)(struct lm_softc *);
};
@@ -555,6 +558,7 @@
else
printf(: W83792D rev 0x%x\n, devid);
lm_setup_sensors(sc, w83792d_sensors);
+ wb_w83792d_wdg_init(sc);
break;
case WB_CHIPID_AS99127F:
if (vendid == WB_VENDID_ASUS) {
@@ -885,3 +889,36 @@
sensor-value = sdata * 50 + 27315;
}
}
+
+void
+wb_w83792d_wdg_init(struct lm_softc *sc)
+{
+int control = sc-lm_readreg(sc, 0x40);
+
+/* Enable watchdog in configuration register */
+control |= 0x10;
+sc-lm_writereg(sc, 0x40, control);
+
+/*
+ * Enable hard watch dog timer with period 0
+* so that its initially disabled
+ */
+sc-lm_writereg(sc, 0x04, 0x00);
+sc-lm_writereg(sc, 0x01, 0xAA);
+sc-lm_writereg(sc, 0x01, 0x33);
+
+wdog_register(sc, wb_w83792d_wdg_cb);
+
+return;
+}
+
+int
+wb_w83792d_wdg_cb(void *arg, int period)
+{
+struct lm_softc *sc = arg;
+
+sc-lm_writereg(sc, 0x04, period);
+
+return period;
+}
--
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