Re: [PATCH net-next 05/10] phy: cp110-comphy: 2.5G SGMII mode

Hi Antoine, On Fri, Mar 16, 2018 at 11:33:46AM +0100, Antoine Tenart wrote: > This patch allow the CP100 comphy to configure some lanes in the Should be 'CP110'. > 2.5G SGMII mode. This mode is quite close to SGMII and uses nearly the > same code path. > > Signed-off-by: Antoine Tenart

[PATCH] vmxnet3: remove unused flag "rxcsum" from struct vmxnet3_adapter

Signed-off-by: Igor Pylypiv --- drivers/net/vmxnet3/vmxnet3_int.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h index 018375f5d108..3de4cecda35a 100644 --- a/drivers/net/vmxnet3/vmxnet3_int.h

Re: [PATCH] vmxnet3: fix LRO feature check

The 03/17/2018 20:20, David Miller wrote: > From: Igor Pylypiv > Date: Sat, 17 Mar 2018 00:58:52 -0700 > > > rxcsum and lro fields were deleted in commit a0d2730c9571 ("net: vmxnet3: > > convert to hw_features"). With upgrading to newer version those fields were > >

Re: [PATCH] vmxnet3: fix LRO feature check

From: Igor Pylypiv Date: Sat, 17 Mar 2018 00:58:52 -0700 > rxcsum and lro fields were deleted in commit a0d2730c9571 ("net: vmxnet3: > convert to hw_features"). With upgrading to newer version those fields were > resurrected and new code started using uninitialized lro

Re: [PATCH net-next 0/5] Add support for RDMA enhancements in cxgb4

From: Raju Rangoju Date: Sat, 17 Mar 2018 12:52:24 +0530 > Allocates the HW-resources and provide the necessary routines for the > upper layer driver (rdma/iw_cxgb4) to enable the RDMA SRQ support for Chelsio > adapters. > > Advertise support for write with immediate work

Re: [PATCH net-next 00/10 v2] selftests: pmtu: Add further vti/vti6 MTU and PMTU tests

From: Stefano Brivio Date: Sat, 17 Mar 2018 02:31:37 +0100 > Patches 5/10 to 10/10 add tests to verify default MTU assignment > for vti4 and vti6 interfaces, to check that MTU values set on new > link and link changes are properly taken and validated, and to > verify PMTU

Re: [PATCH net-next v5 0/8] ibmvnic: Update TX pool and TX routines

From: Thomas Falcon Date: Fri, 16 Mar 2018 20:00:23 -0500 > This patch restructures the TX pool data structure and provides a > separate TX pool array for TSO transmissions. This is already used > in some way due to our unique DMA situation, namely that we cannot >

Re: [PATCH v2] sctp: use proc_remove_subtree()

From: Al Viro Date: Fri, 16 Mar 2018 23:32:51 + > use proc_remove_subtree() for subtree removal, both on setup failure > halfway through and on teardown. No need to make simple things > complex... > > Signed-off-by: Al Viro Applied,

Re: [PATCH net-next 0/2] hv_netvsc: minor enhancements

From: Stephen Hemminger Date: Fri, 16 Mar 2018 15:44:26 -0700 > A couple of small things for net-next Series applied, thanks Stephen.

Re: [PATCH v2 net 1/2] vmxnet3: avoid xmit reset due to a race in vmxnet3

From: Ronak Doshi Date: Fri, 16 Mar 2018 14:47:54 -0700 > The field txNumDeferred is used by the driver to keep track of the number > of packets it has pushed to the emulation. The driver increments it on > pushing the packet to the emulation and the emulation resets it to 0

Re: [PATCH v2 net 2/2] vmxnet3: use correct flag to indicate LRO feature

From: Ronak Doshi Date: Fri, 16 Mar 2018 14:49:19 -0700 > 'Commit 45dac1d6ea04 ("vmxnet3: Changes for vmxnet3 adapter version 2 > (fwd)")' introduced a flag "lro" in structure vmxnet3_adapter which is > used to indicate whether LRO is enabled or not. However, the patch > did

Re: [PATCH v11 crypto 00/12] Chelsio Inline TLS

From: Atul Gupta Date: Fri, 16 Mar 2018 21:06:22 +0530 > Series for Chelsio Inline TLS driver (chtls) This series doesn't even come close to applying to the net-next tree, please respin. Thank you.

Re: [PATCH net 0/5] net/sched: fix NULL dereference in the error path of .init()

From: Davide Caratti Date: Fri, 16 Mar 2018 00:00:52 +0100 > with several TC actions it's possible to see NULL pointer dereference, > when the .init() function calls tcf_idr_alloc(), fails at some point and > then calls tcf_idr_release(): this series fixes all them

Re: [PATCH net-next] net: ethernet: ti: cpsw: enable vlan rx vlan offload

From: Grygorii Strashko Date: Thu, 15 Mar 2018 15:15:50 -0500 > In VLAN_AWARE mode CPSW can insert VLAN header encapsulation word on Host > port 0 egress (RX) before the packet data if RX_VLAN_ENCAP bit is set in > CPSW_CONTROL register. VLAN header encapsulation word

Re: [PATCH v2] net: ethernet: ti: cpsw: add check for in-band mode setting with RGMII PHY interface

From: SZ Lin (林上智) Date: Fri, 16 Mar 2018 00:56:01 +0800 > According to AM335x TRM[1] 14.3.6.2, AM437x TRM[2] 15.3.6.2 and > DRA7 TRM[3] 24.11.4.8.7.3.3, in-band mode in EXT_EN(bit18) register is only > available when PHY is configured in RGMII mode with 10Mbps speed. It will >

Re: [PATCH] net: hns: Fix ethtool private flags

From: Matthias Brugger Date: Thu, 15 Mar 2018 17:54:20 +0100 > The driver implementation returns support for private flags, while > no private flags are present. When asked for the number of private > flags it returns the number of statistic flag names. > > Fix this by

Re: [PATCH net 0/3] vti4, ip_tunnel: Fixes for MTU assignment and validation

From: Stefano Brivio Date: Thu, 15 Mar 2018 17:16:26 +0100 > Patch 1/3 re-introduces a fix to ensure that default MTU on new > link is not lowered unnecessarily because of double counting of > headers. This fix was originally introduced in 2014 and got lost > in a merge

Re: [PATCH v5 0/2] Remove false-positive VLAs when using max()

On Sat, Mar 17, 2018 at 01:07:32PM -0700, Kees Cook wrote: > On Sat, Mar 17, 2018 at 11:52 AM, Linus Torvalds > wrote: > > So the above is completely insane, bit there is actually a chance that > > using that completely crazy "x -> sizeof(char[x])" conversion

Re: HW question: i210 vs. BCM5461S over SGMII: no response from PHY to MDIO requests?

> > > Right now I've modded igb_init_i2c() to engage the bit-banging > > > i2c driver for the i210 too > > > > I don't think that will work. The datasheet for the i210 talks about > > two registers for I2C/MDIO which are not bit-banging. Only the i350 > > uses bit-banging. > > > From the i210

Re: [rds-devel] [PATCH RFC RFC] rds: Use NETDEV_UNREGISTER in rds_tcp_dev_event() (then kill NETDEV_UNREGISTER_FINAL)

On 18.03.2018 00:26, Sowmini Varadhan wrote: > On (03/17/18 10:15), Sowmini Varadhan wrote: >> To solve the scaling problem why not just have a well-defined >> callback to modules when devices are quiesced, instead of >> overloading the pernet_device registration in this obscure way? > > I

Re: [PATCH net] mlxsw: spectrum_buffers: Set a minimum quota for CPU port traffic

From: Ido Schimmel Date: Thu, 15 Mar 2018 14:49:56 +0200 > In commit 9ffcc3725f09 ("mlxsw: spectrum: Allow packets to be trapped > from any PG") I fixed a problem where packets could not be trapped to > the CPU due to exceeded shared buffer quotas. The mentioned commit >

Re: [rds-devel] [PATCH RFC RFC] rds: Use NETDEV_UNREGISTER in rds_tcp_dev_event() (then kill NETDEV_UNREGISTER_FINAL)

On (03/17/18 10:15), Sowmini Varadhan wrote: > To solve the scaling problem why not just have a well-defined > callback to modules when devices are quiesced, instead of > overloading the pernet_device registration in this obscure way? I thought about this a bit, and maybe I missed your original

Re: [PATCH net-next] cxgb4: Fix queue free path of ULD drivers

From: Ganesh Goudar Date: Thu, 15 Mar 2018 17:34:14 +0530 > From: Arjun Vynipadath > > Setting sge_uld_rxq_info to NULL in free_queues_uld(). > We are referencing sge_uld_rxq_info in cxgb_up(). This > will fix a panic when interface is brought up after

Re: [PATCH net-next] rds: tcp: must use spin_lock_irq* and not spin_lock_bh with rds_tcp_conn_lock

From: Sowmini Varadhan Date: Thu, 15 Mar 2018 03:54:26 -0700 > rds_tcp_connection allocation/free management has the potential to be > called from __rds_conn_create after IRQs have been disabled, so > spin_[un]lock_bh cannot be used with rds_tcp_conn_lock. > >

Re: [PATCH RFC RFC] rds: Use NETDEV_UNREGISTER in rds_tcp_dev_event() (then kill NETDEV_UNREGISTER_FINAL)

On 17.03.2018 17:15, Sowmini Varadhan wrote: > > I spent a long time staring at both v1 and v2 of your patch. Thanks for your time! > I understand the overall goal, but I am afraid to say that these > patches are complete hacks. I'm not agree with you, see below the explanations. > I was

Re: [PATCH net-next 0/6] Converting pernet_operations (part #8)

On 18.03.2018 00:07, David Miller wrote: > From: Kirill Tkhai > Date: Thu, 15 Mar 2018 12:10:47 +0300 > >> this series continues to review and to convert pernet_operations >> to make them possible to be executed in parallel for several >> net namespaces at the same time.

Re: [net-next 0/5] tipc: obsolete zone concept

From: Jon Maloy Date: Thu, 15 Mar 2018 16:48:49 +0100 > Functionality related to the 'zone' concept was never implemented in > TIPC. In this series we eliminate the remaining traces of it in the > code, and can hence take a first step in reducing the footprint and >

Re: [PATCH net-next 0/6] Converting pernet_operations (part #8)

From: Kirill Tkhai Date: Thu, 15 Mar 2018 12:10:47 +0300 > this series continues to review and to convert pernet_operations > to make them possible to be executed in parallel for several > net namespaces at the same time. There are different operations > over the tree,

Re: [PATCH v2 net] net: sched: fix uses after free

From: Eric Dumazet Date: Wed, 14 Mar 2018 18:53:00 -0700 > syzbot reported one use-after-free in pfifo_fast_enqueue() [1] > > Issue here is that we can not reuse skb after a successful skb_array_produce() > since another cpu might have consumed it already. > > I believe a

Re: [PATCH net-next] liquidio: Allow RX descriptors to be consumed before disabling NAPI.

From: Felix Manlunas Date: Wed, 14 Mar 2018 16:17:47 -0700 > From: Raghu Vatsavayi > > Signed-off-by: Raghu Vatsavayi > Acked-by: Derek Chickles > Signed-off-by: Felix Manlunas

Re: [PATCH 0/5] Enable XDP for ixgbevf

From: Tony Nguyen Date: Fri, 16 Mar 2018 15:34:01 -0700 > This patch series implements support for XDP on ixgbevf; > it is mainly based on the ixgbe implementation and supports > the following actions: XDP_PASS, XDP_DROP, and XDP_TX. I'm extremely pleased to see

Re: [RFC 2/2] page_frag_cache: Store metadata in struct page

From: Alexander Duyck Date: Thu, 15 Mar 2018 14:26:28 -0700 > So my concern with this patch is that it is essentially trading off > CPU performance for reduced size. One of the reasons for getting away > from using the page pointer is because it is expensive to access

Statement regarding NetDev conference and NetDev Society

As the Linux networking maintainer, I would like to make clear my relationship with the Netdev Society and its event, the NetDev conference. I am no longer associated with either. I am writing to provide clarity on this situation to the subscribers of the 'netdev' mailing list and the community

Re: [PATCH v5 0/2] Remove false-positive VLAs when using max()

On Sat, Mar 17, 2018 at 11:52 AM, Linus Torvalds wrote: > So the above is completely insane, bit there is actually a chance that > using that completely crazy "x -> sizeof(char[x])" conversion actually > helps, because it really does have a (very odd)

[PATCH net-next 3/3] net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYs

When registering an MDIO bus, it is possible to pass an array of interrupts, one per address on the bus. phylib will then associate the interrupt to the PHY device, if no other interrupt is provided. Some of the global2 interrupts are PHY interrupts. Place them into the MDIO bus structure.

[PATCH net-next 1/3] net: dsa: mv88e6xxx: Add missing g1 IRQ numbers

With the recent change to polling for interrupts, it is important that the number of global 1 interrupts is listed. Without it, the driver requests an interrupt domain for zero interrupts, which returns EINVAL, and the probe fails. Add two missing entries. Signed-off-by: Andrew Lunn

[PATCH net-next 2/3] net: dsa: mv88e6xxx: Add number of internal PHYs

Add to the info structure the number of internal PHYs, if they generate interrupts. Some of the older generations of switches have internal PHYs, but no interrupt registers. In this case, set the count to zero. Signed-off-by: Andrew Lunn --- drivers/net/dsa/mv88e6xxx/chip.c | 28

[PATCH net-next 0/3] Automatic PHY interrupts

Now that the mv88e6xxx driver either installs in interrupt handler, or polls for interrupts, it is possible to always handle PHY interrupts, rather than have phylib perform the polling. This speeds up detection of link changes and reduces the load on the MDIO bus, which is beneficial for PTP.

[PATCH net-next] net: dsa: mv88e6xxx: Fix IRQ when loading module

Handle polled interrupts correctly when loading the module. Signed-off-by: Andrew Lunn Fixes: 294d711ee8c0 ("net: dsa: mv88e6xxx: Poll when no interrupt defined") --- drivers/net/dsa/mv88e6xxx/chip.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-)

Re: NULL pointer dereferences with 4.14.27

On 03/17/18 19:41, Carlos Carvalho wrote: > I've put 4.14.27 this morning in this machine and in about 2h it started > showing null dereferences identical to the following one. There were several > of > them, with about 1/2h of interval. Strangely it continued to work and I saw no > other

Re: [PATCH v5 0/2] Remove false-positive VLAs when using max()

On Sat, Mar 17, 2018 at 12:27 AM, Kees Cook wrote: > > Unfortunately my 4.4 test fails quickly: > > ./include/linux/jiffies.h: In function ‘jiffies_delta_to_clock_t’: > ./include/linux/jiffies.h:444: error: first argument to > ‘__builtin_choose_expr’ not a constant Ok, so

NULL pointer dereferences with 4.14.27

I've put 4.14.27 this morning in this machine and in about 2h it started showing null dereferences identical to the following one. There were several of them, with about 1/2h of interval. Strangely it continued to work and I saw no other anomalies. I've just reverted to 4.14.26. It only happened

Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers on weakly-ordered archs

+linuxppc-...@lists.ozlabs.org On 3/17/2018 11:05 AM, Jason Gunthorpe wrote: > On Sat, Mar 17, 2018 at 12:25:14AM -0400, Sinan Kaya wrote: >> On 3/17/2018 12:03 AM, Sinan Kaya wrote: >>> On 3/16/2018 11:40 PM, Sinan Kaya wrote: I'll change writel_relaxed() with __raw_writel() in the series

Re: HW question: i210 vs. BCM5461S over SGMII: no response from PHY to MDIO requests?

On 17 Mar 2018 at 15:50, Andrew Lunn wrote: > On Sat, Mar 17, 2018 at 08:39:00AM +0100, Frantisek Rysanek wrote: > > On 16 Mar 2018 at 22:02, Andrew Lunn wrote: > > > > > > Does ethtool -m show anything useful? > > > > > > > Not much. "unsupported". > > static int igb_get_module_info(struct

Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers on weakly-ordered archs

On Sat, Mar 17, 2018 at 12:25:14AM -0400, Sinan Kaya wrote: > On 3/17/2018 12:03 AM, Sinan Kaya wrote: > > On 3/16/2018 11:40 PM, Sinan Kaya wrote: > >> I'll change writel_relaxed() with __raw_writel() in the series like you > >> suggested > >> and also look at your other comments. > > > > I

Re: HW question: i210 vs. BCM5461S over SGMII: no response from PHY to MDIO requests?

On Sat, Mar 17, 2018 at 08:39:00AM +0100, Frantisek Rysanek wrote: > On 16 Mar 2018 at 22:02, Andrew Lunn wrote: > > > > Does ethtool -m show anything useful? > > > > Not much. "unsupported". static int igb_get_module_info(struct net_device *netdev, struct

Re: [PATCH RFC RFC] rds: Use NETDEV_UNREGISTER in rds_tcp_dev_event() (then kill NETDEV_UNREGISTER_FINAL)

I spent a long time staring at both v1 and v2 of your patch. I understand the overall goal, but I am afraid to say that these patches are complete hacks. I was trying to understand why patchv1 blows with a null rtn in rds_tcp_init_net, but v2 does not, and the analysis is ugly. I'm going to

Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers on weakly-ordered archs

From: Sinan Kaya Date: Sat, 17 Mar 2018 00:25:14 -0400 > I think I finally got what you mean. > > Code seems to have > > wmb() > writel()/writeq() > wmb() > > this can be safely replaced with > > wmb() > __raw_writel()/__raw_writeq() > wmb() > > This will work on all

Re: [v2] vhost: add vsock compat ioctl

From: Sonny Rao Date: Fri, 16 Mar 2018 17:54:12 -0700 > On Fri, Mar 16, 2018 at 12:30 PM, David Miller wrote: >> >> Although the top level ioctls are probably size and layout compatible, >> I do not think that the deeper ioctls can be called by compat

RE: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers on weakly-ordered archs

> > On 3/17/2018 12:03 AM, Sinan Kaya wrote: > > On 3/16/2018 11:40 PM, Sinan Kaya wrote: > >> I'll change writel_relaxed() with __raw_writel() in the series like you > suggested > >> and also look at your other comments. > > > > I spoke too soon. > > > > Now that I realized, code needs to follow

Re: Ask for help about flow classifier tool

Sat, Mar 17, 2018 at 10:47:23AM CET, xavier.hu...@huawei.com wrote: >Hi, David > >The TC Flower Classifier allows control of packets based on flows >determined by matching of well-known packet fields and metadata. >Offload of the TC Flower classifier and related modules provides a

[PATCH 1/2 v3] net: add uevent socket member

This commit adds struct uevent_sock to struct net. Since struct uevent_sock records the position of the uevent socket in the uevent socket list we can trivially remove it from the uevent socket list during cleanup. This speeds up the old removal codepath. Note, list_del() will hit

[PATCH 2/2 v3] netns: send uevent messages

This patch adds a receive method to NETLINK_KOBJECT_UEVENT netlink sockets to allow sending uevent messages into the network namespace the socket belongs to. Currently non-initial network namespaces are already isolated and don't receive uevents. There are a number of cases where it is beneficial

[PATCH net-next 01/12] clk: sunxi-ng: r40: rewrite init code to a platform driver

From: Icenowy Zheng As we need to register a regmap on the R40 CCU, there needs to be a device structure bound to the CCU device node. Rewrite the R40 CCU driver initial code to make it a proper platform driver, thus we will have a platform device bound to it. Signed-off-by:

[PATCH net-next 10/12] ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences

The device nodes dereference () usages should be sorted by the label names, barring any parsing order issues such as the #include statement for the PMIC's .dtsi file that must come after the PMIC. Move the mmc and ohci blocks in front of the PMIC's regulator blocks. Signed-off-by: Chen-Yu Tsai

[PATCH net-next 09/12] net: stmmac: dwmac-sun8i: Add support for GMAC on Allwinner R40 SoC

The Allwinner R40 SoC has the EMAC controller supported by dwmac-sun8i. It is named "GMAC", while EMAC refers to the 10/100 Mbps Ethernet controller supported by sun4i-emac. The controller is the same, but the R40 has the glue layer controls in the clock control unit (CCU), with a reduced RX delay

[PATCH net-next 02/12] clk: sunxi-ng: r40: export a regmap to access the GMAC register

From: Icenowy Zheng There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in the syscon part, in the CCU of R40 SoC. Export a regmap of the CCU. Read access is not restricted to all registers, but only the GMAC register is allowed to be written. Signed-off-by:

[PATCH net-next 04/12] dt-bindings: net: dwmac-sun8i: Sort syscon compatibles by alphabetical order

The A83T syscon compatible was appended to the syscon compatibles list, instead of inserted in to preserve the ordering. Move it to the proper place to keep the list sorted. Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 2 +- 1 file

[PATCH net-next 08/12] net: stmmac: dwmac-sun8i: Support different ranges for TX/RX delay chains

On the R40 SoC, the RX delay chain only has a range of 0~7 (hundred picoseconds), instead of 0~31. Also the TX delay chain is completely absent. This patch adds support for different ranges by adding per-compatible maximum values in the variant data. A maximum of 0 indicates that the delay chain

[PATCH net-next 06/12] net: stmmac: dwmac-sun8i: Use regmap_field for syscon register access

On the Allwinner R40, the "GMAC clock" register is located in the CCU block, at a different register address than the other SoCs that have it in the "system control" block. This patch converts the use of regmap to regmap_field for mapping and accessing the syscon register, so we can have the

[PATCH net-next 05/12] dt-bindings: net: dwmac-sun8i: Add binding for GMAC on Allwinner R40 SoC

The Allwinner R40 SoC has the EMAC controller supported by dwmac-sun8i. It is named "GMAC", while EMAC refers to the 10/100 Mbps Ethernet controller supported by sun4i-emac. The controller is the same, but the R40 has the glue layer controls in the clock control unit (CCU), with a reduced RX delay

[PATCH net-next 07/12] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from CCU device

On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU address space. Using a standard syscon to access it provides no coordination with the CCU driver for register access. Neither does it prevent this and other drivers from accessing other, maybe critical, clock control registers.

[PATCH net-next 03/12] dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions

The clock delay chains found in the glue layer for dwmac-sun8i are only used with RGMII PHYs. They are not intended for non-RGMII PHYs, such as MII external PHYs or the internal PHY. Also, a recent SoC has a smaller range of possible values for the delay chain. This patch reformats the delay

[PATCH net-next 11/12] ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC

The R40 SoC has a GMAC (gigabit capable Ethernet controller). Add a device node for it. The only publicly available board for this SoC uses an RGMII PHY. Add a pinmux node for it as well. Since this SoC also has an old 10/100 Mbps EMAC, which also has an MDIO bus controller, the MDIO bus for the

[PATCH net-next 12/12] ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller

The Bananapi M2 Ultra has a Realtek RTL8211E RGMII PHY tied to the GMAC. The PMIC's DC1SW output provides power for the PHY, while the ALDO2 output provides I/O voltages on both sides. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 30

[PATCH net-next 00/12] ARM: sun8i: r40: Add Ethernet support

Hi everyone, This series adds support for the DWMAC based Ethernet controller found on the Allwinner R40 SoC. The controller is either a DWMAC clone or DWMAC core with its registers rearranged. This is already supported by the dwmac-sun8i driver. The glue layer control registers, unlike other

Re: [PATCH v2] netns: send uevent messages

On Fri, Mar 16, 2018 at 11:14:31PM +0300, Kirill Tkhai wrote: > On 16.03.2018 15:50, Christian Brauner wrote: > > This patch adds a receive method to NETLINK_KOBJECT_UEVENT netlink sockets > > to allow sending uevent messages into the network namespace the socket > > belongs to. > > > > Currently

Re: [PATCH v2] netns: send uevent messages

On Fri, Mar 16, 2018 at 02:41:45PM -0400, David Miller wrote: > From: Christian Brauner > Date: Fri, 16 Mar 2018 13:50:30 +0100 > > > +static int uevent_net_broadcast(struct sock *usk, struct sk_buff *skb, > > + struct netlink_ext_ack

Re: [PATCH net-next 4/5] net: Make ip_ra_chain per struct net

us a note to > help improve the system] > > url: > https://github.com/0day-ci/linux/commits/Kirill-Tkhai/Rework-ip_ra_chain-protection/20180317-032841 > reproduce: > # apt-get install sparse > make ARCH=x86_64 allmodconfig > make C=1 CF=-D__CHEC

Ask for help about flow classifier tool

Hi, David The TC Flower Classifier allows control of packets based on flows determined by matching of well-known packet fields and metadata. Offload of the TC Flower classifier and related modules provides a powerful mechanism to both increase throughput and reduce CPU utilisation for

[PATCH] vmxnet3: fix LRO feature check

rxcsum and lro fields were deleted in commit a0d2730c9571 ("net: vmxnet3: convert to hw_features"). With upgrading to newer version those fields were resurrected and new code started using uninitialized lro field. Removing rxcsum and lro fields. Fixes: 45dac1d6ea04 ("vmxnet3: Changes for vmxnet3

Re: HW question: i210 vs. BCM5461S over SGMII: no response from PHY to MDIO requests?

On 16 Mar 2018 at 22:02, Andrew Lunn wrote: > > Does ethtool -m show anything useful? > Not much. "unsupported". Probably the ioctl() is not implemented or something, I haven't investigated. Maybe I should. Right now I've modded igb_init_i2c() to engage the bit-banging i2c driver for the i210

Re: [PATCH v5 0/2] Remove false-positive VLAs when using max()

On Fri, Mar 16, 2018 at 12:27 PM, Linus Torvalds wrote: > Kees - is there some online "gcc-4.4 checker" somewhere? This does > seem to work with my gcc. I actually tested some of those files you > pointed at now. Unfortunately my 4.4 test fails quickly:

[PATCH net-next 5/5] cxgb4: Support firmware rdma write completion work request.

From: Potnuri Bharat Teja If FW supports RDMA WRITE_COMPLETION functionality, then advertise that to the ULDs. This will be used by iw_cxgb4 to allow WRITE_COMPLETION work requests. Signed-off-by: Potnuri Bharat Teja Signed-off-by: Raju Rangoju

[PATCH net-next 4/5] cxgb4: Support firmware rdma write with immediate work request.

From: Potnuri Bharat Teja If FW supports RDMA WRITE_WITH_IMMEDATE functionality, then advertise that to the ULDs. This will be used by iw_cxgb4 to allow WRITE_WITH_IMMEDIATE work requests. Signed-off-by: Potnuri Bharat Teja Signed-off-by: Raju Rangoju

[PATCH net-next 3/5] cxgb4: Add support to query HW SRQ parameters

This patch adds support to query FW for the HW SRQ table start/end, and advertise that for ULDs. Signed-off-by: Raju Rangoju Reviewed-by: Steve Wise Signed-off-by: Ganesh Goudar ---

[PATCH net-next 2/5] cxgb4: Add support to initialise/read SRQ entries

- This patch adds support to initialise srq table and read srq entries Signed-off-by: Raju Rangoju Reviewed-by: Steve Wise Signed-off-by: Ganesh Goudar --- drivers/net/ethernet/chelsio/cxgb4/Makefile | 2 +-

[PATCH net-next 1/5] cxgb4: Adds CPL support for Shared Receive Queues

- Add srq table query cpl support for srq - Add cpl_abort_req_rss6 and cpl_abort_rpl_rss6 structs. - Add accessors, macros to get the SRQ IDX value. Signed-off-by: Raju Rangoju Reviewed-by: Steve Wise Signed-off-by: Ganesh Goudar

[PATCH net-next 0/5] Add support for RDMA enhancements in cxgb4

Allocates the HW-resources and provide the necessary routines for the upper layer driver (rdma/iw_cxgb4) to enable the RDMA SRQ support for Chelsio adapters. Advertise support for write with immediate work request Advertise support for write with completion Potnuri Bharat Teja (2): cxgb4: