> That is not how XDP works. XDP must run on the "master" physical driver
> interface, as the "slave" interface is a virtual DSA interface. I did
> mention DSA because I'm handling that on the EspressoBin implementation.
Hi Jesper
It is going to be interesting to see how you do that.
As a
> I got other concerns on the patchset though. Like how much memory is
> it 'ok' to keep mapped keeping in mind we are using the streaming
> DMA API. Are we going to affect anyone else negatively by doing so ?
For mvneta, you can expect the target to have between 512Mbyte to
3G. You can take a
On Sat, Dec 08, 2018 at 04:12:12PM +0100, Jesper Dangaard Brouer wrote:
> On Fri, 7 Dec 2018 13:21:08 -0800
> Alexei Starovoitov wrote:
>
> > for production I suspect the users would want
> > an easy way to stay safe when they're playing with AF_XDP.
> > So another builtin program that redirects
Add the missing static keyword.
Signed-off-by: Andrew Lunn
---
net/dsa/master.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/dsa/master.c b/net/dsa/master.c
index a25242e71fb2..d7d5145aa235 100644
--- a/net/dsa/master.c
+++ b/net/dsa/master.c
@@ -158,7 +158,7
A previous change tries to set the MTU on the master device to take
into account the DSA overheads. This patch tries to reset the master
device back to the default MTU.
Signed-off-by: Andrew Lunn
---
net/dsa/master.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/net/dsa
a platform_data structure with these parameters.
Andrew Lunn (2):
net: phy: mdio-gpio: Add platform_data support for phy_mask
net: phy: mdio-gpio: Add phy_ignore_ta_mask to platform data
MAINTAINERS | 1 +
drivers/net/phy/mdio-gpio.c | 7 +++
include/linux
are known to get TA wrong.
v2
--
int -> u32 in platform data structure
Signed-off-by: Andrew Lunn
---
drivers/net/phy/mdio-gpio.c | 4 +++-
include/linux/platform_data/mdio-gpio.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/mdio-gpio.
is not
created, since the address is already busy.
This can be avoided by setting the phy_mask of the mdio bus. This mask
prevents addresses on the bus being scanned.
v2
--
int -> u32 in platform data structure
Signed-off-by: Andrew Lunn
---
MAINTAINERS |
> +static int ksz8795_valid_dyn_entry(struct ksz_device *dev, u8 *data)
> +{
> + int timeout = 100;
> +
> + do {
> + ksz_read8(dev, REG_IND_DATA_CHECK, data);
> + timeout--;
> + } while ((*data & DYNAMIC_MAC_TABLE_NOT_READY) && timeout);
readx_poll_timeout()?
On Fri, Dec 07, 2018 at 07:18:43PM +0100, Marek Vasut wrote:
> From: Tristram Ha
>
> Factor out common code from the tag_ksz , so that the code can be used
> with other KSZ family switches which use differenly sized tags.
I prefer this implementation over what Tristram recently submitted. It
is
> +static void ksz9477_phy_setup(struct ksz_device *dev, int port,
> + struct phy_device *phy)
> +{
> + if (port < dev->phy_port_cnt) {
> + /* SUPPORTED_Asym_Pause and SUPPORTED_Pause can be removed to
> + * disable flow control when rate
> This actually is an individual patch, it doesn't depend on anything.
> Or do you mean a series with the DT documentation change ?
Yes, i mean together with the DT documentation change. Those two
belong together, they are one functional change.
Part of this is also to do with scalability. It
On Sat, Dec 08, 2018 at 05:23:25AM +0100, Marek Vasut wrote:
> On 12/08/2018 01:13 AM, tristram...@microchip.com wrote:
> >> Do you have a git tree with all the KSZ patches based on -next
> >> somewhere, so I don't have to look for them in random MLs ?
> >
> > I just sent it this Monday and the
On Fri, Dec 07, 2018 at 10:51:36PM +0100, Marek Vasut wrote:
> Add code to handle optional reset GPIO in the KSZ switch driver. The switch
> has a reset GPIO line which can be controlled by the CPU, so make sure it is
> configured correctly in such setups.
Hi Marek
Please make this a patch
> I think if you do this without setting offload_fwd_mark you will
> receive duplicate frame.
I don't think it will, at least not in the normal case. The hardware
should know the egress port, so there is no need to forward a copy to
the CPU. The only time it should forward to the CPU is when the
> + dev->reset_gpio = -1;
> + reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0,
> + _gpio_flags);
> + if (reset_gpio >= 0) {
> + flags = (reset_gpio_flags == OF_GPIO_ACTIVE_LOW) ?
> + GPIOF_ACTIVE_LOW :
> Would you be happier if .ndo_change_carrier() only acted on Fixed PHYs?
I think it makes sense to allow a fixed phy carrier to be changed from
user space. However, i don't think you can easily plumb that to
.ndo_change_carrier(), since that is a MAC feature. You need to change
the
> Been a bit busy today but now I have played with dormant using ip link and
> got some odd results:
> # > ifconfig eth0
> eth0: flags=4163 mtu 1500
> inet 172.20.0.246 netmask 255.255.0.0 broadcast 172.20.255.255
> inet6 fe80::ad9c:b230:1da8:1821 prefixlen 64 scopeid 0x20
>
On Fri, Dec 07, 2018 at 08:36:48AM +, Madalin-cristian Bucur wrote:
> > -Original Message-
> > From: Joakim Tjernlund
> > Sent: Thursday, December 6, 2018 5:32 PM
> > To: netdev @ vger . kernel . org ; Madalin-
> > cristian Bucur
> > Cc: jo...@infinera.com
> > Subject: [PATCH]
On Thu, Dec 06, 2018 at 04:33:25PM +0100, Joakim Tjernlund wrote:
> This allows to control carrier from /sys/class/net/ethX/carrier
>
> Signed-off-by: Joakim Tjernlund
See the discussion for [PATCH] gianfar: Add gfar_change_carrier().
For the moment:
NACK
Andrew
On Thu, Dec 06, 2018 at 12:21:31PM -0800, Florian Fainelli wrote:
> On 12/6/18 2:36 AM, Andrew Lunn wrote:
> > DSA tagging of frames sent over the master interface to the switch
> > increases the size of the frame. Such frames can then be bigger than
> > the normal MTU of
> I wonder what is the official way to clear the counters.
I don't think there is one, other than unloading the driver and
loading it again.
Andrew
> I did try to implement this way. But the other switches do not have the same
> format even though the length is the same. Then I need to change the
> following
> files for any new KSZ switch: include/linux/dsa.h, net/dsa/dsa.c,
> net/dsa/dsa_priv.h,
> and finally net/dsa/tag_ksz.c.
You can
On Thu, Dec 06, 2018 at 09:22:27AM -0800, Florian Fainelli wrote:
> Hi Andrew,
>
> On 12/6/18 5:58 AM, Andrew Lunn wrote:
> > Soon to be mainlined is an x86 platform with a Marvell switch, and a
> > bit-banging MDIO bus. In order to make this work, the phy_mask of the
> &g
> I can have a look at using dormant, but what is change_carrier
> supposed to do if not this?
It is intended for interfaces which are stacked, like the team driver,
and for devices which don't have a phy, e.g. tun, and dummy.
> I didn't find a tool for DORMANT, I guess i will have to write one
> I wish I had a proper DSA/Switchdev driver in place but I don't :(
> Adding one is not impossible but then a lot of our user space app needs
> fixing so all
> in all it it a fairly big project.
> Anyhow, these carrier additions should be fine I think?
I'm not too sure about that. You are
> > Hi Joakim
> >
> > Please could you explain the use case for this.
>
> I have an eth I/F connected to an internal (on board) switch which has an
> external port to a mgmt network.
> Whenever the external link is broken I want inform linux IP stack that the
> link is down on the internal eth
On Thu, Dec 06, 2018 at 04:31:25PM +0100, Joakim Tjernlund wrote:
> This allows to control carrier from /sys/class/net/ethX/carrier
Hi Joakim
Please could you explain the use case for this.
Andrew
a platform_data structure with these parameters.
Andrew Lunn (2):
net: phy: mdio-gpio: Add platform_data support for phy_mask
net: phy: mdio-gpio: Add phy_ignore_ta_mask to platform data
MAINTAINERS | 1 +
drivers/net/phy/mdio-gpio.c | 7 +++
include/linux
is not
created, since the address is already busy.
This can be avoided by setting the phy_mask of the mdio bus. This mask
prevents addresses on the bus being scanned.
Signed-off-by: Andrew Lunn
---
MAINTAINERS | 1 +
drivers/net/phy/mdio-gpio.c | 5
are known to get TA wrong.
Signed-off-by: Andrew Lunn
---
drivers/net/phy/mdio-gpio.c | 4 +++-
include/linux/platform_data/mdio-gpio.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index 1e296dd4067a
take these overheads into account.
Signed-off-by: Andrew Lunn
---
include/net/dsa.h | 1 +
net/dsa/tag_brcm.c| 2 ++
net/dsa/tag_dsa.c | 1 +
net/dsa/tag_edsa.c| 1 +
net/dsa/tag_gswip.c | 1 +
net/dsa/tag_ksz.c | 1 +
net/dsa/tag_lan9303.c | 1 +
net/dsa/tag_mtk.c | 1
are bigger than their MTU.
Automate the increasing of the MTU on the master interface, by adding
to each tagging driver how much overhead they need, and then calling
dev_set_mtu() of the master interface to increase its MTU as needed.
Andrew Lunn (2):
net: dsa: Add overhead to tag protocol ops.
net
this overhead.
Signed-off-by: Andrew Lunn
---
net/dsa/master.c | 16
1 file changed, 16 insertions(+)
diff --git a/net/dsa/master.c b/net/dsa/master.c
index c90ee3227dea..42f525bc68e2 100644
--- a/net/dsa/master.c
+++ b/net/dsa/master.c
@@ -158,8 +158,24 @@ static void
Add a _mod_ variant of mii_lpa_to_linkmode_lpa_t. Use this to fix the
genphy_read_status() where the 1G link partner features are getting
lost.
Fixes: c0ec3c273677 ("net: phy: Convert u32 phydev->lp_advertising to linkmode")
Reported-by: Heiner Kallweit
Signed-off-by: Andrew Lunn
.
Suggested-by: Heiner Kallweit
Fixes: c0ec3c273677 ("net: phy: Convert u32 phydev->lp_advertising to linkmode")
Signed-off-by: Andrew Lunn
---
drivers/net/phy/marvell.c| 2 +-
drivers/net/phy/marvell10g.c | 2 +-
drivers/net/phy/phy_device.c | 4 ++--
include/linux/linkmo
Replace the if else code structure with a call to the helper
linkmode_mod_bit.
Signed-off-by: Andrew Lunn
---
include/linux/mii.h | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/include/linux/mii.h b/include/linux/mii.h
index e72447778a08..6fee8b1a4400 100644
advertising to linkmode")
Reported-by: Heiner Kallweit
Signed-off-by: Andrew Lunn
---
drivers/net/phy/phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index e1a1e54baac2..e24708f1fc16 100644
--- a/drivers/net/phy/phy.c
+++ b
hydev->lp_advertising to linkmode")
Signed-off-by: Andrew Lunn
---
include/linux/mii.h | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/include/linux/mii.h b/include/linux/mii.h
index fb7ae4ae8ce3..57365224306c 100644
--- a/include/linux/mii.h
+++ b/include/linux/mi
t u32 phydev->lp_advertising to linkmode")
Signed-off-by: Andrew Lunn
---
drivers/net/phy/marvell.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 03dafe0e68a2..a9c7c7f41b0c 100644
---
the function modifies just the bits it
needs to, or _to_ to clear all bits and just set bit that need to be
set.
Andrew Lunn (6):
net: mii: Fix autoneg in mii_lpa_to_linkmode_lpa_t()
net: mii: Rename mii_stat1000_to_linkmode_lpa_t
phy: marvell: Rename mii_lpa_to_linkmode_lpa_t
net: mii
On Wed, Dec 05, 2018 at 07:00:38PM +0100, Andrew Lunn wrote:
> On Mon, Dec 03, 2018 at 03:34:56PM -0800, tristram...@microchip.com wrote:
> > From: Tristram Ha
> >
> > Update tag_ksz.c to access switch driver's tail tagging operations.
>
> Hi Tristram
>
On Mon, Dec 03, 2018 at 03:34:56PM -0800, tristram...@microchip.com wrote:
> From: Tristram Ha
>
> Update tag_ksz.c to access switch driver's tail tagging operations.
Hi Tristram
Humm, i'm not sure we want this, the tagging spit into two places. I
need to take a closer look at the previous
Hi Tristan
> +static void ksz9477_r_mib_cnt(struct ksz_device *dev, int port, u16 addr,
> + u64 *cnt)
> +{
> + u32 data;
> + int timeout;
> + struct ksz_port *p = >ports[port];
> +
> + /* retain the flush/freeze bit */
> + data = p->freeze ?
On Mon, Dec 03, 2018 at 03:34:52PM -0800, tristram...@microchip.com wrote:
> From: Tristram Ha
>
> Prepare PHY for proper advertisement and get link status for the port.
>
> Signed-off-by: Tristram Ha
> Reviewed-by: Woojung Huh
> ---
> drivers/net/dsa/microchip/ksz9477.c| 12
> Yes the current solution whereby we need to get a hold on the network
> device's struct device reference is not quite ideal, AFAIR, Andrew has
> had the same problem.
Yes, it is not nice, and there is a race with systemd renaming the
interfaces using its naming rules. We need a way to lookup an
s not protected by
> the mii_bus lock. This isn't new behavior, but as Andrew Lunn pointed
> out there are more addresses available for conflicts.
>
> Signed-off-by: Stephen Douthit
Reviewed-by: Andrew Lunn
Andrew
re of the ixgbe device may
> be polling some PHY addresses in the background.
>
> Signed-off-by: Stephen Douthit
Reviewed-by: Andrew Lunn
Andrew
> You can actually strap the 6390 and friends for a multi-chip mode where
> they claim only a single address, instead of one per port, plus a couple
> more for global registers. It vastly slows things down because of the
> extra indirection, but it allows the switch to play nicely with other
>
> Agreed, but I'd argue it's the same behavior we have today with the
> existing MII ioctls in this driver. That's not to say this is good,
> it's just not any less broken than the current state of things.
Agreed.
I actually would be happy with a warning in the commit message that
this code is
On Mon, Dec 03, 2018 at 05:02:40PM +, Steve Douthit wrote:
> On 12/3/18 11:54 AM, Andrew Lunn wrote:
> >> +static s32 ixgbe_x550em_a_mii_bus_read(struct mii_bus *bus, int addr,
> >> + int regnum)
> >> +{
> >> +
> +static s32 ixgbe_x550em_a_mii_bus_read(struct mii_bus *bus, int addr,
> +int regnum)
> +{
> + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)bus->priv;
> + struct ixgbe_hw *hw = >hw;
> + u32 gssr = hw->phy.phy_semaphore_mask |
fixed didn't do anything wrong, it just copied
> existing functionality to the helper which is being fixed now.
>
> Fixes: f3a6bd393c2c ("phylib: Add phy_set_max_speed helper")
> Signed-off-by: Heiner Kallweit
Reviewed-by: Andrew Lunn
Andrew
Heiner Kallweit
Reviewed-by: Andrew Lunn
Andrew
> >I don't think any of these properties are necessary, if you can either
> >use a compatible string, and/or infer the actual model at runtime in the
> >driver's probe function, then you can assess based on that chip model as
>
> There is an ID register in the 7530 - though I don't know if the
st C22 modules if C45 are not present (Andrew)
>
> Signed-off-by: Jose Abreu
> Cc: Andrew Lunn
> Cc: Florian Fainelli
> Cc: "David S. Miller"
> Cc: Joao Pinto
Reviewed-by: Andrew Lunn
Andrew
> @@ -606,6 +606,18 @@ struct phy_device *phy_device_create(struct mii_bus
> *bus, int addr, int phy_id,
>* there's no driver _already_ loaded.
>*/
> request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT, MDIO_ID_ARGS(phy_id));
This line above is for C22. If you look at
> 'cards_found' doesn't exist for the ixgbe driver.
Agh, sorry, i was looking at ixgb, not ixgbe.
Andrew
> Yep, registering multiple interfaces is wrong. The first board I tested
> against only had a single MAC enabled (they can be disabled/hidden via
> straps) so it just happened to work.
Hi Steve
Can you hide any/all via straps, or is 00.0 always guaranteed to
exist?
> The Intel C3xxx family
> > 1. TX packets are not getting an IP header checksum via the normal
> >off-loaded checksumming when in DSA mode. I have to switch off
> >NETIF_F_IP_CSUM, so the software stack generates the checksum.
> >That checksum offloading works ok when not using the 7530 DSA driver.
>
> Hmm.
> 1. TX packets are not getting an IP header checksum via the normal
>off-loaded checksumming when in DSA mode. I have to switch off
>NETIF_F_IP_CSUM, so the software stack generates the checksum.
>That checksum offloading works ok when not using the 7530 DSA driver.
With some vendors
> 2. Maximal sized RX packets get silently dropped. So receive side packets
>that are large (perfect case is the all-but-last packets in a fragemented
>larger packet) appear to be dropped at the mt7621 ethernet MAC level.
>The 7530 MIB switch register counters show receive packets at
Hi Steve
Cool to see another interface being made DSA capable.
> +/**
> + * ixgbe_msca - Write the command register and poll for completion/timeout
> + * @hw: pointer to hardware structure
> + * @cmd: command register value to write
> + **/
> +static s32 ixgbe_msca_cmd(struct ixgbe_hw *hw,
On Thu, Nov 29, 2018 at 12:00:05PM +0200, Baruch Siach wrote:
> SFP standards are now available from the SNIA (Storage Networking
> Industry Association) website.
>
> Cc: Andrew Lunn
> Cc: Florian Fainelli
> Signed-off-by: Baruch Siach
Reviewed-by: Andrew Lunn
Andrew
On Thu, Nov 29, 2018 at 12:06:18PM +0100, Nicolas Dichtel wrote:
> Le 28/11/2018 à 22:48, Andrew Lunn a écrit :
> > On Wed, Nov 28, 2018 at 07:12:56PM +0100, Nicolas Dichtel wrote:
> >> The userspace may need to control the carrier state.
> >
> > Hi Nicolas
>
On Wed, Nov 28, 2018 at 07:12:56PM +0100, Nicolas Dichtel wrote:
> The userspace may need to control the carrier state.
Hi Nicolas
Could you explain your user case a bit more.
Are you running a routing daemon on top of the interface, and want it
to reroute when the carrier goes down?
Thanks
ted users have a working network
> again from 4.19.5 at least.
Hi Heiner
Lets go with this for the moment. That gives us time to try to figure
out what is going on to cause the wrong driver to be used for the
r8169.
Reviewed-by: Andrew Lunn
Andrew
> Because function naming is the same I'm afraid they easily can be used
> incorrectly (the bugs we just discuss are good examples). Maybe it
> could be an option to reflect the semantics in the name like this
> (better suited proposals welcome):
>
> case 1: mii_xxx_to_linkmode_yyy
> case 2:
> Eventually we'd have three types of mii_xxx_to_linkmode_yyy functions:
>
> 1. Function first zeroes the destination linkmode bitmap
> 2. Function sets bits in the linkmode bitmap but doesn't clear bits
>if condition isn't met
> 3. Function clears / sets bits it's responsible for
>
>
On Sun, Nov 25, 2018 at 03:23:42PM +0100, Heiner Kallweit wrote:
> I wondered why ethtool suddenly reports that link partner doesn't
> support aneg and GBit modes. It turned out that this is caused by two
> bugs in conversion to linkmode bitmaps.
>
> 1. In genphy_read_status the value of
On Fri, Nov 23, 2018 at 03:46:50PM -0200, Fabio Estevam wrote:
> The correct form is "can be probed", so fix the typo.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Andrew Lunn
Andrew
On Thu, Nov 22, 2018 at 12:40:25PM +0200, Anssi Hannula wrote:
> Hi,
>
> On 12.9.2018 2:53, Andrew Lunn wrote:
> > Many Ethernet MAC drivers want to limit the PHY to only advertise a
> > maximum speed of 100Mbs or 1Gbps. Rather than using a mask, make use
>
On Thu, Nov 22, 2018 at 05:18:37PM +0530, Linu Cherian wrote:
> From: Linu Cherian
>
> - Added new CGX firmware interface API for sending link up/down
> commands
>
> - Do link up for cgx lmac ports by default at the time of CGX
> driver probe.
Hi Linu
This is a complex driver which i
On Wed, Nov 21, 2018 at 02:22:45PM -0500, Bryan Whitehead wrote:
> This driver was designed to work with both LAN7430 and LAN7431.
> The only difference between the two is the LAN7431 has support
> for external phy.
>
> This change adds LAN7431 to the list of recognized devices
> supported by
> int br_boolopt_get(const struct net_bridge *br, enum br_boolopt_id opt)
> {
> - int optval = 0;
> -
> switch (opt) {
> + case BR_BOOLOPT_NO_LL_LEARN:
> + return br_opt_get(br, BROPT_NO_LL_LEARN);
> default:
> break;
> }
>
> - return
> Andrew,
>
> Admittedly, my knowledge of what the kernel is doing behind the
> scenes is limited.
Me too. Lets see if anybody can make sense of the information you
provided.
Thanks
Andrew
On Tue, Nov 20, 2018 at 01:26:43PM -0500, Bryan Whitehead wrote:
> It has been noticed that under stress the lan743x driver will
> sometimes hang or cause a kernel panic. It has been noticed
> that returning '0' instead of 'weight' fixes this issue.
>
> fixes: rare kernel panic under heavy
On Mon, Nov 19, 2018 at 05:14:38PM +0100, Andreas Schwab wrote:
> On Nov 19 2018, Andrew Lunn wrote:
>
> > Could you turn on lockdep and see if it reports a deadlock.
>
> How do I "turn on lockdep"?
make menuconfig
Kernel hacking
Lock Debugging (spinlocks, mute
On Mon, Nov 19, 2018 at 04:50:14PM +0100, Andreas Schwab wrote:
> On Nov 19 2018, Alexandre Belloni wrote:
>
> > My first intuition is that he mac driver quentin is using does
> > phy_connect when the interface is opened while macb is doing it at probe
> > time. I didn't investigate but maybe
On Mon, Nov 19, 2018 at 04:13:10PM +0100, Andreas Schwab wrote:
> On Nov 19 2018, Andrew Lunn wrote:
>
> > On Mon, Nov 19, 2018 at 03:57:17PM +0100, Andreas Schwab wrote:
> >> On Okt 08 2018, Quentin Schulz wrote:
> >>
> >> > The Microsemi PHYs have
> >> +static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff
> >> *skb);
> >> +static void enetc_unmap_tx_buff(struct enetc_bdr *tx_ring,
> >> + struct enetc_tx_swbd *tx_swbd);
> >> +static int enetc_clean_tx_ring(struct enetc_bdr *tx_ring, int budget);
>
On Mon, Nov 19, 2018 at 03:57:17PM +0100, Andreas Schwab wrote:
> On Okt 08 2018, Quentin Schulz wrote:
>
> > The Microsemi PHYs have multiple banks of registers (called pages).
> > Registers can only be accessed from one page, if we need a register from
> > another page, we need to switch the
On Mon, Nov 19, 2018 at 08:01:03AM +0100, Heiner Kallweit wrote:
> Add myself as third phylib maintainer.
>
> Signed-off-by: Heiner Kallweit
Acked-by: Andrew Lunn
Andrew
> If I wanted it to work, what do I need to do? AFAICT phy autoprobing
> should just attach it as soon as it is compiled in?
Nope. It is a switch, not a PHY. Switches are never auto-probed
because they are not guaranteed to have ID registers.
You need to use the legacy device tree binding. Look
On Sun, Nov 18, 2018 at 07:07:12PM +0100, Pavel Machek wrote:
> On Thu 2018-11-15 21:26:18, Andrew Lunn wrote:
> > On Thu, Nov 15, 2018 at 08:51:11PM +0100, Pavel Machek wrote:
> > > Hi!
> > >
> > > I'm trying to create support for Marvell 88e6065 switch... and
> The kernel starts booting normally and then hangs like this when two
> Ethernet cables are connected to the KSZ8863 switch:
> http://dark-code.bulix.org/3xexu5-507563
>
> This has the lock detection, inside kernel hacking, enabled.
Maybe turn on all the hung-task debug and magic key support.
> > + * The router can have upto 255 ports. This limitation
> > + * allows us to represent netdev_index as an u8
> > + */
> > +#define NETDEV_COUNT_MAX 255
>
> ... 255 is high for a physical port count but not a logical device
> count. In the presence of VLANs 255 is nothing and VLANs are an
>
On Fri, Nov 16, 2018 at 04:28:29PM -0200, Otavio Salvador wrote:
> Hi,
>
> I have a custom design based on Rockchip RV1108 that uses an MSZ8863
> switch running kernel 4.19.
>
> The dts part is as follows:
>
> {
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> snps,reset-gpio = < RK_PC1
On Thu, Nov 15, 2018 at 08:51:11PM +0100, Pavel Machek wrote:
> Hi!
>
> I'm trying to create support for Marvell 88e6065 switch... and it
> seems like drivers/net/dsa supports everything, but this model.
>
> Did someone work with this hardware before? Any idea if it would be
> more suitable to
Signed-off-by: Andrew Lunn
---
v2:
grammar fix in commit message.
PHYS->PHYs
---
drivers/net/dsa/mv88e6xxx/chip.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index fc0f50887
On Sun, Nov 11, 2018 at 10:33:08PM +0100, Heiner Kallweit wrote:
> diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
> index 2e59a8419..5cb06f021 100644
> --- a/drivers/net/phy/mdio_bus.c
> +++ b/drivers/net/phy/mdio_bus.c
> @@ -541,7 +541,7 @@ int __mdiobus_read(struct mii_bus
upposed to be register-compatible
> with IP101A/G). Change is compile-tested only.
Hi Heiner
This looks sensible. Thanks for fixing up this driver.
Reviewed-by: Andrew Lunn
Andrew
On Thu, Nov 08, 2018 at 03:22:16PM +0800, Wang Dongsheng wrote:
> Add support for parsing the ACPI data node for PHY devices on an MDIO bus.
> The current implementation depend on mdio bus scan.
> With _DSD device properties we can finally do this:
>
> Device (MDIO) {
> Name (_DSD,
> > I'm just trying to ensure whatever is defined is flexible enough that
> > we really can later support everything which DT does. We have PHYs on
> > MDIO busses, inside switches, which are on MDIO busses, which are
> > inside Ethernet interfaces, etc.
>
> I think it can be satisfied. See the
> +static int a38x_comphy_poll(struct a38x_comphy_lane *lane,
> + unsigned int offset, u32 mask, u32 value)
> +{
> + unsigned int timeout = 10;
> + u32 val;
> +
> + while (1) {
> + val = readl_relaxed(lane->base + offset);
> + if ((val &
Signed-off-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx/chip.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index fc0f508879d4..4906a4f39d62 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
> >Andrew, I agree with your analysis also. We have hit this problem too
> >(and we have an internal bug tracking it).
> >We have not acted on this so far because of the fear of breaking
> >existing deployments. I am all for fixing this if there is a
> >clean way.
>
> +1 and since this would be a
parameters, resulting in the switch not
responding. We need to preserve the histogram mode bits, so apply a
mask to keep them.
Reported-by: Chris Healy
Fixes: 40cff8fca9e3 ("net: dsa: mv88e6xxx: Fix stats histogram mode")
Signed-off-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx/global1.c
The 6390X family has 8 SERDES interfaces. When ports 9 and 10 are not
using all their SERDES interfaces, the unused ones can be assigned to
ports 2-8. Add support for interrupts from SERDES interfaces connected
to these lower ports.
Signed-off-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx
.
Andrew Lunn (4):
net: dsa: mv88e6xxx: Group cmode ops together
net: dsa: mv88e6xxx: Differentiate between 6390 and 6390X cmodes
net: dsa: mv88e6xxx: Default ports 9/10 6390X CMODE to 1000BaseX
net: dsa: mv88e6xxx: Add support for SERDES on ports 2-8 for 6390X
drivers/net/dsa/mv88e6xxx
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