Build warnings cleanup reported for
- using only 128b key
- wait for buffer in sendmsg/sendpage
- check for null before using skb
- free rspq_skb_cache in error path
- indentation
v2:
Added bug report description for 0002
Incorported comments from Dan Carpenter
Atul Gupta (5):
crypto:chtls
corrected the key length to copy 128b key. Removed 192b and 256b
key as user input supports key of size 128b in gcm_ctx
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_hw.c | 6 +-
1
skb dereferenced before check in sendpage
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/c
dent of goto do_nonblock
replace out with do_rm_wq
Reported-by: Gustavo A. R. Silva <gust...@embeddedor.com>
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h | 1 +
driv
- unindented continue
- check for null page
- signed return
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --g
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/chelsio/chtls/chtls_main.c
b/drivers/crypto/c
removed redundant check and made TLS PDU and header recv
handling common as received from HW.
Ensure that only tls header is read in cpl_rx_tls_cmp
read-ahead and skb is freed when entire data is processed.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Harsh Ja
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/chelsio/chtls/chtls_main.c
b/drivers/crypto/c
corrected the key length to copy 128b key. Removed 192b and 256b
key as user input supports key of size 128b in gcm_ctx
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_hw.c | 6 +-
1
Reported-by: Gustavo A. R. Silva <gust...@embeddedor.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h | 1 +
drivers/crypto/chelsio/chtls/chtls_io.c | 90 +--
drivers/crypto/chelsio/chtls/chtls_main
Build warnings cleanup reported for
- using only 128b key
- wait for buffer in sendmsg/sendpage
- check for null before using skb
- free rspq_skb_cache in error path
- indentation
Atul Gupta (5):
crypto:chtls: key len correction
crypto: chtls: wait for memory sendmsg, sendpage
crypto: chtls
- unindented continue
- check for null page
- signed return
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --g
skb dereferenced before check in sendpage
Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/c
On 4/1/2018 6:27 PM, Boris Pismenny wrote:
> Hi,
>
> On 4/1/2018 6:37 AM, David Miller wrote:
>> From: Atul Gupta <atul.gu...@chelsio.com>
>> Date: Sat, 31 Mar 2018 21:41:51 +0530
>>
>>> Series for Chelsio Inline TLS driver (chtls)
>>
>>
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files chang
handler for record receive. plain text copied to user
buffer
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 602 +-
drivers/crypto/chelsio/chtls/chtls_
Register chtls as Inline TLS driver, chtls is ULD to cxgb4.
Setsockopt to program (tx/rx) keys on chip.
Support AES GCM of key size 128.
Support both Inline Rx and Tx.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Casey Leedom <lee...@chelsio.com>
Reviewed-by: Mi
ueller,
Stefano Brivio and Hannes Frederic
-Added more details in cover letter
-Fixed indentation and formating issues
-Using aes instead of aes-generic
-memset key info after programing the key on chip
-reordered the patch sequence
Atul Gupta (12):
tls: support for Inline tl
Initialize the space reserved for storing the TLS keys,
get and free the location where key is stored for the TLS
connection.
Program the Tx and Rx key as received from user in
struct tls12_crypto_info_aes_gcm_128 and understood by hardware.
added socket option TLS_RX
Signed-off-by: Atul Gupta
TLS handler for record transmit.
Create Inline TLS work request and post to FW.
Create Inline TLS record CPLs for hardware
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_i
Define macro for programming the TLS Key context
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions
Exchange messages with hardware to program the TLS session
CPL handlers for messages received from chip.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_cm.c | 2126
Ethtool option enables TLS record offload on HW, user
configures the feature for netdev capable of Inline TLS.
This allows user to define custom sk_prot for Inline TLS sock
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/linux/netdev_features.h | 2 ++
net/core/eth
Define Inline TLS state, connection management info.
Supporting macros definition.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h| 482
drivers/crypto/c
Read the Inline TLS capability from firmware.
Determine the area reserved for storing the keys
Dump the Inline TLS tx and rx records count.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Michael Werner <wer...@chelsio.com>
Reviewed-by: Casey Leedom <lee
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Casey Leedom <lee...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 122 ++-
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Steve Wise <sw...@opengridcomputing.com>
---
include/net/tls.h | 32 ++-
net/tls/tls_main.c | 114 +++--
2 files changed, 142 insertions(+), 4 deletions(-)
On 3/29/2018 9:56 PM, Sabrina Dubroca wrote:
> 2018-03-29, 21:27:51 +0530, Atul Gupta wrote:
>> TLS handler for record transmit.
>> Create Inline TLS work request and post to FW.
>> Create Inline TLS record CPLs for hardware
>>
>> Signed-off-by: Atul Gupta <a
On 3/29/2018 9:56 PM, Sabrina Dubroca wrote:
> 2018-03-29, 21:27:50 +0530, Atul Gupta wrote:
> ...
>> +static void chtls_pass_accept_request(struct sock *sk,
>> + struct sk_buff *skb)
>> +{
> ...
>> +if (chtls_get_module(ne
Exchange messages with hardware to program the TLS session
CPL handlers for messages received from chip.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_cm.c | 2145
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files chang
Register chtls as Inline TLS driver, chtls is ULD to cxgb4.
Setsockopt to program (tx/rx) keys on chip.
Support AES GCM of key size 128.
Support both Inline Rx and Tx.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Casey Leedom <lee...@chelsio.com>
Reviewed-by: Mi
handler for record receive. plain text copied to user
buffer
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 604 +++-
1 file changed, 603 insertions(+)
TLS handler for record transmit.
Create Inline TLS work request and post to FW.
Create Inline TLS record CPLs for hardware
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls
Initialize the space reserved for storing the TLS keys,
get and free the location where key is stored for the TLS
connection.
Program the Tx and Rx key as received from user in
struct tls12_crypto_info_aes_gcm_128 and understood by hardware.
added socket option TLS_RX
Signed-off-by: Atul Gupta
Define Inline TLS state, connection management info.
Supporting macros definition.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h| 483
drivers/crypto/c
Define macro for programming the TLS Key context
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Casey Leedom <lee...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 122 ++-
Read the Inline TLS capability from firmware.
Determine the area reserved for storing the keys
Dump the Inline TLS tx and rx records count.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Michael Werner <wer...@chelsio.com>
Reviewed-by: Casey Leedom <lee
Ethtool option enables TLS record offload on HW, user
configures the feature for netdev capable of Inline TLS.
This allows user to define custom sk_prot for Inline TLS sock
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/linux/netdev_features.h | 2 ++
net/core/eth
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Steve Wise <sw...@opengridcomputing.com>
---
include/net/tls.h | 32 ++-
net/tls/tls_main.c | 114 +++--
2 files changed, 142 insertions(+), 4 deletions(-)
iables
v2: fixed the following based on the review comments of Stephan Mueller,
Stefano Brivio and Hannes Frederic
-Added more details in cover letter
-Fixed indentation and formating issues
-Using aes instead of aes-generic
-memset key info after programing the key on chip
-reorder
On 3/27/2018 11:53 PM, Stefano Brivio wrote:
> On Tue, 27 Mar 2018 23:06:30 +0530
> Atul Gupta <atul.gu...@chelsio.com> wrote:
>
>> +static struct tls_context *create_ctx(struct sock *sk)
>> +{
>> +struct inet_connection_sock *icsk = inet_csk(sk)
On 3/27/2018 11:12 PM, Stefano Brivio wrote:
> On Tue, 27 Mar 2018 23:06:37 +0530
> Atul Gupta <atul.gu...@chelsio.com> wrote:
>
>> Exchange messages with hardware to program the TLS session
>> CPL handlers for messages received from chip.
>>
>> Signed-off
On 3/28/2018 2:14 AM, Sabrina Dubroca wrote:
> 2018-03-27, 23:06:31 +0530, Atul Gupta wrote:
>> Ethtool option enables TLS record offload on HW, user
>> configures the feature for netdev capable of Inline TLS.
>> This allows user to define custom sk_prot for Inline TLS
Register chtls as Inline TLS driver, chtls is ULD to cxgb4.
Setsockopt to program (tx/rx) keys on chip.
Support AES GCM of key size 128.
Support both Inline Rx and Tx.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Casey Leedom <lee...@chelsio.com>
Reviewed-by: Mi
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files chang
TLS handler for record transmit.
Create Inline TLS work request and post to FW.
Create Inline TLS record CPLs for hardware
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
Reviewed-by: Stefano Brivio <sbri...@redhat.com>
-
handler for record receive. plain text copied to user
buffer
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 592
1 file changed, 592 insertions(+)
Exchange messages with hardware to program the TLS session
CPL handlers for messages received from chip.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Signed-off-by: Michael Werner <wer...@chelsio.com>
Reviewed-by: Sabrina Dubroca <sdubr...@redhat.com>
Reviewed-by: St
Initialize the space reserved for storing the TLS keys,
get and free the location where key is stored for the TLS
connection.
Program the Tx and Rx key as received from user in
struct tls12_crypto_info_aes_gcm_128 and understood by hardware.
added socket option TLS_RX
Signed-off-by: Atul Gupta
Ethtool option enables TLS record offload on HW, user
configures the feature for netdev capable of Inline TLS.
This allows user to define custom sk_prot for Inline TLS sock
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Sabrina Dubroca <sdubr...@redhat.com>
---
i
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Casey Leedom <lee...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 122 ++-
Define Inline TLS state, connection management info.
Supporting macros definition.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Sabrina Dubroca <sdubr...@redhat.com>
Reviewed-by: Michael Werner <wer...@chelsio.com>
---
drivers/crypto/chelsio/chtl
Define macro for programming the TLS Key context
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions
Read the Inline TLS capability from firmware.
Determine the area reserved for storing the keys
Dump the Inline TLS tx and rx records count.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Michael Werner <wer...@chelsio.com>
Reviewed-by: Casey Leedom <lee
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
Reviewed-by: Dave Watson <davejwat...@fb.com>
Reviewed-by: Steve Wise <sw...@opengridcomputing.com>
---
include/net/tls.h | 32 ++-
net/tls/tls_main.c | 115 +++--
2
vio and Hannes Frederic
-Added more details in cover letter
-Fixed indentation and formating issues
-Using aes instead of aes-generic
-memset key info after programing the key on chip
-reordered the patch sequence
Atul Gupta (12):
tls: support for Inline tls record
ethtool:
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files chang
TLS handler for record transmit.
Create Inline TLS work request and post to FW.
Create Inline TLS record CPLs for hardware
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 1252 +++
1 file changed, 1252 inse
Register chtls as Inline TLS driver, chtls is ULD to cxgb4.
Setsockopt to program (tx/rx) keys on chip.
Support AES GCM of key size 128.
Support both Inline Rx and Tx.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_main.c
handler for record receive. plain text copied to user
buffer
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 600
1 file changed, 600 insertions(+)
diff --git a/drivers/crypto/chelsio/chtls/chtls_io.c
b/d
Define Inline TLS state, connection management info.
Supporting macros definition.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h| 485
drivers/crypto/chelsio/chtls/chtls_cm.h | 202 +
2 files c
Initialize the space reserved for storing the TLS keys,
get and free the location where key is stored for the TLS
connection.
Program the Tx and Rx key as received from user in
struct tls12_crypto_info_aes_gcm_128 and understood by hardware.
added socket option TLS_RX
Signed-off-by: Atul Gupta
Exchange messages with hardware to program the TLS session
CPL handlers for messages received from chip.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_cm.c | 2056 +++
net/ipv4/tcp_minisocks.c|
Read the Inline TLS capability from firmware.
Determine the area reserved for storing the keys
Dump the Inline TLS tx and rx records count.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 32 +---
drivers/net/ethernet/chelsio
Define macro for programming the TLS Key context
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions
Ethtool option enables TLS record offload on HW, user
configures the feature for netdev capable of Inline TLS.
This allows user to define custom sk_prot for Inline TLS sock
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/linux/netdev_features.h | 2 ++
net/core/eth
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/net/tls.h | 45
net/tls/tls_main.c | 123 +
2 files changed, 151 insertions(+), 17 deletions(-)
diff --git a/include/net/tls.h b/include/net/tls.h
index 4
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 121 ++-
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 2 +
d
xed the following based on the review comments of Stephan Mueller,
Stefano Brivio and Hannes Frederic
-Added more details in cover letter
-Fixed indentation and formating issues
-Using aes instead of aes-generic
-memset key info after programing the key on chip
-reordered t
On 3/19/2018 2:52 PM, Herbert Xu wrote:
> On Sun, Mar 18, 2018 at 10:36:02AM -0400, David Miller wrote:
>> Herbert, is it OK for this entire series to go via net-next?
> Sure, although there could be conflicts since the chelsio driver
> seems to be changing quite fast.
I applied chcr patches
On 3/18/2018 8:06 PM, David Miller wrote:
> From: Atul Gupta <atul.gu...@chelsio.com>
> Date: Sun, 18 Mar 2018 14:30:30 +
>
>> Hi Dave/Herbert,
>>
>> This series is against crypto tree, should I submit two patch series:
>> 1. netdev specific chan
On 3/19/2018 4:23 AM, Sabrina Dubroca wrote:
> 2018-03-16, 21:07:35 +0530, Atul Gupta wrote:
> [...]
>> +#define SOCK_INLINE (31)
> [...]
>
>> +static inline int csk_flag(const struct sock *sk, enum csk_flags flag)
>> +{
>> +struct chtls_sock *c
:33 AM
To: Atul Gupta <atul.gu...@chelsio.com>
Cc: davejwat...@fb.com; herb...@gondor.apana.org.au; s...@queasysnail.net;
sbri...@redhat.com; linux-cry...@vger.kernel.org; netdev@vger.kernel.org;
Ganesh GR <ganes...@chelsio.com>
Subject: Re: [PATCH v11 crypto 00/12] Chelsio Inline TLS
-Fixed indentation and formating issues
-Using aes instead of aes-generic
-memset key info after programing the key on chip
-reordered the patch sequence
Atul Gupta (12):
tls: support for Inline tls record
ethtool: enable Inline TLS in HW
cxgb4: Inline TLS FW Interface
cx
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/net/tls.h | 39 ++
net/tls/tls_main.c | 116 -
2 files changed, 145 insertions(+), 10 deletions(-)
diff --git a/include/net/tls.h b/include/net/tls.h
index 4
Ethtool option enables TLS record offload on HW, user
configures the feature for netdev capable of Inline TLS.
This allows user to define custom sk_prot for Inline TLS sock
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/linux/netdev_features.h | 2 ++
net/core/eth
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 121 ++-
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 2 +
d
Read the Inline TLS capability from firmware.
Determine the area reserved for storing the keys
Dump the Inline TLS tx and rx records count.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 32 +---
drivers/net/ethernet/chelsio
Define macro for programming the TLS Key context
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions
Initialize the space reserved for storing the TLS keys,
get and free the location where key is stored for the TLS
connection.
Program the Tx and Rx key as received from user in
struct tls12_crypto_info_aes_gcm_128 and understood by hardware.
added socket option TLS_RX
Signed-off-by: Atul Gupta
Exchange messages with hardware to program the TLS session
CPL handlers for messages received from chip.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_cm.c | 2056 +++
net/ipv4/tcp_minisocks.c|
handler for record receive. plain text copied to user
buffer
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 599
1 file changed, 599 insertions(+)
diff --git a/drivers/crypto/chelsio/chtls/chtls_io.c
b/d
TLS handler for record transmit.
Create Inline TLS work request and post to FW.
Create Inline TLS record CPLs for hardware
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 1251 +++
1 file changed, 1251 inse
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files chang
Register chtls as Inline TLS driver, chtls is ULD to cxgb4.
Setsockopt to program (tx/rx) keys on chip.
Support AES GCM of key size 128.
Support both Inline Rx and Tx.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_main.c
Define Inline TLS state, connection management info.
Supporting macros definition.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h| 491
drivers/crypto/chelsio/chtls/chtls_cm.h | 202 +
2 files c
TLS handler for record transmit and receive.
Create Inline TLS work request and post to FW.
Create Inline TLS record CPLs for hardware
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_io.c | 1863 +++
1 file changed
Register chtls as Inline TLS driver, chtls is ULD to cxgb4.
Setsockopt to program (tx/rx) keys on chip.
Support AES GCM of key size 128.
Support both Inline Rx and Tx.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_main.c
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files chang
Exchange CPL messages with hardware to program the TLS session
CPL handlers defined to process messages received from chip.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls_cm.c | 2041 +++
net/ipv4/tcp_minis
Define macro for programming the TLS Key context
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 121 ++-
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 2 +
d
Initialize the space reserved for storing the TLS keys
get and free the location where key is stored for the TLS
connection
Program the tx and rx key as received from user in
struct tls12_crypto_info_aes_gcm_128 and understood by hardware.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.
Ethtool option enables TLS record offload on HW, user
configures the feature for netdev capable of Inline TLS.
This allows user to define custom sk_prot for Inline TLS sock
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/linux/netdev_features.h | 2 ++
net/core/eth
Inline TLS state, connection management. Supporting macros definition.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/crypto/chelsio/chtls/chtls.h| 487
drivers/crypto/chelsio/chtls/chtls_cm.h | 202 +
2 files change
Read the Inline TLS capability from firmware.
Determine the area reserved for storing the keys
Dump the Inline TLS tx and rx records count.
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 32 +---
drivers/net/ethernet/chelsio
on the review comments of Stephan Mueller,
Stefano Brivio and Hannes Frederic
-Added more details in cover letter
-Fixed indentation and formating issues
-Using aes instead of aes-generic
-memset key info after programing the key on chip
-reordered the patch sequence
Atul Gup
Signed-off-by: Atul Gupta <atul.gu...@chelsio.com>
---
include/net/tls.h | 39 ++
net/tls/tls_main.c | 116 -
2 files changed, 144 insertions(+), 11 deletions(-)
diff --git a/include/net/tls.h b/include/net/tls.h
index 4
1 - 100 of 246 matches
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