[Resend in UTF-8]
Hi Marc,
You use _really_ archaic firmware, the bug you see is 99% caused by a
bug already fixed long time ago (cleanup all PP2 BM pools correctly
during exit boot services). Please grab the latest release:
Hi Rafael,
2018-01-24 3:08 GMT+01:00 Rafael J. Wysocki <raf...@kernel.org>:
> On Tue, Jan 23, 2018 at 7:12 AM, Marcin Wojtas <m...@semihalf.com> wrote:
>> Hi Rafael,
>>
>>> > if (res)
>>> > return res;
>>> >
Hi Rafael,
> > if (res)
> > return res;
> >
> > - return device_get_mac_addr(dev, "address", addr, alen);
> > + return fwnode_get_mac_addr(fwnode, "address", addr, alen);
> > +}
> > +EXPORT_SYMBOL(fwnode_get_mac_address);
>
> That should be EXPORT_SYMBOL_GPL().
2018-01-22 16:57 GMT+01:00 David Miller <da...@davemloft.net>:
> From: Andrew Lunn <and...@lunn.ch>
> Date: Mon, 22 Jan 2018 15:43:42 +0100
>
>> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>>> From: Marcin Wojtas <m...@semihalf.com>
2018-01-22 15:43 GMT+01:00 Andrew Lunn <and...@lunn.ch>:
> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>> From: Marcin Wojtas <m...@semihalf.com>
>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>
>> > There's a discussion about the ACPI vs
gt; no issue.
>
> For all mvpp2 patches, you can add:
>
> Tested-by: Antoine Tenart <antoine.ten...@free-electrons.com>
>
> Thanks!
> Antoine
>
> On Thu, Jan 18, 2018 at 01:31:37PM +0100, Marcin Wojtas wrote:
>> Hi,
>>
>> I quickly resend the seri
Hi Mika,
2018-01-18 14:00 GMT+01:00 Andrew Lunn :
>> I CC'ed Mika since he is more familiar with handling these bits of ACPI
>> specs - I wonder whether this is a problem that cropped up on x86
>> systems too.
>
> Hi Lorenzo
>
> There is nothing about MDIO, PHYs, Ethernet
fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 1
.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/
duplication.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/
driver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (7):
device
comprising their own _CRS methods with interrupts description.
In order to be able o satisfy compilation with !CONFIG_ACPI
and also simplify the new code, introduce a helper macro
(ACPI_HANDLE_FWNODE), with which it is possible to reach
an ACPI handle directly from its fwnode.
Signed-off-by: Marcin Wojtas
in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.
ore
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/dr
-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drive
Hi Andrew,
2018-01-17 19:11 GMT+01:00 Andrew Lunn <and...@lunn.ch>:
> On Wed, Jan 17, 2018 at 05:55:39PM +0100, Marcin Wojtas wrote:
>> Hi,
>>
>> This is a third version of the patchset introducing mvpp2 driver ability
>> to operate with ACPI. Until follow-up gen
duplication.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/
new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (7):
device property: Int
.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/
in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.
to nodes
associated to kernel's struct platform_device.
This patch introduces new helper routine - fwnode_irq_get(),
which allows to get the IRQ number directly from the fwnode
to be used as common for OF/ACPI worlds.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c
-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drive
fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index a
ore
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/dr
2018-01-09 11:19 GMT+01:00 Graeme Gregory <graeme.greg...@linaro.org>:
> On Mon, Jan 08, 2018 at 06:17:06PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>>
>>
>> 2018-01-08 16:42 GMT+01:00 Andrew Lunn <and...@lunn.ch>:
>> > w> I am
Hi Andrew,
2018-01-08 16:42 GMT+01:00 Andrew Lunn :
> w> I am not familiar with MDIO, but if its similar or a specific
>> implementation of a serial bus that does sound sane!
>
Thanks for digging, I will check if and how we can use
GenericSerialBus with MDIO.
Best regards,
Russell,
2018-01-03 18:54 GMT+01:00 Russell King - ARM Linux :
> On Wed, Jan 03, 2018 at 05:00:47PM +, Stefan Chulski wrote:
>> > > > -Original Message-
>> > > > Hi Russell,
>> > > >
>> > > > Indeed. RGMII MAC behaves same way, although it shouldn't be named
>>
2018-01-03 14:33 GMT+01:00 Andrew Lunn <and...@lunn.ch>:
> On Wed, Jan 03, 2018 at 02:13:09PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>> 2018-01-03 13:47 GMT+01:00 Andrew Lunn <and...@lunn.ch>:
>> >> I already agreed with 'reg' being awkward in
Hi Andrew,
2018-01-03 13:47 GMT+01:00 Andrew Lunn :
>> I already agreed with 'reg' being awkward in the later emails.
>> Wouldn't _ADR be more appropriate to specify PHY address on MDIO bus?
>
> Also, how do you specify which MDIO bus the PHY is on. To fully
> specify a PHY, you
Graeme,
2018-01-03 12:16 GMT+01:00 :
> On Sun, Dec 31, 2017 at 08:23:54PM +0100, Andrew Lunn wrote:
>> > * Modify way of obtaining interrupts - with ACPI they are resources
>> > bound to struct platform_device and it's not possible to obtain
>> > them directly from
Hi Graeme,
2018-01-03 12:00 GMT+01:00 Graeme Gregory <graeme.greg...@linaro.org>:
> On Mon, Dec 18, 2017 at 10:40:31AM +0100, Ard Biesheuvel wrote:
>> On 18 December 2017 at 10:17, Marcin Wojtas <m...@semihalf.com> wrote:
>> > Hi,
>> >
>> >
2018-01-02 15:08 GMT+01:00 Andrew Lunn :
>> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more
>> a discussion for a MDIO bus / ACPI patchset, but we either find a way
>> to use IRQs with ACPI obtained from child nodes or for this world the
>> functionality will
Hi Andrew,
2018-01-02 14:33 GMT+01:00 Andrew Lunn :
>> Apart from the phylink's SFP support that may require in-band
>> management, it's an alternative to the normal PHY handling. Once MDIO
>> bus + PHYs are supported for ACPI, phylib support will be used instead
>> of the IRQs,
Hi Russell,
2017-12-30 18:31 GMT+01:00 Russell King - ARM Linux <li...@armlinux.org.uk>:
> Hi Marcin,
>
> On Sat, Dec 30, 2017 at 05:34:23PM +0100, Marcin Wojtas wrote:
>> Yes, I already split the series and will send first one right away. I
>> will be followed by MDIO
HI Andrew,
2017-12-31 20:23 GMT+01:00 Andrew Lunn :
>> * Modify way of obtaining interrupts - with ACPI they are resources
>> bound to struct platform_device and it's not possible to obtain
>> them directly from the child node. Hence a formula is used, depending
>> on the
Hi Andrew,
2017-12-31 20:18 GMT+01:00 Andrew Lunn <and...@lunn.ch>:
> On Sun, Dec 31, 2017 at 12:58:39PM +0100, Marcin Wojtas wrote:
> Hi Marcin
>
>> Because there is no equivalent for for_each_available_child_of_node(),
>> use device_for_each_child_node() and
regards,
Marcin
Changelog:
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (5):
device property: Introduce fwnode_get_mac_addr
ond
region of the network controller, make sure it is released, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 147 ++-
in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.
device_for_each_child_node() and check the port availability
inside the mvpp2_port_probe() routine.
This patch replaces of_* function with device_*/fwnode_*
where possible in the mvpp2.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 47 +++-
.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a/d
duplication.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
Hi Russell and Stefan,
2017-12-29 12:38 GMT+01:00 Russell King - ARM Linux <li...@armlinux.org.uk>:
> On Fri, Dec 29, 2017 at 12:12:15PM +0100, Marcin Wojtas wrote:
>> Hi Russell,
>>
>> I see that I misspelled your email address, hence the series remained
>> un
Hi Russell,
2017-12-28 19:46 GMT+01:00 Russell King - ARM Linux :
> On Thu, Dec 28, 2017 at 07:27:39PM +0100, Antoine Tenart wrote:
>> Hi Florian,
>>
>> On Thu, Dec 28, 2017 at 07:02:09AM -0800, Florian Fainelli wrote:
>> > On 12/28/2017 02:05 AM, Antoine Tenart wrote:
>> >
Hi Andrew,
2017-12-19 21:46 GMT+01:00 Andrew Lunn :
>> Of course! v2 will not have such problem, I've been waiting however
>> for the feedback about the ACPI representation. Anyway, I'm strongly
>> leaning towards using _ADR/_CID objects in PHY's nodes for ACPI, so
>> maybe I'll
Hi David,
2017-12-19 19:48 GMT+01:00 David Miller <da...@davemloft.net>:
> From: Marcin Wojtas <m...@semihalf.com>
> Date: Mon, 18 Dec 2017 10:17:56 +0100
>
>> Above support configures 1G to use its PHY normally. 10G can work now
>> only with the lin
Hi Ard
2017-12-18 10:40 GMT+01:00 Ard Biesheuvel <ard.biesheu...@linaro.org>:
> On 18 December 2017 at 10:17, Marcin Wojtas <m...@semihalf.com> wrote:
>> Hi,
>>
>> This patchset introduces ACPI support in mvpp2 and mvmdio drivers.
>> First three patches int
for the kernel patches.
Best regards,
Marcin
Marcin Wojtas (8):
device property: Introduce fwnode_get_mac_address()
device property: Introduce fwnode_get_phy_mode()
mdio_bus: Introduce fwnode MDIO helpers
net: mvmdio: add ACPI support
net: mvpp2: simplify maintaining enabled ports' list
net
duplication.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a/d
in the compatible string)
* MDIO bus auto scanning
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/phy/mdio_bus.c | 218
include/linux/mdio.h | 3 +
2 files changed, 221 insertions(+)
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.
so ensures releasing resources by
mvmdio driver prior to initializing the network controller driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 42 +++-
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/dr
t's not possible to obtain
them directly from the child node. Hence a formula is used, depending
on the port_id and number of possible CPUs.
Moreover when booting with ACPI MVPP2_QDIST_MULTI_MODE is picked by
default, as there is no need to keep any kind of the backward
compatibility.
Signed-off-by: Mar
Newly introduced mvmdio driver ACPI support and also fwnode
MDIO helpers allow for switching to PHY handling with its fwnode.
This patch replaces of_* related PHY handling function with
the fwnode_* equivalent and updates mvpp2_port structure
accordingly.
Signed-off-by: Marcin Wojtas &l
device_for_each_child_node() and check the port availability
inside the mvpp2_port_probe() routine.
This patch replaces of_* function with device_*/fwnode_*
where possible in the mvpp2.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 47 +++-
ity
>> > issues with this patch applied.
>>
>> I wrote an earlier version of this patch. But I think this commit has
>> been modified by the submitter Marcin Wojtas because I don't remember
>> anything about the maximum number of descriptors allowed to be flush.
Hi Antoine,
You can add
Tested-by: Marcin Wojtas <m...@semihalf.com>
Best regards,
Marcin
2017-09-21 15:45 GMT+02:00 Antoine Tenart <antoine.ten...@free-electrons.com>:
> Convert the PPv2 driver to use phylink, which models the MAC to PHY
> link. The phylink support is made
Hi Antoine,
2017-08-28 8:55 GMT+02:00 Antoine Tenart :
> Hi Russell,
>
> On Fri, Aug 25, 2017 at 11:43:13PM +0100, Russell King - ARM Linux wrote:
>> On Fri, Aug 25, 2017 at 04:48:12PM +0200, Antoine Tenart wrote:
>> > The link mode (speed, duplex) was forced
Hi Antoine,
2017-08-23 18:04 GMT+02:00 Antoine Tenart :
> On Wed, Aug 23, 2017 at 03:24:55PM +, Stefan Chulski wrote:
>> > When the cable is connected (there is signal) and the serdes is in sync
>> > and AN
>> > succeeded.
>> >
>> > > With SFF/SFP ports,
Hi Gregory,
>From my side: +1 to your modification.
Thanks,
Marcin
2017-08-04 17:26 GMT+02:00 Gregory CLEMENT :
> Hi Rob,
>
> On jeu., juil. 20 2017, Rob Herring wrote:
>
>> On Thu, Jul 20, 2017 at 10:06 AM, Gregory CLEMENT
>>
Hi Thomas,
I tested patchset on A8040-DB, everything seems fine.
Best regards,
Marcin
2017-07-25 17:55 GMT+02:00 Thomas Petazzoni
:
> Hello,
>
> So far, the mvpp2 driver was using an hrtimer to handle TX
> completion. This patch series adds support for using
2017-07-25 10:48 GMT+02:00 Antoine Tenart <antoine.ten...@free-electrons.com>:
> Hi Marcin,
>
> On Tue, Jul 25, 2017 at 01:56:57AM +0200, Marcin Wojtas wrote:
>>
>> I stressed 10G interfaces with bidirectional traffic on A8040-DB, did
>> some up/down sequ
Hi Antoine,
I stressed 10G interfaces with bidirectional traffic on A8040-DB, did
some up/down sequences and overall it seems stable (of course I needed
fix mentioned in patch 10/18). In a spare moment I'll give other
changes a scroll.
Best regards,
Marcin
2017-07-24 15:48 GMT+02:00 Antoine
Hi Rob,
I somehow missed this patch.
2017-07-20 17:06 GMT+02:00 Gregory CLEMENT :
> Hi Rob,
>
> On jeu., juil. 20 2017, Rob Herring wrote:
>
> (Adding Marcin in CC who wrote this part of code)
>
>> Nothing sets ever sets data, so it is
Hi Russel,
2017-04-10 17:27 GMT+02:00 Russell King - ARM Linux :
> This series of patches update mvmdio for Armada 8k CP110. A number of
> issues were found:
>
> 1. The driver fails to disable an interrupt when something goes wrong
>in the probe function.
>
> 2. The
Hi Jisheng,
2017-02-21 17:16 GMT+01:00 David Miller :
> From: Jisheng Zhang
> Date: Tue, 21 Feb 2017 12:37:40 +0800
>
>> Thanks for your review.
>>
>> The measurement is simple: record how much time we spent in mvneta_rx_swbm()
>> for receiving 1GB data,
Hi Thomas,
How about switching to napi_alloc_frag() in mvpp2_rx_refill(), which
is called in hotpath? In easy way, it may give some performance gain.
Best regards,
Marcin
2017-02-02 16:51 GMT+01:00 Thomas Petazzoni
:
> This commit adapts the mvpp2 RX path to
for the mvneta driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvneta.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 9624537..6
t once due to
MVNETA_TXQ_UPDATE_REG(q) reqisters limitation, is 255. Because of that
a new macro was added (MVNETA_TXQ_DEC_SENT_MASK) in order to ensure that
concatenated amount of descriptor does not exceed that value.
Signed-off-by: Simon Guinot <simon.gui...@sequanux.org>
Signed-off-by: Marc
,
Marcin
Changelog:
v1 -> v2:
* Add checking condition that ensures too much descriptors are not
concatenated before flushing in HW.
Marcin Wojtas (1):
net: mvneta: add BQL support
Simon Guinot (1):
net: mvneta: add xmit_more support
drivers/net/ethernet/marvell/mvneta.c |
Hi Russel,
2017-01-07 12:03 GMT+01:00 Russell King - ARM Linux :
> On Wed, Dec 28, 2016 at 05:46:27PM +0100, Thomas Petazzoni wrote:
>> +#define MVPP22_SMI_MISC_CFG_REG 0x2a204
>> +#define MVPP22_SMI_POLLING_EN BIT(10)
>> +
> ...
>> +
Hi Thomas,
Reviewed-by: Marcin Wojtas <m...@semihalf.com>
Best regards,
Marcin
2016-12-13 17:53 GMT+01:00 Thomas Petazzoni
<thomas.petazz...@free-electrons.com>:
> Since commit 71ce391dfb784 ("net: mvpp2: enable proper per-CPU TX
> buffers unmapping"), we are no
Hi Gregory,
Checked on a388-gp with and without HWBM, also both ports work on
a3700 (second one after changing to sgmii).
Tested-by: Marcin Wojtas <m...@semihalf.com>
Best regards,
Marcin
2016-11-30 22:42 GMT+01:00 Gregory CLEMENT <gregory.clem...@free-electrons.com>:
> Hi,
>
Hi Gregory,
2016-11-30 22:42 GMT+01:00 Gregory CLEMENT :
> Add neta nodes for network support both in device tree for the SoC and
> the board.
>
> Signed-off-by: Gregory CLEMENT
> ---
>
Hi Jisheng,
2016-12-01 13:16 GMT+01:00 Jisheng Zhang <jszh...@marvell.com>:
> On Thu, 1 Dec 2016 20:02:05 +0800 Jisheng Zhang wrote:
>
>> Hi Marcin,
>>
>> On Thu, 1 Dec 2016 12:48:39 +0100 Marcin Wojtas wrote:
>>
>> > Hi Jisheng,
>> >
>&
0 Nov 2016 22:42:49 +0100 Gregory CLEMENT wrote:
>
>> From: Marcin Wojtas <m...@semihalf.com>
>>
>> Prepare the mvneta driver in order to be usable on the 64 bits platform
>> such as the Armada 3700.
>>
>> [gregory.clem...@free-electrons.com]: this
Gregory,
2016-11-29 11:19 GMT+01:00 Gregory CLEMENT <gregory.clem...@free-electrons.com>:
> Hi Marcin,
>
> On mar., nov. 29 2016, Marcin Wojtas <m...@semihalf.com> wrote:
>
>> Hi Gregory,
>>
>> Another remark below, sorry for noise.
>&g
Hi Gregory,
Another remark below, sorry for noise.
2016-11-29 10:37 GMT+01:00 Gregory CLEMENT :
> Until now the virtual address of the received buffer were stored in the
> cookie field of the rx descriptor. However, this field is 32-bits only
> which prevents
Hi Gregory,
Apparently HWBM had a mistake in implementation, please see below.
2016-11-29 10:37 GMT+01:00 Gregory CLEMENT :
> Until now the virtual address of the received buffer were stored in the
> cookie field of the rx descriptor. However, this field is
Hi Gregory,
2016-11-24 16:01 GMT+01:00 Gregory CLEMENT :
> Hi Arnd,
>
> On jeu., nov. 24 2016, Arnd Bergmann wrote:
>
>> On Thursday, November 24, 2016 4:37:36 PM CET Jisheng Zhang wrote:
>>> solB (a SW shadow cookie) perhaps gives a better
Hi Gregory,
2016-11-23 14:07 GMT+01:00 Gregory CLEMENT :
> Hi Jisheng, Arnd,
>
>
> Thanks for your feedback.
>
>
> On mer., nov. 23 2016, Arnd Bergmann wrote:
>
>> On Wednesday, November 23, 2016 5:53:41 PM CET Jisheng Zhang wrote:
>>> On Tue,
Hi,
This short patchset introduces two enhancements to mvneta driver
TX packets concatenation support using xmit_more mechanism and also
byte queue limit in order to decrease latency on saturated links.
Any comments or feedback would be welcome.
Best regards,
Marcin
Marcin Wojtas (1):
net
From: Simon Guinot
Basing on xmit_more flag of the skb, TX descriptors can be concatenated
before flushing. This commit delay Tx descriptor flush if the queue is
running and if there is more skb's to send.
Signed-off-by: Simon Guinot
---
for the mvneta driver.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvneta.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index b9dccea..b
o 0.
Signed-off-by: Dmitri Epshtein <d...@marvell.com>
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Cc: <sta...@vger.kernel.org> # v3.10+
Fixes aebea2ba0f74 ("net: mvneta: fix Tx interrupt delay")
---
drivers/net/ethernet/marvell/mvneta.c | 2 +-
1 file changed, 1 inser
Hi David,
I've just realized I forgot to add an information, that this patch is
intended for 'net' tree.
Best regards,
Marcin
2016-04-01 15:21 GMT+02:00 Marcin Wojtas <m...@semihalf.com>:
> After enabling per-cpu processing it appeared that under heavy load
> changing MTU can result
.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
drivers/net/ethernet/marvell/mvneta.c | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index fee6a91..a433de9
Hi Jisheng,
2016-03-31 7:53 GMT+02:00 Jisheng Zhang :
> Hi Gregory,
>
> On Wed, 30 Mar 2016 17:11:41 +0200 Gregory CLEMENT wrote:
>
>> Hi Jisheng,
>>
>> On mer., mars 30 2016, Jisheng Zhang wrote:
>>
>> > The mvneta BM can't work on 64bit platform, as
Hi Gregory,
> +int hwbm_pool_add(struct hwbm_pool *bm_pool, unsigned int buf_num, gfp_t gfp)
> +{
> + int err, i;
> + unsigned long flags;
> +
> + spin_lock_irqsave(_pool->lock, flags);
> + if (bm_pool->buf_num == bm_pool->size) {
'size' field is used as a 'frag_size'
Hi David,
2016-02-18 5:43 GMT+01:00 David Miller :
> From: Gregory CLEMENT
> Date: Tue, 16 Feb 2016 16:33:41 +0100
>
>> pp->dev = dev;
>> SET_NETDEV_DEV(dev, >dev);
>>
>> + dev->features = NETIF_F_SG | NETIF_F_IP_CSUM |
Hi David,
2015-12-04 21:15 GMT+01:00 Florian Fainelli <f.faine...@gmail.com>:
> (no top posting please)
>
> On 02/12/15 00:26, Marcin Wojtas wrote:
>> Hi Florian,
>>
>> Can you please describe in more details, what would you expect from
>> such special abst
Hi Gregory,
> @@ -1824,13 +1835,16 @@ error:
> static int mvneta_tx(struct sk_buff *skb, struct net_device *dev)
> {
> struct mvneta_port *pp = netdev_priv(dev);
> - u16 txq_id = skb_get_queue_mapping(skb);
> + u16 txq_id = smp_processor_id() % txq_number;
I think it may be
.
Any feedback would be welcome.
Best regards,
Marcin Wojtas
Marcin Wojtas (3):
net: mvpp2: fix missing DMA region unmap in egress processing
net: mvpp2: fix buffers' DMA handling on RX path
net: mvpp2: fix refilling BM pools in RX path
drivers/net/ethernet/marvell/mvpp2.c | 52
to the pool in case of an error.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375
network unit")
Cc: <sta...@vger.kernel.org> # v3.18+
---
drivers/net/ethernet/marvell/mvpp2.c | 28 --
-by: Marcin Wojtas <m...@semihalf.com>
Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375
network unit")
Cc: <sta...@vger.kernel.org> # v3.18+
---
drivers/net/ethernet/marvell/mvpp2.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git
argument number
had to be increased for this purpose.
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375
network unit")
Cc: <sta...@vger.kernel.org> # v3.18+
---
drivers/net/ethernet/marvell/mvpp2.c | 21 +++
com>:
> From: Marcin Wojtas <m...@semihalf.com>
> Date: Mon, 30 Nov 2015 15:13:22 +0100
>
>> What kind of abstraction and helpers do you mean? Some kind of API
>> (e.g. bm_alloc_buffer, bm_initialize_ring bm_put_buffer,
>> bm_get_buffer), which would be
Hi Gregory,
2015-12-02 17:21 GMT+01:00 Gregory CLEMENT :
> Hi,
>
> On mer., déc. 02 2015, Gregory CLEMENT
> wrote:
>
>>>
>>> So far the issue may have been not noticed, because in every IO driver
>>> using
are enqueued. I added a counter and with maximal throughput
during 30s test and 9 times less timers were enqueued with
timer_scheduled flag (~31k vs ~281k), so it's much more efficient and
I'll leave it as is.
Best regards,
Marcin
2015-11-30 16:57 GMT+01:00 Marcin Wojtas <m...@semihalf.com>:
>
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