Re: [v3, net-next, 02/12] net: stmmac: Do not keep rearming the coalesce timer in stmmac_xmit

Hi, On Fri, Aug 17, 2018 at 9:32 AM Jerome Brunet wrote: > > On Fri, 2018-05-18 at 14:55 +0100, Jose Abreu wrote: > > This is cutting down performance. Once the timer is armed it should run > > after the time expires for the first packet sent and not the last one. > > > > After this change,

Re: [PATCH v2 2/2] net: stmmac: dwmac-meson: extend phy mode setting

PRG_ETH0_EXT_PHY_MODE_MASK, > + PRG_ETH0_EXT_RGMII_MODE); > + break; > + case PHY_INTERFACE_MODE_RMII: > + /* disable RGMII mode -> enables RMII mode */ if you have to re-send it for whatever r

[PATCH net-next v1 1/2] dt-bindings: net: meson-dwmac: add support for the Meson8m2 SoC

to the documentation so differences (if there are any) between Meson8m2 and the other SoCs can be taken care of within the driver. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- Documentation/devicetree/bindings/net/meson-dwmac.txt | 5 +++-- 1 file changed, 3 inse

[PATCH net-next v1 0/2] Meson8m2 support for dwmac-meson8b

ions later on (if needed). Martin Blumenstingl (2): dt-bindings: net: meson-dwmac: add support for the Meson8m2 SoC net: stmmac: dwmac-meson8b: Add support for the Meson8m2 SoC Documentation/devicetree/bindings/net/meson-dwmac.txt | 5 +++-- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c |

[PATCH net-next v1 2/2] net: stmmac: dwmac-meson8b: Add support for the Meson8m2 SoC

The Meson8m2 SoC uses a similar (potentially even identical) register layout as the Meson8b and GXBB SoCs for the dwmac glue. Add a new compatible string and update the module description to indicate support for these SoCs. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.

Re: [net-next PATCH v1 3/3] net: stmmac: dwmac-meson8b: make the clock configurations private

Hi Jerome, On Sat, Feb 17, 2018 at 5:41 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sat, 2018-02-17 at 15:08 +0100, Martin Blumenstingl wrote: >> The common clock framework needs access to the "clock configuration" >> structs during runtime. >> How

[net-next PATCH v1 1/3] net: stmmac: dwmac-meson8b: simplify clock registration

on the stack) because the common clock framework already uses kstrdup() internally. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 156 + 1 file chang

[net-next PATCH v1 3/3] net: stmmac: dwmac-meson8b: make the clock configurations private

framework know about these configurations. Suggested-by: Jerome Brunet <jbru...@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 45 -- 1 file changed, 24 insertions(+),

[net-next PATCH v1 2/3] net: stmmac: dwmac-meson8b: only keep struct device around

Nothing in the dwmac-meson8b driver (except .probe itself) requires the platform_device anymore after .probe has finished. Replace it with a pointer to struct device since this is what the functions inside the driver are actually accessing. No functional changes. Signed-off-by: Martin

[net-next PATCH v1 0/3] dwmac-meson8b: small cleanup

[0] http://lists.infradead.org/pipermail/linux-amlogic/2018-January/006143.html Martin Blumenstingl (3): net: stmmac: dwmac-meson8b: simplify clock registration net: stmmac: dwmac-meson8b: only keep struct device around net: stmmac: dwmac-meson8b: make the clock configurations private .../ne

Re: [RFT net-next v4 3/5] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

On Tue, Jan 16, 2018 at 12:20 PM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > On Sun, Jan 14, 2018 at 10:48 PM, Martin Blumenstingl > <martin.blumensti...@googlemail.com> wrote: >> Tests (using an oscilloscope and an Odroid-C1 board with a RTL8211F

Re: [PATCH net-next v5 0/4] dwmac-meson8b: clock fixes for Meson8b

Hi Yixun, On Thu, Jan 18, 2018 at 11:27 AM, Yixun Lan <yixun@amlogic.com> wrote: > HI Jerome > > On 01/17/18 01:19, Jerome Brunet wrote: >> On Tue, 2018-01-16 at 12:17 +0100, Martin Blumenstingl wrote: >>>>> Hi Martin >>>>> >>>

Re: [RFT net-next v4 3/5] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

On Sun, Jan 14, 2018 at 10:48 PM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > Tests (using an oscilloscope and an Odroid-C1 board with a RTL8211F > RGMII PHY) have shown that the PRG_ETH0 register behaves as follows: > - bit 4 is a mux to choose between tw

Re: [PATCH net-next v5 0/4] dwmac-meson8b: clock fixes for Meson8b

Hi Jerome, Hi Yixun, On Tue, Jan 16, 2018 at 10:37 AM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Tue, 2018-01-16 at 16:25 +0800, Yixun Lan wrote: >> >> On 01/16/18 01:10, Martin Blumenstingl wrote: >> > Hi Dave, >> > >> > this series is n

[PATCH net-next v5 2/4] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

we set before, with that non-existing divide-by-5-or-10 divider). Special thanks go to Linus Lüssing for testing the various bits and checking the results with an oscilloscope on his Odroid-C1! Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Reporte

[PATCH net-next v5 1/4] net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode

not routed to the PHY in RMII mode. While here also rename meson8b_init_clk to meson8b_init_rgmii_tx_clk to make it easier to understand the code. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Signed-off-by: Martin Blumenstin

[PATCH net-next v5 3/4] net: stmmac: dwmac-meson8b: fix setting the RGMII TX clock on Meson8b

) Reported-by: Emiliano Ingrassia <ingras...@epigenesys.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Reviewed-by: Jerome Brunet <jbru...@baylibre.com> Tested-by: Jerome Brunet <jbru...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-

[PATCH net-next v5 4/4] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

d a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Suggested-by: Jerome Brunet <jbru...@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Reviewed-by: Jerome Brunet <jbru...@baylibre.com> Tested-by: Jerome Brunet <jbru...@baylibre.com&

[PATCH net-next v5 0/4] dwmac-meson8b: clock fixes for Meson8b

//lists.infradead.org/pipermail/linux-amlogic/2017-December/005861.html [3] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005899.html [4] http://lists.infradead.org/pipermail/linux-amlogic/2018-January/006125.html Martin Blumenstingl (4): net: stmmac: dwmac-meson8b: only config

Re: [RFT net-next v4 3/5] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

Hi Jerome, On Mon, Jan 15, 2018 at 12:49 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sun, 2018-01-14 at 22:48 +0100, Martin Blumenstingl wrote: >> Tests (using an oscilloscope and an Odroid-C1 board with a RTL8211F >> RGMII PHY) have shown that the PRG_ETH0 regist

Re: [RFT net-next v4 1/5] net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode

Hi Jerome, On Mon, Jan 15, 2018 at 12:46 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sun, 2018-01-14 at 22:48 +0100, Martin Blumenstingl wrote: >> > > [...] > >> @@ -204,12 +200,24 @@ static int meson8b_init_prg_eth(s

Re: [RFT net-next v4 2/5] net: stmmac: dwmac-meson8b: simplify generating the clock names

Hi Jerome, On Mon, Jan 15, 2018 at 12:46 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sun, 2018-01-14 at 22:48 +0100, Martin Blumenstingl wrote: >> Instead of using a custom buffer, snprintf() and devm_kstrdup() we can >> simplify this by using devm_kasprintf(). >

[RFT net-next v4 1/5] net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode

not routed to the PHY in RMII mode. While here also rename meson8b_init_clk to meson8b_init_rgmii_tx_clk to make it easier to understand the code. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Signed-off-by: Martin Blumenstin

[RFT net-next v4 2/5] net: stmmac: dwmac-meson8b: simplify generating the clock names

Instead of using a custom buffer, snprintf() and devm_kstrdup() we can simplify this by using devm_kasprintf(). No functional changes - this just makes the code shorter. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/ethernet/stmicro/stmmac

[RFT net-next v4 4/5] net: stmmac: dwmac-meson8b: fix setting the RGMII TX clock on Meson8b

) Reported-by: Emiliano Ingrassia <ingras...@epigenesys.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Reviewed-by: Jerome Brunet <jbru...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 4 +++- 1 file changed, 3 insertions(+

[RFT net-next v4 5/5] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

d a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Suggested-by: Jerome Brunet <jbru...@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 2 +- 1 file changed, 1 insertion(+), 1 delet

[RFT net-next v4 3/5] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

we set before, with that non-existing divide-by-5-or-10 divider). Special thanks go to Linus Lüssing for testing the various bits and checking the results with an oscilloscope on his Odroid-C1! Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Rep

[RFT net-next v4 0/5] dwmac-meson8b: clock fixes for Meson8b

g/pipermail/linux-amlogic/2017-December/005861.html [3] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005899.html Martin Blumenstingl (5): net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode net: stmmac: dwmac-meson8b: simplify generating the clock names ne

Re: [RFT net-next v3 0/5] dwmac-meson8b: RGMII clock fixes for Meson8b

tin, Hi Dave, >> > >> > On Thu, Dec 28, 2017 at 11:21:23PM +0100, Martin Blumenstingl wrote: >> > > Hi Dave, >> > > >> > > please do not apply this series until it got a Tested-by from Emiliano. >> > > >> > > >> &g

Re: [RFT net-next v3 3/5] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

Hi Jerome, On Fri, Dec 29, 2017 at 6:57 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Thu, 2017-12-28 at 23:21 +0100, Martin Blumenstingl wrote: >> While testing the dwmac-meson8b with an RGMII PHY on Meson8b we >> discovered that the m25_div is not actually a divi

Re: [RFT net-next v3 0/5] dwmac-meson8b: RGMII clock fixes for Meson8b

On Fri, Dec 29, 2017 at 8:48 AM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > Hi Emiliano, > > On Fri, Dec 29, 2017 at 2:31 AM, Emiliano Ingrassia > <ingras...@epigenesys.com> wrote: >> Hi Martin, Hi Dave, >> >> On Thu, Dec 28, 201

Re: [RFT net-next v3 0/5] dwmac-meson8b: RGMII clock fixes for Meson8b

Hi Emiliano, On Fri, Dec 29, 2017 at 2:31 AM, Emiliano Ingrassia <ingras...@epigenesys.com> wrote: > Hi Martin, Hi Dave, > > On Thu, Dec 28, 2017 at 11:21:23PM +0100, Martin Blumenstingl wrote: >> Hi Dave, >> >> please do not apply this series until it got a Tes

[RFT net-next v3 2/5] net: stmmac: dwmac-meson8b: simplify generating the clock names

Instead of using a custom buffer, snprintf() and devm_kstrdup() we can simplify this by using devm_kasprintf(). No functional changes - this just makes the code shorter. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/ethernet/stmicro/stmmac

[RFT net-next v3 4/5] net: stmmac: dwmac-meson8b: fix setting the RGMII clock on Meson8b

logic Meson 8b / GXBB DWMAC") Reported-by: Emiliano Ingrassia <ingras...@epigenesys.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Reviewed-by: Jerome Brunet <jbru...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 4 +++-

[RFT net-next v3 3/5] net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration

factor clock which divides the m250_div output by 10. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Reported-by: Emiliano Ingrassia <ingras...@epigenesys.com> Signed-off-by: Martin Blumenstingl <martin.blumensti.

[RFT net-next v3 0/5] dwmac-meson8b: RGMII clock fixes for Meson8b

ux-amlogic/2017-December/005596.html [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005848.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005861.html Martin Blumenstingl (5): net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode ne

[RFT net-next v3 1/5] net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode

not routed to the PHY in RMII mode. While here also rename meson8b_init_clk to meson8b_init_rgmii_clk to make it easier to understand the code. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Signed-off-by: Martin Blumenstingl <martin.blum

[RFT net-next v3 5/5] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

MAC") Suggested-by: Jerome Brunet <jbru...@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmma

Re: [RFT net-next v2 0/3] dwmac-meson8b: RGMII clock fixes for Meson8b

Hi Emiliano, On Thu, Dec 28, 2017 at 6:51 PM, Emiliano Ingrassia <ingras...@epigenesys.com> wrote: > Hi Martin, > > thank you for the quick response! > > On Thu, Dec 28, 2017 at 05:58:34PM +0100, Martin Blumenstingl wrote: >> Hi Emiliano, >> >> thank you

Re: [RFT net-next v2 0/3] dwmac-meson8b: RGMII clock fixes for Meson8b

Hi Emiliano, thank you for testing this! On Thu, Dec 28, 2017 at 5:16 PM, Emiliano Ingrassia <ingras...@epigenesys.com> wrote: > Hi Martin, Hi Dave, > > On Sun, Dec 24, 2017 at 12:40:57AM +0100, Martin Blumenstingl wrote: >> Hi Dave, >> >> please do not apply

[RFT net-next v2 3/3] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

cannot be changed. Additionally the GX SoCs don't need to use the "closest" divider since the parent clock is a multiple of 250MHz. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Suggested-by: Jerome Brunet <jbru...@baylibre.com

[RFT net-next v2 1/3] net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode

not routed to the PHY in RMII mode. While here also rename meson8b_init_clk to meson8b_init_rgmii_clk to make it easier to understand the code. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Signed-off-by: Martin Blumenstingl <martin.blum

[RFT net-next v2 0/3] dwmac-meson8b: RGMII clock fixes for Meson8b

h one that sets CLK_SET_RATE_PARENT on the mux and thus re-configures the MPLL2 clock on Meson8b correctly [0] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005596.html [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005848.html Martin Blumenstingl (3): net

[RFT net-next v2 2/3] net: stmmac: dwmac-meson8b: fix setting the RGMII clock on Meson8b

ngras...@epigenesys.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Reviewed-by: Jerome Brunet <jbru...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/dri

Re: [RFT net-next 2/2] net: stmmac: dwmac-meson8b: don't try to change m250_div parent's rate

On Sat, Dec 23, 2017 at 11:41 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sat, 2017-12-23 at 22:49 +0100, Martin Blumenstingl wrote: >> while calculating this with a target frequency of 500MHz manually >> again I saw that there's a remainder of 10Mhz after th

Re: [RFT net-next 2/2] net: stmmac: dwmac-meson8b: don't try to change m250_div parent's rate

Hi Jerome, On Sat, Dec 23, 2017 at 9:40 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sat, 2017-12-23 at 21:00 +0100, Martin Blumenstingl wrote: >> Hi Jerome, >> >> On Sat, Dec 23, 2017 at 6:40 PM, Jerome Brunet <jbru...@baylibre.com> wrote: >> >

Re: [RFT net-next 2/2] net: stmmac: dwmac-meson8b: don't try to change m250_div parent's rate

Hi Jerome, On Sat, Dec 23, 2017 at 6:40 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Sat, 2017-12-23 at 18:04 +0100, Martin Blumenstingl wrote: >> Trying to set the rate of m250_div's parent clock makes no sense since >> it's a mux which has neither CLK_

[RFT net-next 0/2] dwmac-meson8b: clock rounding fixes for Meson8b

s VIM2 (GXM SoC, external RGMII PHY). Both are still working fine (so let's hope that this also fixes your Meson8b issue :)). [0] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005596.html Martin Blumenstingl (2): net: stmmac: dwmac-meson8b: fix setting the PHY clock on Meson8b net

[RFT net-next 1/2] net: stmmac: dwmac-meson8b: fix setting the PHY clock on Meson8b

ngras...@epigenesys.com> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/n

[RFT net-next 2/2] net: stmmac: dwmac-meson8b: don't try to change m250_div parent's rate

divider since the parent clock is a multiple of 250MHz. Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC") Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson

[RfC net-next 3/3] net: phy: realtek: add more interrupt bits for RTL8211E and RTL8211F

This documents a few more bits in the RTL821x_INER register for RTL8211E and RTL8211F. These are added only to document them (as no public datasheets are available for these PHYs), they are currently not used. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- d

[RfC net-next 1/3] net: phy: realtek: add support for configuring the RX delay on RTL8211F

into a new rtl8211x_page_mask_bits helper function. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/phy/realtek.c | 55 ++- 1 file changed, 45 insertions(+), 10 deletions(-) diff --git a/drivers/net/phy/realt

[RfC net-next 2/3] net: phy: realtek: configure the INTB pin on RTL8211F

the PHY driver does not support Wake-on-LAN yet. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/phy/realtek.c | 27 +-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/re

[RfC net-next 0/3] RTL8211F Ethernet PHY "documentation"

that this series is applied. if someone is interested in testing this: it applies on top of my other series: "Realtek Ethernet PHY driver improvements" [1] [0] https://www.spinics.net/lists/netdev/msg41.html [1] https://marc.info/?l=linux-netdev=151225151410593=2 Martin Blumenstingl (3):

[PATCH net-next 2/5] net: phy: realtek: rename RTL821x_INER_INIT to RTL8211B_INER_INIT

This macro is only used by the RTL8211B code. RTL8211E and RTL8211F both use other bits to initialize the RTL821x_INER register. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/phy/realtek.c | 4 ++-- 1 file changed, 2 inse

[PATCH net-next 5/5] net: phy: realtek: add utility functions to read/write page addresses

ility functions make the existing code easier to read since it removes some duplication (switching back to page 0 is done within the new helpers for example). No functional changes are intended. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- driv

[PATCH net-next 3/5] net: phy: realtek: group all register bit #defines for RTL821x_INER

This simply moves all register bit #defines which describe the (PHY specific) bits in the RTL821x_INER right below the RTL821x_INER register definition. This makes it easier to spot which registers and bits belong together. No functional changes. Signed-off-by: Martin Blumenstingl

[PATCH net-next 0/5] Realtek Ethernet PHY driver improvements

for reading/writing registers on a Realtek specific "page" Martin Blumenstingl (5): net: phy: realtek: use the BIT and GENMASK macros net: phy: realtek: rename RTL821x_INER_INIT to RTL8211B_INER_INIT net: phy: realtek: group all register bit #defines for RTL821x_INER net: ph

[PATCH net-next 4/5] net: phy: realtek: use the same indentation for all #defines

This simply makes the code easier to read. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/phy/realtek.c | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/net/phy/realt

[PATCH net-next 1/5] net: phy: realtek: use the BIT and GENMASK macros

This makes it easier to compare the #defines with the datasheets. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/phy/realtek.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/rea

Re: [PATCH] net: phy: realtek: fix RTL8211F interrupt mode

Hi Heiner, On Sun, Nov 12, 2017 at 4:16 PM, Heiner Kallweit wrote: > After commit b94d22d94ad22 "ARM64: dts: meson-gx: add external PHY > interrupt on some platforms" ethernet stopped working on my Odroid-C2 > which has a RTL8211F phy. > > It turned out that no interrupts

[PATCH net] mdio: mux: fix parsing mux registers outside of the PHY address range

rse_addr to of_mdio_parse_addr. Fixes: 342fa1964439 ("mdio: mux: make child bus walking more permissive and errors more verbose") Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- drivers/net/phy/mdio-mux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 d

Re: [PATCH 1/1] dt-binding: net: wireless: fix node name in the BCM43xx example

Hi Arend, On Tue, May 16, 2017 at 12:05 AM, Arend Van Spriel <arend.vanspr...@broadcom.com> wrote: > On 15-5-2017 22:13, Martin Blumenstingl wrote: >> The example in the BCM43xx documentation uses "brcmf" as node name. >> However, wireless devices shou

[PATCH 1/1] dt-binding: net: wireless: fix node name in the BCM43xx example

djust only the board specific bits). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- Documentation/devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/wireles

[PATCH 0/1] fix node name in the brcm,bcm43xx-fmac.txt example

case a .dts author copied from another .dts which still uses the "wrong" node name). Martin Blumenstingl (1): dt-binding: net: wireless: fix node name in the BCM43xx example Documentation/devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.13.0

Re: [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode

On Wed, Feb 1, 2017 at 8:19 PM, Heiner Kallweit <hkallwe...@gmail.com> wrote: > As documented in Documentation/devicetree/bindings/net/ethernet.txt, > in RGMII_ID and RGMII_TXID mode the MAC should not add a tx delay. > > Signed-off-by: Heiner Kallweit <hkallwe...@gmail.

[PATCH net-next v5 2/2] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

be applying the delay twice (which results in non-working TX traffic). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Tested-by: Neil Armstrong <narmstr...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 20 ++-- 1 file

[PATCH net-next v5 1/2] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

.). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Tested-by: Neil Armstrong <narmstr...@baylibre.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/net/meson-dwmac.txt | 16 1 file changed, 16 inserti

[PATCH net-next v5 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay

d patches to properly reset the PHY on Meson GXBB devices and to use a similar configuration than the one we use on Meson GXL devices (by passing a phy-handle to stmmac and defining the PHY in the mdio0 bus - patch 3-6) - add the "amlogic,tx-delay-ns" property to all boards which are using

[PATCH] Documentation: net: phy: improve explanation when to specify the PHY ID

e ID which is reported by the actual PHY. Whenever a device is shipped with (multiple) different PHYs during it's production lifetime then explicitly specifying "ethernet-phy-id." could break certain revisions of that device. Signed-off-by: Martin Blumenstingl <martin.blum

Re: [PATCH net-next v4 2/2] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

Hi David, On Sun, Dec 18, 2016 at 5:13 PM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > On Sun, Dec 18, 2016 at 4:49 PM, David Miller <da...@davemloft.net> wrote: >> From: Martin Blumenstingl <martin.blumensti...@googlemail.com> >> Date

Re: [PATCH net-next v4 2/2] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

Hi David, On Sun, Dec 18, 2016 at 5:13 PM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > On Sun, Dec 18, 2016 at 4:49 PM, David Miller <da...@davemloft.net> wrote: >> From: Martin Blumenstingl <martin.blumensti...@googlemail.com> >> Date

Re: [PATCH net-next v4 2/2] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

On Sun, Dec 18, 2016 at 4:49 PM, David Miller <da...@davemloft.net> wrote: > From: Martin Blumenstingl <martin.blumensti...@googlemail.com> > Date: Sat, 17 Dec 2016 19:21:19 +0100 > >> Prior to this patch we were using a hardcoded RGMII TX clock delay of >> 2ns (=

Re: [PATCH net-next v3 0/4] Fix OdroidC2 Gigabit Tx link issue

Hi Florian, Hi Jerome, On Wed, Nov 30, 2016 at 2:15 AM, Florian Fainelli wrote: > On 11/29/2016 05:13 PM, David Miller wrote: >> From: Florian Fainelli >> Date: Tue, 29 Nov 2016 16:43:20 -0800 >> >>> On 11/29/2016 04:38 PM, David Miller wrote:

[PATCH net-next v4 2/2] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

be applying the delay twice (which results in non-working TX traffic). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Tested-by: Neil Armstrong <narmstr...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 21 +++-- 1 file

[PATCH net-next v4 1/2] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

.). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Tested-by: Neil Armstrong <narmstr...@baylibre.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/net/meson-dwmac.txt | 14 ++ 1 file changed, 14 insertions(+) diff --g

[PATCH net-next v4 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay

Y on Meson GXBB devices and to use a similar configuration than the one we use on Meson GXL devices (by passing a phy-handle to stmmac and defining the PHY in the mdio0 bus - patch 3-6) - add the "amlogic,tx-delay-ns" property to all boards which are using the RGMII PHY (pat

Re: [PATCH v2 0/7] stmmac: dwmac-meson8b: configurable RGMII TX delay

On Mon, Nov 28, 2016 at 2:33 AM, David Miller <da...@davemloft.net> wrote: > From: Martin Blumenstingl <martin.blumensti...@googlemail.com> > Date: Fri, 25 Nov 2016 14:01:49 +0100 > >> Currently the dwmac-meson8b stmmac glue driver uses a hardcoded 1/4 >> cycle T

[PATCH net-next v3 2/2] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

be applying the delay twice (which results in non-working TX traffic). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Tested-by: Neil Armstrong <narmstr...@baylibre.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 21 +++-- 1 file

[PATCH net-next v3 1/2] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

.). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Tested-by: Neil Armstrong <narmstr...@baylibre.com> --- Documentation/devicetree/bindings/net/meson-dwmac.txt | 14 ++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/net/mes

[PATCH net-next v3 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay

6) - add the "amlogic,tx-delay-ns" property to all boards which are using the RGMII PHY (patch 7) Martin Blumenstingl (2): net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable .../devicetree/bindings/

Re: [PATCH v2 1/7] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

On Wed, Nov 30, 2016 at 10:44 PM, Rob Herring <r...@kernel.org> wrote: > On Fri, Nov 25, 2016 at 02:01:50PM +0100, Martin Blumenstingl wrote: >> This allows configuring the RGMII TX clock delay. The RGMII clock is >> generated by underlying hardware of the the Meson

Re: [PATCH net-next v2 0/4] Documentation: net: phy: Improve documentation

interface_t and finally add some links to useful standards documents. > > Changes in v2: > > - clarify a few things in the RGMII section, add a paragraph about common > issues > with RGMII delay mismatches Reviewed-by: Martin Blumenstingl <martin.blumensti...@googlemail.com&g

Re: net: stmmac: Meson GXBB: attempting to execute userspace memory

Hello Heinrich, On Sat, Nov 26, 2016 at 8:53 AM, Heinrich Schuchardt wrote: > For Odroid C2 I have compiled kernel > 4.9.0-rc6-next-20161124-1-gbf7e142 > with one additional patch >

[PATCH 0/2] net: phy: realtek: fix RTL8211F TX-delay handling

this series and send an improved version yourself. These patches are the results of recent discussions, see [0] [0] http://lists.infradead.org/pipermail/linux-amlogic/2016-November/001688.html Martin Blumenstingl (2): Documentation: devicetree: clarify usage of the RGMII phy-modes net: phy

[PATCH 1/2] Documentation: devicetree: clarify usage of the RGMII phy-modes

, which breaks ethernet TX traffic on 1000Mbit/s links. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- Documentation/devicetree/bindings/net/ethernet.txt | 24 ++ 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/Documentation/devi

[PATCH 2/2] net: phy: realtek: fix enabling of the TX-delay for RTL8211F

). This fixes a compatibility problem with some SoCs where the TX-delay was also added by the MAC. With the TX-delay being applied twice the TX clock was off and TX traffic was broken or very slow (<10Mbit/s) on 1000Mbit/s links. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlema

[PATCH v2 7/7] ARM64: dts: amlogic: add the ethernet TX delay configuration

This adds the amlogic,tx-delay-ns with the old (hardcoded) default value of 2ns to all boards which are using an RGMII ethernet PHY. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 2 ++ arch/arm64/bo

[PATCH v2 5/7] ARM64: dts: meson-gxbb-p20x: add reset for the ethernet PHY

This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>

[PATCH v2 2/7] net: stmmac: dwmac-meson8b: make the RGMII TX delay configurable

be applying the delay twice (which results in non-working TX traffic). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 26 +- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drive

[PATCH v2 6/7] ARM64: dts: meson-gxbb-vega-s95: add reset for the ethernet PHY

This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>

[PATCH v2 3/7] ARM64: dts: meson-gx: move the MDIO node to meson-gx

stmmac's MDIO bus is currently only defined in meson-gxl.dtsi. Move it up to meson-gx to allow us to keep the stmmac configuration for meson-gxbb similar to the configuration on meson-gxl. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- arch/arm64/boot/dts/a

[PATCH v2 4/7] ARM64: dts: meson-gxbb-odroidc2: add reset for the ethernet PHY

This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>

[PATCH v2 1/7] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

.). Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> --- Documentation/devicetree/bindings/net/meson-dwmac.txt | 14 ++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/net/meson-dwmac.txt b/Documentation/devicetree/bindings/net

[PATCH v2 0/7] stmmac: dwmac-meson8b: configurable RGMII TX delay

to properly reset the PHY on Meson GXBB devices and to use a similar configuration than the one we use on Meson GXL devices (by passing a phy-handle to stmmac and defining the PHY in the mdio0 bus - patch 3-6) - add the "amlogic,tx-delay-ns" property to all boards which are using the RGMII

Re: [net-next PATCH v1 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay

On Thu, Nov 24, 2016 at 7:55 PM, Florian Fainelli <f.faine...@gmail.com> wrote: > Le 24/11/2016 à 09:05, Martin Blumenstingl a écrit : >> On Thu, Nov 24, 2016 at 4:56 PM, Jerome Brunet <jbru...@baylibre.com> wrote: >>> On Thu, 2016-11-24 at 15:34 +0100, Martin Blum

Re: [RFC PATCH net v2 0/3] Fix OdroidC2 Gigabit Tx link issue

On Thu, Nov 24, 2016 at 5:01 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Thu, 2016-11-24 at 15:40 +0100, Martin Blumenstingl wrote: >> Hi Jerome, >> >> On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet <jbru...@baylibre.com> >> wrote: >> > >

Re: [net-next PATCH v1 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay

On Thu, Nov 24, 2016 at 4:56 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Thu, 2016-11-24 at 15:34 +0100, Martin Blumenstingl wrote: >> Currently the dwmac-meson8b stmmac glue driver uses a hardcoded 1/4 >> cycle TX clock delay. This seems to work fine for many b

Re: [net-next PATCH v1 1/2] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

Hi Andrew, On Thu, Nov 24, 2016 at 4:48 PM, Andrew Lunn wrote: >> The configuration values are provided as preprocessor macros to make the >> devicetree files easier to read. > > Hi Martin > > If i'm reading the code/comments correctly, you can set the delay to > 0, 2, 4 or 6ns?

Re: [RFC PATCH net v2 0/3] Fix OdroidC2 Gigabit Tx link issue

Hi Jerome, On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet wrote: > This patchset fixes an issue with the OdroidC2 board (DWMAC + RTL8211F). > Initially reported as a low Tx throughput issue at gigabit speed, the > platform enters LPI too often. This eventually break the

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