Re: [v2 PATCH 1/1] tg3: fix meaningless hw_stats reading after tg3_halt memset 0 hw_stats

2018-05-04 Thread Zumeng Chen
On 05/03/2018 01:04 PM, Michael Chan wrote: On Wed, May 2, 2018 at 5:30 PM, Zumeng Chen wrote: On 2018年05月03日 01:32, Michael Chan wrote: On Wed, May 2, 2018 at 3:27 AM, Zumeng Chen wrote: On 2018年05月02日 13:12, Michael Chan wrote: On Tue, May 1, 2018 at 5:42 PM, Zumeng Chen wrote: diff

Re: [v2 PATCH 1/1] tg3: fix meaningless hw_stats reading after tg3_halt memset 0 hw_stats

2018-05-02 Thread Zumeng Chen
On 2018年05月03日 01:32, Michael Chan wrote: On Wed, May 2, 2018 at 3:27 AM, Zumeng Chen wrote: On 2018年05月02日 13:12, Michael Chan wrote: On Tue, May 1, 2018 at 5:42 PM, Zumeng Chen wrote: diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h index 3b5e98e

Re: [v2 PATCH 1/1] tg3: fix meaningless hw_stats reading after tg3_halt memset 0 hw_stats

2018-05-02 Thread Zumeng Chen
On 2018年05月02日 13:12, Michael Chan wrote: On Tue, May 1, 2018 at 5:42 PM, Zumeng Chen wrote: diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h index 3b5e98e..c61d83c 100644 --- a/drivers/net/ethernet/broadcom/tg3.h +++ b/drivers/net/ethernet/broadcom/tg3

[v2 PATCH 1/1] tg3: fix meaningless hw_stats reading after tg3_halt memset 0 hw_stats

2018-05-01 Thread Zumeng Chen
From: Zumeng Chen Reading hw_stats will get the actual data after a sucessfull tg3_reset_hw, which actually after tg3_timer_start, so TG3_FLAG_HALT is introduced to tell tg3_get_stats64 when hw_stats is ready to read. It will be set after having done memset(tp->hw_stats, 0) in tg3_halt and

Re: [PATCH 1/1] tg3: fix meaningless hw_stats reading after tg3_halt memset 0 hw_stats

2018-04-28 Thread Zumeng Chen
On 2018年04月29日 02:36, Michael Chan wrote: On Fri, Apr 27, 2018 at 8:15 PM, Zumeng Chen wrote: diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h index 3b5e98e..6727d93 100644 --- a/drivers/net/ethernet/broadcom/tg3.h +++ b/drivers/net/ethernet/broadcom/tg3

[PATCH 1/1] tg3: fix meaningless hw_stats reading after tg3_halt memset 0 hw_stats

2018-04-27 Thread Zumeng Chen
400bf3 a8c27bfd d65f03c0 d503201f (d421) ---[ end trace e214990b7cc445ce ]--- Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Zumeng Chen --- drivers/net/ethernet/broadcom/tg3.c | 13 - drivers/net/ethernet/broadcom/tg3.h | 1 + 2 files changed, 9 i

Re: [PATCH 1/1] gianfar: fix a flooded alignment reports because of padding issue.

2017-12-04 Thread Zumeng Chen
On 12/05/2017 12:06 AM, Claudiu Manoil wrote: -Original Message- From: Zumeng Chen [mailto:zumeng.c...@gmail.com] Sent: Monday, December 04, 2017 5:22 AM To: netdev@vger.kernel.org; linux-ker...@vger.kernel.org Cc: Claudiu Manoil ; da...@davemloft.net Subject: [PATCH 1/1] gianfar: fix a

Re: [PATCH 1/1] gianfar: fix a flooded alignment reports because of padding issue.

2017-12-04 Thread Zumeng Chen
On 12/05/2017 12:06 AM, Claudiu Manoil wrote: -Original Message- From: Zumeng Chen [mailto:zumeng.c...@gmail.com] Sent: Monday, December 04, 2017 5:22 AM To: netdev@vger.kernel.org; linux-ker...@vger.kernel.org Cc: Claudiu Manoil ; da...@davemloft.net Subject: [PATCH 1/1] gianfar: fix a

[PATCH 1/1] gianfar: fix a flooded alignment reports because of padding issue.

2017-12-03 Thread Zumeng Chen
800805e8>] (irq_thread+0x16c/0x244) [<800805e8>] (irq_thread) from [<8004e490>] (kthread+0xe8/0x104) [<8004e490>] (kthread) from [<8000fda8>] (ret_from_fork+0x14/0x2c) Signed-off-by: Zumeng Chen --- Hi, This patch has been seen in arm and validated, and compile, boo

[PATCH v2 1/1] net: macb: ensure ordering write to re-enable RX smoothly

2016-11-28 Thread Zumeng Chen
When a hardware issue happened as described by inline comments, the register write pattern looks like the following: + wmb(); There might be a memory barrier between these two write operations, so add wmb to ensure an flip from 0 to 1 for NCR. Signed-off-by: Zumeng Chen --- V2 changes: Add

Re: [PATCH 1/1] net: macb: ensure ordering write to re-enable RX smoothly

2016-11-28 Thread Zumeng Chen
On 2016年11月28日 17:22, Nicolas Ferre wrote: Le 28/11/2016 à 08:57, Zumeng Chen a écrit : When a hardware issue happened as described by inline comments, the register write pattern looks like the following: + wmb(); There might be a memory barrier between these two write operations

[PATCH 1/1] net: macb: ensure ordering write to re-enable RX smoothly

2016-11-27 Thread Zumeng Chen
When a hardware issue happened as described by inline comments, the register write pattern looks like the following: + wmb(); There might be a memory barrier between these two write operations, so add wmb to ensure an flip from 0 to 1 for NCR. Signed-off-by: Zumeng Chen --- drivers