Re: [PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware

2016-07-12 Thread Herbert Xu
On Mon, Jul 11, 2016 at 11:28:07AM -0700, Yeshaswi M R Gowda wrote: > > + u_ctx = ULD_CTX(ctx); > + if (cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0], ctx->tx_channel_id)) > + return -EBUSY; You cannot just return -EBUSY. If the request has the MAY_BACKLOG bit set, it must be

Re: [PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware

2016-07-11 Thread Joe Perches
On Mon, 2016-07-11 at 11:28 -0700, Yeshaswi M R Gowda wrote: > The Chelsio's Crypto Hardware can perform the following operations: > SHA1, SHA224, SHA256, SHA384 and SHA512, HMAC(SHA1), HMAC(SHA224), > HMAC(SHA256), HMAC(SHA384), HAMC(SHA512), AES-128-CBC, AES-192-CBC, > AES-256-CBC, AES-128-XTS,

[PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware

2016-07-11 Thread Yeshaswi M R Gowda
The Chelsio's Crypto Hardware can perform the following operations: SHA1, SHA224, SHA256, SHA384 and SHA512, HMAC(SHA1), HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HAMC(SHA512), AES-128-CBC, AES-192-CBC, AES-256-CBC, AES-128-XTS, AES-256-XTS This patch implements the driver for above mentioned