If the register access function selection will truly be an 'if' test
cascade, then I ACK these patches.
Jeff
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From: Jeff Garzik <[EMAIL PROTECTED]>
Date: Thu, 28 Jul 2005 16:29:11 -0400
> If the register access function selection will truly be an 'if' test
> cascade, then I ACK these patches.
Yeah, it would. I'll more deeply review and integrate Michael's work
later today.
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On Thu, Jul 28, 2005 at 10:33:12AM -0700, Michael Chan wrote:
> If on the other hand, tg3 is loaded on different chips all using different
> access
> function pointers, and there is steady and equal amount of traffic going
> through
> all these chips, I suppose the call destinations will no longer
Jeff Garzik wrote:
> In x86-based CPUs at least (the largest tg3 platform), branch
> prediction
> often prefers
>
> if (...)
> direct_func_1()
> else
> direct_func_2()
>
> to
>
> tp->func()
>
The following is from Intel Pentium 4 and Intel Xeon
From: "Michael Chan" <[EMAIL PROTECTED]>
Date: Wed, 27 Jul 2005 22:33:32 -0700
> But with so many different workaround methods
> (TG3_FLAG_MBOX_WRITE_REORDER, TG3_FLAG_TXD_MBOX_HWBUG,
> TG3_FLG2_ICH_WORKAROUND, TG3_FLAG_5701_REG_WRITE_BUG, etc), it's
> more like:
>
> if (...)
>
Jeff Garzik wrote:
> Is this theory, or it has been actually measured?
>
> In x86-based CPUs at least (the largest tg3 platform), branch
> prediction
> often prefers
>
> if (...)
> direct_func_1()
> else
> direct_func_2()
>
> to
>
> tp->func()
>
From: Jeff Garzik <[EMAIL PROTECTED]>
Date: Wed, 27 Jul 2005 23:44:51 -0400
> In x86-based CPUs at least (the largest tg3 platform), branch prediction
> often prefers
>
> if (...)
> direct_func_1()
> else
> direct_func_2()
>
> to
>
> tp->func()
In
Michael Chan wrote:
This patch adds the basic function pointers to do register accesses in
the fast path. This was suggested by David Miller. The idea is that
various register access methods for different hardware errata can easily
be implemented with these function pointers and performance will
This patch adds the basic function pointers to do register accesses in
the fast path. This was suggested by David Miller. The idea is that
various register access methods for different hardware errata can easily
be implemented with these function pointers and performance will not be
degraded on chi
