On Wed, Apr 4, 2018 at 2:45 PM, Icenowy Zheng wrote:
> 在 2018-04-03二的 11:50 +0200,Maxime Ripard写道:
>> On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
>> > On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
>> > > On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
>> > > wrot
在 2018-04-03二的 11:50 +0200,Maxime Ripard写道:
> On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
> > On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
> > > On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
> > > wrote:
> > > > On Sat, Mar 17, 2018 at 05:28:47PM +0800, Chen-Yu
On Tue, Apr 03, 2018 at 05:58:05PM +0800, Chen-Yu Tsai wrote:
> On Tue, Apr 3, 2018 at 5:54 PM, Icenowy Zheng wrote:
> >
> >
> > 于 2018年4月3日 GMT+08:00 下午5:53:08, Chen-Yu Tsai 写到:
> >>On Tue, Apr 3, 2018 at 5:50 PM, Maxime Ripard
> >> wrote:
> >>> On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime R
On Tue, Apr 3, 2018 at 5:54 PM, Icenowy Zheng wrote:
>
>
> 于 2018年4月3日 GMT+08:00 下午5:53:08, Chen-Yu Tsai 写到:
>>On Tue, Apr 3, 2018 at 5:50 PM, Maxime Ripard
>> wrote:
>>> On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wro
于 2018年4月3日 GMT+08:00 下午5:53:08, Chen-Yu Tsai 写到:
>On Tue, Apr 3, 2018 at 5:50 PM, Maxime Ripard
> wrote:
>> On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
>>> On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
>>> > On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
>>> >
On Tue, Apr 3, 2018 at 5:50 PM, Maxime Ripard wrote:
> On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
>> On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
>> > On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
>> > wrote:
>> > > On Sat, Mar 17, 2018 at 05:28:47PM +0800, C
于 2018年4月3日 GMT+08:00 下午5:50:05, Maxime Ripard 写到:
>On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
>> On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
>> > On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
>> > wrote:
>> > > On Sat, Mar 17, 2018 at 05:28:47PM +0800, Ch
On Tue, Apr 03, 2018 at 11:48:45AM +0200, Maxime Ripard wrote:
> On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
> > On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
> > wrote:
> > > On Sat, Mar 17, 2018 at 05:28:47PM +0800, Chen-Yu Tsai wrote:
> > >> From: Icenowy Zheng
> > >>
> > >>
On Tue, Mar 20, 2018 at 03:15:02PM +0800, Chen-Yu Tsai wrote:
> On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
> wrote:
> > On Sat, Mar 17, 2018 at 05:28:47PM +0800, Chen-Yu Tsai wrote:
> >> From: Icenowy Zheng
> >>
> >> There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in
> >
On Mon, Mar 19, 2018 at 5:31 AM, Maxime Ripard
wrote:
> On Sat, Mar 17, 2018 at 05:28:47PM +0800, Chen-Yu Tsai wrote:
>> From: Icenowy Zheng
>>
>> There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in
>> the syscon part, in the CCU of R40 SoC.
>>
>> Export a regmap of the CCU.
On Sat, Mar 17, 2018 at 05:28:47PM +0800, Chen-Yu Tsai wrote:
> From: Icenowy Zheng
>
> There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in
> the syscon part, in the CCU of R40 SoC.
>
> Export a regmap of the CCU.
>
> Read access is not restricted to all registers, but only
From: Icenowy Zheng
There's a GMAC configuration register, which exists on A64/A83T/H3/H5 in
the syscon part, in the CCU of R40 SoC.
Export a regmap of the CCU.
Read access is not restricted to all registers, but only the GMAC
register is allowed to be written.
Signed-off-by: Icenowy Zheng
Si
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